/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-e106359-m [2022-04-15 00:40:30,137 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-15 00:40:30,139 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-15 00:40:30,157 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-15 00:40:30,174 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-15 00:40:30,175 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-15 00:40:30,176 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-15 00:40:30,177 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-15 00:40:30,178 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-15 00:40:30,179 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-15 00:40:30,181 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-15 00:40:30,184 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-15 00:40:30,186 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-15 00:40:30,187 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-15 00:40:30,187 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-15 00:40:30,188 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-15 00:40:30,189 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-15 00:40:30,193 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-15 00:40:30,198 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-15 00:40:30,198 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-15 00:40:30,201 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-15 00:40:30,201 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-15 00:40:30,221 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-15 00:40:30,221 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-15 00:40:30,222 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-15 00:40:30,222 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-15 00:40:30,223 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-15 00:40:30,223 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-15 00:40:30,223 INFO L138 SettingsManager]: * Use SBE=true [2022-04-15 00:40:30,223 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-15 00:40:30,223 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-15 00:40:30,224 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-15 00:40:30,224 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 00:40:30,225 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-15 00:40:30,225 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-15 00:40:30,225 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-15 00:40:30,225 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-15 00:40:30,225 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-15 00:40:30,225 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-15 00:40:30,225 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-15 00:40:30,225 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-15 00:40:30,227 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-15 00:40:30,227 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-15 00:40:30,422 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-15 00:40:30,441 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-15 00:40:30,443 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-15 00:40:30,444 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-15 00:40:30,444 INFO L275 PluginConnector]: CDTParser initialized [2022-04-15 00:40:30,445 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-15 00:40:30,494 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8df2eff62/2183a21a7c3749819d915abc39558a64/FLAGb810d0cd5 [2022-04-15 00:40:30,862 INFO L306 CDTParser]: Found 1 translation units. [2022-04-15 00:40:30,862 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-15 00:40:30,866 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8df2eff62/2183a21a7c3749819d915abc39558a64/FLAGb810d0cd5 [2022-04-15 00:40:30,878 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8df2eff62/2183a21a7c3749819d915abc39558a64 [2022-04-15 00:40:30,880 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-15 00:40:30,882 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-15 00:40:30,883 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-15 00:40:30,883 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-15 00:40:30,886 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-15 00:40:30,887 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 12:40:30" (1/1) ... [2022-04-15 00:40:30,888 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1d8e15b7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:30, skipping insertion in model container [2022-04-15 00:40:30,888 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 15.04 12:40:30" (1/1) ... [2022-04-15 00:40:30,894 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-15 00:40:30,903 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-15 00:40:31,086 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-15 00:40:31,104 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 00:40:31,109 INFO L203 MainTranslator]: Completed pre-run [2022-04-15 00:40:31,119 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-15 00:40:31,125 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-15 00:40:31,134 INFO L208 MainTranslator]: Completed translation [2022-04-15 00:40:31,135 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31 WrapperNode [2022-04-15 00:40:31,136 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-15 00:40:31,137 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-15 00:40:31,137 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-15 00:40:31,138 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-15 00:40:31,144 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,144 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,152 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,152 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,161 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,164 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,165 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,166 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-15 00:40:31,167 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-15 00:40:31,167 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-15 00:40:31,167 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-15 00:40:31,168 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,174 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-15 00:40:31,181 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:40:31,195 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-15 00:40:31,196 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-15 00:40:31,227 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-15 00:40:31,227 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-15 00:40:31,227 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-15 00:40:31,227 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-15 00:40:31,228 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-15 00:40:31,228 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-15 00:40:31,228 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-15 00:40:31,228 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-15 00:40:31,229 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-15 00:40:31,230 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-15 00:40:31,230 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-15 00:40:31,230 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-15 00:40:31,230 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-15 00:40:31,230 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-15 00:40:31,230 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-15 00:40:31,230 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-15 00:40:31,288 INFO L234 CfgBuilder]: Building ICFG [2022-04-15 00:40:31,290 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-15 00:40:31,466 INFO L275 CfgBuilder]: Performing block encoding [2022-04-15 00:40:31,470 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-15 00:40:31,470 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-15 00:40:31,471 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 12:40:31 BoogieIcfgContainer [2022-04-15 00:40:31,471 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-15 00:40:31,476 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-15 00:40:31,477 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-15 00:40:31,478 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-15 00:40:31,489 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 12:40:31" (1/1) ... [2022-04-15 00:40:31,491 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-15 00:40:31,523 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.04 12:40:31 BasicIcfg [2022-04-15 00:40:31,523 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-15 00:40:31,524 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-15 00:40:31,524 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-15 00:40:31,526 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-15 00:40:31,526 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 15.04 12:40:30" (1/4) ... [2022-04-15 00:40:31,527 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d213ab2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 12:40:31, skipping insertion in model container [2022-04-15 00:40:31,527 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 15.04 12:40:31" (2/4) ... [2022-04-15 00:40:31,527 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d213ab2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.04 12:40:31, skipping insertion in model container [2022-04-15 00:40:31,527 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.04 12:40:31" (3/4) ... [2022-04-15 00:40:31,527 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d213ab2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.04 12:40:31, skipping insertion in model container [2022-04-15 00:40:31,528 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.04 12:40:31" (4/4) ... [2022-04-15 00:40:31,528 INFO L111 eAbstractionObserver]: Analyzing ICFG mcmillan2006.iqvasr [2022-04-15 00:40:31,531 INFO L202 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-15 00:40:31,532 INFO L161 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-15 00:40:31,585 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-15 00:40:31,591 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-15 00:40:31,591 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-15 00:40:31,609 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:31,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-15 00:40:31,613 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:40:31,614 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:40:31,615 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:40:31,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:40:31,623 INFO L85 PathProgramCache]: Analyzing trace with hash 1476197606, now seen corresponding path program 1 times [2022-04-15 00:40:31,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:40:31,629 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14604494] [2022-04-15 00:40:31,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:31,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:40:31,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:31,818 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:40:31,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:31,842 INFO L290 TraceCheckUtils]: 0: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-15 00:40:31,842 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-15 00:40:31,842 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-15 00:40:31,846 INFO L272 TraceCheckUtils]: 0: Hoare triple {28#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:40:31,847 INFO L290 TraceCheckUtils]: 1: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-15 00:40:31,848 INFO L290 TraceCheckUtils]: 2: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-15 00:40:31,848 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-15 00:40:31,848 INFO L272 TraceCheckUtils]: 4: Hoare triple {28#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-15 00:40:31,849 INFO L290 TraceCheckUtils]: 5: Hoare triple {28#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {28#true} is VALID [2022-04-15 00:40:31,852 INFO L290 TraceCheckUtils]: 6: Hoare triple {28#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {28#true} is VALID [2022-04-15 00:40:31,853 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#true} [82] L30-3-->L30-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-15 00:40:31,853 INFO L290 TraceCheckUtils]: 8: Hoare triple {29#false} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {29#false} is VALID [2022-04-15 00:40:31,854 INFO L290 TraceCheckUtils]: 9: Hoare triple {29#false} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {29#false} is VALID [2022-04-15 00:40:31,854 INFO L272 TraceCheckUtils]: 10: Hoare triple {29#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {29#false} is VALID [2022-04-15 00:40:31,854 INFO L290 TraceCheckUtils]: 11: Hoare triple {29#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29#false} is VALID [2022-04-15 00:40:31,854 INFO L290 TraceCheckUtils]: 12: Hoare triple {29#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-15 00:40:31,855 INFO L290 TraceCheckUtils]: 13: Hoare triple {29#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-15 00:40:31,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:31,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:40:31,856 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [14604494] [2022-04-15 00:40:31,856 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [14604494] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 00:40:31,856 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 00:40:31,857 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-15 00:40:31,858 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330378605] [2022-04-15 00:40:31,858 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 00:40:31,861 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 00:40:31,862 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:40:31,864 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:31,896 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:31,897 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-15 00:40:31,897 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:40:31,916 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-15 00:40:31,917 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 00:40:31,919 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:32,013 INFO L93 Difference]: Finished difference Result 41 states and 49 transitions. [2022-04-15 00:40:32,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-15 00:40:32,013 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 00:40:32,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:40:32,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 49 transitions. [2022-04-15 00:40:32,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 49 transitions. [2022-04-15 00:40:32,023 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 49 transitions. [2022-04-15 00:40:32,079 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:32,087 INFO L225 Difference]: With dead ends: 41 [2022-04-15 00:40:32,088 INFO L226 Difference]: Without dead ends: 20 [2022-04-15 00:40:32,090 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-15 00:40:32,093 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 18 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 00:40:32,094 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 29 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 00:40:32,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-15 00:40:32,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-15 00:40:32,117 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:40:32,117 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 00:40:32,118 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 00:40:32,118 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 00:40:32,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:32,121 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-15 00:40:32,121 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-15 00:40:32,122 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:32,122 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:32,122 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-15 00:40:32,122 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-15 00:40:32,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:32,124 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-15 00:40:32,125 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-15 00:40:32,125 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:32,125 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:32,125 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:40:32,125 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:40:32,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 00:40:32,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2022-04-15 00:40:32,128 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 21 transitions. Word has length 14 [2022-04-15 00:40:32,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:40:32,129 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 21 transitions. [2022-04-15 00:40:32,129 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,130 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-15 00:40:32,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-15 00:40:32,130 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:40:32,130 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:40:32,131 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-15 00:40:32,131 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:40:32,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:40:32,132 INFO L85 PathProgramCache]: Analyzing trace with hash -1931266009, now seen corresponding path program 1 times [2022-04-15 00:40:32,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:40:32,132 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602486657] [2022-04-15 00:40:32,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:32,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:40:32,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:32,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:40:32,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:32,251 INFO L290 TraceCheckUtils]: 0: Hoare triple {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {156#true} is VALID [2022-04-15 00:40:32,251 INFO L290 TraceCheckUtils]: 1: Hoare triple {156#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-15 00:40:32,251 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {156#true} {156#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-15 00:40:32,252 INFO L272 TraceCheckUtils]: 0: Hoare triple {156#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:40:32,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {156#true} is VALID [2022-04-15 00:40:32,253 INFO L290 TraceCheckUtils]: 2: Hoare triple {156#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-15 00:40:32,253 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {156#true} {156#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-15 00:40:32,253 INFO L272 TraceCheckUtils]: 4: Hoare triple {156#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-15 00:40:32,253 INFO L290 TraceCheckUtils]: 5: Hoare triple {156#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {156#true} is VALID [2022-04-15 00:40:32,254 INFO L290 TraceCheckUtils]: 6: Hoare triple {156#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {161#(= main_~i~0 0)} is VALID [2022-04-15 00:40:32,255 INFO L290 TraceCheckUtils]: 7: Hoare triple {161#(= main_~i~0 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {162#(<= main_~n~0 0)} is VALID [2022-04-15 00:40:32,255 INFO L290 TraceCheckUtils]: 8: Hoare triple {162#(<= main_~n~0 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {163#(and (<= main_~n~0 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:32,256 INFO L290 TraceCheckUtils]: 9: Hoare triple {163#(and (<= main_~n~0 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {157#false} is VALID [2022-04-15 00:40:32,256 INFO L272 TraceCheckUtils]: 10: Hoare triple {157#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {157#false} is VALID [2022-04-15 00:40:32,256 INFO L290 TraceCheckUtils]: 11: Hoare triple {157#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {157#false} is VALID [2022-04-15 00:40:32,257 INFO L290 TraceCheckUtils]: 12: Hoare triple {157#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {157#false} is VALID [2022-04-15 00:40:32,257 INFO L290 TraceCheckUtils]: 13: Hoare triple {157#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {157#false} is VALID [2022-04-15 00:40:32,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:32,257 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:40:32,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [602486657] [2022-04-15 00:40:32,258 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [602486657] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-15 00:40:32,258 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-15 00:40:32,258 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-15 00:40:32,258 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [836309056] [2022-04-15 00:40:32,258 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-15 00:40:32,259 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 00:40:32,260 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:40:32,260 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,303 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:32,304 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-15 00:40:32,304 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:40:32,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-15 00:40:32,305 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-04-15 00:40:32,305 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:32,447 INFO L93 Difference]: Finished difference Result 34 states and 36 transitions. [2022-04-15 00:40:32,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-15 00:40:32,447 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-15 00:40:32,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:40:32,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-15 00:40:32,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-15 00:40:32,458 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 36 transitions. [2022-04-15 00:40:32,483 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:32,484 INFO L225 Difference]: With dead ends: 34 [2022-04-15 00:40:32,484 INFO L226 Difference]: Without dead ends: 22 [2022-04-15 00:40:32,485 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-04-15 00:40:32,486 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-15 00:40:32,486 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 29 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-15 00:40:32,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-15 00:40:32,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-15 00:40:32,490 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:40:32,490 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 00:40:32,491 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 00:40:32,491 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 00:40:32,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:32,493 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-15 00:40:32,493 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-15 00:40:32,493 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:32,493 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:32,494 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-15 00:40:32,494 INFO L87 Difference]: Start difference. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-15 00:40:32,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:32,496 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-15 00:40:32,496 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-15 00:40:32,496 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:32,496 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:32,496 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:40:32,496 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:40:32,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-15 00:40:32,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2022-04-15 00:40:32,499 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 22 transitions. Word has length 14 [2022-04-15 00:40:32,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:40:32,499 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 22 transitions. [2022-04-15 00:40:32,500 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:32,501 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 22 transitions. [2022-04-15 00:40:32,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-15 00:40:32,501 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:40:32,502 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:40:32,502 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-15 00:40:32,502 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:40:32,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:40:32,504 INFO L85 PathProgramCache]: Analyzing trace with hash -1791050651, now seen corresponding path program 1 times [2022-04-15 00:40:32,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:40:32,504 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650454136] [2022-04-15 00:40:32,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:32,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:40:32,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:32,706 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:40:32,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:32,724 INFO L290 TraceCheckUtils]: 0: Hoare triple {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-15 00:40:32,724 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:32,724 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:32,725 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:40:32,725 INFO L290 TraceCheckUtils]: 1: Hoare triple {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-15 00:40:32,726 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:32,726 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:32,727 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:32,727 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-15 00:40:32,728 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-15 00:40:32,728 INFO L290 TraceCheckUtils]: 7: Hoare triple {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {300#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-15 00:40:32,729 INFO L290 TraceCheckUtils]: 8: Hoare triple {300#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-15 00:40:32,731 INFO L290 TraceCheckUtils]: 9: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-15 00:40:32,732 INFO L290 TraceCheckUtils]: 10: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:32,736 INFO L290 TraceCheckUtils]: 11: Hoare triple {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:32,738 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {304#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:40:32,742 INFO L290 TraceCheckUtils]: 13: Hoare triple {304#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {305#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:40:32,742 INFO L290 TraceCheckUtils]: 14: Hoare triple {305#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-15 00:40:32,742 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-15 00:40:32,743 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:32,743 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:40:32,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [650454136] [2022-04-15 00:40:32,743 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [650454136] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:40:32,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1135970715] [2022-04-15 00:40:32,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:32,743 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:32,744 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:40:32,756 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:40:32,772 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-15 00:40:32,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:32,805 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-15 00:40:32,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:32,820 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:40:32,896 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-04-15 00:40:32,971 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-04-15 00:40:33,013 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:33,014 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-15 00:40:33,014 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:33,014 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:33,014 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:33,014 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-15 00:40:33,016 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-15 00:40:33,016 INFO L290 TraceCheckUtils]: 7: Hoare triple {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-15 00:40:33,017 INFO L290 TraceCheckUtils]: 8: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-15 00:40:33,017 INFO L290 TraceCheckUtils]: 9: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-15 00:40:33,018 INFO L290 TraceCheckUtils]: 10: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:33,018 INFO L290 TraceCheckUtils]: 11: Hoare triple {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:33,019 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {346#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:40:33,019 INFO L290 TraceCheckUtils]: 13: Hoare triple {346#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {350#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:40:33,020 INFO L290 TraceCheckUtils]: 14: Hoare triple {350#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-15 00:40:33,020 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-15 00:40:33,020 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:33,020 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:40:33,137 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-04-15 00:40:33,142 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2022-04-15 00:40:33,184 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-15 00:40:33,185 INFO L290 TraceCheckUtils]: 14: Hoare triple {350#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-15 00:40:33,185 INFO L290 TraceCheckUtils]: 13: Hoare triple {346#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {350#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:40:33,187 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {346#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:40:33,188 INFO L290 TraceCheckUtils]: 11: Hoare triple {369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:33,188 INFO L290 TraceCheckUtils]: 10: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:40:33,189 INFO L290 TraceCheckUtils]: 9: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-15 00:40:33,189 INFO L290 TraceCheckUtils]: 8: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-15 00:40:33,190 INFO L290 TraceCheckUtils]: 7: Hoare triple {383#(= 0 (* main_~i~0 4))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-15 00:40:33,191 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {383#(= 0 (* main_~i~0 4))} is VALID [2022-04-15 00:40:33,191 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-15 00:40:33,191 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:33,191 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:33,192 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:33,192 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-15 00:40:33,192 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-15 00:40:33,192 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:33,193 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1135970715] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:40:33,193 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:40:33,193 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 15 [2022-04-15 00:40:33,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367633824] [2022-04-15 00:40:33,193 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:40:33,194 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 00:40:33,195 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:40:33,195 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:33,215 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:33,216 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-15 00:40:33,216 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:40:33,216 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-15 00:40:33,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-15 00:40:33,218 INFO L87 Difference]: Start difference. First operand 21 states and 22 transitions. Second operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:33,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:33,627 INFO L93 Difference]: Finished difference Result 32 states and 33 transitions. [2022-04-15 00:40:33,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-15 00:40:33,627 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-15 00:40:33,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:40:33,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:33,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 33 transitions. [2022-04-15 00:40:33,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:33,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 33 transitions. [2022-04-15 00:40:33,637 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 33 transitions. [2022-04-15 00:40:33,674 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:33,676 INFO L225 Difference]: With dead ends: 32 [2022-04-15 00:40:33,676 INFO L226 Difference]: Without dead ends: 30 [2022-04-15 00:40:33,677 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=412, Unknown=0, NotChecked=0, Total=506 [2022-04-15 00:40:33,680 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 41 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 156 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:40:33,682 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [41 Valid, 54 Invalid, 156 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:40:33,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-15 00:40:33,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 27. [2022-04-15 00:40:33,689 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:40:33,689 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:33,689 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:33,691 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:33,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:33,694 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-15 00:40:33,694 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-15 00:40:33,695 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:33,695 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:33,695 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-15 00:40:33,696 INFO L87 Difference]: Start difference. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-15 00:40:33,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:33,703 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-15 00:40:33,703 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-15 00:40:33,703 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:33,703 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:33,704 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:40:33,704 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:40:33,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:33,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2022-04-15 00:40:33,706 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 16 [2022-04-15 00:40:33,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:40:33,707 INFO L478 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-04-15 00:40:33,707 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-15 00:40:33,707 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2022-04-15 00:40:33,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-15 00:40:33,708 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:40:33,708 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:40:33,731 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-15 00:40:33,908 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:33,909 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:40:33,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:40:33,909 INFO L85 PathProgramCache]: Analyzing trace with hash 1619165115, now seen corresponding path program 1 times [2022-04-15 00:40:33,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:40:33,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912315944] [2022-04-15 00:40:33,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:33,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:40:33,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:33,995 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:40:33,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:34,000 INFO L290 TraceCheckUtils]: 0: Hoare triple {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-15 00:40:34,000 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,000 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,000 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-04-15 00:40:34,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:34,005 INFO L290 TraceCheckUtils]: 0: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-15 00:40:34,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,005 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,006 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-15 00:40:34,007 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:40:34,007 INFO L290 TraceCheckUtils]: 1: Hoare triple {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-15 00:40:34,007 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,008 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,008 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,008 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-15 00:40:34,011 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {571#(= main_~i~0 0)} is VALID [2022-04-15 00:40:34,012 INFO L290 TraceCheckUtils]: 7: Hoare triple {571#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {571#(= main_~i~0 0)} is VALID [2022-04-15 00:40:34,012 INFO L290 TraceCheckUtils]: 8: Hoare triple {571#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:34,013 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-15 00:40:34,013 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-15 00:40:34,014 INFO L290 TraceCheckUtils]: 11: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-15 00:40:34,014 INFO L272 TraceCheckUtils]: 12: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-15 00:40:34,014 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-15 00:40:34,014 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,014 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,015 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-15 00:40:34,015 INFO L290 TraceCheckUtils]: 17: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-15 00:40:34,016 INFO L290 TraceCheckUtils]: 18: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {579#(<= main_~n~0 main_~i~1)} is VALID [2022-04-15 00:40:34,019 INFO L290 TraceCheckUtils]: 19: Hoare triple {579#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-15 00:40:34,019 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-15 00:40:34,019 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-15 00:40:34,019 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-15 00:40:34,020 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-15 00:40:34,020 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:34,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:40:34,020 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912315944] [2022-04-15 00:40:34,020 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [912315944] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:40:34,020 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2134953321] [2022-04-15 00:40:34,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:34,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:34,021 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:40:34,023 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:40:34,024 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-15 00:40:34,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:34,062 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-15 00:40:34,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:34,079 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:40:34,216 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,217 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-15 00:40:34,217 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,217 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,217 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,217 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-15 00:40:34,227 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {602#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:34,228 INFO L290 TraceCheckUtils]: 7: Hoare triple {602#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {602#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:34,228 INFO L290 TraceCheckUtils]: 8: Hoare triple {602#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:34,228 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-15 00:40:34,229 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-15 00:40:34,229 INFO L290 TraceCheckUtils]: 11: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-15 00:40:34,229 INFO L272 TraceCheckUtils]: 12: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-15 00:40:34,229 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-15 00:40:34,229 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,230 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,230 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-15 00:40:34,230 INFO L290 TraceCheckUtils]: 17: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-15 00:40:34,231 INFO L290 TraceCheckUtils]: 18: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {640#(and (<= 1 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-15 00:40:34,231 INFO L290 TraceCheckUtils]: 19: Hoare triple {640#(and (<= 1 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-15 00:40:34,231 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-15 00:40:34,232 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-15 00:40:34,232 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-15 00:40:34,232 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-15 00:40:34,232 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:34,232 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:40:34,398 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-15 00:40:34,398 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-15 00:40:34,399 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-15 00:40:34,399 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-15 00:40:34,400 INFO L290 TraceCheckUtils]: 19: Hoare triple {579#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-15 00:40:34,401 INFO L290 TraceCheckUtils]: 18: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {579#(<= main_~n~0 main_~i~1)} is VALID [2022-04-15 00:40:34,401 INFO L290 TraceCheckUtils]: 17: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:34,402 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {671#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:34,402 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,402 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,403 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-15 00:40:34,403 INFO L272 TraceCheckUtils]: 12: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-15 00:40:34,403 INFO L290 TraceCheckUtils]: 11: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:34,404 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:34,404 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-15 00:40:34,405 INFO L290 TraceCheckUtils]: 8: Hoare triple {602#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:34,405 INFO L290 TraceCheckUtils]: 7: Hoare triple {602#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {602#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:34,406 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {602#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:34,406 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-15 00:40:34,406 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,406 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,406 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,406 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-15 00:40:34,406 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-15 00:40:34,407 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:34,407 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2134953321] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:40:34,407 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:40:34,407 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 12 [2022-04-15 00:40:34,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974628665] [2022-04-15 00:40:34,407 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:40:34,408 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-15 00:40:34,410 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:40:34,410 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:34,437 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:34,437 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-15 00:40:34,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:40:34,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-15 00:40:34,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-04-15 00:40:34,439 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:34,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:34,673 INFO L93 Difference]: Finished difference Result 46 states and 49 transitions. [2022-04-15 00:40:34,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-15 00:40:34,673 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-15 00:40:34,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:40:34,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:34,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 43 transitions. [2022-04-15 00:40:34,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:34,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 43 transitions. [2022-04-15 00:40:34,683 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 43 transitions. [2022-04-15 00:40:34,710 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:34,715 INFO L225 Difference]: With dead ends: 46 [2022-04-15 00:40:34,715 INFO L226 Difference]: Without dead ends: 30 [2022-04-15 00:40:34,716 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2022-04-15 00:40:34,719 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 29 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 105 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:40:34,720 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 42 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 105 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:40:34,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-15 00:40:34,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2022-04-15 00:40:34,729 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:40:34,729 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:34,729 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:34,730 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:34,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:34,732 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-15 00:40:34,732 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-15 00:40:34,736 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:34,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:34,737 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-15 00:40:34,737 INFO L87 Difference]: Start difference. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-15 00:40:34,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:34,738 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-15 00:40:34,738 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-15 00:40:34,740 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:34,740 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:34,740 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:40:34,740 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:40:34,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-15 00:40:34,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2022-04-15 00:40:34,741 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 24 [2022-04-15 00:40:34,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:40:34,742 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2022-04-15 00:40:34,742 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:34,742 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2022-04-15 00:40:34,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-15 00:40:34,743 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:40:34,744 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:40:34,763 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-15 00:40:34,951 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-15 00:40:34,952 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:40:34,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:40:34,952 INFO L85 PathProgramCache]: Analyzing trace with hash -290697607, now seen corresponding path program 2 times [2022-04-15 00:40:34,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:40:34,952 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1472289489] [2022-04-15 00:40:34,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:34,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:40:34,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:35,061 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:40:35,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:35,076 INFO L290 TraceCheckUtils]: 0: Hoare triple {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-15 00:40:35,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,076 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,077 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-15 00:40:35,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:35,090 INFO L290 TraceCheckUtils]: 0: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-15 00:40:35,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,091 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,093 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:35,093 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:40:35,093 INFO L290 TraceCheckUtils]: 1: Hoare triple {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-15 00:40:35,094 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,094 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,094 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,094 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-15 00:40:35,095 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-15 00:40:35,096 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-15 00:40:35,097 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:35,098 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {912#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:35,098 INFO L290 TraceCheckUtils]: 10: Hoare triple {912#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-15 00:40:35,099 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-15 00:40:35,100 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:35,100 INFO L290 TraceCheckUtils]: 13: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:35,100 INFO L272 TraceCheckUtils]: 14: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {905#true} is VALID [2022-04-15 00:40:35,101 INFO L290 TraceCheckUtils]: 15: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-15 00:40:35,101 INFO L290 TraceCheckUtils]: 16: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,101 INFO L290 TraceCheckUtils]: 17: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:35,102 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {905#true} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:35,102 INFO L290 TraceCheckUtils]: 19: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:35,102 INFO L290 TraceCheckUtils]: 20: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:40:35,103 INFO L290 TraceCheckUtils]: 21: Hoare triple {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:35,103 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {921#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:40:35,104 INFO L290 TraceCheckUtils]: 23: Hoare triple {921#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {922#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:40:35,104 INFO L290 TraceCheckUtils]: 24: Hoare triple {922#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-15 00:40:35,104 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-15 00:40:35,105 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:35,105 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:40:35,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1472289489] [2022-04-15 00:40:35,105 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1472289489] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:40:35,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1582426848] [2022-04-15 00:40:35,105 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 00:40:35,105 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:35,106 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:40:35,107 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:40:35,108 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-15 00:40:35,149 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 00:40:35,149 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:40:35,150 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-15 00:40:35,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:35,158 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:40:35,207 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:40:37,521 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:40:37,561 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:37,561 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-15 00:40:37,561 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:37,561 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:37,561 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:37,562 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-15 00:40:37,562 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-15 00:40:37,562 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-15 00:40:37,563 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:37,563 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-15 00:40:37,564 INFO L290 TraceCheckUtils]: 10: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-15 00:40:37,564 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-15 00:40:37,564 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:37,565 INFO L290 TraceCheckUtils]: 13: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:37,566 INFO L272 TraceCheckUtils]: 14: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-15 00:40:37,566 INFO L290 TraceCheckUtils]: 15: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-15 00:40:37,566 INFO L290 TraceCheckUtils]: 16: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-15 00:40:37,567 INFO L290 TraceCheckUtils]: 17: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-15 00:40:37,567 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:37,568 INFO L290 TraceCheckUtils]: 19: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:37,568 INFO L290 TraceCheckUtils]: 20: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {988#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:40:37,569 INFO L290 TraceCheckUtils]: 21: Hoare triple {988#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:37,569 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {995#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:40:37,569 INFO L290 TraceCheckUtils]: 23: Hoare triple {995#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {999#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:40:37,570 INFO L290 TraceCheckUtils]: 24: Hoare triple {999#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-15 00:40:37,570 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-15 00:40:37,570 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:37,570 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:40:39,697 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:40:39,701 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:40:39,735 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-15 00:40:39,735 INFO L290 TraceCheckUtils]: 24: Hoare triple {999#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-15 00:40:39,735 INFO L290 TraceCheckUtils]: 23: Hoare triple {995#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {999#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:40:39,736 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {995#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:40:39,736 INFO L290 TraceCheckUtils]: 21: Hoare triple {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:39,737 INFO L290 TraceCheckUtils]: 20: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:40:39,738 INFO L290 TraceCheckUtils]: 19: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:39,738 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {905#true} {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:39,738 INFO L290 TraceCheckUtils]: 17: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:39,739 INFO L290 TraceCheckUtils]: 16: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:39,739 INFO L290 TraceCheckUtils]: 15: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-15 00:40:39,739 INFO L272 TraceCheckUtils]: 14: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {905#true} is VALID [2022-04-15 00:40:39,739 INFO L290 TraceCheckUtils]: 13: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:39,740 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:39,740 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-15 00:40:39,740 INFO L290 TraceCheckUtils]: 10: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-15 00:40:39,741 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-15 00:40:39,748 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:39,749 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-15 00:40:39,753 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-15 00:40:39,754 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-15 00:40:39,754 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:39,754 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:39,754 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:39,754 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-15 00:40:39,754 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-15 00:40:39,754 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:40:39,755 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1582426848] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:40:39,755 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:40:39,755 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 17 [2022-04-15 00:40:39,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1506383996] [2022-04-15 00:40:39,755 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:40:39,756 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-15 00:40:39,756 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:40:39,756 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-15 00:40:39,796 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:39,796 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-15 00:40:39,797 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:40:39,797 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-15 00:40:39,797 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=227, Unknown=2, NotChecked=0, Total=272 [2022-04-15 00:40:39,798 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-15 00:40:40,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:40,673 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-15 00:40:40,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-15 00:40:40,674 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-15 00:40:40,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:40:40,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-15 00:40:40,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 43 transitions. [2022-04-15 00:40:40,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-15 00:40:40,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 43 transitions. [2022-04-15 00:40:40,677 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 43 transitions. [2022-04-15 00:40:40,718 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:40,718 INFO L225 Difference]: With dead ends: 42 [2022-04-15 00:40:40,718 INFO L226 Difference]: Without dead ends: 40 [2022-04-15 00:40:40,719 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 150 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=118, Invalid=636, Unknown=2, NotChecked=0, Total=756 [2022-04-15 00:40:40,719 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 42 mSDsluCounter, 61 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 00:40:40,720 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 80 Invalid, 296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 230 Invalid, 0 Unknown, 46 Unchecked, 0.2s Time] [2022-04-15 00:40:40,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-15 00:40:40,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 37. [2022-04-15 00:40:40,727 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:40:40,727 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:40,727 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:40,727 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:40,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:40,728 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-15 00:40:40,728 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-15 00:40:40,728 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:40,728 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:40,729 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-15 00:40:40,729 INFO L87 Difference]: Start difference. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-15 00:40:40,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:40,730 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-15 00:40:40,730 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-15 00:40:40,730 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:40,730 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:40,730 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:40:40,730 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:40:40,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:40,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 38 transitions. [2022-04-15 00:40:40,731 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 38 transitions. Word has length 26 [2022-04-15 00:40:40,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:40:40,731 INFO L478 AbstractCegarLoop]: Abstraction has 37 states and 38 transitions. [2022-04-15 00:40:40,731 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-15 00:40:40,731 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 38 transitions. [2022-04-15 00:40:40,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-15 00:40:40,732 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:40:40,732 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:40:40,750 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-15 00:40:40,946 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:40,947 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:40:40,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:40:40,947 INFO L85 PathProgramCache]: Analyzing trace with hash -1718174257, now seen corresponding path program 3 times [2022-04-15 00:40:40,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:40:40,948 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031217638] [2022-04-15 00:40:40,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:40,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:40:40,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:41,030 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:40:41,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:41,034 INFO L290 TraceCheckUtils]: 0: Hoare triple {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-15 00:40:41,034 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,034 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,034 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-15 00:40:41,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:41,038 INFO L290 TraceCheckUtils]: 0: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-15 00:40:41,038 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,038 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,039 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-15 00:40:41,040 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-15 00:40:41,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:41,044 INFO L290 TraceCheckUtils]: 0: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-15 00:40:41,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,045 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,045 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,045 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:40:41,046 INFO L290 TraceCheckUtils]: 1: Hoare triple {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-15 00:40:41,046 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,046 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,046 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,046 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-15 00:40:41,046 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1303#(= main_~i~0 0)} is VALID [2022-04-15 00:40:41,046 INFO L290 TraceCheckUtils]: 7: Hoare triple {1303#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1303#(= main_~i~0 0)} is VALID [2022-04-15 00:40:41,047 INFO L290 TraceCheckUtils]: 8: Hoare triple {1303#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:41,047 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:41,047 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-15 00:40:41,048 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-15 00:40:41,048 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-15 00:40:41,049 INFO L290 TraceCheckUtils]: 13: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-15 00:40:41,049 INFO L272 TraceCheckUtils]: 14: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-15 00:40:41,049 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-15 00:40:41,049 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,049 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,049 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-15 00:40:41,050 INFO L290 TraceCheckUtils]: 19: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-15 00:40:41,050 INFO L290 TraceCheckUtils]: 20: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,050 INFO L290 TraceCheckUtils]: 21: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,050 INFO L272 TraceCheckUtils]: 22: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-15 00:40:41,051 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-15 00:40:41,051 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,051 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,051 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,051 INFO L290 TraceCheckUtils]: 27: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,052 INFO L290 TraceCheckUtils]: 28: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1317#(<= main_~n~0 main_~i~1)} is VALID [2022-04-15 00:40:41,052 INFO L290 TraceCheckUtils]: 29: Hoare triple {1317#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-15 00:40:41,052 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-15 00:40:41,052 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-15 00:40:41,052 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-15 00:40:41,053 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-15 00:40:41,053 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:40:41,053 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:40:41,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031217638] [2022-04-15 00:40:41,053 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031217638] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:40:41,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1288754412] [2022-04-15 00:40:41,053 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 00:40:41,053 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:41,053 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:40:41,054 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:40:41,055 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-15 00:40:41,091 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-15 00:40:41,091 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:40:41,092 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-15 00:40:41,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:41,105 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:40:41,354 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,355 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-15 00:40:41,355 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,355 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,355 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,355 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-15 00:40:41,356 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1340#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:41,356 INFO L290 TraceCheckUtils]: 7: Hoare triple {1340#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1340#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:41,357 INFO L290 TraceCheckUtils]: 8: Hoare triple {1340#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:41,357 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:41,357 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-15 00:40:41,358 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-15 00:40:41,359 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-15 00:40:41,360 INFO L290 TraceCheckUtils]: 13: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-15 00:40:41,360 INFO L272 TraceCheckUtils]: 14: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-15 00:40:41,360 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-15 00:40:41,360 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,360 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,361 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-15 00:40:41,361 INFO L290 TraceCheckUtils]: 19: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-15 00:40:41,362 INFO L290 TraceCheckUtils]: 20: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-15 00:40:41,362 INFO L290 TraceCheckUtils]: 21: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-15 00:40:41,362 INFO L272 TraceCheckUtils]: 22: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-15 00:40:41,363 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-15 00:40:41,363 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,363 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,363 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-15 00:40:41,364 INFO L290 TraceCheckUtils]: 27: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-15 00:40:41,364 INFO L290 TraceCheckUtils]: 28: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1409#(and (<= main_~n~0 2) (<= 2 main_~i~1))} is VALID [2022-04-15 00:40:41,365 INFO L290 TraceCheckUtils]: 29: Hoare triple {1409#(and (<= main_~n~0 2) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-15 00:40:41,365 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-15 00:40:41,365 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-15 00:40:41,365 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-15 00:40:41,365 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-15 00:40:41,366 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:40:41,366 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:40:41,554 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-15 00:40:41,554 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-15 00:40:41,554 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-15 00:40:41,554 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-15 00:40:41,557 INFO L290 TraceCheckUtils]: 29: Hoare triple {1317#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-15 00:40:41,558 INFO L290 TraceCheckUtils]: 28: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1317#(<= main_~n~0 main_~i~1)} is VALID [2022-04-15 00:40:41,558 INFO L290 TraceCheckUtils]: 27: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,559 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,559 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,559 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,559 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-15 00:40:41,559 INFO L272 TraceCheckUtils]: 22: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-15 00:40:41,559 INFO L290 TraceCheckUtils]: 21: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,560 INFO L290 TraceCheckUtils]: 20: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:40:41,560 INFO L290 TraceCheckUtils]: 19: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:40:41,561 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1464#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:40:41,561 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,561 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,561 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-15 00:40:41,561 INFO L272 TraceCheckUtils]: 14: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-15 00:40:41,564 INFO L290 TraceCheckUtils]: 13: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:40:41,565 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:40:41,565 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-15 00:40:41,566 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-15 00:40:41,566 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:41,566 INFO L290 TraceCheckUtils]: 8: Hoare triple {1340#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:41,567 INFO L290 TraceCheckUtils]: 7: Hoare triple {1340#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1340#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:41,567 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1340#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:41,568 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-15 00:40:41,568 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,568 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,568 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-15 00:40:41,568 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-15 00:40:41,568 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:40:41,569 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1288754412] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:40:41,569 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:40:41,569 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 15 [2022-04-15 00:40:41,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665844055] [2022-04-15 00:40:41,569 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:40:41,570 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-15 00:40:41,570 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:40:41,570 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:40:41,609 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:41,609 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-15 00:40:41,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:40:41,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-15 00:40:41,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2022-04-15 00:40:41,610 INFO L87 Difference]: Start difference. First operand 37 states and 38 transitions. Second operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:40:42,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:42,020 INFO L93 Difference]: Finished difference Result 60 states and 64 transitions. [2022-04-15 00:40:42,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-15 00:40:42,020 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-15 00:40:42,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:40:42,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:40:42,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-15 00:40:42,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:40:42,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-15 00:40:42,024 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-15 00:40:42,066 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:42,066 INFO L225 Difference]: With dead ends: 60 [2022-04-15 00:40:42,067 INFO L226 Difference]: Without dead ends: 40 [2022-04-15 00:40:42,067 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=351, Unknown=0, NotChecked=0, Total=462 [2022-04-15 00:40:42,067 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 36 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:40:42,068 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 54 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-15 00:40:42,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-15 00:40:42,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2022-04-15 00:40:42,074 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:40:42,074 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:42,075 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:42,075 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:42,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:42,076 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-15 00:40:42,076 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-15 00:40:42,076 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:42,076 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:42,077 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-15 00:40:42,077 INFO L87 Difference]: Start difference. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-15 00:40:42,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:42,080 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-15 00:40:42,080 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-15 00:40:42,080 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:42,080 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:42,080 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:40:42,080 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:40:42,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:42,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 40 transitions. [2022-04-15 00:40:42,082 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 40 transitions. Word has length 34 [2022-04-15 00:40:42,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:40:42,082 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 40 transitions. [2022-04-15 00:40:42,082 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:40:42,082 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 40 transitions. [2022-04-15 00:40:42,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-15 00:40:42,083 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:40:42,084 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:40:42,109 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-15 00:40:42,299 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:42,300 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:40:42,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:40:42,300 INFO L85 PathProgramCache]: Analyzing trace with hash -770459891, now seen corresponding path program 4 times [2022-04-15 00:40:42,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:40:42,300 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2054795487] [2022-04-15 00:40:42,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:42,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:40:42,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:42,436 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:40:42,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:42,452 INFO L290 TraceCheckUtils]: 0: Hoare triple {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-15 00:40:42,452 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,452 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,452 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-15 00:40:42,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:42,457 INFO L290 TraceCheckUtils]: 0: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-15 00:40:42,457 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,457 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,458 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:42,458 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-15 00:40:42,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:42,462 INFO L290 TraceCheckUtils]: 0: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-15 00:40:42,463 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,463 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,463 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:42,464 INFO L272 TraceCheckUtils]: 0: Hoare triple {1762#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:40:42,467 INFO L290 TraceCheckUtils]: 1: Hoare triple {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-15 00:40:42,468 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,468 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,470 INFO L272 TraceCheckUtils]: 4: Hoare triple {1762#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,470 INFO L290 TraceCheckUtils]: 5: Hoare triple {1762#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1762#true} is VALID [2022-04-15 00:40:42,470 INFO L290 TraceCheckUtils]: 6: Hoare triple {1762#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1767#(= main_~i~0 0)} is VALID [2022-04-15 00:40:42,471 INFO L290 TraceCheckUtils]: 7: Hoare triple {1767#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1767#(= main_~i~0 0)} is VALID [2022-04-15 00:40:42,471 INFO L290 TraceCheckUtils]: 8: Hoare triple {1767#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:42,472 INFO L290 TraceCheckUtils]: 9: Hoare triple {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:42,474 INFO L290 TraceCheckUtils]: 10: Hoare triple {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1769#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:40:42,475 INFO L290 TraceCheckUtils]: 11: Hoare triple {1769#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1770#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:40:42,476 INFO L290 TraceCheckUtils]: 12: Hoare triple {1770#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:40:42,476 INFO L290 TraceCheckUtils]: 13: Hoare triple {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:40:42,476 INFO L290 TraceCheckUtils]: 14: Hoare triple {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:42,477 INFO L290 TraceCheckUtils]: 15: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:42,477 INFO L272 TraceCheckUtils]: 16: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1762#true} is VALID [2022-04-15 00:40:42,477 INFO L290 TraceCheckUtils]: 17: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-15 00:40:42,477 INFO L290 TraceCheckUtils]: 18: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,477 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,478 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1762#true} {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:42,478 INFO L290 TraceCheckUtils]: 21: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:42,478 INFO L290 TraceCheckUtils]: 22: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:42,479 INFO L290 TraceCheckUtils]: 23: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:42,479 INFO L272 TraceCheckUtils]: 24: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1762#true} is VALID [2022-04-15 00:40:42,479 INFO L290 TraceCheckUtils]: 25: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-15 00:40:42,479 INFO L290 TraceCheckUtils]: 26: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,479 INFO L290 TraceCheckUtils]: 27: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:42,480 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1762#true} {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:42,480 INFO L290 TraceCheckUtils]: 29: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:42,481 INFO L290 TraceCheckUtils]: 30: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1782#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:40:42,481 INFO L290 TraceCheckUtils]: 31: Hoare triple {1782#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1783#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:42,481 INFO L272 TraceCheckUtils]: 32: Hoare triple {1783#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1784#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:40:42,482 INFO L290 TraceCheckUtils]: 33: Hoare triple {1784#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1785#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:40:42,482 INFO L290 TraceCheckUtils]: 34: Hoare triple {1785#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-15 00:40:42,482 INFO L290 TraceCheckUtils]: 35: Hoare triple {1763#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-15 00:40:42,482 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:40:42,483 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:40:42,483 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2054795487] [2022-04-15 00:40:42,483 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2054795487] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:40:42,483 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [173639825] [2022-04-15 00:40:42,483 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 00:40:42,483 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:42,483 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:40:42,484 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:40:42,518 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-15 00:40:42,545 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 00:40:42,545 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:40:42,546 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-15 00:40:42,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:42,559 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:40:42,652 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:40:45,074 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-15 00:40:45,074 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-15 00:40:45,139 INFO L272 TraceCheckUtils]: 0: Hoare triple {1762#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:45,140 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-15 00:40:45,140 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:45,140 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:45,140 INFO L272 TraceCheckUtils]: 4: Hoare triple {1762#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-15 00:40:45,140 INFO L290 TraceCheckUtils]: 5: Hoare triple {1762#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1762#true} is VALID [2022-04-15 00:40:45,140 INFO L290 TraceCheckUtils]: 6: Hoare triple {1762#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1808#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:45,141 INFO L290 TraceCheckUtils]: 7: Hoare triple {1808#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1808#(<= main_~i~0 0)} is VALID [2022-04-15 00:40:45,141 INFO L290 TraceCheckUtils]: 8: Hoare triple {1808#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1815#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:45,141 INFO L290 TraceCheckUtils]: 9: Hoare triple {1815#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1815#(<= main_~i~0 1)} is VALID [2022-04-15 00:40:45,142 INFO L290 TraceCheckUtils]: 10: Hoare triple {1815#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1822#(<= main_~i~0 2)} is VALID [2022-04-15 00:40:45,142 INFO L290 TraceCheckUtils]: 11: Hoare triple {1822#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1826#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} is VALID [2022-04-15 00:40:45,144 INFO L290 TraceCheckUtils]: 12: Hoare triple {1826#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1830#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-15 00:40:45,145 INFO L290 TraceCheckUtils]: 13: Hoare triple {1830#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1834#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-15 00:40:45,146 INFO L290 TraceCheckUtils]: 14: Hoare triple {1834#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-15 00:40:45,147 INFO L290 TraceCheckUtils]: 15: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-15 00:40:45,151 INFO L272 TraceCheckUtils]: 16: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-15 00:40:45,151 INFO L290 TraceCheckUtils]: 17: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-15 00:40:45,159 INFO L290 TraceCheckUtils]: 18: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-15 00:40:45,160 INFO L290 TraceCheckUtils]: 19: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-15 00:40:45,161 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-15 00:40:45,162 INFO L290 TraceCheckUtils]: 21: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-15 00:40:45,162 INFO L290 TraceCheckUtils]: 22: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-15 00:40:45,163 INFO L290 TraceCheckUtils]: 23: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-15 00:40:45,170 INFO L272 TraceCheckUtils]: 24: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-15 00:40:45,171 INFO L290 TraceCheckUtils]: 25: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-15 00:40:45,171 INFO L290 TraceCheckUtils]: 26: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-15 00:40:45,172 INFO L290 TraceCheckUtils]: 27: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-15 00:40:45,172 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-15 00:40:45,173 INFO L290 TraceCheckUtils]: 29: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-15 00:40:45,174 INFO L290 TraceCheckUtils]: 30: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1889#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} is VALID [2022-04-15 00:40:45,174 INFO L290 TraceCheckUtils]: 31: Hoare triple {1889#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1783#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:45,175 INFO L272 TraceCheckUtils]: 32: Hoare triple {1783#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1896#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:40:45,175 INFO L290 TraceCheckUtils]: 33: Hoare triple {1896#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1900#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:40:45,176 INFO L290 TraceCheckUtils]: 34: Hoare triple {1900#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-15 00:40:45,176 INFO L290 TraceCheckUtils]: 35: Hoare triple {1763#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-15 00:40:45,176 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:40:45,177 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:40:45,518 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [173639825] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:40:45,519 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-15 00:40:45,519 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 26 [2022-04-15 00:40:45,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002490227] [2022-04-15 00:40:45,519 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-15 00:40:45,520 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-15 00:40:45,520 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:40:45,520 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:40:45,597 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:45,598 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-15 00:40:45,598 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:40:45,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-15 00:40:45,598 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=663, Unknown=0, NotChecked=0, Total=756 [2022-04-15 00:40:45,599 INFO L87 Difference]: Start difference. First operand 39 states and 40 transitions. Second operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:40:46,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:46,225 INFO L93 Difference]: Finished difference Result 70 states and 72 transitions. [2022-04-15 00:40:46,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-15 00:40:46,225 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-15 00:40:46,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:40:46,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:40:46,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-15 00:40:46,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:40:46,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-15 00:40:46,229 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 59 transitions. [2022-04-15 00:40:50,318 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 57 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-15 00:40:50,319 INFO L225 Difference]: With dead ends: 70 [2022-04-15 00:40:50,320 INFO L226 Difference]: Without dead ends: 42 [2022-04-15 00:40:50,320 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 35 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 409 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=217, Invalid=1675, Unknown=0, NotChecked=0, Total=1892 [2022-04-15 00:40:50,321 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 24 mSDsluCounter, 124 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 294 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 140 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-15 00:40:50,321 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 152 Invalid, 294 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 144 Invalid, 0 Unknown, 140 Unchecked, 0.1s Time] [2022-04-15 00:40:50,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-15 00:40:50,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2022-04-15 00:40:50,328 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:40:50,329 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:50,329 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:50,329 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:50,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:50,330 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-15 00:40:50,330 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-15 00:40:50,330 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:50,330 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:50,330 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-15 00:40:50,331 INFO L87 Difference]: Start difference. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-15 00:40:50,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:40:50,332 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-15 00:40:50,332 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-15 00:40:50,332 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:40:50,332 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:40:50,332 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:40:50,332 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:40:50,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-15 00:40:50,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 42 transitions. [2022-04-15 00:40:50,333 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 42 transitions. Word has length 36 [2022-04-15 00:40:50,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:40:50,333 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 42 transitions. [2022-04-15 00:40:50,333 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:40:50,333 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 42 transitions. [2022-04-15 00:40:50,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-15 00:40:50,334 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:40:50,334 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:40:50,355 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-15 00:40:50,547 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:50,547 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:40:50,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:40:50,548 INFO L85 PathProgramCache]: Analyzing trace with hash -550020917, now seen corresponding path program 5 times [2022-04-15 00:40:50,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:40:50,548 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767475760] [2022-04-15 00:40:50,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:40:50,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:40:50,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:50,753 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:40:50,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:50,757 INFO L290 TraceCheckUtils]: 0: Hoare triple {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-15 00:40:50,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,757 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,757 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-15 00:40:50,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:50,761 INFO L290 TraceCheckUtils]: 0: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-15 00:40:50,761 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,761 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,762 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:50,762 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-15 00:40:50,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:50,766 INFO L290 TraceCheckUtils]: 0: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-15 00:40:50,766 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,766 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,766 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:50,770 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:40:50,770 INFO L290 TraceCheckUtils]: 1: Hoare triple {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-15 00:40:50,770 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,770 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,770 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,770 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-15 00:40:50,771 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-15 00:40:50,771 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-15 00:40:50,772 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:50,772 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:50,772 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:40:50,773 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:40:50,774 INFO L290 TraceCheckUtils]: 12: Hoare triple {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-15 00:40:50,775 INFO L290 TraceCheckUtils]: 13: Hoare triple {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:40:50,775 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:40:50,775 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:40:50,776 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:50,776 INFO L290 TraceCheckUtils]: 17: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:50,776 INFO L272 TraceCheckUtils]: 18: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-15 00:40:50,776 INFO L290 TraceCheckUtils]: 19: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-15 00:40:50,776 INFO L290 TraceCheckUtils]: 20: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,776 INFO L290 TraceCheckUtils]: 21: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,777 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2208#true} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:50,777 INFO L290 TraceCheckUtils]: 23: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:50,778 INFO L290 TraceCheckUtils]: 24: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:50,778 INFO L290 TraceCheckUtils]: 25: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:50,778 INFO L272 TraceCheckUtils]: 26: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-15 00:40:50,778 INFO L290 TraceCheckUtils]: 27: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-15 00:40:50,778 INFO L290 TraceCheckUtils]: 28: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,778 INFO L290 TraceCheckUtils]: 29: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:50,779 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:50,779 INFO L290 TraceCheckUtils]: 31: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:40:50,780 INFO L290 TraceCheckUtils]: 32: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:40:50,780 INFO L290 TraceCheckUtils]: 33: Hoare triple {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:50,780 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2231#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:40:50,781 INFO L290 TraceCheckUtils]: 35: Hoare triple {2231#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2232#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:40:50,781 INFO L290 TraceCheckUtils]: 36: Hoare triple {2232#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-15 00:40:50,781 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-15 00:40:50,781 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:40:50,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:40:50,781 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767475760] [2022-04-15 00:40:50,781 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [767475760] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:40:50,782 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [423818527] [2022-04-15 00:40:50,782 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 00:40:50,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:40:50,782 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:40:50,783 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:40:50,786 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-15 00:40:50,828 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-15 00:40:50,828 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:40:50,829 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-15 00:40:50,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:40:50,841 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:40:50,898 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:40:51,161 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-15 00:40:51,162 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-15 00:40:59,585 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:40:59,627 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:59,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-15 00:40:59,627 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:59,627 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:59,627 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:40:59,627 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-15 00:40:59,628 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-15 00:40:59,628 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-15 00:40:59,630 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:59,631 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:40:59,631 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:40:59,632 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:40:59,633 INFO L290 TraceCheckUtils]: 12: Hoare triple {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2273#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} is VALID [2022-04-15 00:40:59,634 INFO L290 TraceCheckUtils]: 13: Hoare triple {2273#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:40:59,634 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:40:59,634 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:40:59,635 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:59,644 INFO L290 TraceCheckUtils]: 17: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:59,645 INFO L272 TraceCheckUtils]: 18: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-15 00:40:59,645 INFO L290 TraceCheckUtils]: 19: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-15 00:40:59,645 INFO L290 TraceCheckUtils]: 20: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-15 00:40:59,646 INFO L290 TraceCheckUtils]: 21: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-15 00:40:59,646 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:59,647 INFO L290 TraceCheckUtils]: 23: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:40:59,647 INFO L290 TraceCheckUtils]: 24: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:40:59,648 INFO L290 TraceCheckUtils]: 25: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:40:59,648 INFO L272 TraceCheckUtils]: 26: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-15 00:40:59,649 INFO L290 TraceCheckUtils]: 27: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-15 00:40:59,649 INFO L290 TraceCheckUtils]: 28: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-15 00:40:59,649 INFO L290 TraceCheckUtils]: 29: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-15 00:40:59,650 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:40:59,650 INFO L290 TraceCheckUtils]: 31: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:40:59,650 INFO L290 TraceCheckUtils]: 32: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2336#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-15 00:40:59,651 INFO L290 TraceCheckUtils]: 33: Hoare triple {2336#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:40:59,651 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:40:59,652 INFO L290 TraceCheckUtils]: 35: Hoare triple {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2347#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:40:59,652 INFO L290 TraceCheckUtils]: 36: Hoare triple {2347#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-15 00:40:59,652 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-15 00:40:59,652 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:40:59,652 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:41:00,208 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:41:00,214 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:41:00,274 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-15 00:41:00,275 INFO L290 TraceCheckUtils]: 36: Hoare triple {2347#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-15 00:41:00,275 INFO L290 TraceCheckUtils]: 35: Hoare triple {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2347#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:41:00,275 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:41:00,276 INFO L290 TraceCheckUtils]: 33: Hoare triple {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:00,276 INFO L290 TraceCheckUtils]: 32: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:41:00,277 INFO L290 TraceCheckUtils]: 31: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:00,277 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:00,277 INFO L290 TraceCheckUtils]: 29: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:41:00,278 INFO L290 TraceCheckUtils]: 28: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:41:00,278 INFO L290 TraceCheckUtils]: 27: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-15 00:41:00,278 INFO L272 TraceCheckUtils]: 26: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-15 00:41:00,278 INFO L290 TraceCheckUtils]: 25: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:00,279 INFO L290 TraceCheckUtils]: 24: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:00,279 INFO L290 TraceCheckUtils]: 23: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:00,279 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2208#true} {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:00,280 INFO L290 TraceCheckUtils]: 21: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:41:00,280 INFO L290 TraceCheckUtils]: 20: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:41:00,280 INFO L290 TraceCheckUtils]: 19: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-15 00:41:00,280 INFO L272 TraceCheckUtils]: 18: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-15 00:41:00,280 INFO L290 TraceCheckUtils]: 17: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:00,280 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:00,281 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:41:00,281 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:41:00,282 INFO L290 TraceCheckUtils]: 13: Hoare triple {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:41:00,282 INFO L290 TraceCheckUtils]: 12: Hoare triple {2430#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-15 00:41:00,283 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2430#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-15 00:41:00,302 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:00,303 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:00,303 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:00,303 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-15 00:41:00,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-15 00:41:00,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-15 00:41:00,304 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:41:00,304 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:41:00,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:41:00,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-15 00:41:00,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-15 00:41:00,304 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:41:00,304 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [423818527] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:41:00,304 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:41:00,305 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 23 [2022-04-15 00:41:00,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421752777] [2022-04-15 00:41:00,305 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:41:00,307 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-15 00:41:00,309 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:41:00,310 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:00,355 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:41:00,355 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-15 00:41:00,355 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:41:00,356 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-15 00:41:00,356 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=436, Unknown=3, NotChecked=0, Total=506 [2022-04-15 00:41:00,356 INFO L87 Difference]: Start difference. First operand 41 states and 42 transitions. Second operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:01,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:01,480 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2022-04-15 00:41:01,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-15 00:41:01,480 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-15 00:41:01,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:41:01,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:01,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 56 transitions. [2022-04-15 00:41:01,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:01,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 56 transitions. [2022-04-15 00:41:01,486 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 56 transitions. [2022-04-15 00:41:01,540 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:41:01,541 INFO L225 Difference]: With dead ends: 71 [2022-04-15 00:41:01,541 INFO L226 Difference]: Without dead ends: 69 [2022-04-15 00:41:01,542 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 67 SyntacticMatches, 9 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=161, Invalid=1096, Unknown=3, NotChecked=0, Total=1260 [2022-04-15 00:41:01,542 INFO L913 BasicCegarLoop]: 22 mSDtfsCounter, 47 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 377 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 377 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 75 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-15 00:41:01,542 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [48 Valid, 109 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 377 Invalid, 0 Unknown, 75 Unchecked, 0.3s Time] [2022-04-15 00:41:01,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-15 00:41:01,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 52. [2022-04-15 00:41:01,561 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:41:01,561 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:41:01,561 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:41:01,562 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:41:01,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:01,570 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-15 00:41:01,570 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-15 00:41:01,570 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:41:01,570 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:41:01,571 INFO L74 IsIncluded]: Start isIncluded. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-15 00:41:01,571 INFO L87 Difference]: Start difference. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-15 00:41:01,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:01,573 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-15 00:41:01,573 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-15 00:41:01,573 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:41:01,573 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:41:01,573 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:41:01,573 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:41:01,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-15 00:41:01,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2022-04-15 00:41:01,575 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 54 transitions. Word has length 38 [2022-04-15 00:41:01,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:41:01,575 INFO L478 AbstractCegarLoop]: Abstraction has 52 states and 54 transitions. [2022-04-15 00:41:01,575 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:01,576 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 54 transitions. [2022-04-15 00:41:01,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-04-15 00:41:01,576 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:41:01,576 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:41:01,601 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-15 00:41:01,799 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:41:01,799 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:41:01,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:41:01,800 INFO L85 PathProgramCache]: Analyzing trace with hash 838435593, now seen corresponding path program 6 times [2022-04-15 00:41:01,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:41:01,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676158522] [2022-04-15 00:41:01,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:41:01,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:41:01,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:01,965 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:41:01,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:01,977 INFO L290 TraceCheckUtils]: 0: Hoare triple {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-15 00:41:01,977 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,977 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,977 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-15 00:41:01,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:01,980 INFO L290 TraceCheckUtils]: 0: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-15 00:41:01,981 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,981 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,981 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:01,982 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-15 00:41:01,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:01,985 INFO L290 TraceCheckUtils]: 0: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-15 00:41:01,985 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,985 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,986 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:01,986 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:41:01,986 INFO L290 TraceCheckUtils]: 1: Hoare triple {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-15 00:41:01,986 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,986 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,986 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,987 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-15 00:41:01,987 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-15 00:41:01,987 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-15 00:41:01,988 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:01,988 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:01,989 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:01,989 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:01,990 INFO L290 TraceCheckUtils]: 12: Hoare triple {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-15 00:41:01,990 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-15 00:41:01,991 INFO L290 TraceCheckUtils]: 14: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2818#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-15 00:41:01,991 INFO L290 TraceCheckUtils]: 15: Hoare triple {2818#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:41:01,991 INFO L290 TraceCheckUtils]: 16: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:41:01,992 INFO L290 TraceCheckUtils]: 17: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:41:01,992 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:01,992 INFO L290 TraceCheckUtils]: 19: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:01,992 INFO L272 TraceCheckUtils]: 20: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-15 00:41:01,992 INFO L290 TraceCheckUtils]: 21: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-15 00:41:01,993 INFO L290 TraceCheckUtils]: 22: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,993 INFO L290 TraceCheckUtils]: 23: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,993 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2808#true} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:01,993 INFO L290 TraceCheckUtils]: 25: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:01,994 INFO L290 TraceCheckUtils]: 26: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:01,994 INFO L290 TraceCheckUtils]: 27: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:01,994 INFO L272 TraceCheckUtils]: 28: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-15 00:41:01,994 INFO L290 TraceCheckUtils]: 29: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-15 00:41:01,994 INFO L290 TraceCheckUtils]: 30: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,994 INFO L290 TraceCheckUtils]: 31: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:01,995 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:01,995 INFO L290 TraceCheckUtils]: 33: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:01,996 INFO L290 TraceCheckUtils]: 34: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:41:01,996 INFO L290 TraceCheckUtils]: 35: Hoare triple {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:01,997 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2832#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:41:01,997 INFO L290 TraceCheckUtils]: 37: Hoare triple {2832#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2833#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:41:01,997 INFO L290 TraceCheckUtils]: 38: Hoare triple {2833#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-15 00:41:01,997 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-15 00:41:01,997 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:41:01,998 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:41:01,998 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676158522] [2022-04-15 00:41:01,998 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1676158522] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:41:01,998 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1843682355] [2022-04-15 00:41:01,998 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 00:41:01,998 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:41:01,998 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:41:01,999 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:41:01,999 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-15 00:41:02,044 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-15 00:41:02,044 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:41:02,045 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-15 00:41:02,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:02,065 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:41:02,117 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:41:02,275 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-15 00:41:02,276 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-15 00:41:02,344 INFO L356 Elim1Store]: treesize reduction 25, result has 37.5 percent of original size [2022-04-15 00:41:02,345 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 30 [2022-04-15 00:41:10,761 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:41:10,803 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:10,803 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-15 00:41:10,803 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:10,803 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:10,803 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:10,803 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-15 00:41:10,803 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-15 00:41:10,804 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-15 00:41:10,804 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:10,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:10,805 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:10,806 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:10,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-15 00:41:10,807 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-15 00:41:10,807 INFO L290 TraceCheckUtils]: 14: Hoare triple {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-15 00:41:10,808 INFO L290 TraceCheckUtils]: 15: Hoare triple {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2884#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} is VALID [2022-04-15 00:41:10,808 INFO L290 TraceCheckUtils]: 16: Hoare triple {2884#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2888#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} is VALID [2022-04-15 00:41:10,809 INFO L290 TraceCheckUtils]: 17: Hoare triple {2888#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:41:10,809 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:10,810 INFO L290 TraceCheckUtils]: 19: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:10,811 INFO L272 TraceCheckUtils]: 20: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-15 00:41:10,811 INFO L290 TraceCheckUtils]: 21: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-15 00:41:10,811 INFO L290 TraceCheckUtils]: 22: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-15 00:41:10,812 INFO L290 TraceCheckUtils]: 23: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-15 00:41:10,813 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:10,814 INFO L290 TraceCheckUtils]: 25: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:10,814 INFO L290 TraceCheckUtils]: 26: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-15 00:41:10,815 INFO L290 TraceCheckUtils]: 27: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-15 00:41:10,816 INFO L272 TraceCheckUtils]: 28: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-15 00:41:10,816 INFO L290 TraceCheckUtils]: 29: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-15 00:41:10,817 INFO L290 TraceCheckUtils]: 30: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-15 00:41:10,818 INFO L290 TraceCheckUtils]: 31: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-15 00:41:10,844 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-15 00:41:10,845 INFO L290 TraceCheckUtils]: 33: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-15 00:41:10,846 INFO L290 TraceCheckUtils]: 34: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2945#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-15 00:41:10,846 INFO L290 TraceCheckUtils]: 35: Hoare triple {2945#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:10,847 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:41:10,847 INFO L290 TraceCheckUtils]: 37: Hoare triple {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2956#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:41:10,847 INFO L290 TraceCheckUtils]: 38: Hoare triple {2956#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-15 00:41:10,848 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-15 00:41:10,848 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-15 00:41:10,848 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:41:13,425 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) is different from false [2022-04-15 00:41:13,704 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:41:13,709 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:41:13,775 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-15 00:41:13,775 INFO L290 TraceCheckUtils]: 38: Hoare triple {2956#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-15 00:41:13,776 INFO L290 TraceCheckUtils]: 37: Hoare triple {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2956#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:41:13,779 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:41:13,779 INFO L290 TraceCheckUtils]: 35: Hoare triple {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:13,780 INFO L290 TraceCheckUtils]: 34: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:41:13,780 INFO L290 TraceCheckUtils]: 33: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:13,781 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:13,781 INFO L290 TraceCheckUtils]: 31: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:13,781 INFO L290 TraceCheckUtils]: 30: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:13,781 INFO L290 TraceCheckUtils]: 29: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-15 00:41:13,781 INFO L272 TraceCheckUtils]: 28: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-15 00:41:13,782 INFO L290 TraceCheckUtils]: 27: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:13,782 INFO L290 TraceCheckUtils]: 26: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:13,783 INFO L290 TraceCheckUtils]: 25: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:13,783 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2808#true} {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:13,784 INFO L290 TraceCheckUtils]: 23: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:13,784 INFO L290 TraceCheckUtils]: 22: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:13,784 INFO L290 TraceCheckUtils]: 21: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-15 00:41:13,784 INFO L272 TraceCheckUtils]: 20: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-15 00:41:13,784 INFO L290 TraceCheckUtils]: 19: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:13,785 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:13,785 INFO L290 TraceCheckUtils]: 17: Hoare triple {3030#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-15 00:41:13,786 INFO L290 TraceCheckUtils]: 16: Hoare triple {3034#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3030#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-15 00:41:13,787 INFO L290 TraceCheckUtils]: 15: Hoare triple {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3034#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} is VALID [2022-04-15 00:41:13,787 INFO L290 TraceCheckUtils]: 14: Hoare triple {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-15 00:41:13,788 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-15 00:41:13,788 INFO L290 TraceCheckUtils]: 12: Hoare triple {3048#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-15 00:41:13,789 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3048#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-15 00:41:13,790 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:13,790 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:13,790 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:13,791 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-15 00:41:13,791 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-15 00:41:13,791 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-15 00:41:13,791 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:13,791 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:13,791 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:13,791 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-15 00:41:13,792 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-15 00:41:13,792 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 9 not checked. [2022-04-15 00:41:13,792 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1843682355] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:41:13,792 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:41:13,792 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 18, 17] total 29 [2022-04-15 00:41:13,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1860867364] [2022-04-15 00:41:13,792 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:41:13,793 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-15 00:41:13,794 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:41:13,795 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:13,847 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:41:13,847 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-15 00:41:13,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:41:13,847 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-15 00:41:13,848 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=650, Unknown=4, NotChecked=52, Total=812 [2022-04-15 00:41:13,848 INFO L87 Difference]: Start difference. First operand 52 states and 54 transitions. Second operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:16,235 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-15 00:41:18,240 WARN L833 $PredicateComparison]: unable to prove that (and (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0)) is different from false [2022-04-15 00:41:20,269 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 8))) (and (not (= (+ (* c_main_~i~0 4) c_main_~x~0.offset) .cse0)) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0))) is different from false [2022-04-15 00:41:21,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:21,324 INFO L93 Difference]: Finished difference Result 80 states and 85 transitions. [2022-04-15 00:41:21,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-15 00:41:21,325 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-15 00:41:21,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:41:21,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:21,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 62 transitions. [2022-04-15 00:41:21,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:21,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 62 transitions. [2022-04-15 00:41:21,328 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 62 transitions. [2022-04-15 00:41:21,403 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:41:21,405 INFO L225 Difference]: With dead ends: 80 [2022-04-15 00:41:21,405 INFO L226 Difference]: Without dead ends: 78 [2022-04-15 00:41:21,405 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 66 SyntacticMatches, 10 SemanticMatches, 48 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 446 ImplicationChecksByTransitivity, 17.2s TimeCoverageRelationStatistics Valid=281, Invalid=1797, Unknown=8, NotChecked=364, Total=2450 [2022-04-15 00:41:21,406 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 80 mSDsluCounter, 118 mSDsCounter, 0 mSdLazyCounter, 468 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 624 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 468 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 100 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 00:41:21,406 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [80 Valid, 142 Invalid, 624 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 468 Invalid, 0 Unknown, 100 Unchecked, 0.5s Time] [2022-04-15 00:41:21,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-04-15 00:41:21,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 62. [2022-04-15 00:41:21,438 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:41:21,438 INFO L82 GeneralOperation]: Start isEquivalent. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:41:21,439 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:41:21,439 INFO L87 Difference]: Start difference. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:41:21,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:21,441 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions. [2022-04-15 00:41:21,441 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2022-04-15 00:41:21,441 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:41:21,441 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:41:21,442 INFO L74 IsIncluded]: Start isIncluded. First operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 78 states. [2022-04-15 00:41:21,442 INFO L87 Difference]: Start difference. First operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 78 states. [2022-04-15 00:41:21,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:21,444 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions. [2022-04-15 00:41:21,444 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2022-04-15 00:41:21,444 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:41:21,444 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:41:21,444 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:41:21,444 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:41:21,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:41:21,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 65 transitions. [2022-04-15 00:41:21,446 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 65 transitions. Word has length 40 [2022-04-15 00:41:21,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:41:21,446 INFO L478 AbstractCegarLoop]: Abstraction has 62 states and 65 transitions. [2022-04-15 00:41:21,446 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-15 00:41:21,446 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 65 transitions. [2022-04-15 00:41:21,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-15 00:41:21,447 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:41:21,447 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:41:21,468 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-15 00:41:21,650 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:41:21,650 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:41:21,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:41:21,650 INFO L85 PathProgramCache]: Analyzing trace with hash -110930399, now seen corresponding path program 7 times [2022-04-15 00:41:21,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:41:21,651 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [159259607] [2022-04-15 00:41:21,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:41:21,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:41:21,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:21,855 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:41:21,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:21,858 INFO L290 TraceCheckUtils]: 0: Hoare triple {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-15 00:41:21,859 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,859 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,859 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-15 00:41:21,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:21,863 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:21,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,863 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,864 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:21,864 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-15 00:41:21,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:21,869 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:21,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,870 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,871 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:21,871 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-15 00:41:21,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:21,874 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:21,874 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,874 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,875 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:21,876 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:41:21,876 INFO L290 TraceCheckUtils]: 1: Hoare triple {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-15 00:41:21,876 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,876 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,876 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,876 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-15 00:41:21,877 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-15 00:41:21,877 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-15 00:41:21,890 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:21,891 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:21,891 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:21,892 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:21,892 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:21,893 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:21,893 INFO L290 TraceCheckUtils]: 14: Hoare triple {3498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:21,894 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:21,894 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:21,894 INFO L290 TraceCheckUtils]: 17: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:21,894 INFO L272 TraceCheckUtils]: 18: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-15 00:41:21,894 INFO L290 TraceCheckUtils]: 19: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:21,894 INFO L290 TraceCheckUtils]: 20: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,895 INFO L290 TraceCheckUtils]: 21: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,895 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3489#true} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:21,895 INFO L290 TraceCheckUtils]: 23: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:21,896 INFO L290 TraceCheckUtils]: 24: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:21,896 INFO L290 TraceCheckUtils]: 25: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:21,896 INFO L272 TraceCheckUtils]: 26: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-15 00:41:21,896 INFO L290 TraceCheckUtils]: 27: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:21,896 INFO L290 TraceCheckUtils]: 28: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,896 INFO L290 TraceCheckUtils]: 29: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,897 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:21,897 INFO L290 TraceCheckUtils]: 31: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:21,898 INFO L290 TraceCheckUtils]: 32: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:21,898 INFO L290 TraceCheckUtils]: 33: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:21,898 INFO L272 TraceCheckUtils]: 34: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-15 00:41:21,898 INFO L290 TraceCheckUtils]: 35: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:21,898 INFO L290 TraceCheckUtils]: 36: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,898 INFO L290 TraceCheckUtils]: 37: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:21,899 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:21,899 INFO L290 TraceCheckUtils]: 39: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:21,899 INFO L290 TraceCheckUtils]: 40: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:41:21,900 INFO L290 TraceCheckUtils]: 41: Hoare triple {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:21,900 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3517#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:41:21,900 INFO L290 TraceCheckUtils]: 43: Hoare triple {3517#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3518#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:41:21,901 INFO L290 TraceCheckUtils]: 44: Hoare triple {3518#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-15 00:41:21,901 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-15 00:41:21,901 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-15 00:41:21,901 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:41:21,901 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [159259607] [2022-04-15 00:41:21,901 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [159259607] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:41:21,901 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [357611972] [2022-04-15 00:41:21,901 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 00:41:21,901 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:41:21,902 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:41:21,907 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:41:21,909 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-15 00:41:21,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:21,957 INFO L263 TraceCheckSpWp]: Trace formula consists of 147 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-15 00:41:21,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:21,966 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:41:22,033 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:41:35,505 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:41:35,545 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:35,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-15 00:41:35,546 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:35,546 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:35,546 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:35,546 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-15 00:41:35,546 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-15 00:41:35,547 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-15 00:41:35,547 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:35,547 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:35,548 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:35,548 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:35,548 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:35,549 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:35,549 INFO L290 TraceCheckUtils]: 14: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:35,550 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:35,550 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:35,550 INFO L290 TraceCheckUtils]: 17: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:35,551 INFO L272 TraceCheckUtils]: 18: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,551 INFO L290 TraceCheckUtils]: 19: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,552 INFO L290 TraceCheckUtils]: 20: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,552 INFO L290 TraceCheckUtils]: 21: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,552 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:35,553 INFO L290 TraceCheckUtils]: 23: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:35,553 INFO L290 TraceCheckUtils]: 24: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:41:35,554 INFO L290 TraceCheckUtils]: 25: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:41:35,554 INFO L272 TraceCheckUtils]: 26: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,555 INFO L290 TraceCheckUtils]: 27: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,555 INFO L290 TraceCheckUtils]: 28: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,555 INFO L290 TraceCheckUtils]: 29: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,556 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:41:35,556 INFO L290 TraceCheckUtils]: 31: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:41:35,556 INFO L290 TraceCheckUtils]: 32: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:35,557 INFO L290 TraceCheckUtils]: 33: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:35,557 INFO L272 TraceCheckUtils]: 34: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,558 INFO L290 TraceCheckUtils]: 35: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,558 INFO L290 TraceCheckUtils]: 36: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,558 INFO L290 TraceCheckUtils]: 37: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-15 00:41:35,559 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:35,559 INFO L290 TraceCheckUtils]: 39: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:35,559 INFO L290 TraceCheckUtils]: 40: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3646#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-15 00:41:35,560 INFO L290 TraceCheckUtils]: 41: Hoare triple {3646#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:35,560 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:41:35,561 INFO L290 TraceCheckUtils]: 43: Hoare triple {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3657#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:41:35,561 INFO L290 TraceCheckUtils]: 44: Hoare triple {3657#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-15 00:41:35,561 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-15 00:41:35,561 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-15 00:41:35,561 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:41:37,714 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:41:37,719 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:41:37,788 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-15 00:41:37,789 INFO L290 TraceCheckUtils]: 44: Hoare triple {3657#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-15 00:41:37,789 INFO L290 TraceCheckUtils]: 43: Hoare triple {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3657#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:41:37,790 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:41:37,790 INFO L290 TraceCheckUtils]: 41: Hoare triple {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:37,791 INFO L290 TraceCheckUtils]: 40: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:41:37,791 INFO L290 TraceCheckUtils]: 39: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:37,792 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:37,792 INFO L290 TraceCheckUtils]: 37: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,792 INFO L290 TraceCheckUtils]: 36: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,792 INFO L290 TraceCheckUtils]: 35: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:37,792 INFO L272 TraceCheckUtils]: 34: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-15 00:41:37,793 INFO L290 TraceCheckUtils]: 33: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:37,793 INFO L290 TraceCheckUtils]: 32: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:37,793 INFO L290 TraceCheckUtils]: 31: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:37,794 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:37,794 INFO L290 TraceCheckUtils]: 29: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,794 INFO L290 TraceCheckUtils]: 28: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,794 INFO L290 TraceCheckUtils]: 27: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:37,794 INFO L272 TraceCheckUtils]: 26: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-15 00:41:37,795 INFO L290 TraceCheckUtils]: 25: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:37,795 INFO L290 TraceCheckUtils]: 24: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:37,796 INFO L290 TraceCheckUtils]: 23: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:41:37,796 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3489#true} {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:41:37,796 INFO L290 TraceCheckUtils]: 21: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,796 INFO L290 TraceCheckUtils]: 20: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,796 INFO L290 TraceCheckUtils]: 19: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-15 00:41:37,797 INFO L272 TraceCheckUtils]: 18: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-15 00:41:37,797 INFO L290 TraceCheckUtils]: 17: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:41:37,797 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:41:37,798 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:37,798 INFO L290 TraceCheckUtils]: 14: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:37,799 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:37,799 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:37,800 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:37,800 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:37,800 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:37,801 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:37,801 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-15 00:41:37,802 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-15 00:41:37,802 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-15 00:41:37,802 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,802 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,802 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,802 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-15 00:41:37,802 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-15 00:41:37,802 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-15 00:41:37,802 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [357611972] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:41:37,802 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:41:37,802 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 14] total 23 [2022-04-15 00:41:37,803 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1851022422] [2022-04-15 00:41:37,803 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:41:37,803 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-15 00:41:37,804 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:41:37,804 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:37,863 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:41:37,864 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-15 00:41:37,864 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:41:37,864 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-15 00:41:37,864 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=441, Unknown=4, NotChecked=0, Total=506 [2022-04-15 00:41:37,865 INFO L87 Difference]: Start difference. First operand 62 states and 65 transitions. Second operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:38,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:38,768 INFO L93 Difference]: Finished difference Result 86 states and 88 transitions. [2022-04-15 00:41:38,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-15 00:41:38,768 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-15 00:41:38,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:41:38,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:38,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 60 transitions. [2022-04-15 00:41:38,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:38,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 60 transitions. [2022-04-15 00:41:38,771 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 60 transitions. [2022-04-15 00:41:38,821 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:41:38,823 INFO L225 Difference]: With dead ends: 86 [2022-04-15 00:41:38,823 INFO L226 Difference]: Without dead ends: 84 [2022-04-15 00:41:38,823 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 87 SyntacticMatches, 10 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 268 ImplicationChecksByTransitivity, 15.4s TimeCoverageRelationStatistics Valid=157, Invalid=1171, Unknown=4, NotChecked=0, Total=1332 [2022-04-15 00:41:38,824 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 50 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 439 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 527 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 439 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 73 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-15 00:41:38,824 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [51 Valid, 123 Invalid, 527 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 439 Invalid, 0 Unknown, 73 Unchecked, 0.3s Time] [2022-04-15 00:41:38,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-04-15 00:41:38,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 60. [2022-04-15 00:41:38,843 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:41:38,844 INFO L82 GeneralOperation]: Start isEquivalent. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:41:38,844 INFO L74 IsIncluded]: Start isIncluded. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:41:38,844 INFO L87 Difference]: Start difference. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:41:38,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:38,845 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2022-04-15 00:41:38,845 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 86 transitions. [2022-04-15 00:41:38,845 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:41:38,845 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:41:38,846 INFO L74 IsIncluded]: Start isIncluded. First operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-15 00:41:38,846 INFO L87 Difference]: Start difference. First operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-15 00:41:38,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:38,847 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2022-04-15 00:41:38,847 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 86 transitions. [2022-04-15 00:41:38,847 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:41:38,847 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:41:38,847 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:41:38,847 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:41:38,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:41:38,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2022-04-15 00:41:38,848 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 46 [2022-04-15 00:41:38,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:41:38,848 INFO L478 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2022-04-15 00:41:38,848 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:38,848 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2022-04-15 00:41:38,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-04-15 00:41:38,849 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:41:38,849 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:41:38,867 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-15 00:41:39,051 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-15 00:41:39,052 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:41:39,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:41:39,052 INFO L85 PathProgramCache]: Analyzing trace with hash -1930534305, now seen corresponding path program 8 times [2022-04-15 00:41:39,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:41:39,052 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [13878517] [2022-04-15 00:41:39,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:41:39,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:41:39,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:39,250 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:41:39,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:39,258 INFO L290 TraceCheckUtils]: 0: Hoare triple {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-15 00:41:39,258 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,258 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,258 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-15 00:41:39,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:39,265 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:39,265 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,265 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,266 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:39,266 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-15 00:41:39,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:39,271 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:39,271 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,271 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,272 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:39,272 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-15 00:41:39,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:39,279 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:39,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,280 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,281 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:39,281 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:41:39,281 INFO L290 TraceCheckUtils]: 1: Hoare triple {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-15 00:41:39,281 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,281 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,281 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,281 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-15 00:41:39,282 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-15 00:41:39,282 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-15 00:41:39,282 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:39,283 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:39,283 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:39,284 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:39,284 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:39,285 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:39,285 INFO L290 TraceCheckUtils]: 14: Hoare triple {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-15 00:41:39,286 INFO L290 TraceCheckUtils]: 15: Hoare triple {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:39,286 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:39,287 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:39,287 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:39,287 INFO L290 TraceCheckUtils]: 19: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:39,288 INFO L272 TraceCheckUtils]: 20: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-15 00:41:39,288 INFO L290 TraceCheckUtils]: 21: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:39,288 INFO L290 TraceCheckUtils]: 22: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,288 INFO L290 TraceCheckUtils]: 23: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,289 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4207#true} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:39,289 INFO L290 TraceCheckUtils]: 25: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:39,289 INFO L290 TraceCheckUtils]: 26: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:39,290 INFO L290 TraceCheckUtils]: 27: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:39,290 INFO L272 TraceCheckUtils]: 28: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-15 00:41:39,290 INFO L290 TraceCheckUtils]: 29: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:39,290 INFO L290 TraceCheckUtils]: 30: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,290 INFO L290 TraceCheckUtils]: 31: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,291 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:39,291 INFO L290 TraceCheckUtils]: 33: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:39,292 INFO L290 TraceCheckUtils]: 34: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:39,292 INFO L290 TraceCheckUtils]: 35: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:39,292 INFO L272 TraceCheckUtils]: 36: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-15 00:41:39,292 INFO L290 TraceCheckUtils]: 37: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:39,292 INFO L290 TraceCheckUtils]: 38: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,293 INFO L290 TraceCheckUtils]: 39: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:39,293 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:39,294 INFO L290 TraceCheckUtils]: 41: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:39,294 INFO L290 TraceCheckUtils]: 42: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:41:39,294 INFO L290 TraceCheckUtils]: 43: Hoare triple {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:39,295 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4236#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:41:39,295 INFO L290 TraceCheckUtils]: 45: Hoare triple {4236#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4237#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:41:39,295 INFO L290 TraceCheckUtils]: 46: Hoare triple {4237#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-15 00:41:39,296 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-15 00:41:39,296 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-15 00:41:39,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:41:39,296 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [13878517] [2022-04-15 00:41:39,296 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [13878517] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:41:39,296 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1850055731] [2022-04-15 00:41:39,296 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 00:41:39,296 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:41:39,296 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:41:39,297 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:41:39,298 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-15 00:41:39,348 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 00:41:39,349 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:41:39,350 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-15 00:41:39,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:39,361 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:41:39,414 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:41:39,630 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-15 00:41:39,631 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-15 00:41:52,895 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:41:52,942 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:52,942 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-15 00:41:52,942 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:52,942 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:52,942 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:52,942 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-15 00:41:52,943 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-15 00:41:52,943 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-15 00:41:52,943 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:52,944 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:52,944 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:52,945 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:52,945 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:52,946 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:52,947 INFO L290 TraceCheckUtils]: 14: Hoare triple {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4284#(exists ((v_main_~i~0_53 Int)) (and (<= v_main_~i~0_53 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_53 4))) 0) (<= (+ v_main_~i~0_53 1) main_~i~0) (<= 3 v_main_~i~0_53)))} is VALID [2022-04-15 00:41:52,948 INFO L290 TraceCheckUtils]: 15: Hoare triple {4284#(exists ((v_main_~i~0_53 Int)) (and (<= v_main_~i~0_53 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_53 4))) 0) (<= (+ v_main_~i~0_53 1) main_~i~0) (<= 3 v_main_~i~0_53)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:52,948 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:52,948 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:52,949 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:52,949 INFO L290 TraceCheckUtils]: 19: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:52,950 INFO L272 TraceCheckUtils]: 20: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,950 INFO L290 TraceCheckUtils]: 21: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,950 INFO L290 TraceCheckUtils]: 22: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,951 INFO L290 TraceCheckUtils]: 23: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,963 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:52,964 INFO L290 TraceCheckUtils]: 25: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:52,964 INFO L290 TraceCheckUtils]: 26: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-15 00:41:52,964 INFO L290 TraceCheckUtils]: 27: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-15 00:41:52,965 INFO L272 TraceCheckUtils]: 28: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,966 INFO L290 TraceCheckUtils]: 29: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,966 INFO L290 TraceCheckUtils]: 30: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,966 INFO L290 TraceCheckUtils]: 31: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,967 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-15 00:41:52,967 INFO L290 TraceCheckUtils]: 33: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-15 00:41:52,968 INFO L290 TraceCheckUtils]: 34: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:52,968 INFO L290 TraceCheckUtils]: 35: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:52,969 INFO L272 TraceCheckUtils]: 36: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,969 INFO L290 TraceCheckUtils]: 37: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,969 INFO L290 TraceCheckUtils]: 38: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,970 INFO L290 TraceCheckUtils]: 39: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-15 00:41:52,970 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:52,971 INFO L290 TraceCheckUtils]: 41: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:52,971 INFO L290 TraceCheckUtils]: 42: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4372#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:41:52,971 INFO L290 TraceCheckUtils]: 43: Hoare triple {4372#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:52,972 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:41:52,972 INFO L290 TraceCheckUtils]: 45: Hoare triple {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4383#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:41:52,972 INFO L290 TraceCheckUtils]: 46: Hoare triple {4383#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-15 00:41:52,973 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-15 00:41:52,973 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-15 00:41:52,973 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:41:55,218 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:41:55,226 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:41:55,302 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-15 00:41:55,303 INFO L290 TraceCheckUtils]: 46: Hoare triple {4383#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-15 00:41:55,303 INFO L290 TraceCheckUtils]: 45: Hoare triple {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4383#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:41:55,303 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:41:55,304 INFO L290 TraceCheckUtils]: 43: Hoare triple {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:55,304 INFO L290 TraceCheckUtils]: 42: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:41:55,305 INFO L290 TraceCheckUtils]: 41: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:55,305 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:55,305 INFO L290 TraceCheckUtils]: 39: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,305 INFO L290 TraceCheckUtils]: 38: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,305 INFO L290 TraceCheckUtils]: 37: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:55,305 INFO L272 TraceCheckUtils]: 36: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-15 00:41:55,306 INFO L290 TraceCheckUtils]: 35: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:55,306 INFO L290 TraceCheckUtils]: 34: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:55,306 INFO L290 TraceCheckUtils]: 33: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:55,307 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:55,307 INFO L290 TraceCheckUtils]: 31: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,307 INFO L290 TraceCheckUtils]: 30: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,307 INFO L290 TraceCheckUtils]: 29: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:55,307 INFO L272 TraceCheckUtils]: 28: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-15 00:41:55,307 INFO L290 TraceCheckUtils]: 27: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:55,308 INFO L290 TraceCheckUtils]: 26: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:55,308 INFO L290 TraceCheckUtils]: 25: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:41:55,309 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4207#true} {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:41:55,309 INFO L290 TraceCheckUtils]: 23: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,309 INFO L290 TraceCheckUtils]: 22: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,309 INFO L290 TraceCheckUtils]: 21: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-15 00:41:55,309 INFO L272 TraceCheckUtils]: 20: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-15 00:41:55,309 INFO L290 TraceCheckUtils]: 19: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:41:55,310 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:41:55,310 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:55,310 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:55,311 INFO L290 TraceCheckUtils]: 15: Hoare triple {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:55,311 INFO L290 TraceCheckUtils]: 14: Hoare triple {4490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-15 00:41:55,311 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} is VALID [2022-04-15 00:41:55,312 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:55,312 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:55,313 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:55,313 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:55,313 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:55,314 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-15 00:41:55,314 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-15 00:41:55,314 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-15 00:41:55,314 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,314 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,314 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,314 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-15 00:41:55,314 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-15 00:41:55,314 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-15 00:41:55,315 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1850055731] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:41:55,315 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:41:55,315 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 16] total 26 [2022-04-15 00:41:55,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139121687] [2022-04-15 00:41:55,315 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:41:55,316 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 48 [2022-04-15 00:41:55,316 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:41:55,317 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:55,369 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:41:55,369 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-15 00:41:55,369 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:41:55,370 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-15 00:41:55,371 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=570, Unknown=4, NotChecked=0, Total=650 [2022-04-15 00:41:55,371 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:56,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:56,844 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2022-04-15 00:41:56,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-15 00:41:56,845 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 48 [2022-04-15 00:41:56,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:41:56,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:56,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 68 transitions. [2022-04-15 00:41:56,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:56,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 68 transitions. [2022-04-15 00:41:56,847 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 68 transitions. [2022-04-15 00:41:56,925 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:41:56,926 INFO L225 Difference]: With dead ends: 115 [2022-04-15 00:41:56,926 INFO L226 Difference]: Without dead ends: 113 [2022-04-15 00:41:56,927 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 84 SyntacticMatches, 11 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 371 ImplicationChecksByTransitivity, 15.6s TimeCoverageRelationStatistics Valid=188, Invalid=1530, Unknown=4, NotChecked=0, Total=1722 [2022-04-15 00:41:56,927 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 41 mSDsluCounter, 144 mSDsCounter, 0 mSdLazyCounter, 591 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 168 SdHoareTripleChecker+Invalid, 731 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 591 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 113 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 00:41:56,928 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 168 Invalid, 731 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 591 Invalid, 0 Unknown, 113 Unchecked, 0.5s Time] [2022-04-15 00:41:56,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-04-15 00:41:56,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 83. [2022-04-15 00:41:56,961 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:41:56,962 INFO L82 GeneralOperation]: Start isEquivalent. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:41:56,962 INFO L74 IsIncluded]: Start isIncluded. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:41:56,962 INFO L87 Difference]: Start difference. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:41:56,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:56,964 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-04-15 00:41:56,964 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2022-04-15 00:41:56,964 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:41:56,964 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:41:56,964 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 113 states. [2022-04-15 00:41:56,964 INFO L87 Difference]: Start difference. First operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 113 states. [2022-04-15 00:41:56,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:41:56,966 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-04-15 00:41:56,966 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2022-04-15 00:41:56,966 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:41:56,966 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:41:56,966 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:41:56,966 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:41:56,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:41:56,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 88 transitions. [2022-04-15 00:41:56,968 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 88 transitions. Word has length 48 [2022-04-15 00:41:56,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:41:56,968 INFO L478 AbstractCegarLoop]: Abstraction has 83 states and 88 transitions. [2022-04-15 00:41:56,968 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-15 00:41:56,968 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 88 transitions. [2022-04-15 00:41:56,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-15 00:41:56,968 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:41:56,968 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:41:56,984 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-15 00:41:57,179 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:41:57,180 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:41:57,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:41:57,180 INFO L85 PathProgramCache]: Analyzing trace with hash 1776768797, now seen corresponding path program 9 times [2022-04-15 00:41:57,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:41:57,180 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881151457] [2022-04-15 00:41:57,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:41:57,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:41:57,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:57,405 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:41:57,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:57,408 INFO L290 TraceCheckUtils]: 0: Hoare triple {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-15 00:41:57,408 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,408 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,408 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-15 00:41:57,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:57,411 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:41:57,411 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,412 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,412 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:57,412 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-15 00:41:57,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:57,415 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:41:57,415 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,415 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,416 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:57,416 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-15 00:41:57,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:57,418 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:41:57,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,419 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:57,420 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:41:57,420 INFO L290 TraceCheckUtils]: 1: Hoare triple {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-15 00:41:57,420 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,420 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,420 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,420 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-15 00:41:57,420 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-15 00:41:57,420 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-15 00:41:57,421 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:57,421 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:41:57,422 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:57,422 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:41:57,423 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:57,426 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:41:57,427 INFO L290 TraceCheckUtils]: 14: Hoare triple {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-15 00:41:57,427 INFO L290 TraceCheckUtils]: 15: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-15 00:41:57,428 INFO L290 TraceCheckUtils]: 16: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-15 00:41:57,428 INFO L290 TraceCheckUtils]: 17: Hoare triple {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:57,429 INFO L290 TraceCheckUtils]: 18: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:57,429 INFO L290 TraceCheckUtils]: 19: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:41:57,429 INFO L290 TraceCheckUtils]: 20: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:57,430 INFO L290 TraceCheckUtils]: 21: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:57,430 INFO L272 TraceCheckUtils]: 22: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-15 00:41:57,430 INFO L290 TraceCheckUtils]: 23: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:41:57,430 INFO L290 TraceCheckUtils]: 24: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,430 INFO L290 TraceCheckUtils]: 25: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,431 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5074#true} {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:57,431 INFO L290 TraceCheckUtils]: 27: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:41:57,431 INFO L290 TraceCheckUtils]: 28: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:57,432 INFO L290 TraceCheckUtils]: 29: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:57,432 INFO L272 TraceCheckUtils]: 30: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-15 00:41:57,432 INFO L290 TraceCheckUtils]: 31: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:41:57,432 INFO L290 TraceCheckUtils]: 32: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,432 INFO L290 TraceCheckUtils]: 33: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,433 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:57,433 INFO L290 TraceCheckUtils]: 35: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:41:57,434 INFO L290 TraceCheckUtils]: 36: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:57,434 INFO L290 TraceCheckUtils]: 37: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:57,434 INFO L272 TraceCheckUtils]: 38: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-15 00:41:57,434 INFO L290 TraceCheckUtils]: 39: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:41:57,434 INFO L290 TraceCheckUtils]: 40: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,435 INFO L290 TraceCheckUtils]: 41: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:41:57,435 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:57,436 INFO L290 TraceCheckUtils]: 43: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:41:57,436 INFO L290 TraceCheckUtils]: 44: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:41:57,437 INFO L290 TraceCheckUtils]: 45: Hoare triple {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:41:57,437 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5104#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:41:57,437 INFO L290 TraceCheckUtils]: 47: Hoare triple {5104#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5105#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:41:57,438 INFO L290 TraceCheckUtils]: 48: Hoare triple {5105#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-15 00:41:57,438 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-15 00:41:57,438 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-15 00:41:57,438 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:41:57,438 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881151457] [2022-04-15 00:41:57,439 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [881151457] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:41:57,439 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1724267597] [2022-04-15 00:41:57,439 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 00:41:57,439 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:41:57,439 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:41:57,440 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:41:57,443 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-15 00:41:57,500 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-04-15 00:41:57,500 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:41:57,501 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-15 00:41:57,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:41:57,512 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:41:57,581 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:41:57,686 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-15 00:41:57,687 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-15 00:41:57,710 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-15 00:41:57,710 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-15 00:42:38,012 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:42:38,059 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:38,059 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-15 00:42:38,059 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:38,059 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:38,060 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:38,060 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-15 00:42:38,060 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-15 00:42:38,060 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-15 00:42:38,061 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:42:38,061 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:42:38,062 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:42:38,062 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:42:38,062 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:42:38,063 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:42:38,063 INFO L290 TraceCheckUtils]: 14: Hoare triple {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-15 00:42:38,064 INFO L290 TraceCheckUtils]: 15: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:42:38,064 INFO L290 TraceCheckUtils]: 16: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:42:38,067 INFO L290 TraceCheckUtils]: 17: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:38,067 INFO L290 TraceCheckUtils]: 18: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:38,077 INFO L290 TraceCheckUtils]: 19: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:38,078 INFO L290 TraceCheckUtils]: 20: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-15 00:42:38,078 INFO L290 TraceCheckUtils]: 21: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-15 00:42:38,080 INFO L272 TraceCheckUtils]: 22: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-15 00:42:38,080 INFO L290 TraceCheckUtils]: 23: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-15 00:42:38,080 INFO L290 TraceCheckUtils]: 24: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-15 00:42:38,081 INFO L290 TraceCheckUtils]: 25: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-15 00:42:38,081 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-15 00:42:38,082 INFO L290 TraceCheckUtils]: 27: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-15 00:42:38,083 INFO L290 TraceCheckUtils]: 28: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:38,083 INFO L290 TraceCheckUtils]: 29: Hoare triple {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:40,091 WARN L272 TraceCheckUtils]: 30: Hoare triple {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is UNKNOWN [2022-04-15 00:42:40,093 INFO L290 TraceCheckUtils]: 31: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-15 00:42:40,093 INFO L290 TraceCheckUtils]: 32: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-15 00:42:40,094 INFO L290 TraceCheckUtils]: 33: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-15 00:42:40,095 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} is VALID [2022-04-15 00:42:40,096 INFO L290 TraceCheckUtils]: 35: Hoare triple {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} is VALID [2022-04-15 00:42:40,096 INFO L290 TraceCheckUtils]: 36: Hoare triple {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:40,097 INFO L290 TraceCheckUtils]: 37: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:40,098 INFO L272 TraceCheckUtils]: 38: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5231#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-15 00:42:40,098 INFO L290 TraceCheckUtils]: 39: Hoare triple {5231#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5231#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-15 00:42:40,098 INFO L290 TraceCheckUtils]: 40: Hoare triple {5231#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5231#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-15 00:42:40,099 INFO L290 TraceCheckUtils]: 41: Hoare triple {5231#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5231#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-15 00:42:40,099 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5231#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:40,100 INFO L290 TraceCheckUtils]: 43: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-15 00:42:40,100 INFO L290 TraceCheckUtils]: 44: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5250#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:42:40,101 INFO L290 TraceCheckUtils]: 45: Hoare triple {5250#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:42:40,101 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5257#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:42:40,102 INFO L290 TraceCheckUtils]: 47: Hoare triple {5257#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5261#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:42:40,102 INFO L290 TraceCheckUtils]: 48: Hoare triple {5261#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-15 00:42:40,102 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-15 00:42:40,102 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 14 proven. 58 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:42:40,102 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:42:42,281 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) is different from false [2022-04-15 00:42:44,547 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:42:44,551 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:42:44,617 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-15 00:42:44,618 INFO L290 TraceCheckUtils]: 48: Hoare triple {5261#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-15 00:42:44,618 INFO L290 TraceCheckUtils]: 47: Hoare triple {5257#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5261#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:42:44,618 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5257#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:42:44,619 INFO L290 TraceCheckUtils]: 45: Hoare triple {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:42:44,619 INFO L290 TraceCheckUtils]: 44: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:42:44,620 INFO L290 TraceCheckUtils]: 43: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:42:44,620 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:42:44,621 INFO L290 TraceCheckUtils]: 41: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,621 INFO L290 TraceCheckUtils]: 40: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,621 INFO L290 TraceCheckUtils]: 39: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:42:44,621 INFO L272 TraceCheckUtils]: 38: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-15 00:42:44,621 INFO L290 TraceCheckUtils]: 37: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:42:44,622 INFO L290 TraceCheckUtils]: 36: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:42:44,622 INFO L290 TraceCheckUtils]: 35: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:42:44,623 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:42:44,623 INFO L290 TraceCheckUtils]: 33: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,623 INFO L290 TraceCheckUtils]: 32: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,623 INFO L290 TraceCheckUtils]: 31: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:42:44,623 INFO L272 TraceCheckUtils]: 30: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-15 00:42:44,623 INFO L290 TraceCheckUtils]: 29: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:42:44,624 INFO L290 TraceCheckUtils]: 28: Hoare triple {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:42:44,624 INFO L290 TraceCheckUtils]: 27: Hoare triple {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:42:44,625 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5074#true} {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:42:44,625 INFO L290 TraceCheckUtils]: 25: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,625 INFO L290 TraceCheckUtils]: 24: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,625 INFO L290 TraceCheckUtils]: 23: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-15 00:42:44,625 INFO L272 TraceCheckUtils]: 22: Hoare triple {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-15 00:42:44,625 INFO L290 TraceCheckUtils]: 21: Hoare triple {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:42:44,626 INFO L290 TraceCheckUtils]: 20: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5331#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:42:44,626 INFO L290 TraceCheckUtils]: 19: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:42:44,626 INFO L290 TraceCheckUtils]: 18: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:42:44,628 INFO L290 TraceCheckUtils]: 17: Hoare triple {5365#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-15 00:42:44,629 INFO L290 TraceCheckUtils]: 16: Hoare triple {5365#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5365#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:42:44,629 INFO L290 TraceCheckUtils]: 15: Hoare triple {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5365#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-15 00:42:44,630 INFO L290 TraceCheckUtils]: 14: Hoare triple {5375#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-15 00:42:44,630 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5375#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} is VALID [2022-04-15 00:42:44,631 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:42:44,631 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:42:44,632 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:42:44,632 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:42:44,632 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:42:44,633 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-15 00:42:44,633 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-15 00:42:44,633 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-15 00:42:44,633 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,633 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,633 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,633 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-15 00:42:44,634 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-15 00:42:44,634 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 11 not checked. [2022-04-15 00:42:44,634 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1724267597] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:42:44,634 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:42:44,634 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 21, 17] total 32 [2022-04-15 00:42:44,634 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1335503919] [2022-04-15 00:42:44,634 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:42:44,635 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 9 states have call successors, (12), 7 states have call predecessors, (12), 4 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) Word has length 50 [2022-04-15 00:42:44,636 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:42:44,636 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 9 states have call successors, (12), 7 states have call predecessors, (12), 4 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-15 00:43:02,061 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 80 inductive. 0 not inductive. 10 times theorem prover too weak to decide inductivity. [2022-04-15 00:43:02,062 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-15 00:43:02,062 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:43:02,062 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-15 00:43:02,062 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=780, Unknown=35, NotChecked=58, Total=992 [2022-04-15 00:43:02,063 INFO L87 Difference]: Start difference. First operand 83 states and 88 transitions. Second operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 9 states have call successors, (12), 7 states have call predecessors, (12), 4 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-15 00:43:09,367 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (<= 4 c_main_~i~0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 12)) 0) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-15 00:43:12,182 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 12))) (and (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0) (not (= (+ (* c_main_~i~0 4) c_main_~x~0.offset) .cse0)))) is different from false [2022-04-15 00:43:12,584 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4))) 0))) is different from false [2022-04-15 00:43:21,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:43:21,068 INFO L93 Difference]: Finished difference Result 122 states and 126 transitions. [2022-04-15 00:43:21,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-15 00:43:21,068 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 9 states have call successors, (12), 7 states have call predecessors, (12), 4 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) Word has length 50 [2022-04-15 00:43:21,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:43:21,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 9 states have call successors, (12), 7 states have call predecessors, (12), 4 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-15 00:43:21,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 74 transitions. [2022-04-15 00:43:21,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 9 states have call successors, (12), 7 states have call predecessors, (12), 4 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-15 00:43:21,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 74 transitions. [2022-04-15 00:43:21,071 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 74 transitions. [2022-04-15 00:43:42,940 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 61 inductive. 0 not inductive. 13 times theorem prover too weak to decide inductivity. [2022-04-15 00:43:42,942 INFO L225 Difference]: With dead ends: 122 [2022-04-15 00:43:42,942 INFO L226 Difference]: Without dead ends: 120 [2022-04-15 00:43:42,943 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 89 SyntacticMatches, 7 SemanticMatches, 47 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 428 ImplicationChecksByTransitivity, 55.6s TimeCoverageRelationStatistics Valid=234, Invalid=1716, Unknown=46, NotChecked=356, Total=2352 [2022-04-15 00:43:42,943 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 53 mSDsluCounter, 252 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 53 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 495 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 173 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 00:43:42,943 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [53 Valid, 281 Invalid, 495 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 302 Invalid, 0 Unknown, 173 Unchecked, 0.2s Time] [2022-04-15 00:43:42,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-04-15 00:43:42,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 57. [2022-04-15 00:43:42,968 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:43:42,968 INFO L82 GeneralOperation]: Start isEquivalent. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:43:42,968 INFO L74 IsIncluded]: Start isIncluded. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:43:42,968 INFO L87 Difference]: Start difference. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:43:42,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:43:42,970 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2022-04-15 00:43:42,970 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 124 transitions. [2022-04-15 00:43:42,970 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:43:42,970 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:43:42,970 INFO L74 IsIncluded]: Start isIncluded. First operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 120 states. [2022-04-15 00:43:42,970 INFO L87 Difference]: Start difference. First operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 120 states. [2022-04-15 00:43:42,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:43:42,972 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2022-04-15 00:43:42,972 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 124 transitions. [2022-04-15 00:43:42,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:43:42,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:43:42,972 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:43:42,972 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:43:42,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:43:42,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2022-04-15 00:43:42,973 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 58 transitions. Word has length 50 [2022-04-15 00:43:42,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:43:42,973 INFO L478 AbstractCegarLoop]: Abstraction has 57 states and 58 transitions. [2022-04-15 00:43:42,973 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 9 states have call successors, (12), 7 states have call predecessors, (12), 4 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-15 00:43:42,973 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 58 transitions. [2022-04-15 00:43:42,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-15 00:43:42,974 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:43:42,974 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:43:43,012 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-15 00:43:43,174 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-15 00:43:43,174 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:43:43,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:43:43,175 INFO L85 PathProgramCache]: Analyzing trace with hash 692034935, now seen corresponding path program 10 times [2022-04-15 00:43:43,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:43:43,175 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [675741756] [2022-04-15 00:43:43,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:43:43,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:43:43,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:43,284 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:43:43,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:43,294 INFO L290 TraceCheckUtils]: 0: Hoare triple {5979#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5947#true} is VALID [2022-04-15 00:43:43,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {5947#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,294 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5947#true} {5947#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,294 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-15 00:43:43,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:43,297 INFO L290 TraceCheckUtils]: 0: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,297 INFO L290 TraceCheckUtils]: 1: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,297 INFO L290 TraceCheckUtils]: 2: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,297 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5947#true} {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-15 00:43:43,297 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-15 00:43:43,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:43,303 INFO L290 TraceCheckUtils]: 0: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5947#true} {5963#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:43,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-15 00:43:43,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:43,306 INFO L290 TraceCheckUtils]: 0: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,306 INFO L290 TraceCheckUtils]: 1: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,306 INFO L290 TraceCheckUtils]: 2: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,307 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5947#true} {5968#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:43,307 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-15 00:43:43,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:43,309 INFO L290 TraceCheckUtils]: 0: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,309 INFO L290 TraceCheckUtils]: 1: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,309 INFO L290 TraceCheckUtils]: 2: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,310 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5947#true} {5973#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:43,310 INFO L272 TraceCheckUtils]: 0: Hoare triple {5947#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5979#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:43:43,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {5979#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5947#true} is VALID [2022-04-15 00:43:43,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {5947#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,310 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5947#true} {5947#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,310 INFO L272 TraceCheckUtils]: 4: Hoare triple {5947#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,310 INFO L290 TraceCheckUtils]: 5: Hoare triple {5947#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5947#true} is VALID [2022-04-15 00:43:43,311 INFO L290 TraceCheckUtils]: 6: Hoare triple {5947#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5952#(= main_~i~0 0)} is VALID [2022-04-15 00:43:43,311 INFO L290 TraceCheckUtils]: 7: Hoare triple {5952#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5952#(= main_~i~0 0)} is VALID [2022-04-15 00:43:43,311 INFO L290 TraceCheckUtils]: 8: Hoare triple {5952#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 1)} is VALID [2022-04-15 00:43:43,312 INFO L290 TraceCheckUtils]: 9: Hoare triple {5953#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 1)} is VALID [2022-04-15 00:43:43,312 INFO L290 TraceCheckUtils]: 10: Hoare triple {5953#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 2)} is VALID [2022-04-15 00:43:43,312 INFO L290 TraceCheckUtils]: 11: Hoare triple {5954#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5954#(<= main_~i~0 2)} is VALID [2022-04-15 00:43:43,313 INFO L290 TraceCheckUtils]: 12: Hoare triple {5954#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5955#(<= main_~i~0 3)} is VALID [2022-04-15 00:43:43,313 INFO L290 TraceCheckUtils]: 13: Hoare triple {5955#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5955#(<= main_~i~0 3)} is VALID [2022-04-15 00:43:43,313 INFO L290 TraceCheckUtils]: 14: Hoare triple {5955#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5956#(<= main_~i~0 4)} is VALID [2022-04-15 00:43:43,314 INFO L290 TraceCheckUtils]: 15: Hoare triple {5956#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5957#(<= main_~n~0 4)} is VALID [2022-04-15 00:43:43,314 INFO L290 TraceCheckUtils]: 16: Hoare triple {5957#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-15 00:43:43,314 INFO L290 TraceCheckUtils]: 17: Hoare triple {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-15 00:43:43,314 INFO L272 TraceCheckUtils]: 18: Hoare triple {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:43,314 INFO L290 TraceCheckUtils]: 19: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,314 INFO L290 TraceCheckUtils]: 20: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,315 INFO L290 TraceCheckUtils]: 21: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,315 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5947#true} {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-15 00:43:43,315 INFO L290 TraceCheckUtils]: 23: Hoare triple {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-15 00:43:43,316 INFO L290 TraceCheckUtils]: 24: Hoare triple {5958#(and (<= main_~n~0 4) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:43,316 INFO L290 TraceCheckUtils]: 25: Hoare triple {5963#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:43,316 INFO L272 TraceCheckUtils]: 26: Hoare triple {5963#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:43,316 INFO L290 TraceCheckUtils]: 27: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,316 INFO L290 TraceCheckUtils]: 28: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,316 INFO L290 TraceCheckUtils]: 29: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,317 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5947#true} {5963#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:43,317 INFO L290 TraceCheckUtils]: 31: Hoare triple {5963#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:43,317 INFO L290 TraceCheckUtils]: 32: Hoare triple {5963#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:43,318 INFO L290 TraceCheckUtils]: 33: Hoare triple {5968#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:43,318 INFO L272 TraceCheckUtils]: 34: Hoare triple {5968#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:43,318 INFO L290 TraceCheckUtils]: 35: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,318 INFO L290 TraceCheckUtils]: 36: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,318 INFO L290 TraceCheckUtils]: 37: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,318 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5947#true} {5968#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:43,318 INFO L290 TraceCheckUtils]: 39: Hoare triple {5968#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:43,319 INFO L290 TraceCheckUtils]: 40: Hoare triple {5968#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:43,319 INFO L290 TraceCheckUtils]: 41: Hoare triple {5973#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:43,319 INFO L272 TraceCheckUtils]: 42: Hoare triple {5973#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:43,319 INFO L290 TraceCheckUtils]: 43: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,319 INFO L290 TraceCheckUtils]: 44: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,319 INFO L290 TraceCheckUtils]: 45: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,320 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5947#true} {5973#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:43,320 INFO L290 TraceCheckUtils]: 47: Hoare triple {5973#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:43,320 INFO L290 TraceCheckUtils]: 48: Hoare triple {5973#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5978#(<= main_~n~0 main_~i~1)} is VALID [2022-04-15 00:43:43,321 INFO L290 TraceCheckUtils]: 49: Hoare triple {5978#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5948#false} is VALID [2022-04-15 00:43:43,321 INFO L272 TraceCheckUtils]: 50: Hoare triple {5948#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5948#false} is VALID [2022-04-15 00:43:43,321 INFO L290 TraceCheckUtils]: 51: Hoare triple {5948#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5948#false} is VALID [2022-04-15 00:43:43,321 INFO L290 TraceCheckUtils]: 52: Hoare triple {5948#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5948#false} is VALID [2022-04-15 00:43:43,321 INFO L290 TraceCheckUtils]: 53: Hoare triple {5948#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5948#false} is VALID [2022-04-15 00:43:43,321 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 27 proven. 29 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:43:43,321 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:43:43,321 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [675741756] [2022-04-15 00:43:43,321 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [675741756] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:43:43,321 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [752230498] [2022-04-15 00:43:43,321 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 00:43:43,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:43:43,322 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:43:43,322 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:43:43,323 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-15 00:43:43,374 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 00:43:43,374 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:43:43,375 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-15 00:43:43,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:43,387 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:43:43,741 INFO L272 TraceCheckUtils]: 0: Hoare triple {5947#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {5947#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5947#true} is VALID [2022-04-15 00:43:43,742 INFO L290 TraceCheckUtils]: 2: Hoare triple {5947#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,742 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5947#true} {5947#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,742 INFO L272 TraceCheckUtils]: 4: Hoare triple {5947#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,742 INFO L290 TraceCheckUtils]: 5: Hoare triple {5947#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5947#true} is VALID [2022-04-15 00:43:43,743 INFO L290 TraceCheckUtils]: 6: Hoare triple {5947#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6001#(<= main_~i~0 0)} is VALID [2022-04-15 00:43:43,743 INFO L290 TraceCheckUtils]: 7: Hoare triple {6001#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6001#(<= main_~i~0 0)} is VALID [2022-04-15 00:43:43,743 INFO L290 TraceCheckUtils]: 8: Hoare triple {6001#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 1)} is VALID [2022-04-15 00:43:43,744 INFO L290 TraceCheckUtils]: 9: Hoare triple {5953#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 1)} is VALID [2022-04-15 00:43:43,744 INFO L290 TraceCheckUtils]: 10: Hoare triple {5953#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 2)} is VALID [2022-04-15 00:43:43,745 INFO L290 TraceCheckUtils]: 11: Hoare triple {5954#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5954#(<= main_~i~0 2)} is VALID [2022-04-15 00:43:43,745 INFO L290 TraceCheckUtils]: 12: Hoare triple {5954#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5955#(<= main_~i~0 3)} is VALID [2022-04-15 00:43:43,745 INFO L290 TraceCheckUtils]: 13: Hoare triple {5955#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5955#(<= main_~i~0 3)} is VALID [2022-04-15 00:43:43,746 INFO L290 TraceCheckUtils]: 14: Hoare triple {5955#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5956#(<= main_~i~0 4)} is VALID [2022-04-15 00:43:43,746 INFO L290 TraceCheckUtils]: 15: Hoare triple {5956#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5957#(<= main_~n~0 4)} is VALID [2022-04-15 00:43:43,747 INFO L290 TraceCheckUtils]: 16: Hoare triple {5957#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,747 INFO L290 TraceCheckUtils]: 17: Hoare triple {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,747 INFO L272 TraceCheckUtils]: 18: Hoare triple {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:43,747 INFO L290 TraceCheckUtils]: 19: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,747 INFO L290 TraceCheckUtils]: 20: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,747 INFO L290 TraceCheckUtils]: 21: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,748 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5947#true} {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,748 INFO L290 TraceCheckUtils]: 23: Hoare triple {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,749 INFO L290 TraceCheckUtils]: 24: Hoare triple {6032#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,749 INFO L290 TraceCheckUtils]: 25: Hoare triple {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,749 INFO L272 TraceCheckUtils]: 26: Hoare triple {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:43,750 INFO L290 TraceCheckUtils]: 27: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,750 INFO L290 TraceCheckUtils]: 28: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,750 INFO L290 TraceCheckUtils]: 29: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,750 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5947#true} {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,751 INFO L290 TraceCheckUtils]: 31: Hoare triple {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,751 INFO L290 TraceCheckUtils]: 32: Hoare triple {6057#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,752 INFO L290 TraceCheckUtils]: 33: Hoare triple {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,752 INFO L272 TraceCheckUtils]: 34: Hoare triple {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:43,752 INFO L290 TraceCheckUtils]: 35: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,752 INFO L290 TraceCheckUtils]: 36: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,752 INFO L290 TraceCheckUtils]: 37: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,753 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5947#true} {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,753 INFO L290 TraceCheckUtils]: 39: Hoare triple {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,754 INFO L290 TraceCheckUtils]: 40: Hoare triple {6082#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,754 INFO L290 TraceCheckUtils]: 41: Hoare triple {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,754 INFO L272 TraceCheckUtils]: 42: Hoare triple {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:43,754 INFO L290 TraceCheckUtils]: 43: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:43,754 INFO L290 TraceCheckUtils]: 44: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,754 INFO L290 TraceCheckUtils]: 45: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:43,755 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5947#true} {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,755 INFO L290 TraceCheckUtils]: 47: Hoare triple {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,756 INFO L290 TraceCheckUtils]: 48: Hoare triple {6107#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6132#(and (<= 4 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-15 00:43:43,756 INFO L290 TraceCheckUtils]: 49: Hoare triple {6132#(and (<= 4 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5948#false} is VALID [2022-04-15 00:43:43,756 INFO L272 TraceCheckUtils]: 50: Hoare triple {5948#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5948#false} is VALID [2022-04-15 00:43:43,756 INFO L290 TraceCheckUtils]: 51: Hoare triple {5948#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5948#false} is VALID [2022-04-15 00:43:43,756 INFO L290 TraceCheckUtils]: 52: Hoare triple {5948#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5948#false} is VALID [2022-04-15 00:43:43,756 INFO L290 TraceCheckUtils]: 53: Hoare triple {5948#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5948#false} is VALID [2022-04-15 00:43:43,757 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:43:43,757 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:43:43,998 INFO L290 TraceCheckUtils]: 53: Hoare triple {5948#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5948#false} is VALID [2022-04-15 00:43:43,998 INFO L290 TraceCheckUtils]: 52: Hoare triple {5948#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5948#false} is VALID [2022-04-15 00:43:43,998 INFO L290 TraceCheckUtils]: 51: Hoare triple {5948#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5948#false} is VALID [2022-04-15 00:43:43,998 INFO L272 TraceCheckUtils]: 50: Hoare triple {5948#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5948#false} is VALID [2022-04-15 00:43:43,999 INFO L290 TraceCheckUtils]: 49: Hoare triple {5978#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5948#false} is VALID [2022-04-15 00:43:43,999 INFO L290 TraceCheckUtils]: 48: Hoare triple {5973#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5978#(<= main_~n~0 main_~i~1)} is VALID [2022-04-15 00:43:44,000 INFO L290 TraceCheckUtils]: 47: Hoare triple {5973#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:44,000 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5947#true} {5973#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:44,000 INFO L290 TraceCheckUtils]: 45: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,000 INFO L290 TraceCheckUtils]: 44: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,000 INFO L290 TraceCheckUtils]: 43: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:44,000 INFO L272 TraceCheckUtils]: 42: Hoare triple {5973#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:44,001 INFO L290 TraceCheckUtils]: 41: Hoare triple {5973#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:44,001 INFO L290 TraceCheckUtils]: 40: Hoare triple {5968#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5973#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:43:44,002 INFO L290 TraceCheckUtils]: 39: Hoare triple {5968#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:44,002 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5947#true} {5968#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:44,002 INFO L290 TraceCheckUtils]: 37: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,002 INFO L290 TraceCheckUtils]: 36: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,002 INFO L290 TraceCheckUtils]: 35: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:44,002 INFO L272 TraceCheckUtils]: 34: Hoare triple {5968#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:44,028 INFO L290 TraceCheckUtils]: 33: Hoare triple {5968#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:44,030 INFO L290 TraceCheckUtils]: 32: Hoare triple {5963#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5968#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:43:44,030 INFO L290 TraceCheckUtils]: 31: Hoare triple {5963#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:44,031 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5947#true} {5963#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:44,031 INFO L290 TraceCheckUtils]: 29: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,031 INFO L290 TraceCheckUtils]: 28: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,031 INFO L290 TraceCheckUtils]: 27: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:44,032 INFO L272 TraceCheckUtils]: 26: Hoare triple {5963#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:44,032 INFO L290 TraceCheckUtils]: 25: Hoare triple {5963#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:44,033 INFO L290 TraceCheckUtils]: 24: Hoare triple {6235#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5963#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:43:44,033 INFO L290 TraceCheckUtils]: 23: Hoare triple {6235#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6235#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:43:44,034 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5947#true} {6235#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6235#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:43:44,034 INFO L290 TraceCheckUtils]: 21: Hoare triple {5947#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,034 INFO L290 TraceCheckUtils]: 20: Hoare triple {5947#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,034 INFO L290 TraceCheckUtils]: 19: Hoare triple {5947#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5947#true} is VALID [2022-04-15 00:43:44,034 INFO L272 TraceCheckUtils]: 18: Hoare triple {6235#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5947#true} is VALID [2022-04-15 00:43:44,034 INFO L290 TraceCheckUtils]: 17: Hoare triple {6235#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6235#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:43:44,035 INFO L290 TraceCheckUtils]: 16: Hoare triple {5957#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6235#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:43:44,035 INFO L290 TraceCheckUtils]: 15: Hoare triple {5956#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5957#(<= main_~n~0 4)} is VALID [2022-04-15 00:43:44,036 INFO L290 TraceCheckUtils]: 14: Hoare triple {5955#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5956#(<= main_~i~0 4)} is VALID [2022-04-15 00:43:44,036 INFO L290 TraceCheckUtils]: 13: Hoare triple {5955#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5955#(<= main_~i~0 3)} is VALID [2022-04-15 00:43:44,037 INFO L290 TraceCheckUtils]: 12: Hoare triple {5954#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5955#(<= main_~i~0 3)} is VALID [2022-04-15 00:43:44,037 INFO L290 TraceCheckUtils]: 11: Hoare triple {5954#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5954#(<= main_~i~0 2)} is VALID [2022-04-15 00:43:44,038 INFO L290 TraceCheckUtils]: 10: Hoare triple {5953#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 2)} is VALID [2022-04-15 00:43:44,038 INFO L290 TraceCheckUtils]: 9: Hoare triple {5953#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 1)} is VALID [2022-04-15 00:43:44,038 INFO L290 TraceCheckUtils]: 8: Hoare triple {6001#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 1)} is VALID [2022-04-15 00:43:44,039 INFO L290 TraceCheckUtils]: 7: Hoare triple {6001#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6001#(<= main_~i~0 0)} is VALID [2022-04-15 00:43:44,039 INFO L290 TraceCheckUtils]: 6: Hoare triple {5947#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6001#(<= main_~i~0 0)} is VALID [2022-04-15 00:43:44,039 INFO L290 TraceCheckUtils]: 5: Hoare triple {5947#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5947#true} is VALID [2022-04-15 00:43:44,040 INFO L272 TraceCheckUtils]: 4: Hoare triple {5947#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,040 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5947#true} {5947#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,040 INFO L290 TraceCheckUtils]: 2: Hoare triple {5947#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,040 INFO L290 TraceCheckUtils]: 1: Hoare triple {5947#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5947#true} is VALID [2022-04-15 00:43:44,040 INFO L272 TraceCheckUtils]: 0: Hoare triple {5947#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5947#true} is VALID [2022-04-15 00:43:44,040 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:43:44,040 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [752230498] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:43:44,040 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:43:44,040 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 21 [2022-04-15 00:43:44,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864963724] [2022-04-15 00:43:44,041 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:43:44,041 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-15 00:43:44,042 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:43:44,042 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:43:44,092 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:43:44,092 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-15 00:43:44,092 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:43:44,093 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-15 00:43:44,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=323, Unknown=0, NotChecked=0, Total=420 [2022-04-15 00:43:44,094 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. Second operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:43:44,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:43:44,638 INFO L93 Difference]: Finished difference Result 88 states and 94 transitions. [2022-04-15 00:43:44,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-15 00:43:44,639 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-15 00:43:44,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:43:44,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:43:44,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 64 transitions. [2022-04-15 00:43:44,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:43:44,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 64 transitions. [2022-04-15 00:43:44,641 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 64 transitions. [2022-04-15 00:43:44,714 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:43:44,729 INFO L225 Difference]: With dead ends: 88 [2022-04-15 00:43:44,729 INFO L226 Difference]: Without dead ends: 60 [2022-04-15 00:43:44,730 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 110 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2022-04-15 00:43:44,730 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 40 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 254 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 281 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 00:43:44,731 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [41 Valid, 63 Invalid, 281 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 254 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-15 00:43:44,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-04-15 00:43:44,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 59. [2022-04-15 00:43:44,770 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:43:44,770 INFO L82 GeneralOperation]: Start isEquivalent. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:43:44,770 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:43:44,770 INFO L87 Difference]: Start difference. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:43:44,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:43:44,771 INFO L93 Difference]: Finished difference Result 60 states and 61 transitions. [2022-04-15 00:43:44,772 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 61 transitions. [2022-04-15 00:43:44,772 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:43:44,772 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:43:44,772 INFO L74 IsIncluded]: Start isIncluded. First operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 60 states. [2022-04-15 00:43:44,772 INFO L87 Difference]: Start difference. First operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 60 states. [2022-04-15 00:43:44,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:43:44,773 INFO L93 Difference]: Finished difference Result 60 states and 61 transitions. [2022-04-15 00:43:44,773 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 61 transitions. [2022-04-15 00:43:44,773 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:43:44,773 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:43:44,773 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:43:44,773 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:43:44,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-15 00:43:44,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 60 transitions. [2022-04-15 00:43:44,780 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 60 transitions. Word has length 54 [2022-04-15 00:43:44,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:43:44,780 INFO L478 AbstractCegarLoop]: Abstraction has 59 states and 60 transitions. [2022-04-15 00:43:44,780 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-15 00:43:44,780 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 60 transitions. [2022-04-15 00:43:44,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-15 00:43:44,781 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:43:44,781 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:43:44,811 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-15 00:43:45,003 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-15 00:43:45,004 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:43:45,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:43:45,004 INFO L85 PathProgramCache]: Analyzing trace with hash 529632181, now seen corresponding path program 11 times [2022-04-15 00:43:45,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:43:45,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269961724] [2022-04-15 00:43:45,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:43:45,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:43:45,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:45,194 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:43:45,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:45,200 INFO L290 TraceCheckUtils]: 0: Hoare triple {6697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6661#true} is VALID [2022-04-15 00:43:45,200 INFO L290 TraceCheckUtils]: 1: Hoare triple {6661#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,200 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6661#true} {6661#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,200 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-15 00:43:45,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:45,204 INFO L290 TraceCheckUtils]: 0: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:43:45,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,204 INFO L290 TraceCheckUtils]: 2: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,205 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6661#true} {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:43:45,205 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-15 00:43:45,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:45,207 INFO L290 TraceCheckUtils]: 0: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:43:45,207 INFO L290 TraceCheckUtils]: 1: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,207 INFO L290 TraceCheckUtils]: 2: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,208 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6661#true} {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:43:45,208 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-15 00:43:45,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:45,211 INFO L290 TraceCheckUtils]: 0: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:43:45,211 INFO L290 TraceCheckUtils]: 1: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,211 INFO L290 TraceCheckUtils]: 2: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,211 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6661#true} {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:43:45,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-15 00:43:45,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:45,214 INFO L290 TraceCheckUtils]: 0: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:43:45,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,214 INFO L290 TraceCheckUtils]: 2: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,214 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6661#true} {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:43:45,215 INFO L272 TraceCheckUtils]: 0: Hoare triple {6661#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:43:45,215 INFO L290 TraceCheckUtils]: 1: Hoare triple {6697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6661#true} is VALID [2022-04-15 00:43:45,215 INFO L290 TraceCheckUtils]: 2: Hoare triple {6661#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,215 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6661#true} {6661#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,215 INFO L272 TraceCheckUtils]: 4: Hoare triple {6661#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,215 INFO L290 TraceCheckUtils]: 5: Hoare triple {6661#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6661#true} is VALID [2022-04-15 00:43:45,215 INFO L290 TraceCheckUtils]: 6: Hoare triple {6661#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6666#(= main_~i~0 0)} is VALID [2022-04-15 00:43:45,216 INFO L290 TraceCheckUtils]: 7: Hoare triple {6666#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(= main_~i~0 0)} is VALID [2022-04-15 00:43:45,216 INFO L290 TraceCheckUtils]: 8: Hoare triple {6666#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:43:45,216 INFO L290 TraceCheckUtils]: 9: Hoare triple {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:43:45,217 INFO L290 TraceCheckUtils]: 10: Hoare triple {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:43:45,217 INFO L290 TraceCheckUtils]: 11: Hoare triple {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:43:45,218 INFO L290 TraceCheckUtils]: 12: Hoare triple {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:43:45,218 INFO L290 TraceCheckUtils]: 13: Hoare triple {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:43:45,218 INFO L290 TraceCheckUtils]: 14: Hoare triple {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:43:45,219 INFO L290 TraceCheckUtils]: 15: Hoare triple {6670#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:43:45,219 INFO L290 TraceCheckUtils]: 16: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:43:45,220 INFO L290 TraceCheckUtils]: 17: Hoare triple {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:43:45,220 INFO L290 TraceCheckUtils]: 18: Hoare triple {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:43:45,220 INFO L290 TraceCheckUtils]: 19: Hoare triple {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:43:45,221 INFO L272 TraceCheckUtils]: 20: Hoare triple {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6661#true} is VALID [2022-04-15 00:43:45,221 INFO L290 TraceCheckUtils]: 21: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:43:45,221 INFO L290 TraceCheckUtils]: 22: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,221 INFO L290 TraceCheckUtils]: 23: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,221 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6661#true} {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:43:45,222 INFO L290 TraceCheckUtils]: 25: Hoare triple {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:43:45,222 INFO L290 TraceCheckUtils]: 26: Hoare triple {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:43:45,222 INFO L290 TraceCheckUtils]: 27: Hoare triple {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:43:45,222 INFO L272 TraceCheckUtils]: 28: Hoare triple {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6661#true} is VALID [2022-04-15 00:43:45,222 INFO L290 TraceCheckUtils]: 29: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:43:45,223 INFO L290 TraceCheckUtils]: 30: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,223 INFO L290 TraceCheckUtils]: 31: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,223 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6661#true} {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:43:45,223 INFO L290 TraceCheckUtils]: 33: Hoare triple {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:43:45,224 INFO L290 TraceCheckUtils]: 34: Hoare triple {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:43:45,224 INFO L290 TraceCheckUtils]: 35: Hoare triple {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:43:45,224 INFO L272 TraceCheckUtils]: 36: Hoare triple {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6661#true} is VALID [2022-04-15 00:43:45,224 INFO L290 TraceCheckUtils]: 37: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:43:45,224 INFO L290 TraceCheckUtils]: 38: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,225 INFO L290 TraceCheckUtils]: 39: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,225 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6661#true} {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:43:45,225 INFO L290 TraceCheckUtils]: 41: Hoare triple {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:43:45,226 INFO L290 TraceCheckUtils]: 42: Hoare triple {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:43:45,226 INFO L290 TraceCheckUtils]: 43: Hoare triple {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:43:45,226 INFO L272 TraceCheckUtils]: 44: Hoare triple {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6661#true} is VALID [2022-04-15 00:43:45,226 INFO L290 TraceCheckUtils]: 45: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:43:45,226 INFO L290 TraceCheckUtils]: 46: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,226 INFO L290 TraceCheckUtils]: 47: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:43:45,227 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6661#true} {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:43:45,227 INFO L290 TraceCheckUtils]: 49: Hoare triple {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:43:45,228 INFO L290 TraceCheckUtils]: 50: Hoare triple {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6693#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:43:45,228 INFO L290 TraceCheckUtils]: 51: Hoare triple {6693#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6694#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:43:45,229 INFO L272 TraceCheckUtils]: 52: Hoare triple {6694#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6695#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:43:45,229 INFO L290 TraceCheckUtils]: 53: Hoare triple {6695#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6696#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:43:45,229 INFO L290 TraceCheckUtils]: 54: Hoare triple {6696#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6662#false} is VALID [2022-04-15 00:43:45,229 INFO L290 TraceCheckUtils]: 55: Hoare triple {6662#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6662#false} is VALID [2022-04-15 00:43:45,229 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 8 proven. 57 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:43:45,230 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:43:45,230 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1269961724] [2022-04-15 00:43:45,230 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1269961724] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:43:45,230 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [484170789] [2022-04-15 00:43:45,230 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-15 00:43:45,230 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:43:45,230 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:43:45,231 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:43:45,271 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-15 00:43:45,303 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-04-15 00:43:45,303 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:43:45,305 INFO L263 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-15 00:43:45,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:43:45,316 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:43:45,444 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:44:18,133 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:44:18,175 INFO L272 TraceCheckUtils]: 0: Hoare triple {6661#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:18,176 INFO L290 TraceCheckUtils]: 1: Hoare triple {6661#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6661#true} is VALID [2022-04-15 00:44:18,176 INFO L290 TraceCheckUtils]: 2: Hoare triple {6661#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:18,176 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6661#true} {6661#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:18,176 INFO L272 TraceCheckUtils]: 4: Hoare triple {6661#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:18,176 INFO L290 TraceCheckUtils]: 5: Hoare triple {6661#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6661#true} is VALID [2022-04-15 00:44:18,176 INFO L290 TraceCheckUtils]: 6: Hoare triple {6661#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6666#(= main_~i~0 0)} is VALID [2022-04-15 00:44:18,176 INFO L290 TraceCheckUtils]: 7: Hoare triple {6666#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(= main_~i~0 0)} is VALID [2022-04-15 00:44:18,177 INFO L290 TraceCheckUtils]: 8: Hoare triple {6666#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:18,177 INFO L290 TraceCheckUtils]: 9: Hoare triple {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:18,178 INFO L290 TraceCheckUtils]: 10: Hoare triple {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:18,178 INFO L290 TraceCheckUtils]: 11: Hoare triple {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:18,178 INFO L290 TraceCheckUtils]: 12: Hoare triple {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:18,179 INFO L290 TraceCheckUtils]: 13: Hoare triple {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:18,179 INFO L290 TraceCheckUtils]: 14: Hoare triple {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:18,180 INFO L290 TraceCheckUtils]: 15: Hoare triple {6670#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:18,180 INFO L290 TraceCheckUtils]: 16: Hoare triple {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:18,180 INFO L290 TraceCheckUtils]: 17: Hoare triple {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:18,181 INFO L290 TraceCheckUtils]: 18: Hoare triple {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:18,181 INFO L290 TraceCheckUtils]: 19: Hoare triple {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:18,182 INFO L272 TraceCheckUtils]: 20: Hoare triple {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,182 INFO L290 TraceCheckUtils]: 21: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,182 INFO L290 TraceCheckUtils]: 22: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,183 INFO L290 TraceCheckUtils]: 23: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,183 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:18,183 INFO L290 TraceCheckUtils]: 25: Hoare triple {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:18,184 INFO L290 TraceCheckUtils]: 26: Hoare triple {6673#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,184 INFO L290 TraceCheckUtils]: 27: Hoare triple {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,185 INFO L272 TraceCheckUtils]: 28: Hoare triple {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,185 INFO L290 TraceCheckUtils]: 29: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,185 INFO L290 TraceCheckUtils]: 30: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,186 INFO L290 TraceCheckUtils]: 31: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,186 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,187 INFO L290 TraceCheckUtils]: 33: Hoare triple {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,187 INFO L290 TraceCheckUtils]: 34: Hoare triple {6780#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,187 INFO L290 TraceCheckUtils]: 35: Hoare triple {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,188 INFO L272 TraceCheckUtils]: 36: Hoare triple {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,189 INFO L290 TraceCheckUtils]: 37: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,189 INFO L290 TraceCheckUtils]: 38: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,189 INFO L290 TraceCheckUtils]: 39: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,190 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,190 INFO L290 TraceCheckUtils]: 41: Hoare triple {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,191 INFO L290 TraceCheckUtils]: 42: Hoare triple {6805#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,191 INFO L290 TraceCheckUtils]: 43: Hoare triple {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,192 INFO L272 TraceCheckUtils]: 44: Hoare triple {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,192 INFO L290 TraceCheckUtils]: 45: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,192 INFO L290 TraceCheckUtils]: 46: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,193 INFO L290 TraceCheckUtils]: 47: Hoare triple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-15 00:44:18,193 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6761#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,193 INFO L290 TraceCheckUtils]: 49: Hoare triple {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,194 INFO L290 TraceCheckUtils]: 50: Hoare triple {6830#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6855#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:18,194 INFO L290 TraceCheckUtils]: 51: Hoare triple {6855#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6694#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:44:18,195 INFO L272 TraceCheckUtils]: 52: Hoare triple {6694#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6862#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:44:18,195 INFO L290 TraceCheckUtils]: 53: Hoare triple {6862#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6866#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:44:18,195 INFO L290 TraceCheckUtils]: 54: Hoare triple {6866#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6662#false} is VALID [2022-04-15 00:44:18,195 INFO L290 TraceCheckUtils]: 55: Hoare triple {6662#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6662#false} is VALID [2022-04-15 00:44:18,196 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:44:18,196 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:44:20,380 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:44:20,383 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:44:20,467 INFO L290 TraceCheckUtils]: 55: Hoare triple {6662#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6662#false} is VALID [2022-04-15 00:44:20,467 INFO L290 TraceCheckUtils]: 54: Hoare triple {6866#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6662#false} is VALID [2022-04-15 00:44:20,468 INFO L290 TraceCheckUtils]: 53: Hoare triple {6862#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6866#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:44:20,468 INFO L272 TraceCheckUtils]: 52: Hoare triple {6694#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6862#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:44:20,468 INFO L290 TraceCheckUtils]: 51: Hoare triple {6693#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6694#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:44:20,469 INFO L290 TraceCheckUtils]: 50: Hoare triple {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6693#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:20,469 INFO L290 TraceCheckUtils]: 49: Hoare triple {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:20,470 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6661#true} {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:20,470 INFO L290 TraceCheckUtils]: 47: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,470 INFO L290 TraceCheckUtils]: 46: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,470 INFO L290 TraceCheckUtils]: 45: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:44:20,470 INFO L272 TraceCheckUtils]: 44: Hoare triple {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6661#true} is VALID [2022-04-15 00:44:20,470 INFO L290 TraceCheckUtils]: 43: Hoare triple {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:20,471 INFO L290 TraceCheckUtils]: 42: Hoare triple {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6688#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:20,471 INFO L290 TraceCheckUtils]: 41: Hoare triple {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:20,472 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6661#true} {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:20,472 INFO L290 TraceCheckUtils]: 39: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,472 INFO L290 TraceCheckUtils]: 38: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,472 INFO L290 TraceCheckUtils]: 37: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:44:20,472 INFO L272 TraceCheckUtils]: 36: Hoare triple {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6661#true} is VALID [2022-04-15 00:44:20,473 INFO L290 TraceCheckUtils]: 35: Hoare triple {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:20,473 INFO L290 TraceCheckUtils]: 34: Hoare triple {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:20,474 INFO L290 TraceCheckUtils]: 33: Hoare triple {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:20,474 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6661#true} {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:20,474 INFO L290 TraceCheckUtils]: 31: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,474 INFO L290 TraceCheckUtils]: 30: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,474 INFO L290 TraceCheckUtils]: 29: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:44:20,474 INFO L272 TraceCheckUtils]: 28: Hoare triple {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6661#true} is VALID [2022-04-15 00:44:20,475 INFO L290 TraceCheckUtils]: 27: Hoare triple {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:20,475 INFO L290 TraceCheckUtils]: 26: Hoare triple {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6678#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:20,476 INFO L290 TraceCheckUtils]: 25: Hoare triple {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:20,476 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6661#true} {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:20,476 INFO L290 TraceCheckUtils]: 23: Hoare triple {6661#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,476 INFO L290 TraceCheckUtils]: 22: Hoare triple {6661#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,476 INFO L290 TraceCheckUtils]: 21: Hoare triple {6661#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6661#true} is VALID [2022-04-15 00:44:20,476 INFO L272 TraceCheckUtils]: 20: Hoare triple {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6661#true} is VALID [2022-04-15 00:44:20,477 INFO L290 TraceCheckUtils]: 19: Hoare triple {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:20,477 INFO L290 TraceCheckUtils]: 18: Hoare triple {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6960#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:20,478 INFO L290 TraceCheckUtils]: 17: Hoare triple {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:20,478 INFO L290 TraceCheckUtils]: 16: Hoare triple {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:20,478 INFO L290 TraceCheckUtils]: 15: Hoare triple {6670#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6672#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:20,479 INFO L290 TraceCheckUtils]: 14: Hoare triple {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:20,479 INFO L290 TraceCheckUtils]: 13: Hoare triple {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:20,480 INFO L290 TraceCheckUtils]: 12: Hoare triple {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6669#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:20,480 INFO L290 TraceCheckUtils]: 11: Hoare triple {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:20,480 INFO L290 TraceCheckUtils]: 10: Hoare triple {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:20,481 INFO L290 TraceCheckUtils]: 9: Hoare triple {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:20,481 INFO L290 TraceCheckUtils]: 8: Hoare triple {6666#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:20,481 INFO L290 TraceCheckUtils]: 7: Hoare triple {6666#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(= main_~i~0 0)} is VALID [2022-04-15 00:44:20,482 INFO L290 TraceCheckUtils]: 6: Hoare triple {6661#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6666#(= main_~i~0 0)} is VALID [2022-04-15 00:44:20,482 INFO L290 TraceCheckUtils]: 5: Hoare triple {6661#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6661#true} is VALID [2022-04-15 00:44:20,482 INFO L272 TraceCheckUtils]: 4: Hoare triple {6661#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,482 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6661#true} {6661#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,482 INFO L290 TraceCheckUtils]: 2: Hoare triple {6661#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {6661#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6661#true} is VALID [2022-04-15 00:44:20,482 INFO L272 TraceCheckUtils]: 0: Hoare triple {6661#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6661#true} is VALID [2022-04-15 00:44:20,482 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 8 proven. 57 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:44:20,483 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [484170789] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:44:20,483 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:44:20,483 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 16] total 26 [2022-04-15 00:44:20,483 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301716757] [2022-04-15 00:44:20,483 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:44:20,483 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 56 [2022-04-15 00:44:20,484 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:44:20,484 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:20,535 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:44:20,535 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-15 00:44:20,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:44:20,536 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-15 00:44:20,536 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=575, Unknown=5, NotChecked=0, Total=650 [2022-04-15 00:44:20,536 INFO L87 Difference]: Start difference. First operand 59 states and 60 transitions. Second operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:21,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:44:21,694 INFO L93 Difference]: Finished difference Result 104 states and 106 transitions. [2022-04-15 00:44:21,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-15 00:44:21,695 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 56 [2022-04-15 00:44:21,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:44:21,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:21,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 67 transitions. [2022-04-15 00:44:21,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:21,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 67 transitions. [2022-04-15 00:44:21,696 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 67 transitions. [2022-04-15 00:44:21,761 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:44:21,762 INFO L225 Difference]: With dead ends: 104 [2022-04-15 00:44:21,762 INFO L226 Difference]: Without dead ends: 102 [2022-04-15 00:44:21,763 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 108 SyntacticMatches, 12 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 353 ImplicationChecksByTransitivity, 34.6s TimeCoverageRelationStatistics Valid=179, Invalid=1538, Unknown=5, NotChecked=0, Total=1722 [2022-04-15 00:44:21,763 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 58 mSDsluCounter, 141 mSDsCounter, 0 mSdLazyCounter, 595 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 167 SdHoareTripleChecker+Invalid, 694 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 595 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 81 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 00:44:21,763 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [59 Valid, 167 Invalid, 694 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 595 Invalid, 0 Unknown, 81 Unchecked, 0.5s Time] [2022-04-15 00:44:21,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2022-04-15 00:44:21,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 70. [2022-04-15 00:44:21,794 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:44:21,795 INFO L82 GeneralOperation]: Start isEquivalent. First operand 102 states. Second operand has 70 states, 54 states have (on average 1.0555555555555556) internal successors, (57), 55 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:44:21,795 INFO L74 IsIncluded]: Start isIncluded. First operand 102 states. Second operand has 70 states, 54 states have (on average 1.0555555555555556) internal successors, (57), 55 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:44:21,795 INFO L87 Difference]: Start difference. First operand 102 states. Second operand has 70 states, 54 states have (on average 1.0555555555555556) internal successors, (57), 55 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:44:21,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:44:21,797 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2022-04-15 00:44:21,797 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 104 transitions. [2022-04-15 00:44:21,797 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:44:21,798 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:44:21,798 INFO L74 IsIncluded]: Start isIncluded. First operand has 70 states, 54 states have (on average 1.0555555555555556) internal successors, (57), 55 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 102 states. [2022-04-15 00:44:21,798 INFO L87 Difference]: Start difference. First operand has 70 states, 54 states have (on average 1.0555555555555556) internal successors, (57), 55 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 102 states. [2022-04-15 00:44:21,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:44:21,799 INFO L93 Difference]: Finished difference Result 102 states and 104 transitions. [2022-04-15 00:44:21,799 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 104 transitions. [2022-04-15 00:44:21,800 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:44:21,800 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:44:21,800 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:44:21,800 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:44:21,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 54 states have (on average 1.0555555555555556) internal successors, (57), 55 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:44:21,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 72 transitions. [2022-04-15 00:44:21,801 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 72 transitions. Word has length 56 [2022-04-15 00:44:21,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:44:21,801 INFO L478 AbstractCegarLoop]: Abstraction has 70 states and 72 transitions. [2022-04-15 00:44:21,801 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:21,802 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 72 transitions. [2022-04-15 00:44:21,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-04-15 00:44:21,803 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:44:21,803 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:44:21,823 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-15 00:44:22,013 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-15 00:44:22,014 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:44:22,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:44:22,014 INFO L85 PathProgramCache]: Analyzing trace with hash -920591757, now seen corresponding path program 12 times [2022-04-15 00:44:22,014 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:44:22,014 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [548643902] [2022-04-15 00:44:22,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:44:22,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:44:22,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:22,202 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:44:22,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:22,211 INFO L290 TraceCheckUtils]: 0: Hoare triple {7564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7527#true} is VALID [2022-04-15 00:44:22,211 INFO L290 TraceCheckUtils]: 1: Hoare triple {7527#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,211 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7527#true} {7527#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-15 00:44:22,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:22,214 INFO L290 TraceCheckUtils]: 0: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:22,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,214 INFO L290 TraceCheckUtils]: 2: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,215 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7527#true} {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:22,215 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-15 00:44:22,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:22,224 INFO L290 TraceCheckUtils]: 0: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:22,224 INFO L290 TraceCheckUtils]: 1: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,224 INFO L290 TraceCheckUtils]: 2: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,225 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7527#true} {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:22,225 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-15 00:44:22,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:22,227 INFO L290 TraceCheckUtils]: 0: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:22,227 INFO L290 TraceCheckUtils]: 1: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,227 INFO L290 TraceCheckUtils]: 2: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,228 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7527#true} {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:22,228 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-15 00:44:22,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:22,231 INFO L290 TraceCheckUtils]: 0: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:22,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7527#true} {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:22,232 INFO L272 TraceCheckUtils]: 0: Hoare triple {7527#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:44:22,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {7564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7527#true} is VALID [2022-04-15 00:44:22,232 INFO L290 TraceCheckUtils]: 2: Hoare triple {7527#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,232 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7527#true} {7527#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,232 INFO L272 TraceCheckUtils]: 4: Hoare triple {7527#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,232 INFO L290 TraceCheckUtils]: 5: Hoare triple {7527#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7527#true} is VALID [2022-04-15 00:44:22,233 INFO L290 TraceCheckUtils]: 6: Hoare triple {7527#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7532#(= main_~i~0 0)} is VALID [2022-04-15 00:44:22,233 INFO L290 TraceCheckUtils]: 7: Hoare triple {7532#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7532#(= main_~i~0 0)} is VALID [2022-04-15 00:44:22,233 INFO L290 TraceCheckUtils]: 8: Hoare triple {7532#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:22,234 INFO L290 TraceCheckUtils]: 9: Hoare triple {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:22,234 INFO L290 TraceCheckUtils]: 10: Hoare triple {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:22,235 INFO L290 TraceCheckUtils]: 11: Hoare triple {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:22,235 INFO L290 TraceCheckUtils]: 12: Hoare triple {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:22,235 INFO L290 TraceCheckUtils]: 13: Hoare triple {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:22,239 INFO L290 TraceCheckUtils]: 14: Hoare triple {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7536#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:22,240 INFO L290 TraceCheckUtils]: 15: Hoare triple {7536#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7537#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:22,247 INFO L290 TraceCheckUtils]: 16: Hoare triple {7537#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7538#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:22,248 INFO L290 TraceCheckUtils]: 17: Hoare triple {7538#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:22,248 INFO L290 TraceCheckUtils]: 18: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:22,255 INFO L290 TraceCheckUtils]: 19: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:22,255 INFO L290 TraceCheckUtils]: 20: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:22,256 INFO L290 TraceCheckUtils]: 21: Hoare triple {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:22,256 INFO L272 TraceCheckUtils]: 22: Hoare triple {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7527#true} is VALID [2022-04-15 00:44:22,256 INFO L290 TraceCheckUtils]: 23: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:22,256 INFO L290 TraceCheckUtils]: 24: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,256 INFO L290 TraceCheckUtils]: 25: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,257 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7527#true} {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:22,257 INFO L290 TraceCheckUtils]: 27: Hoare triple {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:22,258 INFO L290 TraceCheckUtils]: 28: Hoare triple {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:22,258 INFO L290 TraceCheckUtils]: 29: Hoare triple {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:22,258 INFO L272 TraceCheckUtils]: 30: Hoare triple {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7527#true} is VALID [2022-04-15 00:44:22,258 INFO L290 TraceCheckUtils]: 31: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:22,258 INFO L290 TraceCheckUtils]: 32: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,258 INFO L290 TraceCheckUtils]: 33: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,259 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7527#true} {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:22,259 INFO L290 TraceCheckUtils]: 35: Hoare triple {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:22,260 INFO L290 TraceCheckUtils]: 36: Hoare triple {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:22,260 INFO L290 TraceCheckUtils]: 37: Hoare triple {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:22,260 INFO L272 TraceCheckUtils]: 38: Hoare triple {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7527#true} is VALID [2022-04-15 00:44:22,260 INFO L290 TraceCheckUtils]: 39: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:22,260 INFO L290 TraceCheckUtils]: 40: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,260 INFO L290 TraceCheckUtils]: 41: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,261 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7527#true} {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:22,261 INFO L290 TraceCheckUtils]: 43: Hoare triple {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:22,262 INFO L290 TraceCheckUtils]: 44: Hoare triple {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:22,262 INFO L290 TraceCheckUtils]: 45: Hoare triple {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:22,262 INFO L272 TraceCheckUtils]: 46: Hoare triple {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7527#true} is VALID [2022-04-15 00:44:22,262 INFO L290 TraceCheckUtils]: 47: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:22,262 INFO L290 TraceCheckUtils]: 48: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,262 INFO L290 TraceCheckUtils]: 49: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:22,263 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7527#true} {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:22,263 INFO L290 TraceCheckUtils]: 51: Hoare triple {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:22,264 INFO L290 TraceCheckUtils]: 52: Hoare triple {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7560#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:22,264 INFO L290 TraceCheckUtils]: 53: Hoare triple {7560#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7561#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:44:22,279 INFO L272 TraceCheckUtils]: 54: Hoare triple {7561#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7562#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:44:22,280 INFO L290 TraceCheckUtils]: 55: Hoare triple {7562#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7563#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:44:22,280 INFO L290 TraceCheckUtils]: 56: Hoare triple {7563#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7528#false} is VALID [2022-04-15 00:44:22,280 INFO L290 TraceCheckUtils]: 57: Hoare triple {7528#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7528#false} is VALID [2022-04-15 00:44:22,281 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 8 proven. 68 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:44:22,281 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:44:22,281 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [548643902] [2022-04-15 00:44:22,281 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [548643902] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:44:22,281 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [222836346] [2022-04-15 00:44:22,281 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-15 00:44:22,281 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:44:22,281 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:44:22,282 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:44:22,283 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-15 00:44:22,342 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-04-15 00:44:22,342 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:44:22,343 INFO L263 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-15 00:44:22,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:22,354 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:44:22,479 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:44:22,708 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-15 00:44:22,708 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-15 00:44:55,467 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:44:55,513 INFO L272 TraceCheckUtils]: 0: Hoare triple {7527#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:55,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {7527#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7527#true} is VALID [2022-04-15 00:44:55,513 INFO L290 TraceCheckUtils]: 2: Hoare triple {7527#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:55,513 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7527#true} {7527#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:55,513 INFO L272 TraceCheckUtils]: 4: Hoare triple {7527#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:55,513 INFO L290 TraceCheckUtils]: 5: Hoare triple {7527#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7527#true} is VALID [2022-04-15 00:44:55,514 INFO L290 TraceCheckUtils]: 6: Hoare triple {7527#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7532#(= main_~i~0 0)} is VALID [2022-04-15 00:44:55,514 INFO L290 TraceCheckUtils]: 7: Hoare triple {7532#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7532#(= main_~i~0 0)} is VALID [2022-04-15 00:44:55,514 INFO L290 TraceCheckUtils]: 8: Hoare triple {7532#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:55,515 INFO L290 TraceCheckUtils]: 9: Hoare triple {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:55,515 INFO L290 TraceCheckUtils]: 10: Hoare triple {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:55,516 INFO L290 TraceCheckUtils]: 11: Hoare triple {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:55,516 INFO L290 TraceCheckUtils]: 12: Hoare triple {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:55,516 INFO L290 TraceCheckUtils]: 13: Hoare triple {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:55,517 INFO L290 TraceCheckUtils]: 14: Hoare triple {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7536#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:55,517 INFO L290 TraceCheckUtils]: 15: Hoare triple {7536#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7537#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:55,518 INFO L290 TraceCheckUtils]: 16: Hoare triple {7537#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7616#(exists ((v_main_~i~0_96 Int)) (and (<= 4 v_main_~i~0_96) (<= v_main_~i~0_96 4) (<= (+ v_main_~i~0_96 1) main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_96 4))) 0)))} is VALID [2022-04-15 00:44:55,519 INFO L290 TraceCheckUtils]: 17: Hoare triple {7616#(exists ((v_main_~i~0_96 Int)) (and (<= 4 v_main_~i~0_96) (<= v_main_~i~0_96 4) (<= (+ v_main_~i~0_96 1) main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_96 4))) 0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:55,519 INFO L290 TraceCheckUtils]: 18: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:55,520 INFO L290 TraceCheckUtils]: 19: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:55,520 INFO L290 TraceCheckUtils]: 20: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:55,520 INFO L290 TraceCheckUtils]: 21: Hoare triple {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:55,521 INFO L272 TraceCheckUtils]: 22: Hoare triple {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,521 INFO L290 TraceCheckUtils]: 23: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,522 INFO L290 TraceCheckUtils]: 24: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,522 INFO L290 TraceCheckUtils]: 25: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,522 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:55,523 INFO L290 TraceCheckUtils]: 27: Hoare triple {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:55,523 INFO L290 TraceCheckUtils]: 28: Hoare triple {7540#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,524 INFO L290 TraceCheckUtils]: 29: Hoare triple {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,525 INFO L272 TraceCheckUtils]: 30: Hoare triple {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,525 INFO L290 TraceCheckUtils]: 31: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,525 INFO L290 TraceCheckUtils]: 32: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,525 INFO L290 TraceCheckUtils]: 33: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,526 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,526 INFO L290 TraceCheckUtils]: 35: Hoare triple {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,527 INFO L290 TraceCheckUtils]: 36: Hoare triple {7654#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,527 INFO L290 TraceCheckUtils]: 37: Hoare triple {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,528 INFO L272 TraceCheckUtils]: 38: Hoare triple {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,528 INFO L290 TraceCheckUtils]: 39: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,528 INFO L290 TraceCheckUtils]: 40: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,528 INFO L290 TraceCheckUtils]: 41: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,529 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,529 INFO L290 TraceCheckUtils]: 43: Hoare triple {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,530 INFO L290 TraceCheckUtils]: 44: Hoare triple {7679#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,530 INFO L290 TraceCheckUtils]: 45: Hoare triple {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,531 INFO L272 TraceCheckUtils]: 46: Hoare triple {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,531 INFO L290 TraceCheckUtils]: 47: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,531 INFO L290 TraceCheckUtils]: 48: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,531 INFO L290 TraceCheckUtils]: 49: Hoare triple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-15 00:44:55,532 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7635#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 16 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,532 INFO L290 TraceCheckUtils]: 51: Hoare triple {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,533 INFO L290 TraceCheckUtils]: 52: Hoare triple {7704#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7729#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:55,533 INFO L290 TraceCheckUtils]: 53: Hoare triple {7729#(and (= (+ main_~i~1 (- 3)) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7561#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:44:55,533 INFO L272 TraceCheckUtils]: 54: Hoare triple {7561#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7736#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:44:55,534 INFO L290 TraceCheckUtils]: 55: Hoare triple {7736#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7740#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:44:55,534 INFO L290 TraceCheckUtils]: 56: Hoare triple {7740#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7528#false} is VALID [2022-04-15 00:44:55,534 INFO L290 TraceCheckUtils]: 57: Hoare triple {7528#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7528#false} is VALID [2022-04-15 00:44:55,534 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 76 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:44:55,534 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:44:57,804 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:44:57,807 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:44:57,901 INFO L290 TraceCheckUtils]: 57: Hoare triple {7528#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7528#false} is VALID [2022-04-15 00:44:57,902 INFO L290 TraceCheckUtils]: 56: Hoare triple {7740#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7528#false} is VALID [2022-04-15 00:44:57,902 INFO L290 TraceCheckUtils]: 55: Hoare triple {7736#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7740#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:44:57,903 INFO L272 TraceCheckUtils]: 54: Hoare triple {7561#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7736#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:44:57,903 INFO L290 TraceCheckUtils]: 53: Hoare triple {7560#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7561#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:44:57,903 INFO L290 TraceCheckUtils]: 52: Hoare triple {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7560#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:57,904 INFO L290 TraceCheckUtils]: 51: Hoare triple {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:57,904 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7527#true} {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:57,904 INFO L290 TraceCheckUtils]: 49: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,904 INFO L290 TraceCheckUtils]: 48: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,905 INFO L290 TraceCheckUtils]: 47: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:57,905 INFO L272 TraceCheckUtils]: 46: Hoare triple {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7527#true} is VALID [2022-04-15 00:44:57,905 INFO L290 TraceCheckUtils]: 45: Hoare triple {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:57,905 INFO L290 TraceCheckUtils]: 44: Hoare triple {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7555#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:57,906 INFO L290 TraceCheckUtils]: 43: Hoare triple {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:57,906 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7527#true} {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:57,906 INFO L290 TraceCheckUtils]: 41: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,906 INFO L290 TraceCheckUtils]: 40: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,906 INFO L290 TraceCheckUtils]: 39: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:57,907 INFO L272 TraceCheckUtils]: 38: Hoare triple {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7527#true} is VALID [2022-04-15 00:44:57,907 INFO L290 TraceCheckUtils]: 37: Hoare triple {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:57,907 INFO L290 TraceCheckUtils]: 36: Hoare triple {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7550#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:57,908 INFO L290 TraceCheckUtils]: 35: Hoare triple {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:57,908 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7527#true} {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:57,908 INFO L290 TraceCheckUtils]: 33: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,908 INFO L290 TraceCheckUtils]: 32: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,908 INFO L290 TraceCheckUtils]: 31: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:57,908 INFO L272 TraceCheckUtils]: 30: Hoare triple {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7527#true} is VALID [2022-04-15 00:44:57,909 INFO L290 TraceCheckUtils]: 29: Hoare triple {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:57,909 INFO L290 TraceCheckUtils]: 28: Hoare triple {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7545#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:57,910 INFO L290 TraceCheckUtils]: 27: Hoare triple {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:57,910 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7527#true} {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:57,910 INFO L290 TraceCheckUtils]: 25: Hoare triple {7527#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,910 INFO L290 TraceCheckUtils]: 24: Hoare triple {7527#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,910 INFO L290 TraceCheckUtils]: 23: Hoare triple {7527#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7527#true} is VALID [2022-04-15 00:44:57,910 INFO L272 TraceCheckUtils]: 22: Hoare triple {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7527#true} is VALID [2022-04-15 00:44:57,911 INFO L290 TraceCheckUtils]: 21: Hoare triple {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:57,911 INFO L290 TraceCheckUtils]: 20: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7834#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:57,911 INFO L290 TraceCheckUtils]: 19: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:57,912 INFO L290 TraceCheckUtils]: 18: Hoare triple {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:57,912 INFO L290 TraceCheckUtils]: 17: Hoare triple {7538#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7539#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:57,913 INFO L290 TraceCheckUtils]: 16: Hoare triple {7871#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7538#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:57,913 INFO L290 TraceCheckUtils]: 15: Hoare triple {7536#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7871#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:57,914 INFO L290 TraceCheckUtils]: 14: Hoare triple {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7536#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:57,914 INFO L290 TraceCheckUtils]: 13: Hoare triple {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:57,914 INFO L290 TraceCheckUtils]: 12: Hoare triple {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7535#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:57,915 INFO L290 TraceCheckUtils]: 11: Hoare triple {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:57,915 INFO L290 TraceCheckUtils]: 10: Hoare triple {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7534#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:57,915 INFO L290 TraceCheckUtils]: 9: Hoare triple {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:57,916 INFO L290 TraceCheckUtils]: 8: Hoare triple {7532#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7533#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:57,916 INFO L290 TraceCheckUtils]: 7: Hoare triple {7532#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7532#(= main_~i~0 0)} is VALID [2022-04-15 00:44:57,916 INFO L290 TraceCheckUtils]: 6: Hoare triple {7527#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7532#(= main_~i~0 0)} is VALID [2022-04-15 00:44:57,916 INFO L290 TraceCheckUtils]: 5: Hoare triple {7527#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7527#true} is VALID [2022-04-15 00:44:57,916 INFO L272 TraceCheckUtils]: 4: Hoare triple {7527#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,916 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7527#true} {7527#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,917 INFO L290 TraceCheckUtils]: 2: Hoare triple {7527#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,917 INFO L290 TraceCheckUtils]: 1: Hoare triple {7527#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7527#true} is VALID [2022-04-15 00:44:57,917 INFO L272 TraceCheckUtils]: 0: Hoare triple {7527#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7527#true} is VALID [2022-04-15 00:44:57,917 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 8 proven. 68 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:44:57,917 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [222836346] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:44:57,917 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:44:57,917 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 18] total 29 [2022-04-15 00:44:57,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1849798831] [2022-04-15 00:44:57,918 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:44:57,918 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 58 [2022-04-15 00:44:57,923 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:44:57,923 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:57,994 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:44:57,994 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-15 00:44:57,994 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:44:57,995 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-15 00:44:57,995 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=722, Unknown=5, NotChecked=0, Total=812 [2022-04-15 00:44:57,995 INFO L87 Difference]: Start difference. First operand 70 states and 72 transitions. Second operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:59,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:44:59,325 INFO L93 Difference]: Finished difference Result 138 states and 145 transitions. [2022-04-15 00:44:59,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-15 00:44:59,325 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 58 [2022-04-15 00:44:59,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:44:59,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:59,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 76 transitions. [2022-04-15 00:44:59,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:59,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 76 transitions. [2022-04-15 00:44:59,328 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 76 transitions. [2022-04-15 00:44:59,397 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:44:59,398 INFO L225 Difference]: With dead ends: 138 [2022-04-15 00:44:59,398 INFO L226 Difference]: Without dead ends: 136 [2022-04-15 00:44:59,399 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 103 SyntacticMatches, 13 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 469 ImplicationChecksByTransitivity, 34.7s TimeCoverageRelationStatistics Valid=210, Invalid=1947, Unknown=5, NotChecked=0, Total=2162 [2022-04-15 00:44:59,399 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 44 mSDsluCounter, 155 mSDsCounter, 0 mSdLazyCounter, 649 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 181 SdHoareTripleChecker+Invalid, 748 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 649 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 69 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 00:44:59,399 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [45 Valid, 181 Invalid, 748 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 649 Invalid, 0 Unknown, 69 Unchecked, 0.5s Time] [2022-04-15 00:44:59,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2022-04-15 00:44:59,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 105. [2022-04-15 00:44:59,456 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:44:59,457 INFO L82 GeneralOperation]: Start isEquivalent. First operand 136 states. Second operand has 105 states, 80 states have (on average 1.05) internal successors, (84), 83 states have internal predecessors, (84), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-15 00:44:59,457 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand has 105 states, 80 states have (on average 1.05) internal successors, (84), 83 states have internal predecessors, (84), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-15 00:44:59,457 INFO L87 Difference]: Start difference. First operand 136 states. Second operand has 105 states, 80 states have (on average 1.05) internal successors, (84), 83 states have internal predecessors, (84), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-15 00:44:59,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:44:59,460 INFO L93 Difference]: Finished difference Result 136 states and 143 transitions. [2022-04-15 00:44:59,460 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 143 transitions. [2022-04-15 00:44:59,460 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:44:59,460 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:44:59,461 INFO L74 IsIncluded]: Start isIncluded. First operand has 105 states, 80 states have (on average 1.05) internal successors, (84), 83 states have internal predecessors, (84), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) Second operand 136 states. [2022-04-15 00:44:59,461 INFO L87 Difference]: Start difference. First operand has 105 states, 80 states have (on average 1.05) internal successors, (84), 83 states have internal predecessors, (84), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) Second operand 136 states. [2022-04-15 00:44:59,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:44:59,464 INFO L93 Difference]: Finished difference Result 136 states and 143 transitions. [2022-04-15 00:44:59,464 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 143 transitions. [2022-04-15 00:44:59,464 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:44:59,464 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:44:59,464 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:44:59,464 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:44:59,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 80 states have (on average 1.05) internal successors, (84), 83 states have internal predecessors, (84), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-15 00:44:59,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 111 transitions. [2022-04-15 00:44:59,466 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 111 transitions. Word has length 58 [2022-04-15 00:44:59,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:44:59,467 INFO L478 AbstractCegarLoop]: Abstraction has 105 states and 111 transitions. [2022-04-15 00:44:59,467 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:44:59,467 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 111 transitions. [2022-04-15 00:44:59,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-04-15 00:44:59,467 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:44:59,467 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:44:59,483 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-15 00:44:59,683 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-15 00:44:59,684 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:44:59,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:44:59,684 INFO L85 PathProgramCache]: Analyzing trace with hash 1278575025, now seen corresponding path program 13 times [2022-04-15 00:44:59,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:44:59,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [438324256] [2022-04-15 00:44:59,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:44:59,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:44:59,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:59,947 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:44:59,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:59,950 INFO L290 TraceCheckUtils]: 0: Hoare triple {8612#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8574#true} is VALID [2022-04-15 00:44:59,950 INFO L290 TraceCheckUtils]: 1: Hoare triple {8574#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,951 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8574#true} {8574#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,951 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-15 00:44:59,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:59,954 INFO L290 TraceCheckUtils]: 0: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:44:59,954 INFO L290 TraceCheckUtils]: 1: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,954 INFO L290 TraceCheckUtils]: 2: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,954 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8574#true} {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:59,954 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-15 00:44:59,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:59,965 INFO L290 TraceCheckUtils]: 0: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:44:59,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,965 INFO L290 TraceCheckUtils]: 2: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,965 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8574#true} {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:59,966 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-15 00:44:59,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:59,970 INFO L290 TraceCheckUtils]: 0: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:44:59,970 INFO L290 TraceCheckUtils]: 1: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,971 INFO L290 TraceCheckUtils]: 2: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,971 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8574#true} {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:59,971 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-15 00:44:59,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:44:59,974 INFO L290 TraceCheckUtils]: 0: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:44:59,974 INFO L290 TraceCheckUtils]: 1: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,974 INFO L290 TraceCheckUtils]: 2: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,974 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8574#true} {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:59,975 INFO L272 TraceCheckUtils]: 0: Hoare triple {8574#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8612#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:44:59,975 INFO L290 TraceCheckUtils]: 1: Hoare triple {8612#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8574#true} is VALID [2022-04-15 00:44:59,975 INFO L290 TraceCheckUtils]: 2: Hoare triple {8574#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,975 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8574#true} {8574#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,975 INFO L272 TraceCheckUtils]: 4: Hoare triple {8574#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,975 INFO L290 TraceCheckUtils]: 5: Hoare triple {8574#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8574#true} is VALID [2022-04-15 00:44:59,975 INFO L290 TraceCheckUtils]: 6: Hoare triple {8574#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8579#(= main_~i~0 0)} is VALID [2022-04-15 00:44:59,976 INFO L290 TraceCheckUtils]: 7: Hoare triple {8579#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8579#(= main_~i~0 0)} is VALID [2022-04-15 00:44:59,976 INFO L290 TraceCheckUtils]: 8: Hoare triple {8579#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:59,977 INFO L290 TraceCheckUtils]: 9: Hoare triple {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:44:59,977 INFO L290 TraceCheckUtils]: 10: Hoare triple {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:59,977 INFO L290 TraceCheckUtils]: 11: Hoare triple {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:44:59,978 INFO L290 TraceCheckUtils]: 12: Hoare triple {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:59,978 INFO L290 TraceCheckUtils]: 13: Hoare triple {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:44:59,979 INFO L290 TraceCheckUtils]: 14: Hoare triple {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8583#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:59,979 INFO L290 TraceCheckUtils]: 15: Hoare triple {8583#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8584#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:44:59,980 INFO L290 TraceCheckUtils]: 16: Hoare triple {8584#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:59,981 INFO L290 TraceCheckUtils]: 17: Hoare triple {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:59,981 INFO L290 TraceCheckUtils]: 18: Hoare triple {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8586#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:44:59,982 INFO L290 TraceCheckUtils]: 19: Hoare triple {8586#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:59,982 INFO L290 TraceCheckUtils]: 20: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:59,982 INFO L290 TraceCheckUtils]: 21: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:44:59,983 INFO L290 TraceCheckUtils]: 22: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:59,983 INFO L290 TraceCheckUtils]: 23: Hoare triple {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:59,983 INFO L272 TraceCheckUtils]: 24: Hoare triple {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8574#true} is VALID [2022-04-15 00:44:59,983 INFO L290 TraceCheckUtils]: 25: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:44:59,983 INFO L290 TraceCheckUtils]: 26: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,983 INFO L290 TraceCheckUtils]: 27: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,984 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8574#true} {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:59,984 INFO L290 TraceCheckUtils]: 29: Hoare triple {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:44:59,985 INFO L290 TraceCheckUtils]: 30: Hoare triple {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:59,985 INFO L290 TraceCheckUtils]: 31: Hoare triple {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:59,985 INFO L272 TraceCheckUtils]: 32: Hoare triple {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8574#true} is VALID [2022-04-15 00:44:59,986 INFO L290 TraceCheckUtils]: 33: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:44:59,986 INFO L290 TraceCheckUtils]: 34: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,986 INFO L290 TraceCheckUtils]: 35: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,986 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8574#true} {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:59,987 INFO L290 TraceCheckUtils]: 37: Hoare triple {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:44:59,987 INFO L290 TraceCheckUtils]: 38: Hoare triple {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:59,988 INFO L290 TraceCheckUtils]: 39: Hoare triple {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:59,988 INFO L272 TraceCheckUtils]: 40: Hoare triple {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8574#true} is VALID [2022-04-15 00:44:59,988 INFO L290 TraceCheckUtils]: 41: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:44:59,988 INFO L290 TraceCheckUtils]: 42: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,988 INFO L290 TraceCheckUtils]: 43: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,989 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8574#true} {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:59,989 INFO L290 TraceCheckUtils]: 45: Hoare triple {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:44:59,990 INFO L290 TraceCheckUtils]: 46: Hoare triple {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:59,990 INFO L290 TraceCheckUtils]: 47: Hoare triple {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:59,990 INFO L272 TraceCheckUtils]: 48: Hoare triple {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8574#true} is VALID [2022-04-15 00:44:59,990 INFO L290 TraceCheckUtils]: 49: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:44:59,990 INFO L290 TraceCheckUtils]: 50: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,990 INFO L290 TraceCheckUtils]: 51: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:44:59,991 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8574#true} {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:59,991 INFO L290 TraceCheckUtils]: 53: Hoare triple {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:44:59,992 INFO L290 TraceCheckUtils]: 54: Hoare triple {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:44:59,993 INFO L290 TraceCheckUtils]: 55: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8609#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:44:59,993 INFO L272 TraceCheckUtils]: 56: Hoare triple {8609#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8610#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:44:59,993 INFO L290 TraceCheckUtils]: 57: Hoare triple {8610#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8611#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:44:59,994 INFO L290 TraceCheckUtils]: 58: Hoare triple {8611#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8575#false} is VALID [2022-04-15 00:44:59,994 INFO L290 TraceCheckUtils]: 59: Hoare triple {8575#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8575#false} is VALID [2022-04-15 00:44:59,994 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 8 proven. 81 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:44:59,994 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:44:59,994 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [438324256] [2022-04-15 00:44:59,994 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [438324256] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:44:59,994 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [714812689] [2022-04-15 00:44:59,995 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-15 00:44:59,995 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:44:59,995 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:44:59,996 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:44:59,996 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-15 00:45:00,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:00,066 INFO L263 TraceCheckSpWp]: Trace formula consists of 183 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-15 00:45:00,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:00,080 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:45:00,153 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:45:00,249 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-15 00:45:00,249 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-15 00:45:00,317 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-15 00:45:00,317 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-15 00:45:33,012 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-15 00:45:33,059 INFO L272 TraceCheckUtils]: 0: Hoare triple {8574#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:33,059 INFO L290 TraceCheckUtils]: 1: Hoare triple {8574#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8574#true} is VALID [2022-04-15 00:45:33,059 INFO L290 TraceCheckUtils]: 2: Hoare triple {8574#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:33,059 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8574#true} {8574#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:33,059 INFO L272 TraceCheckUtils]: 4: Hoare triple {8574#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:33,059 INFO L290 TraceCheckUtils]: 5: Hoare triple {8574#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8574#true} is VALID [2022-04-15 00:45:33,059 INFO L290 TraceCheckUtils]: 6: Hoare triple {8574#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8579#(= main_~i~0 0)} is VALID [2022-04-15 00:45:33,060 INFO L290 TraceCheckUtils]: 7: Hoare triple {8579#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8579#(= main_~i~0 0)} is VALID [2022-04-15 00:45:33,060 INFO L290 TraceCheckUtils]: 8: Hoare triple {8579#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:45:33,067 INFO L290 TraceCheckUtils]: 9: Hoare triple {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:45:33,068 INFO L290 TraceCheckUtils]: 10: Hoare triple {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:45:33,068 INFO L290 TraceCheckUtils]: 11: Hoare triple {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:45:33,069 INFO L290 TraceCheckUtils]: 12: Hoare triple {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:45:33,069 INFO L290 TraceCheckUtils]: 13: Hoare triple {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:45:33,070 INFO L290 TraceCheckUtils]: 14: Hoare triple {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8583#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:45:33,070 INFO L290 TraceCheckUtils]: 15: Hoare triple {8583#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8584#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:45:33,071 INFO L290 TraceCheckUtils]: 16: Hoare triple {8584#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,071 INFO L290 TraceCheckUtils]: 17: Hoare triple {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,072 INFO L290 TraceCheckUtils]: 18: Hoare triple {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8670#(and (<= 6 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,072 INFO L290 TraceCheckUtils]: 19: Hoare triple {8670#(and (<= 6 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:45:33,073 INFO L290 TraceCheckUtils]: 20: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:45:33,073 INFO L290 TraceCheckUtils]: 21: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:45:33,073 INFO L290 TraceCheckUtils]: 22: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:33,074 INFO L290 TraceCheckUtils]: 23: Hoare triple {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:33,075 INFO L272 TraceCheckUtils]: 24: Hoare triple {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,075 INFO L290 TraceCheckUtils]: 25: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,075 INFO L290 TraceCheckUtils]: 26: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,076 INFO L290 TraceCheckUtils]: 27: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,076 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:33,077 INFO L290 TraceCheckUtils]: 29: Hoare triple {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:33,077 INFO L290 TraceCheckUtils]: 30: Hoare triple {8588#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,077 INFO L290 TraceCheckUtils]: 31: Hoare triple {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,078 INFO L272 TraceCheckUtils]: 32: Hoare triple {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,079 INFO L290 TraceCheckUtils]: 33: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,079 INFO L290 TraceCheckUtils]: 34: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,079 INFO L290 TraceCheckUtils]: 35: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,080 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,080 INFO L290 TraceCheckUtils]: 37: Hoare triple {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,081 INFO L290 TraceCheckUtils]: 38: Hoare triple {8708#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,081 INFO L290 TraceCheckUtils]: 39: Hoare triple {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,082 INFO L272 TraceCheckUtils]: 40: Hoare triple {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,082 INFO L290 TraceCheckUtils]: 41: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,082 INFO L290 TraceCheckUtils]: 42: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,083 INFO L290 TraceCheckUtils]: 43: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,083 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,084 INFO L290 TraceCheckUtils]: 45: Hoare triple {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,084 INFO L290 TraceCheckUtils]: 46: Hoare triple {8733#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,084 INFO L290 TraceCheckUtils]: 47: Hoare triple {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,085 INFO L272 TraceCheckUtils]: 48: Hoare triple {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,086 INFO L290 TraceCheckUtils]: 49: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,086 INFO L290 TraceCheckUtils]: 50: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,086 INFO L290 TraceCheckUtils]: 51: Hoare triple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} is VALID [2022-04-15 00:45:33,087 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8689#(exists ((v_main_~x~0.base_BEFORE_CALL_47 Int) (v_main_~x~0.offset_BEFORE_CALL_47 Int)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_47) (+ 16 v_main_~x~0.offset_BEFORE_CALL_47))))} {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,087 INFO L290 TraceCheckUtils]: 53: Hoare triple {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,088 INFO L290 TraceCheckUtils]: 54: Hoare triple {8758#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8783#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:33,088 INFO L290 TraceCheckUtils]: 55: Hoare triple {8783#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8609#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:45:33,089 INFO L272 TraceCheckUtils]: 56: Hoare triple {8609#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8790#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:45:33,089 INFO L290 TraceCheckUtils]: 57: Hoare triple {8790#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8794#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:45:33,089 INFO L290 TraceCheckUtils]: 58: Hoare triple {8794#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8575#false} is VALID [2022-04-15 00:45:33,089 INFO L290 TraceCheckUtils]: 59: Hoare triple {8575#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8575#false} is VALID [2022-04-15 00:45:33,090 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 1 proven. 88 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-15 00:45:33,090 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:45:35,466 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:45:35,472 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:45:35,550 INFO L290 TraceCheckUtils]: 59: Hoare triple {8575#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8575#false} is VALID [2022-04-15 00:45:35,550 INFO L290 TraceCheckUtils]: 58: Hoare triple {8794#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8575#false} is VALID [2022-04-15 00:45:35,551 INFO L290 TraceCheckUtils]: 57: Hoare triple {8790#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8794#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:45:35,551 INFO L272 TraceCheckUtils]: 56: Hoare triple {8609#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8790#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:45:35,552 INFO L290 TraceCheckUtils]: 55: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8609#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:45:35,552 INFO L290 TraceCheckUtils]: 54: Hoare triple {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:35,552 INFO L290 TraceCheckUtils]: 53: Hoare triple {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:35,553 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8574#true} {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:35,553 INFO L290 TraceCheckUtils]: 51: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,553 INFO L290 TraceCheckUtils]: 50: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,553 INFO L290 TraceCheckUtils]: 49: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:45:35,553 INFO L272 TraceCheckUtils]: 48: Hoare triple {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8574#true} is VALID [2022-04-15 00:45:35,553 INFO L290 TraceCheckUtils]: 47: Hoare triple {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:35,554 INFO L290 TraceCheckUtils]: 46: Hoare triple {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8603#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:35,554 INFO L290 TraceCheckUtils]: 45: Hoare triple {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:35,555 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8574#true} {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:35,555 INFO L290 TraceCheckUtils]: 43: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,555 INFO L290 TraceCheckUtils]: 42: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,555 INFO L290 TraceCheckUtils]: 41: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:45:35,555 INFO L272 TraceCheckUtils]: 40: Hoare triple {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8574#true} is VALID [2022-04-15 00:45:35,555 INFO L290 TraceCheckUtils]: 39: Hoare triple {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:35,556 INFO L290 TraceCheckUtils]: 38: Hoare triple {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8598#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:35,556 INFO L290 TraceCheckUtils]: 37: Hoare triple {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:35,557 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8574#true} {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:35,557 INFO L290 TraceCheckUtils]: 35: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,557 INFO L290 TraceCheckUtils]: 34: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,557 INFO L290 TraceCheckUtils]: 33: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:45:35,557 INFO L272 TraceCheckUtils]: 32: Hoare triple {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8574#true} is VALID [2022-04-15 00:45:35,557 INFO L290 TraceCheckUtils]: 31: Hoare triple {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:35,558 INFO L290 TraceCheckUtils]: 30: Hoare triple {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8593#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:35,558 INFO L290 TraceCheckUtils]: 29: Hoare triple {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:35,558 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8574#true} {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:35,559 INFO L290 TraceCheckUtils]: 27: Hoare triple {8574#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,559 INFO L290 TraceCheckUtils]: 26: Hoare triple {8574#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,559 INFO L290 TraceCheckUtils]: 25: Hoare triple {8574#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8574#true} is VALID [2022-04-15 00:45:35,559 INFO L272 TraceCheckUtils]: 24: Hoare triple {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8574#true} is VALID [2022-04-15 00:45:35,559 INFO L290 TraceCheckUtils]: 23: Hoare triple {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:35,559 INFO L290 TraceCheckUtils]: 22: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8888#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:35,560 INFO L290 TraceCheckUtils]: 21: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:45:35,560 INFO L290 TraceCheckUtils]: 20: Hoare triple {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:45:35,561 INFO L290 TraceCheckUtils]: 19: Hoare triple {8586#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8587#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-15 00:45:35,561 INFO L290 TraceCheckUtils]: 18: Hoare triple {8925#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8586#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:35,562 INFO L290 TraceCheckUtils]: 17: Hoare triple {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8925#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:35,562 INFO L290 TraceCheckUtils]: 16: Hoare triple {8925#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8585#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:35,562 INFO L290 TraceCheckUtils]: 15: Hoare triple {8583#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8925#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-15 00:45:35,563 INFO L290 TraceCheckUtils]: 14: Hoare triple {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8583#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:45:35,563 INFO L290 TraceCheckUtils]: 13: Hoare triple {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:45:35,564 INFO L290 TraceCheckUtils]: 12: Hoare triple {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8582#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:45:35,564 INFO L290 TraceCheckUtils]: 11: Hoare triple {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:45:35,564 INFO L290 TraceCheckUtils]: 10: Hoare triple {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8581#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:45:35,565 INFO L290 TraceCheckUtils]: 9: Hoare triple {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:45:35,565 INFO L290 TraceCheckUtils]: 8: Hoare triple {8579#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8580#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:45:35,565 INFO L290 TraceCheckUtils]: 7: Hoare triple {8579#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8579#(= main_~i~0 0)} is VALID [2022-04-15 00:45:35,566 INFO L290 TraceCheckUtils]: 6: Hoare triple {8574#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8579#(= main_~i~0 0)} is VALID [2022-04-15 00:45:35,566 INFO L290 TraceCheckUtils]: 5: Hoare triple {8574#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8574#true} is VALID [2022-04-15 00:45:35,566 INFO L272 TraceCheckUtils]: 4: Hoare triple {8574#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,566 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8574#true} {8574#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,566 INFO L290 TraceCheckUtils]: 2: Hoare triple {8574#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {8574#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8574#true} is VALID [2022-04-15 00:45:35,566 INFO L272 TraceCheckUtils]: 0: Hoare triple {8574#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8574#true} is VALID [2022-04-15 00:45:35,566 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 8 proven. 80 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-15 00:45:35,566 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [714812689] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:45:35,566 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:45:35,566 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 19] total 30 [2022-04-15 00:45:35,567 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695720353] [2022-04-15 00:45:35,567 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:45:35,567 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 60 [2022-04-15 00:45:35,568 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:45:35,568 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:45:35,623 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:45:35,624 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-15 00:45:35,624 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:45:35,624 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-15 00:45:35,624 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=773, Unknown=5, NotChecked=0, Total=870 [2022-04-15 00:45:35,625 INFO L87 Difference]: Start difference. First operand 105 states and 111 transitions. Second operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:45:37,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:37,022 INFO L93 Difference]: Finished difference Result 128 states and 135 transitions. [2022-04-15 00:45:37,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-15 00:45:37,022 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 60 [2022-04-15 00:45:37,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:45:37,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:45:37,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 69 transitions. [2022-04-15 00:45:37,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:45:37,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 69 transitions. [2022-04-15 00:45:37,026 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 69 transitions. [2022-04-15 00:45:37,084 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:45:37,086 INFO L225 Difference]: With dead ends: 128 [2022-04-15 00:45:37,086 INFO L226 Difference]: Without dead ends: 126 [2022-04-15 00:45:37,087 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 112 SyntacticMatches, 15 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 595 ImplicationChecksByTransitivity, 34.8s TimeCoverageRelationStatistics Valid=248, Invalid=2297, Unknown=5, NotChecked=0, Total=2550 [2022-04-15 00:45:37,088 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 73 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 694 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 74 SdHoareTripleChecker+Valid, 171 SdHoareTripleChecker+Invalid, 798 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 694 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 79 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-15 00:45:37,088 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [74 Valid, 171 Invalid, 798 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 694 Invalid, 0 Unknown, 79 Unchecked, 0.5s Time] [2022-04-15 00:45:37,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-04-15 00:45:37,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 117. [2022-04-15 00:45:37,133 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:45:37,133 INFO L82 GeneralOperation]: Start isEquivalent. First operand 126 states. Second operand has 117 states, 89 states have (on average 1.0449438202247192) internal successors, (93), 92 states have internal predecessors, (93), 16 states have call successors, (16), 12 states have call predecessors, (16), 11 states have return successors, (15), 12 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-15 00:45:37,133 INFO L74 IsIncluded]: Start isIncluded. First operand 126 states. Second operand has 117 states, 89 states have (on average 1.0449438202247192) internal successors, (93), 92 states have internal predecessors, (93), 16 states have call successors, (16), 12 states have call predecessors, (16), 11 states have return successors, (15), 12 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-15 00:45:37,134 INFO L87 Difference]: Start difference. First operand 126 states. Second operand has 117 states, 89 states have (on average 1.0449438202247192) internal successors, (93), 92 states have internal predecessors, (93), 16 states have call successors, (16), 12 states have call predecessors, (16), 11 states have return successors, (15), 12 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-15 00:45:37,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:37,136 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2022-04-15 00:45:37,136 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 133 transitions. [2022-04-15 00:45:37,136 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:45:37,136 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:45:37,136 INFO L74 IsIncluded]: Start isIncluded. First operand has 117 states, 89 states have (on average 1.0449438202247192) internal successors, (93), 92 states have internal predecessors, (93), 16 states have call successors, (16), 12 states have call predecessors, (16), 11 states have return successors, (15), 12 states have call predecessors, (15), 15 states have call successors, (15) Second operand 126 states. [2022-04-15 00:45:37,136 INFO L87 Difference]: Start difference. First operand has 117 states, 89 states have (on average 1.0449438202247192) internal successors, (93), 92 states have internal predecessors, (93), 16 states have call successors, (16), 12 states have call predecessors, (16), 11 states have return successors, (15), 12 states have call predecessors, (15), 15 states have call successors, (15) Second operand 126 states. [2022-04-15 00:45:37,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:37,138 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2022-04-15 00:45:37,138 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 133 transitions. [2022-04-15 00:45:37,138 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:45:37,138 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:45:37,138 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:45:37,138 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:45:37,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 89 states have (on average 1.0449438202247192) internal successors, (93), 92 states have internal predecessors, (93), 16 states have call successors, (16), 12 states have call predecessors, (16), 11 states have return successors, (15), 12 states have call predecessors, (15), 15 states have call successors, (15) [2022-04-15 00:45:37,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 124 transitions. [2022-04-15 00:45:37,140 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 124 transitions. Word has length 60 [2022-04-15 00:45:37,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:45:37,140 INFO L478 AbstractCegarLoop]: Abstraction has 117 states and 124 transitions. [2022-04-15 00:45:37,140 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-15 00:45:37,141 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 124 transitions. [2022-04-15 00:45:37,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-04-15 00:45:37,141 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:45:37,141 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:45:37,163 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-15 00:45:37,355 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:45:37,355 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:45:37,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:45:37,356 INFO L85 PathProgramCache]: Analyzing trace with hash 603520779, now seen corresponding path program 14 times [2022-04-15 00:45:37,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:45:37,356 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376144234] [2022-04-15 00:45:37,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:45:37,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:45:37,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:37,487 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:45:37,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:37,493 INFO L290 TraceCheckUtils]: 0: Hoare triple {9668#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9630#true} is VALID [2022-04-15 00:45:37,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {9630#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,493 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9630#true} {9630#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,493 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-15 00:45:37,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:37,496 INFO L290 TraceCheckUtils]: 0: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,496 INFO L290 TraceCheckUtils]: 1: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,496 INFO L290 TraceCheckUtils]: 2: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,497 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9630#true} {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-15 00:45:37,497 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-15 00:45:37,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:37,499 INFO L290 TraceCheckUtils]: 0: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,499 INFO L290 TraceCheckUtils]: 1: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,499 INFO L290 TraceCheckUtils]: 2: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,500 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9630#true} {9647#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:37,500 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-15 00:45:37,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:37,502 INFO L290 TraceCheckUtils]: 0: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,502 INFO L290 TraceCheckUtils]: 1: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,502 INFO L290 TraceCheckUtils]: 2: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,502 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9630#true} {9652#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:37,503 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-15 00:45:37,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:37,505 INFO L290 TraceCheckUtils]: 0: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,505 INFO L290 TraceCheckUtils]: 2: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,506 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9630#true} {9657#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:37,506 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-15 00:45:37,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:37,508 INFO L290 TraceCheckUtils]: 0: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,509 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9630#true} {9662#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:37,509 INFO L272 TraceCheckUtils]: 0: Hoare triple {9630#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9668#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:45:37,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {9668#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9630#true} is VALID [2022-04-15 00:45:37,509 INFO L290 TraceCheckUtils]: 2: Hoare triple {9630#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,509 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9630#true} {9630#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,510 INFO L272 TraceCheckUtils]: 4: Hoare triple {9630#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,510 INFO L290 TraceCheckUtils]: 5: Hoare triple {9630#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9630#true} is VALID [2022-04-15 00:45:37,510 INFO L290 TraceCheckUtils]: 6: Hoare triple {9630#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9635#(= main_~i~0 0)} is VALID [2022-04-15 00:45:37,510 INFO L290 TraceCheckUtils]: 7: Hoare triple {9635#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9635#(= main_~i~0 0)} is VALID [2022-04-15 00:45:37,510 INFO L290 TraceCheckUtils]: 8: Hoare triple {9635#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9636#(<= main_~i~0 1)} is VALID [2022-04-15 00:45:37,511 INFO L290 TraceCheckUtils]: 9: Hoare triple {9636#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9636#(<= main_~i~0 1)} is VALID [2022-04-15 00:45:37,511 INFO L290 TraceCheckUtils]: 10: Hoare triple {9636#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9637#(<= main_~i~0 2)} is VALID [2022-04-15 00:45:37,511 INFO L290 TraceCheckUtils]: 11: Hoare triple {9637#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9637#(<= main_~i~0 2)} is VALID [2022-04-15 00:45:37,512 INFO L290 TraceCheckUtils]: 12: Hoare triple {9637#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9638#(<= main_~i~0 3)} is VALID [2022-04-15 00:45:37,512 INFO L290 TraceCheckUtils]: 13: Hoare triple {9638#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9638#(<= main_~i~0 3)} is VALID [2022-04-15 00:45:37,512 INFO L290 TraceCheckUtils]: 14: Hoare triple {9638#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9639#(<= main_~i~0 4)} is VALID [2022-04-15 00:45:37,513 INFO L290 TraceCheckUtils]: 15: Hoare triple {9639#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9639#(<= main_~i~0 4)} is VALID [2022-04-15 00:45:37,513 INFO L290 TraceCheckUtils]: 16: Hoare triple {9639#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9640#(<= main_~i~0 5)} is VALID [2022-04-15 00:45:37,513 INFO L290 TraceCheckUtils]: 17: Hoare triple {9640#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9641#(<= main_~n~0 5)} is VALID [2022-04-15 00:45:37,514 INFO L290 TraceCheckUtils]: 18: Hoare triple {9641#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-15 00:45:37,514 INFO L290 TraceCheckUtils]: 19: Hoare triple {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-15 00:45:37,514 INFO L272 TraceCheckUtils]: 20: Hoare triple {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:37,522 INFO L290 TraceCheckUtils]: 21: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,522 INFO L290 TraceCheckUtils]: 22: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,522 INFO L290 TraceCheckUtils]: 23: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,523 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {9630#true} {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-15 00:45:37,524 INFO L290 TraceCheckUtils]: 25: Hoare triple {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-15 00:45:37,524 INFO L290 TraceCheckUtils]: 26: Hoare triple {9642#(and (<= main_~n~0 5) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:37,524 INFO L290 TraceCheckUtils]: 27: Hoare triple {9647#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:37,524 INFO L272 TraceCheckUtils]: 28: Hoare triple {9647#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:37,524 INFO L290 TraceCheckUtils]: 29: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,524 INFO L290 TraceCheckUtils]: 30: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,524 INFO L290 TraceCheckUtils]: 31: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,525 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {9630#true} {9647#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:37,525 INFO L290 TraceCheckUtils]: 33: Hoare triple {9647#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:37,525 INFO L290 TraceCheckUtils]: 34: Hoare triple {9647#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:37,526 INFO L290 TraceCheckUtils]: 35: Hoare triple {9652#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:37,526 INFO L272 TraceCheckUtils]: 36: Hoare triple {9652#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:37,526 INFO L290 TraceCheckUtils]: 37: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,526 INFO L290 TraceCheckUtils]: 38: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,526 INFO L290 TraceCheckUtils]: 39: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,526 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {9630#true} {9652#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:37,527 INFO L290 TraceCheckUtils]: 41: Hoare triple {9652#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:37,527 INFO L290 TraceCheckUtils]: 42: Hoare triple {9652#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:37,527 INFO L290 TraceCheckUtils]: 43: Hoare triple {9657#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:37,528 INFO L272 TraceCheckUtils]: 44: Hoare triple {9657#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:37,528 INFO L290 TraceCheckUtils]: 45: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,528 INFO L290 TraceCheckUtils]: 46: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,528 INFO L290 TraceCheckUtils]: 47: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,528 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {9630#true} {9657#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:37,528 INFO L290 TraceCheckUtils]: 49: Hoare triple {9657#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:37,529 INFO L290 TraceCheckUtils]: 50: Hoare triple {9657#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:37,529 INFO L290 TraceCheckUtils]: 51: Hoare triple {9662#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:37,529 INFO L272 TraceCheckUtils]: 52: Hoare triple {9662#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:37,529 INFO L290 TraceCheckUtils]: 53: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:37,529 INFO L290 TraceCheckUtils]: 54: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,529 INFO L290 TraceCheckUtils]: 55: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:37,530 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {9630#true} {9662#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:37,530 INFO L290 TraceCheckUtils]: 57: Hoare triple {9662#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:37,530 INFO L290 TraceCheckUtils]: 58: Hoare triple {9662#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9667#(<= main_~n~0 main_~i~1)} is VALID [2022-04-15 00:45:37,531 INFO L290 TraceCheckUtils]: 59: Hoare triple {9667#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9631#false} is VALID [2022-04-15 00:45:37,531 INFO L272 TraceCheckUtils]: 60: Hoare triple {9631#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9631#false} is VALID [2022-04-15 00:45:37,531 INFO L290 TraceCheckUtils]: 61: Hoare triple {9631#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9631#false} is VALID [2022-04-15 00:45:37,531 INFO L290 TraceCheckUtils]: 62: Hoare triple {9631#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9631#false} is VALID [2022-04-15 00:45:37,531 INFO L290 TraceCheckUtils]: 63: Hoare triple {9631#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9631#false} is VALID [2022-04-15 00:45:37,531 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 43 proven. 42 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-15 00:45:37,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:45:37,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376144234] [2022-04-15 00:45:37,531 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [376144234] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:45:37,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2060989085] [2022-04-15 00:45:37,531 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-15 00:45:37,532 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:45:37,532 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:45:37,532 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:45:37,533 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-15 00:45:37,597 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-15 00:45:37,597 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:45:37,598 INFO L263 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-15 00:45:37,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:37,612 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:45:38,048 INFO L272 TraceCheckUtils]: 0: Hoare triple {9630#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,048 INFO L290 TraceCheckUtils]: 1: Hoare triple {9630#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9630#true} is VALID [2022-04-15 00:45:38,048 INFO L290 TraceCheckUtils]: 2: Hoare triple {9630#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,048 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9630#true} {9630#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,048 INFO L272 TraceCheckUtils]: 4: Hoare triple {9630#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,048 INFO L290 TraceCheckUtils]: 5: Hoare triple {9630#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9630#true} is VALID [2022-04-15 00:45:38,049 INFO L290 TraceCheckUtils]: 6: Hoare triple {9630#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9690#(<= main_~i~0 0)} is VALID [2022-04-15 00:45:38,049 INFO L290 TraceCheckUtils]: 7: Hoare triple {9690#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9690#(<= main_~i~0 0)} is VALID [2022-04-15 00:45:38,050 INFO L290 TraceCheckUtils]: 8: Hoare triple {9690#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9636#(<= main_~i~0 1)} is VALID [2022-04-15 00:45:38,050 INFO L290 TraceCheckUtils]: 9: Hoare triple {9636#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9636#(<= main_~i~0 1)} is VALID [2022-04-15 00:45:38,051 INFO L290 TraceCheckUtils]: 10: Hoare triple {9636#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9637#(<= main_~i~0 2)} is VALID [2022-04-15 00:45:38,051 INFO L290 TraceCheckUtils]: 11: Hoare triple {9637#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9637#(<= main_~i~0 2)} is VALID [2022-04-15 00:45:38,051 INFO L290 TraceCheckUtils]: 12: Hoare triple {9637#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9638#(<= main_~i~0 3)} is VALID [2022-04-15 00:45:38,052 INFO L290 TraceCheckUtils]: 13: Hoare triple {9638#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9638#(<= main_~i~0 3)} is VALID [2022-04-15 00:45:38,052 INFO L290 TraceCheckUtils]: 14: Hoare triple {9638#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9639#(<= main_~i~0 4)} is VALID [2022-04-15 00:45:38,052 INFO L290 TraceCheckUtils]: 15: Hoare triple {9639#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9639#(<= main_~i~0 4)} is VALID [2022-04-15 00:45:38,053 INFO L290 TraceCheckUtils]: 16: Hoare triple {9639#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9640#(<= main_~i~0 5)} is VALID [2022-04-15 00:45:38,053 INFO L290 TraceCheckUtils]: 17: Hoare triple {9640#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9641#(<= main_~n~0 5)} is VALID [2022-04-15 00:45:38,054 INFO L290 TraceCheckUtils]: 18: Hoare triple {9641#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,054 INFO L290 TraceCheckUtils]: 19: Hoare triple {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,054 INFO L272 TraceCheckUtils]: 20: Hoare triple {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,054 INFO L290 TraceCheckUtils]: 21: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,054 INFO L290 TraceCheckUtils]: 22: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,054 INFO L290 TraceCheckUtils]: 23: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,055 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {9630#true} {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,055 INFO L290 TraceCheckUtils]: 25: Hoare triple {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,056 INFO L290 TraceCheckUtils]: 26: Hoare triple {9727#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,056 INFO L290 TraceCheckUtils]: 27: Hoare triple {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,056 INFO L272 TraceCheckUtils]: 28: Hoare triple {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,056 INFO L290 TraceCheckUtils]: 29: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,056 INFO L290 TraceCheckUtils]: 30: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,056 INFO L290 TraceCheckUtils]: 31: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,057 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {9630#true} {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,057 INFO L290 TraceCheckUtils]: 33: Hoare triple {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,058 INFO L290 TraceCheckUtils]: 34: Hoare triple {9752#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-15 00:45:38,058 INFO L290 TraceCheckUtils]: 35: Hoare triple {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-15 00:45:38,058 INFO L272 TraceCheckUtils]: 36: Hoare triple {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,058 INFO L290 TraceCheckUtils]: 37: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,058 INFO L290 TraceCheckUtils]: 38: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,059 INFO L290 TraceCheckUtils]: 39: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,059 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {9630#true} {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-15 00:45:38,059 INFO L290 TraceCheckUtils]: 41: Hoare triple {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-15 00:45:38,060 INFO L290 TraceCheckUtils]: 42: Hoare triple {9777#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-15 00:45:38,060 INFO L290 TraceCheckUtils]: 43: Hoare triple {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-15 00:45:38,060 INFO L272 TraceCheckUtils]: 44: Hoare triple {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,060 INFO L290 TraceCheckUtils]: 45: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,061 INFO L290 TraceCheckUtils]: 46: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,061 INFO L290 TraceCheckUtils]: 47: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,061 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {9630#true} {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-15 00:45:38,061 INFO L290 TraceCheckUtils]: 49: Hoare triple {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-15 00:45:38,062 INFO L290 TraceCheckUtils]: 50: Hoare triple {9802#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-15 00:45:38,062 INFO L290 TraceCheckUtils]: 51: Hoare triple {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-15 00:45:38,063 INFO L272 TraceCheckUtils]: 52: Hoare triple {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,063 INFO L290 TraceCheckUtils]: 53: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,063 INFO L290 TraceCheckUtils]: 54: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,063 INFO L290 TraceCheckUtils]: 55: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,063 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {9630#true} {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-15 00:45:38,064 INFO L290 TraceCheckUtils]: 57: Hoare triple {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-15 00:45:38,064 INFO L290 TraceCheckUtils]: 58: Hoare triple {9827#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9852#(and (<= 5 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-15 00:45:38,065 INFO L290 TraceCheckUtils]: 59: Hoare triple {9852#(and (<= 5 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9631#false} is VALID [2022-04-15 00:45:38,065 INFO L272 TraceCheckUtils]: 60: Hoare triple {9631#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9631#false} is VALID [2022-04-15 00:45:38,065 INFO L290 TraceCheckUtils]: 61: Hoare triple {9631#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9631#false} is VALID [2022-04-15 00:45:38,065 INFO L290 TraceCheckUtils]: 62: Hoare triple {9631#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9631#false} is VALID [2022-04-15 00:45:38,065 INFO L290 TraceCheckUtils]: 63: Hoare triple {9631#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9631#false} is VALID [2022-04-15 00:45:38,065 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 60 proven. 25 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-15 00:45:38,065 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:45:38,345 INFO L290 TraceCheckUtils]: 63: Hoare triple {9631#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9631#false} is VALID [2022-04-15 00:45:38,345 INFO L290 TraceCheckUtils]: 62: Hoare triple {9631#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9631#false} is VALID [2022-04-15 00:45:38,345 INFO L290 TraceCheckUtils]: 61: Hoare triple {9631#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9631#false} is VALID [2022-04-15 00:45:38,345 INFO L272 TraceCheckUtils]: 60: Hoare triple {9631#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9631#false} is VALID [2022-04-15 00:45:38,345 INFO L290 TraceCheckUtils]: 59: Hoare triple {9667#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9631#false} is VALID [2022-04-15 00:45:38,346 INFO L290 TraceCheckUtils]: 58: Hoare triple {9662#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9667#(<= main_~n~0 main_~i~1)} is VALID [2022-04-15 00:45:38,346 INFO L290 TraceCheckUtils]: 57: Hoare triple {9662#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:38,347 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {9630#true} {9662#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:38,347 INFO L290 TraceCheckUtils]: 55: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,347 INFO L290 TraceCheckUtils]: 54: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,347 INFO L290 TraceCheckUtils]: 53: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,347 INFO L272 TraceCheckUtils]: 52: Hoare triple {9662#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,350 INFO L290 TraceCheckUtils]: 51: Hoare triple {9662#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:38,351 INFO L290 TraceCheckUtils]: 50: Hoare triple {9657#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9662#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-15 00:45:38,351 INFO L290 TraceCheckUtils]: 49: Hoare triple {9657#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:38,371 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {9630#true} {9657#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:38,371 INFO L290 TraceCheckUtils]: 47: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,371 INFO L290 TraceCheckUtils]: 46: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,371 INFO L290 TraceCheckUtils]: 45: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,371 INFO L272 TraceCheckUtils]: 44: Hoare triple {9657#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,371 INFO L290 TraceCheckUtils]: 43: Hoare triple {9657#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:38,372 INFO L290 TraceCheckUtils]: 42: Hoare triple {9652#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9657#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-15 00:45:38,372 INFO L290 TraceCheckUtils]: 41: Hoare triple {9652#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:38,373 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {9630#true} {9652#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:38,373 INFO L290 TraceCheckUtils]: 39: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,373 INFO L290 TraceCheckUtils]: 38: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,373 INFO L290 TraceCheckUtils]: 37: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,373 INFO L272 TraceCheckUtils]: 36: Hoare triple {9652#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,373 INFO L290 TraceCheckUtils]: 35: Hoare triple {9652#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:38,374 INFO L290 TraceCheckUtils]: 34: Hoare triple {9647#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9652#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-15 00:45:38,374 INFO L290 TraceCheckUtils]: 33: Hoare triple {9647#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:38,374 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {9630#true} {9647#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:38,374 INFO L290 TraceCheckUtils]: 31: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,374 INFO L290 TraceCheckUtils]: 30: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,374 INFO L290 TraceCheckUtils]: 29: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,374 INFO L272 TraceCheckUtils]: 28: Hoare triple {9647#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,375 INFO L290 TraceCheckUtils]: 27: Hoare triple {9647#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:38,375 INFO L290 TraceCheckUtils]: 26: Hoare triple {9979#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9647#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-15 00:45:38,375 INFO L290 TraceCheckUtils]: 25: Hoare triple {9979#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9979#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-15 00:45:38,376 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {9630#true} {9979#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9979#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-15 00:45:38,376 INFO L290 TraceCheckUtils]: 23: Hoare triple {9630#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,376 INFO L290 TraceCheckUtils]: 22: Hoare triple {9630#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,376 INFO L290 TraceCheckUtils]: 21: Hoare triple {9630#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9630#true} is VALID [2022-04-15 00:45:38,376 INFO L272 TraceCheckUtils]: 20: Hoare triple {9979#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9630#true} is VALID [2022-04-15 00:45:38,376 INFO L290 TraceCheckUtils]: 19: Hoare triple {9979#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9979#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-15 00:45:38,377 INFO L290 TraceCheckUtils]: 18: Hoare triple {9641#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9979#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-15 00:45:38,377 INFO L290 TraceCheckUtils]: 17: Hoare triple {9640#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9641#(<= main_~n~0 5)} is VALID [2022-04-15 00:45:38,378 INFO L290 TraceCheckUtils]: 16: Hoare triple {9639#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9640#(<= main_~i~0 5)} is VALID [2022-04-15 00:45:38,378 INFO L290 TraceCheckUtils]: 15: Hoare triple {9639#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9639#(<= main_~i~0 4)} is VALID [2022-04-15 00:45:38,378 INFO L290 TraceCheckUtils]: 14: Hoare triple {9638#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9639#(<= main_~i~0 4)} is VALID [2022-04-15 00:45:38,378 INFO L290 TraceCheckUtils]: 13: Hoare triple {9638#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9638#(<= main_~i~0 3)} is VALID [2022-04-15 00:45:38,379 INFO L290 TraceCheckUtils]: 12: Hoare triple {9637#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9638#(<= main_~i~0 3)} is VALID [2022-04-15 00:45:38,379 INFO L290 TraceCheckUtils]: 11: Hoare triple {9637#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9637#(<= main_~i~0 2)} is VALID [2022-04-15 00:45:38,380 INFO L290 TraceCheckUtils]: 10: Hoare triple {9636#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9637#(<= main_~i~0 2)} is VALID [2022-04-15 00:45:38,380 INFO L290 TraceCheckUtils]: 9: Hoare triple {9636#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9636#(<= main_~i~0 1)} is VALID [2022-04-15 00:45:38,380 INFO L290 TraceCheckUtils]: 8: Hoare triple {9690#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9636#(<= main_~i~0 1)} is VALID [2022-04-15 00:45:38,381 INFO L290 TraceCheckUtils]: 7: Hoare triple {9690#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9690#(<= main_~i~0 0)} is VALID [2022-04-15 00:45:38,381 INFO L290 TraceCheckUtils]: 6: Hoare triple {9630#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9690#(<= main_~i~0 0)} is VALID [2022-04-15 00:45:38,381 INFO L290 TraceCheckUtils]: 5: Hoare triple {9630#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9630#true} is VALID [2022-04-15 00:45:38,381 INFO L272 TraceCheckUtils]: 4: Hoare triple {9630#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,381 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9630#true} {9630#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,381 INFO L290 TraceCheckUtils]: 2: Hoare triple {9630#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,381 INFO L290 TraceCheckUtils]: 1: Hoare triple {9630#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9630#true} is VALID [2022-04-15 00:45:38,381 INFO L272 TraceCheckUtils]: 0: Hoare triple {9630#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9630#true} is VALID [2022-04-15 00:45:38,382 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 60 proven. 25 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-15 00:45:38,382 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2060989085] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:45:38,382 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:45:38,382 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15] total 24 [2022-04-15 00:45:38,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2097733259] [2022-04-15 00:45:38,382 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:45:38,382 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) Word has length 64 [2022-04-15 00:45:38,383 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:45:38,383 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-15 00:45:38,440 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:45:38,440 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-15 00:45:38,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:45:38,441 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-15 00:45:38,441 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=426, Unknown=0, NotChecked=0, Total=552 [2022-04-15 00:45:38,441 INFO L87 Difference]: Start difference. First operand 117 states and 124 transitions. Second operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-15 00:45:39,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:39,158 INFO L93 Difference]: Finished difference Result 134 states and 142 transitions. [2022-04-15 00:45:39,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-15 00:45:39,159 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) Word has length 64 [2022-04-15 00:45:39,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:45:39,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-15 00:45:39,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-15 00:45:39,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-15 00:45:39,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-15 00:45:39,162 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 71 transitions. [2022-04-15 00:45:39,215 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:45:39,217 INFO L225 Difference]: With dead ends: 134 [2022-04-15 00:45:39,217 INFO L226 Difference]: Without dead ends: 98 [2022-04-15 00:45:39,218 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 329 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=282, Invalid=1050, Unknown=0, NotChecked=0, Total=1332 [2022-04-15 00:45:39,219 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 41 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 70 SdHoareTripleChecker+Invalid, 346 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-15 00:45:39,219 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 70 Invalid, 346 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-15 00:45:39,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-15 00:45:39,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2022-04-15 00:45:39,266 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:45:39,266 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 98 states, 75 states have (on average 1.04) internal successors, (78), 77 states have internal predecessors, (78), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:39,266 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 98 states, 75 states have (on average 1.04) internal successors, (78), 77 states have internal predecessors, (78), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:39,266 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 98 states, 75 states have (on average 1.04) internal successors, (78), 77 states have internal predecessors, (78), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:39,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:39,269 INFO L93 Difference]: Finished difference Result 98 states and 101 transitions. [2022-04-15 00:45:39,269 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 101 transitions. [2022-04-15 00:45:39,269 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:45:39,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:45:39,270 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 75 states have (on average 1.04) internal successors, (78), 77 states have internal predecessors, (78), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) Second operand 98 states. [2022-04-15 00:45:39,270 INFO L87 Difference]: Start difference. First operand has 98 states, 75 states have (on average 1.04) internal successors, (78), 77 states have internal predecessors, (78), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) Second operand 98 states. [2022-04-15 00:45:39,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:39,272 INFO L93 Difference]: Finished difference Result 98 states and 101 transitions. [2022-04-15 00:45:39,272 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 101 transitions. [2022-04-15 00:45:39,272 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:45:39,272 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:45:39,272 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:45:39,272 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:45:39,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 75 states have (on average 1.04) internal successors, (78), 77 states have internal predecessors, (78), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:39,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 101 transitions. [2022-04-15 00:45:39,274 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 101 transitions. Word has length 64 [2022-04-15 00:45:39,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:45:39,274 INFO L478 AbstractCegarLoop]: Abstraction has 98 states and 101 transitions. [2022-04-15 00:45:39,275 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-15 00:45:39,275 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 101 transitions. [2022-04-15 00:45:39,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-04-15 00:45:39,275 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:45:39,275 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:45:39,301 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-15 00:45:39,499 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-15 00:45:39,500 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:45:39,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:45:39,500 INFO L85 PathProgramCache]: Analyzing trace with hash -694372407, now seen corresponding path program 15 times [2022-04-15 00:45:39,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:45:39,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478673668] [2022-04-15 00:45:39,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:45:39,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:45:39,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:39,763 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:45:39,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:39,766 INFO L290 TraceCheckUtils]: 0: Hoare triple {10653#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10611#true} is VALID [2022-04-15 00:45:39,766 INFO L290 TraceCheckUtils]: 1: Hoare triple {10611#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,766 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10611#true} {10611#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,766 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-15 00:45:39,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:39,769 INFO L290 TraceCheckUtils]: 0: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,770 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10611#true} {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:39,770 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-15 00:45:39,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:39,773 INFO L290 TraceCheckUtils]: 0: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,773 INFO L290 TraceCheckUtils]: 1: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,773 INFO L290 TraceCheckUtils]: 2: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,773 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10611#true} {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:39,773 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-15 00:45:39,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:39,775 INFO L290 TraceCheckUtils]: 0: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,775 INFO L290 TraceCheckUtils]: 1: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,776 INFO L290 TraceCheckUtils]: 2: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,776 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10611#true} {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:39,776 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-15 00:45:39,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:39,778 INFO L290 TraceCheckUtils]: 0: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,778 INFO L290 TraceCheckUtils]: 2: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,779 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10611#true} {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:39,779 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-15 00:45:39,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:39,781 INFO L290 TraceCheckUtils]: 0: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,781 INFO L290 TraceCheckUtils]: 1: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,781 INFO L290 TraceCheckUtils]: 2: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,782 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10611#true} {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:39,782 INFO L272 TraceCheckUtils]: 0: Hoare triple {10611#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10653#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:45:39,782 INFO L290 TraceCheckUtils]: 1: Hoare triple {10653#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10611#true} is VALID [2022-04-15 00:45:39,782 INFO L290 TraceCheckUtils]: 2: Hoare triple {10611#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,782 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10611#true} {10611#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,782 INFO L272 TraceCheckUtils]: 4: Hoare triple {10611#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,782 INFO L290 TraceCheckUtils]: 5: Hoare triple {10611#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {10611#true} is VALID [2022-04-15 00:45:39,783 INFO L290 TraceCheckUtils]: 6: Hoare triple {10611#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {10616#(= main_~i~0 0)} is VALID [2022-04-15 00:45:39,791 INFO L290 TraceCheckUtils]: 7: Hoare triple {10616#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10616#(= main_~i~0 0)} is VALID [2022-04-15 00:45:39,791 INFO L290 TraceCheckUtils]: 8: Hoare triple {10616#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10617#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:45:39,799 INFO L290 TraceCheckUtils]: 9: Hoare triple {10617#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10617#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:45:39,800 INFO L290 TraceCheckUtils]: 10: Hoare triple {10617#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10618#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:45:39,800 INFO L290 TraceCheckUtils]: 11: Hoare triple {10618#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10618#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:45:39,801 INFO L290 TraceCheckUtils]: 12: Hoare triple {10618#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10619#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:45:39,801 INFO L290 TraceCheckUtils]: 13: Hoare triple {10619#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10619#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:45:39,802 INFO L290 TraceCheckUtils]: 14: Hoare triple {10619#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10620#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:45:39,802 INFO L290 TraceCheckUtils]: 15: Hoare triple {10620#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10620#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:45:39,815 INFO L290 TraceCheckUtils]: 16: Hoare triple {10620#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10621#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-15 00:45:39,816 INFO L290 TraceCheckUtils]: 17: Hoare triple {10621#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10622#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-15 00:45:39,817 INFO L290 TraceCheckUtils]: 18: Hoare triple {10622#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10623#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-15 00:45:39,817 INFO L290 TraceCheckUtils]: 19: Hoare triple {10623#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {10623#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-15 00:45:39,817 INFO L290 TraceCheckUtils]: 20: Hoare triple {10623#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:39,818 INFO L290 TraceCheckUtils]: 21: Hoare triple {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:39,818 INFO L272 TraceCheckUtils]: 22: Hoare triple {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10611#true} is VALID [2022-04-15 00:45:39,818 INFO L290 TraceCheckUtils]: 23: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,818 INFO L290 TraceCheckUtils]: 24: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,818 INFO L290 TraceCheckUtils]: 25: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,818 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {10611#true} {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:39,819 INFO L290 TraceCheckUtils]: 27: Hoare triple {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:39,819 INFO L290 TraceCheckUtils]: 28: Hoare triple {10624#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:39,820 INFO L290 TraceCheckUtils]: 29: Hoare triple {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:39,820 INFO L272 TraceCheckUtils]: 30: Hoare triple {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10611#true} is VALID [2022-04-15 00:45:39,820 INFO L290 TraceCheckUtils]: 31: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,820 INFO L290 TraceCheckUtils]: 32: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,820 INFO L290 TraceCheckUtils]: 33: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,820 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {10611#true} {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:39,821 INFO L290 TraceCheckUtils]: 35: Hoare triple {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:39,821 INFO L290 TraceCheckUtils]: 36: Hoare triple {10629#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:39,821 INFO L290 TraceCheckUtils]: 37: Hoare triple {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:39,821 INFO L272 TraceCheckUtils]: 38: Hoare triple {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10611#true} is VALID [2022-04-15 00:45:39,822 INFO L290 TraceCheckUtils]: 39: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,822 INFO L290 TraceCheckUtils]: 40: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,822 INFO L290 TraceCheckUtils]: 41: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,822 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {10611#true} {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:39,822 INFO L290 TraceCheckUtils]: 43: Hoare triple {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:39,823 INFO L290 TraceCheckUtils]: 44: Hoare triple {10634#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:39,823 INFO L290 TraceCheckUtils]: 45: Hoare triple {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:39,823 INFO L272 TraceCheckUtils]: 46: Hoare triple {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10611#true} is VALID [2022-04-15 00:45:39,823 INFO L290 TraceCheckUtils]: 47: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,823 INFO L290 TraceCheckUtils]: 48: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,824 INFO L290 TraceCheckUtils]: 49: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,824 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {10611#true} {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:39,824 INFO L290 TraceCheckUtils]: 51: Hoare triple {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:39,825 INFO L290 TraceCheckUtils]: 52: Hoare triple {10639#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:39,825 INFO L290 TraceCheckUtils]: 53: Hoare triple {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:39,825 INFO L272 TraceCheckUtils]: 54: Hoare triple {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10611#true} is VALID [2022-04-15 00:45:39,825 INFO L290 TraceCheckUtils]: 55: Hoare triple {10611#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10611#true} is VALID [2022-04-15 00:45:39,825 INFO L290 TraceCheckUtils]: 56: Hoare triple {10611#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,825 INFO L290 TraceCheckUtils]: 57: Hoare triple {10611#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:39,826 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {10611#true} {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:39,826 INFO L290 TraceCheckUtils]: 59: Hoare triple {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:39,827 INFO L290 TraceCheckUtils]: 60: Hoare triple {10644#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10649#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:39,827 INFO L290 TraceCheckUtils]: 61: Hoare triple {10649#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10650#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:45:39,827 INFO L272 TraceCheckUtils]: 62: Hoare triple {10650#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10651#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:45:39,828 INFO L290 TraceCheckUtils]: 63: Hoare triple {10651#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10652#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:45:39,828 INFO L290 TraceCheckUtils]: 64: Hoare triple {10652#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10612#false} is VALID [2022-04-15 00:45:39,828 INFO L290 TraceCheckUtils]: 65: Hoare triple {10612#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10612#false} is VALID [2022-04-15 00:45:39,828 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-15 00:45:39,828 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:45:39,829 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478673668] [2022-04-15 00:45:39,829 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [478673668] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:45:39,829 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1980045625] [2022-04-15 00:45:39,829 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-15 00:45:39,829 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:45:39,829 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:45:39,830 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:45:39,831 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-15 00:45:39,896 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-04-15 00:45:39,896 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:45:39,897 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-15 00:45:39,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:39,919 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:45:40,071 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:45:44,474 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-15 00:45:44,475 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-15 00:45:44,551 INFO L272 TraceCheckUtils]: 0: Hoare triple {10611#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:44,552 INFO L290 TraceCheckUtils]: 1: Hoare triple {10611#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10611#true} is VALID [2022-04-15 00:45:44,552 INFO L290 TraceCheckUtils]: 2: Hoare triple {10611#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:44,552 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10611#true} {10611#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:44,552 INFO L272 TraceCheckUtils]: 4: Hoare triple {10611#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10611#true} is VALID [2022-04-15 00:45:44,552 INFO L290 TraceCheckUtils]: 5: Hoare triple {10611#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {10611#true} is VALID [2022-04-15 00:45:44,552 INFO L290 TraceCheckUtils]: 6: Hoare triple {10611#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {10675#(<= main_~i~0 0)} is VALID [2022-04-15 00:45:44,553 INFO L290 TraceCheckUtils]: 7: Hoare triple {10675#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10675#(<= main_~i~0 0)} is VALID [2022-04-15 00:45:44,553 INFO L290 TraceCheckUtils]: 8: Hoare triple {10675#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10682#(<= main_~i~0 1)} is VALID [2022-04-15 00:45:44,553 INFO L290 TraceCheckUtils]: 9: Hoare triple {10682#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10682#(<= main_~i~0 1)} is VALID [2022-04-15 00:45:44,554 INFO L290 TraceCheckUtils]: 10: Hoare triple {10682#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10689#(<= main_~i~0 2)} is VALID [2022-04-15 00:45:44,554 INFO L290 TraceCheckUtils]: 11: Hoare triple {10689#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10689#(<= main_~i~0 2)} is VALID [2022-04-15 00:45:44,555 INFO L290 TraceCheckUtils]: 12: Hoare triple {10689#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10696#(<= main_~i~0 3)} is VALID [2022-04-15 00:45:44,555 INFO L290 TraceCheckUtils]: 13: Hoare triple {10696#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10696#(<= main_~i~0 3)} is VALID [2022-04-15 00:45:44,555 INFO L290 TraceCheckUtils]: 14: Hoare triple {10696#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10703#(<= main_~i~0 4)} is VALID [2022-04-15 00:45:44,556 INFO L290 TraceCheckUtils]: 15: Hoare triple {10703#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10703#(<= main_~i~0 4)} is VALID [2022-04-15 00:45:44,556 INFO L290 TraceCheckUtils]: 16: Hoare triple {10703#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10710#(<= main_~i~0 5)} is VALID [2022-04-15 00:45:44,557 INFO L290 TraceCheckUtils]: 17: Hoare triple {10710#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10714#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5))} is VALID [2022-04-15 00:45:44,559 INFO L290 TraceCheckUtils]: 18: Hoare triple {10714#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10718#(exists ((v_main_~i~0_134 Int)) (and (<= main_~i~0 (+ v_main_~i~0_134 1)) (<= v_main_~i~0_134 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0)))} is VALID [2022-04-15 00:45:44,559 INFO L290 TraceCheckUtils]: 19: Hoare triple {10718#(exists ((v_main_~i~0_134 Int)) (and (<= main_~i~0 (+ v_main_~i~0_134 1)) (<= v_main_~i~0_134 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {10722#(exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0)))} is VALID [2022-04-15 00:45:44,560 INFO L290 TraceCheckUtils]: 20: Hoare triple {10722#(exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,561 INFO L290 TraceCheckUtils]: 21: Hoare triple {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,562 INFO L272 TraceCheckUtils]: 22: Hoare triple {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,562 INFO L290 TraceCheckUtils]: 23: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,562 INFO L290 TraceCheckUtils]: 24: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,563 INFO L290 TraceCheckUtils]: 25: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,563 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,564 INFO L290 TraceCheckUtils]: 27: Hoare triple {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,565 INFO L290 TraceCheckUtils]: 28: Hoare triple {10726#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,565 INFO L290 TraceCheckUtils]: 29: Hoare triple {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,566 INFO L272 TraceCheckUtils]: 30: Hoare triple {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,567 INFO L290 TraceCheckUtils]: 31: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,567 INFO L290 TraceCheckUtils]: 32: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,567 INFO L290 TraceCheckUtils]: 33: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,568 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,569 INFO L290 TraceCheckUtils]: 35: Hoare triple {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,569 INFO L290 TraceCheckUtils]: 36: Hoare triple {10752#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,570 INFO L290 TraceCheckUtils]: 37: Hoare triple {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,571 INFO L272 TraceCheckUtils]: 38: Hoare triple {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,571 INFO L290 TraceCheckUtils]: 39: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,572 INFO L290 TraceCheckUtils]: 40: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,572 INFO L290 TraceCheckUtils]: 41: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,572 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,573 INFO L290 TraceCheckUtils]: 43: Hoare triple {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,574 INFO L290 TraceCheckUtils]: 44: Hoare triple {10777#(and (<= 2 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,575 INFO L290 TraceCheckUtils]: 45: Hoare triple {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,576 INFO L272 TraceCheckUtils]: 46: Hoare triple {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,576 INFO L290 TraceCheckUtils]: 47: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,576 INFO L290 TraceCheckUtils]: 48: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,577 INFO L290 TraceCheckUtils]: 49: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,577 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,578 INFO L290 TraceCheckUtils]: 51: Hoare triple {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,579 INFO L290 TraceCheckUtils]: 52: Hoare triple {10802#(and (<= 3 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,579 INFO L290 TraceCheckUtils]: 53: Hoare triple {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,580 INFO L272 TraceCheckUtils]: 54: Hoare triple {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,581 INFO L290 TraceCheckUtils]: 55: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,581 INFO L290 TraceCheckUtils]: 56: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,581 INFO L290 TraceCheckUtils]: 57: Hoare triple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} is VALID [2022-04-15 00:45:44,582 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {10733#(exists ((v_main_~i~0_134 Int) (v_main_~x~0.base_BEFORE_CALL_55 Int) (v_main_~x~0.offset_BEFORE_CALL_55 Int)) (and (<= v_main_~i~0_134 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_55) (+ (* 4 v_main_~i~0_134) v_main_~x~0.offset_BEFORE_CALL_55)) 0)))} {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,582 INFO L290 TraceCheckUtils]: 59: Hoare triple {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,583 INFO L290 TraceCheckUtils]: 60: Hoare triple {10827#(and (<= 4 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10852#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} is VALID [2022-04-15 00:45:44,584 INFO L290 TraceCheckUtils]: 61: Hoare triple {10852#(and (<= 5 main_~i~1) (exists ((v_main_~i~0_134 Int)) (and (<= v_main_~i~0_134 5) (<= main_~n~0 (+ v_main_~i~0_134 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_134))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10650#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:45:44,584 INFO L272 TraceCheckUtils]: 62: Hoare triple {10650#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10859#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:45:44,585 INFO L290 TraceCheckUtils]: 63: Hoare triple {10859#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10863#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:45:44,585 INFO L290 TraceCheckUtils]: 64: Hoare triple {10863#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10612#false} is VALID [2022-04-15 00:45:44,585 INFO L290 TraceCheckUtils]: 65: Hoare triple {10612#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10612#false} is VALID [2022-04-15 00:45:44,585 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 45 proven. 51 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-15 00:45:44,586 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:45:44,893 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1980045625] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:45:44,894 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-15 00:45:44,894 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 38 [2022-04-15 00:45:44,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712953426] [2022-04-15 00:45:44,894 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-15 00:45:44,894 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.081081081081081) internal successors, (77), 35 states have internal predecessors, (77), 12 states have call successors, (15), 5 states have call predecessors, (15), 2 states have return successors, (11), 11 states have call predecessors, (11), 11 states have call successors, (11) Word has length 66 [2022-04-15 00:45:44,895 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:45:44,895 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 37 states have (on average 2.081081081081081) internal successors, (77), 35 states have internal predecessors, (77), 12 states have call successors, (15), 5 states have call predecessors, (15), 2 states have return successors, (11), 11 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:45,008 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:45:45,008 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-15 00:45:45,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:45:45,009 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-15 00:45:45,009 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=1395, Unknown=0, NotChecked=0, Total=1560 [2022-04-15 00:45:45,009 INFO L87 Difference]: Start difference. First operand 98 states and 101 transitions. Second operand has 38 states, 37 states have (on average 2.081081081081081) internal successors, (77), 35 states have internal predecessors, (77), 12 states have call successors, (15), 5 states have call predecessors, (15), 2 states have return successors, (11), 11 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:46,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:46,196 INFO L93 Difference]: Finished difference Result 123 states and 125 transitions. [2022-04-15 00:45:46,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-15 00:45:46,196 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.081081081081081) internal successors, (77), 35 states have internal predecessors, (77), 12 states have call successors, (15), 5 states have call predecessors, (15), 2 states have return successors, (11), 11 states have call predecessors, (11), 11 states have call successors, (11) Word has length 66 [2022-04-15 00:45:46,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-15 00:45:46,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.081081081081081) internal successors, (77), 35 states have internal predecessors, (77), 12 states have call successors, (15), 5 states have call predecessors, (15), 2 states have return successors, (11), 11 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:46,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 74 transitions. [2022-04-15 00:45:46,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.081081081081081) internal successors, (77), 35 states have internal predecessors, (77), 12 states have call successors, (15), 5 states have call predecessors, (15), 2 states have return successors, (11), 11 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:46,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 74 transitions. [2022-04-15 00:45:46,199 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 74 transitions. [2022-04-15 00:45:46,311 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-15 00:45:46,313 INFO L225 Difference]: With dead ends: 123 [2022-04-15 00:45:46,313 INFO L226 Difference]: Without dead ends: 71 [2022-04-15 00:45:46,314 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 66 SyntacticMatches, 10 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 865 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=364, Invalid=3542, Unknown=0, NotChecked=0, Total=3906 [2022-04-15 00:45:46,314 INFO L913 BasicCegarLoop]: 31 mSDtfsCounter, 21 mSDsluCounter, 251 mSDsCounter, 0 mSdLazyCounter, 308 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 282 SdHoareTripleChecker+Invalid, 481 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 308 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 161 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-15 00:45:46,314 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 282 Invalid, 481 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 308 Invalid, 0 Unknown, 161 Unchecked, 0.2s Time] [2022-04-15 00:45:46,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2022-04-15 00:45:46,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2022-04-15 00:45:46,365 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-15 00:45:46,366 INFO L82 GeneralOperation]: Start isEquivalent. First operand 71 states. Second operand has 71 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 56 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:45:46,366 INFO L74 IsIncluded]: Start isIncluded. First operand 71 states. Second operand has 71 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 56 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:45:46,366 INFO L87 Difference]: Start difference. First operand 71 states. Second operand has 71 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 56 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:45:46,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:46,367 INFO L93 Difference]: Finished difference Result 71 states and 72 transitions. [2022-04-15 00:45:46,367 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 72 transitions. [2022-04-15 00:45:46,367 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:45:46,367 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:45:46,367 INFO L74 IsIncluded]: Start isIncluded. First operand has 71 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 56 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 71 states. [2022-04-15 00:45:46,367 INFO L87 Difference]: Start difference. First operand has 71 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 56 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 71 states. [2022-04-15 00:45:46,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-15 00:45:46,368 INFO L93 Difference]: Finished difference Result 71 states and 72 transitions. [2022-04-15 00:45:46,368 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 72 transitions. [2022-04-15 00:45:46,368 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-15 00:45:46,368 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-15 00:45:46,368 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-15 00:45:46,368 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-15 00:45:46,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 56 states have internal predecessors, (57), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-15 00:45:46,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 72 transitions. [2022-04-15 00:45:46,370 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 72 transitions. Word has length 66 [2022-04-15 00:45:46,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-15 00:45:46,370 INFO L478 AbstractCegarLoop]: Abstraction has 71 states and 72 transitions. [2022-04-15 00:45:46,370 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 37 states have (on average 2.081081081081081) internal successors, (77), 35 states have internal predecessors, (77), 12 states have call successors, (15), 5 states have call predecessors, (15), 2 states have return successors, (11), 11 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-15 00:45:46,370 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 72 transitions. [2022-04-15 00:45:46,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-15 00:45:46,371 INFO L491 BasicCegarLoop]: Found error trace [2022-04-15 00:45:46,371 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-15 00:45:46,388 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-15 00:45:46,579 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-15 00:45:46,579 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-15 00:45:46,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-15 00:45:46,580 INFO L85 PathProgramCache]: Analyzing trace with hash 1865758983, now seen corresponding path program 16 times [2022-04-15 00:45:46,580 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-15 00:45:46,580 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786451593] [2022-04-15 00:45:46,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-15 00:45:46,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-15 00:45:46,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:46,830 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-15 00:45:46,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:46,837 INFO L290 TraceCheckUtils]: 0: Hoare triple {11409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11366#true} is VALID [2022-04-15 00:45:46,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {11366#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,837 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11366#true} {11366#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,837 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-15 00:45:46,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:46,845 INFO L290 TraceCheckUtils]: 0: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,846 INFO L290 TraceCheckUtils]: 2: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,846 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11366#true} {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:46,847 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-15 00:45:46,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:46,850 INFO L290 TraceCheckUtils]: 0: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,850 INFO L290 TraceCheckUtils]: 2: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,851 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11366#true} {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:46,851 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-15 00:45:46,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:46,853 INFO L290 TraceCheckUtils]: 0: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,854 INFO L290 TraceCheckUtils]: 1: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,854 INFO L290 TraceCheckUtils]: 2: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,854 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11366#true} {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:46,854 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-15 00:45:46,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:46,858 INFO L290 TraceCheckUtils]: 0: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,858 INFO L290 TraceCheckUtils]: 1: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,858 INFO L290 TraceCheckUtils]: 2: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,858 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11366#true} {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:46,859 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-15 00:45:46,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:46,861 INFO L290 TraceCheckUtils]: 0: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,861 INFO L290 TraceCheckUtils]: 1: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,861 INFO L290 TraceCheckUtils]: 2: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,862 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11366#true} {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:46,863 INFO L272 TraceCheckUtils]: 0: Hoare triple {11366#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-15 00:45:46,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {11409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11366#true} is VALID [2022-04-15 00:45:46,863 INFO L290 TraceCheckUtils]: 2: Hoare triple {11366#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,863 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11366#true} {11366#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,863 INFO L272 TraceCheckUtils]: 4: Hoare triple {11366#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,863 INFO L290 TraceCheckUtils]: 5: Hoare triple {11366#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11366#true} is VALID [2022-04-15 00:45:46,863 INFO L290 TraceCheckUtils]: 6: Hoare triple {11366#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11371#(= main_~i~0 0)} is VALID [2022-04-15 00:45:46,864 INFO L290 TraceCheckUtils]: 7: Hoare triple {11371#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11371#(= main_~i~0 0)} is VALID [2022-04-15 00:45:46,864 INFO L290 TraceCheckUtils]: 8: Hoare triple {11371#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11372#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:45:46,865 INFO L290 TraceCheckUtils]: 9: Hoare triple {11372#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11372#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-15 00:45:46,865 INFO L290 TraceCheckUtils]: 10: Hoare triple {11372#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11373#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:45:46,865 INFO L290 TraceCheckUtils]: 11: Hoare triple {11373#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11373#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-15 00:45:46,866 INFO L290 TraceCheckUtils]: 12: Hoare triple {11373#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11374#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:45:46,866 INFO L290 TraceCheckUtils]: 13: Hoare triple {11374#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11374#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-15 00:45:46,867 INFO L290 TraceCheckUtils]: 14: Hoare triple {11374#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11375#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:45:46,867 INFO L290 TraceCheckUtils]: 15: Hoare triple {11375#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11375#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-15 00:45:46,868 INFO L290 TraceCheckUtils]: 16: Hoare triple {11375#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11376#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-15 00:45:46,868 INFO L290 TraceCheckUtils]: 17: Hoare triple {11376#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11377#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-15 00:45:46,869 INFO L290 TraceCheckUtils]: 18: Hoare triple {11377#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11378#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-15 00:45:46,869 INFO L290 TraceCheckUtils]: 19: Hoare triple {11378#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11379#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-15 00:45:46,870 INFO L290 TraceCheckUtils]: 20: Hoare triple {11379#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11379#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-15 00:45:46,870 INFO L290 TraceCheckUtils]: 21: Hoare triple {11379#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11379#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-15 00:45:46,870 INFO L290 TraceCheckUtils]: 22: Hoare triple {11379#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:46,871 INFO L290 TraceCheckUtils]: 23: Hoare triple {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:46,871 INFO L272 TraceCheckUtils]: 24: Hoare triple {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:45:46,871 INFO L290 TraceCheckUtils]: 25: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,871 INFO L290 TraceCheckUtils]: 26: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,871 INFO L290 TraceCheckUtils]: 27: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,872 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {11366#true} {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:46,872 INFO L290 TraceCheckUtils]: 29: Hoare triple {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-15 00:45:46,873 INFO L290 TraceCheckUtils]: 30: Hoare triple {11380#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:46,873 INFO L290 TraceCheckUtils]: 31: Hoare triple {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:46,873 INFO L272 TraceCheckUtils]: 32: Hoare triple {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:45:46,873 INFO L290 TraceCheckUtils]: 33: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,873 INFO L290 TraceCheckUtils]: 34: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,873 INFO L290 TraceCheckUtils]: 35: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,874 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {11366#true} {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:46,874 INFO L290 TraceCheckUtils]: 37: Hoare triple {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:46,875 INFO L290 TraceCheckUtils]: 38: Hoare triple {11385#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:46,875 INFO L290 TraceCheckUtils]: 39: Hoare triple {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:46,875 INFO L272 TraceCheckUtils]: 40: Hoare triple {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:45:46,875 INFO L290 TraceCheckUtils]: 41: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,875 INFO L290 TraceCheckUtils]: 42: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,875 INFO L290 TraceCheckUtils]: 43: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,876 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {11366#true} {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:46,876 INFO L290 TraceCheckUtils]: 45: Hoare triple {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-15 00:45:46,877 INFO L290 TraceCheckUtils]: 46: Hoare triple {11390#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:46,877 INFO L290 TraceCheckUtils]: 47: Hoare triple {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:46,877 INFO L272 TraceCheckUtils]: 48: Hoare triple {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:45:46,877 INFO L290 TraceCheckUtils]: 49: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,877 INFO L290 TraceCheckUtils]: 50: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,877 INFO L290 TraceCheckUtils]: 51: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,878 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {11366#true} {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:46,878 INFO L290 TraceCheckUtils]: 53: Hoare triple {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-15 00:45:46,879 INFO L290 TraceCheckUtils]: 54: Hoare triple {11395#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:46,879 INFO L290 TraceCheckUtils]: 55: Hoare triple {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:46,879 INFO L272 TraceCheckUtils]: 56: Hoare triple {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:45:46,879 INFO L290 TraceCheckUtils]: 57: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:45:46,879 INFO L290 TraceCheckUtils]: 58: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,879 INFO L290 TraceCheckUtils]: 59: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:45:46,880 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {11366#true} {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:46,880 INFO L290 TraceCheckUtils]: 61: Hoare triple {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-15 00:45:46,880 INFO L290 TraceCheckUtils]: 62: Hoare triple {11400#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11405#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-15 00:45:46,881 INFO L290 TraceCheckUtils]: 63: Hoare triple {11405#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11406#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:45:46,881 INFO L272 TraceCheckUtils]: 64: Hoare triple {11406#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11407#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-15 00:45:46,882 INFO L290 TraceCheckUtils]: 65: Hoare triple {11407#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11408#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-15 00:45:46,882 INFO L290 TraceCheckUtils]: 66: Hoare triple {11408#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11367#false} is VALID [2022-04-15 00:45:46,882 INFO L290 TraceCheckUtils]: 67: Hoare triple {11367#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11367#false} is VALID [2022-04-15 00:45:46,882 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-15 00:45:46,882 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-15 00:45:46,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786451593] [2022-04-15 00:45:46,883 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [786451593] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-15 00:45:46,883 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1307372067] [2022-04-15 00:45:46,883 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-15 00:45:46,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-15 00:45:46,883 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-15 00:45:46,888 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-15 00:45:46,889 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-15 00:45:46,999 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-15 00:45:46,999 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-15 00:45:47,001 INFO L263 TraceCheckSpWp]: Trace formula consists of 198 conjuncts, 52 conjunts are in the unsatisfiable core [2022-04-15 00:45:47,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-15 00:45:47,019 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-15 00:45:47,089 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-15 00:45:47,147 INFO L356 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2022-04-15 00:45:47,147 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 27 [2022-04-15 00:45:47,248 INFO L356 Elim1Store]: treesize reduction 96, result has 20.7 percent of original size [2022-04-15 00:45:47,249 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 42 [2022-04-15 00:45:47,348 INFO L356 Elim1Store]: treesize reduction 171, result has 17.8 percent of original size [2022-04-15 00:45:47,348 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 52 treesize of output 57 [2022-04-15 00:45:47,631 INFO L356 Elim1Store]: treesize reduction 258, result has 15.7 percent of original size [2022-04-15 00:45:47,632 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 10 case distinctions, treesize of input 63 treesize of output 71 [2022-04-15 00:47:44,557 WARN L232 SmtUtils]: Spent 6.02s on a formula simplification that was a NOOP. DAG size: 90 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 00:47:56,516 WARN L232 SmtUtils]: Spent 6.02s on a formula simplification that was a NOOP. DAG size: 117 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 00:48:08,897 WARN L232 SmtUtils]: Spent 8.19s on a formula simplification. DAG size of input: 124 DAG size of output: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 00:50:23,774 WARN L232 SmtUtils]: Spent 6.03s on a formula simplification that was a NOOP. DAG size: 90 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 00:50:41,947 WARN L232 SmtUtils]: Spent 6.03s on a formula simplification that was a NOOP. DAG size: 115 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 00:50:58,332 WARN L232 SmtUtils]: Spent 6.04s on a formula simplification that was a NOOP. DAG size: 124 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-15 00:51:02,777 INFO L356 Elim1Store]: treesize reduction 4218, result has 0.1 percent of original size [2022-04-15 00:51:02,777 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 21 select indices, 21 select index equivalence classes, 0 disjoint index pairs (out of 210 index pairs), introduced 21 new quantified variables, introduced 210 case distinctions, treesize of input 242 treesize of output 67 [2022-04-15 00:51:03,127 INFO L272 TraceCheckUtils]: 0: Hoare triple {11366#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:51:03,127 INFO L290 TraceCheckUtils]: 1: Hoare triple {11366#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11366#true} is VALID [2022-04-15 00:51:03,127 INFO L290 TraceCheckUtils]: 2: Hoare triple {11366#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:51:03,127 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11366#true} {11366#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:51:03,128 INFO L272 TraceCheckUtils]: 4: Hoare triple {11366#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:51:03,128 INFO L290 TraceCheckUtils]: 5: Hoare triple {11366#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11366#true} is VALID [2022-04-15 00:51:03,128 INFO L290 TraceCheckUtils]: 6: Hoare triple {11366#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11431#(<= main_~i~0 0)} is VALID [2022-04-15 00:51:03,128 INFO L290 TraceCheckUtils]: 7: Hoare triple {11431#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11431#(<= main_~i~0 0)} is VALID [2022-04-15 00:51:03,129 INFO L290 TraceCheckUtils]: 8: Hoare triple {11431#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11438#(<= main_~i~0 1)} is VALID [2022-04-15 00:51:03,129 INFO L290 TraceCheckUtils]: 9: Hoare triple {11438#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11438#(<= main_~i~0 1)} is VALID [2022-04-15 00:51:03,130 INFO L290 TraceCheckUtils]: 10: Hoare triple {11438#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11445#(<= main_~i~0 2)} is VALID [2022-04-15 00:51:03,130 INFO L290 TraceCheckUtils]: 11: Hoare triple {11445#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} is VALID [2022-04-15 00:51:03,131 INFO L290 TraceCheckUtils]: 12: Hoare triple {11449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11453#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0) (<= main_~i~0 3))} is VALID [2022-04-15 00:51:03,132 INFO L290 TraceCheckUtils]: 13: Hoare triple {11453#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11457#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0) (<= main_~i~0 3))} is VALID [2022-04-15 00:51:03,132 INFO L290 TraceCheckUtils]: 14: Hoare triple {11457#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11461#(and (<= main_~i~0 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 8) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0))} is VALID [2022-04-15 00:51:03,133 INFO L290 TraceCheckUtils]: 15: Hoare triple {11461#(and (<= main_~i~0 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 8) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11465#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 8) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0))} is VALID [2022-04-15 00:51:03,134 INFO L290 TraceCheckUtils]: 16: Hoare triple {11465#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 8) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11469#(and (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 12) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 8) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0))} is VALID [2022-04-15 00:51:03,135 INFO L290 TraceCheckUtils]: 17: Hoare triple {11469#(and (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 12) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 8) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11473#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 12) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 8) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0))} is VALID [2022-04-15 00:51:03,140 INFO L290 TraceCheckUtils]: 18: Hoare triple {11473#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 12) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 8) (* main_~i~0 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* main_~i~0 4))) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11477#(exists ((v_main_~i~0_140 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= main_~i~0 (+ v_main_~i~0_140 1)) (<= v_main_~i~0_140 5)))} is VALID [2022-04-15 00:51:03,142 INFO L290 TraceCheckUtils]: 19: Hoare triple {11477#(exists ((v_main_~i~0_140 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= main_~i~0 (+ v_main_~i~0_140 1)) (<= v_main_~i~0_140 5)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11481#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (exists ((v_main_~i~0_140 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= main_~i~0 (+ v_main_~i~0_140 1)) (<= v_main_~i~0_140 5))))} is VALID [2022-04-15 00:51:03,145 INFO L290 TraceCheckUtils]: 20: Hoare triple {11481#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (exists ((v_main_~i~0_140 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= main_~i~0 (+ v_main_~i~0_140 1)) (<= v_main_~i~0_140 5))))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11485#(exists ((v_main_~i~0_141 Int)) (and (<= main_~i~0 (+ v_main_~i~0_141 1)) (exists ((v_main_~i~0_140 Int)) (and (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0)))} is VALID [2022-04-15 00:51:03,147 INFO L290 TraceCheckUtils]: 21: Hoare triple {11485#(exists ((v_main_~i~0_141 Int)) (and (<= main_~i~0 (+ v_main_~i~0_141 1)) (exists ((v_main_~i~0_140 Int)) (and (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11489#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5)))} is VALID [2022-04-15 00:51:03,149 INFO L290 TraceCheckUtils]: 22: Hoare triple {11489#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11493#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} is VALID [2022-04-15 00:51:03,150 INFO L290 TraceCheckUtils]: 23: Hoare triple {11493#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11493#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} is VALID [2022-04-15 00:51:05,157 WARN L272 TraceCheckUtils]: 24: Hoare triple {11493#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11500#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0)))} is UNKNOWN [2022-04-15 00:51:07,163 WARN L290 TraceCheckUtils]: 25: Hoare triple {11500#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11500#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0)))} is UNKNOWN [2022-04-15 00:51:09,168 WARN L290 TraceCheckUtils]: 26: Hoare triple {11500#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11500#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0)))} is UNKNOWN [2022-04-15 00:51:11,180 WARN L290 TraceCheckUtils]: 27: Hoare triple {11500#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11500#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0)))} is UNKNOWN [2022-04-15 00:51:11,181 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {11500#(exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0)))} {11493#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11513#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} is VALID [2022-04-15 00:51:13,188 WARN L290 TraceCheckUtils]: 29: Hoare triple {11513#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11513#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} is UNKNOWN [2022-04-15 00:51:15,195 WARN L290 TraceCheckUtils]: 30: Hoare triple {11513#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int)) (and (<= main_~n~0 (+ v_main_~i~0_141 1)) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_140) (- 8))) 0) (<= v_main_~i~0_140 5))) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11520#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} is UNKNOWN [2022-04-15 00:51:17,198 WARN L290 TraceCheckUtils]: 31: Hoare triple {11520#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11520#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} is UNKNOWN [2022-04-15 00:51:19,204 WARN L272 TraceCheckUtils]: 32: Hoare triple {11520#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11527#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:21,208 WARN L290 TraceCheckUtils]: 33: Hoare triple {11527#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11527#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:23,214 WARN L290 TraceCheckUtils]: 34: Hoare triple {11527#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11527#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:25,221 WARN L290 TraceCheckUtils]: 35: Hoare triple {11527#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11527#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:25,223 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {11527#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} {11520#(and (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11540#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-15 00:51:27,230 WARN L290 TraceCheckUtils]: 37: Hoare triple {11540#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11540#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} is UNKNOWN [2022-04-15 00:51:29,235 WARN L290 TraceCheckUtils]: 38: Hoare triple {11540#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142))) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 8))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_142) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_143))) 0) (<= v_main_~i~0_142 5) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (- 4) (* 4 v_main_~i~0_142)))) (<= main_~n~0 (+ v_main_~i~0_143 1)))) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11547#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:31,244 WARN L290 TraceCheckUtils]: 39: Hoare triple {11547#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11547#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:33,247 WARN L272 TraceCheckUtils]: 40: Hoare triple {11547#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11554#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:35,251 WARN L290 TraceCheckUtils]: 41: Hoare triple {11554#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11554#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:37,258 WARN L290 TraceCheckUtils]: 42: Hoare triple {11554#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11554#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:39,265 WARN L290 TraceCheckUtils]: 43: Hoare triple {11554#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11554#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:39,268 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {11554#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} {11547#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11567#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is VALID [2022-04-15 00:51:41,277 WARN L290 TraceCheckUtils]: 45: Hoare triple {11567#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11567#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} is UNKNOWN [2022-04-15 00:51:43,288 WARN L290 TraceCheckUtils]: 46: Hoare triple {11567#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= (+ (- 2) main_~i~1) 0) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_62 Int) (v_main_~x~0.offset_BEFORE_CALL_62 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_62) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_62)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_140 Int) (v_main_~i~0_141 Int) (v_main_~x~0.base_BEFORE_CALL_60 Int) (v_main_~x~0.offset_BEFORE_CALL_60 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ v_main_~x~0.offset_BEFORE_CALL_60 (* 4 v_main_~i~0_141))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 12) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_141 (+ v_main_~i~0_140 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) (- 4) v_main_~x~0.offset_BEFORE_CALL_60)) 0) (<= v_main_~i~0_140 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_60) (+ (* 4 v_main_~i~0_140) v_main_~x~0.offset_BEFORE_CALL_60 (- 8))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11574#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} is UNKNOWN [2022-04-15 00:51:45,295 WARN L290 TraceCheckUtils]: 47: Hoare triple {11574#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11574#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} is UNKNOWN [2022-04-15 00:51:47,299 WARN L272 TraceCheckUtils]: 48: Hoare triple {11574#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11581#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))))} is UNKNOWN [2022-04-15 00:51:49,305 WARN L290 TraceCheckUtils]: 49: Hoare triple {11581#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11581#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))))} is UNKNOWN [2022-04-15 00:51:51,311 WARN L290 TraceCheckUtils]: 50: Hoare triple {11581#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11581#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))))} is UNKNOWN [2022-04-15 00:51:53,317 WARN L290 TraceCheckUtils]: 51: Hoare triple {11581#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11581#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))))} is UNKNOWN [2022-04-15 00:51:53,318 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {11581#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))))} {11574#(and (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11594#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} is VALID [2022-04-15 00:51:55,327 WARN L290 TraceCheckUtils]: 53: Hoare triple {11594#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11594#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} is UNKNOWN [2022-04-15 00:51:57,345 WARN L290 TraceCheckUtils]: 54: Hoare triple {11594#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 4))) 0) (<= main_~n~0 (+ v_main_~i~0_145 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 12))) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset)) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_145))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_144) main_~x~0.offset (- 8))) 0) (<= v_main_~i~0_144 5))) (= main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11601#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4))} is UNKNOWN [2022-04-15 00:51:59,352 WARN L290 TraceCheckUtils]: 55: Hoare triple {11601#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11601#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4))} is UNKNOWN [2022-04-15 00:52:01,360 WARN L272 TraceCheckUtils]: 56: Hoare triple {11601#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11608#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} is UNKNOWN [2022-04-15 00:52:03,367 WARN L290 TraceCheckUtils]: 57: Hoare triple {11608#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11608#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} is UNKNOWN [2022-04-15 00:52:05,376 WARN L290 TraceCheckUtils]: 58: Hoare triple {11608#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11608#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} is UNKNOWN [2022-04-15 00:52:07,383 WARN L290 TraceCheckUtils]: 59: Hoare triple {11608#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11608#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} is UNKNOWN [2022-04-15 00:52:07,385 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {11608#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} {11601#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11621#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} is VALID [2022-04-15 00:52:09,394 WARN L290 TraceCheckUtils]: 61: Hoare triple {11621#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11621#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} is UNKNOWN [2022-04-15 00:52:11,399 WARN L290 TraceCheckUtils]: 62: Hoare triple {11621#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))) (= main_~i~1 4) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_149) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_148) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_148 5))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11628#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~i~0_151 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_150 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_150) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_150) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_150) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_151 (+ v_main_~i~0_150 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_150) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ v_main_~x~0.offset_BEFORE_CALL_64 (* 4 v_main_~i~0_151))) 0) (<= v_main_~i~0_150 5))) (= 4 (+ (- 1) main_~i~1)) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))))} is UNKNOWN [2022-04-15 00:52:11,403 INFO L290 TraceCheckUtils]: 63: Hoare triple {11628#(and (exists ((v_main_~i~0_144 Int) (v_main_~i~0_145 Int) (v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_145) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_145 (+ v_main_~i~0_144 1)) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 4) v_main_~x~0.offset_BEFORE_CALL_63))) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) v_main_~x~0.offset_BEFORE_CALL_63 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ (* 4 v_main_~i~0_144) (- 12) v_main_~x~0.offset_BEFORE_CALL_63)) 0) (<= v_main_~i~0_144 5))) (exists ((v_main_~i~0_142 Int) (v_main_~i~0_143 Int) (v_main_~x~0.base_BEFORE_CALL_61 Int) (v_main_~x~0.offset_BEFORE_CALL_61 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) (- 12) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_143 (+ v_main_~i~0_142 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_143) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (- 4) (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0) (<= v_main_~i~0_142 5) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_61) (+ (* 4 v_main_~i~0_142) v_main_~x~0.offset_BEFORE_CALL_61)) 0))) (exists ((v_main_~x~0.base_BEFORE_CALL_64 Int) (v_main_~i~0_151 Int) (v_main_~x~0.offset_BEFORE_CALL_64 Int) (v_main_~i~0_150 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_150) (- 4) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_150) v_main_~x~0.offset_BEFORE_CALL_64 (- 8))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_150) (- 12) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (<= v_main_~i~0_151 (+ v_main_~i~0_150 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ (* 4 v_main_~i~0_150) v_main_~x~0.offset_BEFORE_CALL_64)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_64) (+ v_main_~x~0.offset_BEFORE_CALL_64 (* 4 v_main_~i~0_151))) 0) (<= v_main_~i~0_150 5))) (= 4 (+ (- 1) main_~i~1)) (exists ((v_main_~i~0_148 Int) (v_main_~i~0_149 Int)) (and (<= main_~n~0 (+ v_main_~i~0_149 1)) (<= v_main_~i~0_149 (+ v_main_~i~0_148 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 12))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 4))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_149))) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_148) (- 8))) 0) (<= v_main_~i~0_148 5))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11406#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:52:11,404 INFO L272 TraceCheckUtils]: 64: Hoare triple {11406#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11635#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:52:11,404 INFO L290 TraceCheckUtils]: 65: Hoare triple {11635#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11639#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:52:11,405 INFO L290 TraceCheckUtils]: 66: Hoare triple {11639#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11367#false} is VALID [2022-04-15 00:52:11,405 INFO L290 TraceCheckUtils]: 67: Hoare triple {11367#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11367#false} is VALID [2022-04-15 00:52:11,406 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 16 proven. 109 refuted. 24 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-15 00:52:11,406 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-15 00:52:12,632 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-15 00:52:12,637 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-15 00:52:12,863 INFO L290 TraceCheckUtils]: 67: Hoare triple {11367#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11367#false} is VALID [2022-04-15 00:52:12,864 INFO L290 TraceCheckUtils]: 66: Hoare triple {11639#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11367#false} is VALID [2022-04-15 00:52:12,864 INFO L290 TraceCheckUtils]: 65: Hoare triple {11635#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11639#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-15 00:52:12,864 INFO L272 TraceCheckUtils]: 64: Hoare triple {11406#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11635#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-15 00:52:12,865 INFO L290 TraceCheckUtils]: 63: Hoare triple {11658#(or (not (< main_~i~1 main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11406#(= |main_#t~mem5| 0)} is VALID [2022-04-15 00:52:12,865 INFO L290 TraceCheckUtils]: 62: Hoare triple {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11658#(or (not (< main_~i~1 main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0))} is VALID [2022-04-15 00:52:12,866 INFO L290 TraceCheckUtils]: 61: Hoare triple {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} is VALID [2022-04-15 00:52:12,866 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {11366#true} {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} is VALID [2022-04-15 00:52:12,866 INFO L290 TraceCheckUtils]: 59: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,867 INFO L290 TraceCheckUtils]: 58: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,867 INFO L290 TraceCheckUtils]: 57: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:52:12,867 INFO L272 TraceCheckUtils]: 56: Hoare triple {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:52:12,867 INFO L290 TraceCheckUtils]: 55: Hoare triple {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} is VALID [2022-04-15 00:52:12,868 INFO L290 TraceCheckUtils]: 54: Hoare triple {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11662#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0) (not (< (+ main_~i~1 1) main_~n~0)))} is VALID [2022-04-15 00:52:12,868 INFO L290 TraceCheckUtils]: 53: Hoare triple {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} is VALID [2022-04-15 00:52:12,869 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {11366#true} {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} is VALID [2022-04-15 00:52:12,869 INFO L290 TraceCheckUtils]: 51: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,869 INFO L290 TraceCheckUtils]: 50: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,869 INFO L290 TraceCheckUtils]: 49: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:52:12,869 INFO L272 TraceCheckUtils]: 48: Hoare triple {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:52:12,869 INFO L290 TraceCheckUtils]: 47: Hoare triple {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} is VALID [2022-04-15 00:52:12,884 INFO L290 TraceCheckUtils]: 46: Hoare triple {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11687#(or (not (< (+ main_~i~1 2) main_~n~0)) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8))))} is VALID [2022-04-15 00:52:12,885 INFO L290 TraceCheckUtils]: 45: Hoare triple {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} is VALID [2022-04-15 00:52:12,885 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {11366#true} {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} is VALID [2022-04-15 00:52:12,886 INFO L290 TraceCheckUtils]: 43: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,886 INFO L290 TraceCheckUtils]: 42: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,886 INFO L290 TraceCheckUtils]: 41: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:52:12,886 INFO L272 TraceCheckUtils]: 40: Hoare triple {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:52:12,886 INFO L290 TraceCheckUtils]: 39: Hoare triple {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} is VALID [2022-04-15 00:52:12,887 INFO L290 TraceCheckUtils]: 38: Hoare triple {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11712#(or (not (< (+ main_~i~1 3) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0))} is VALID [2022-04-15 00:52:12,888 INFO L290 TraceCheckUtils]: 37: Hoare triple {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} is VALID [2022-04-15 00:52:12,888 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {11366#true} {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} is VALID [2022-04-15 00:52:12,888 INFO L290 TraceCheckUtils]: 35: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,889 INFO L290 TraceCheckUtils]: 34: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,889 INFO L290 TraceCheckUtils]: 33: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:52:12,889 INFO L272 TraceCheckUtils]: 32: Hoare triple {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:52:12,889 INFO L290 TraceCheckUtils]: 31: Hoare triple {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} is VALID [2022-04-15 00:52:12,890 INFO L290 TraceCheckUtils]: 30: Hoare triple {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11737#(or (not (< (+ main_~i~1 4) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0))} is VALID [2022-04-15 00:52:12,890 INFO L290 TraceCheckUtils]: 29: Hoare triple {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} is VALID [2022-04-15 00:52:12,891 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {11366#true} {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} is VALID [2022-04-15 00:52:12,891 INFO L290 TraceCheckUtils]: 27: Hoare triple {11366#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,891 INFO L290 TraceCheckUtils]: 26: Hoare triple {11366#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,891 INFO L290 TraceCheckUtils]: 25: Hoare triple {11366#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11366#true} is VALID [2022-04-15 00:52:12,891 INFO L272 TraceCheckUtils]: 24: Hoare triple {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11366#true} is VALID [2022-04-15 00:52:12,892 INFO L290 TraceCheckUtils]: 23: Hoare triple {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} is VALID [2022-04-15 00:52:12,892 INFO L290 TraceCheckUtils]: 22: Hoare triple {11787#(or (not (< 5 main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11762#(or (not (< (+ 5 main_~i~1) main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0))} is VALID [2022-04-15 00:52:12,893 INFO L290 TraceCheckUtils]: 21: Hoare triple {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11787#(or (not (< 5 main_~n~0)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-15 00:52:12,894 INFO L290 TraceCheckUtils]: 20: Hoare triple {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-15 00:52:12,894 INFO L290 TraceCheckUtils]: 19: Hoare triple {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} is VALID [2022-04-15 00:52:12,895 INFO L290 TraceCheckUtils]: 18: Hoare triple {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-15 00:52:12,896 INFO L290 TraceCheckUtils]: 17: Hoare triple {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} is VALID [2022-04-15 00:52:12,896 INFO L290 TraceCheckUtils]: 16: Hoare triple {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-15 00:52:12,897 INFO L290 TraceCheckUtils]: 15: Hoare triple {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} is VALID [2022-04-15 00:52:12,897 INFO L290 TraceCheckUtils]: 14: Hoare triple {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-15 00:52:12,898 INFO L290 TraceCheckUtils]: 13: Hoare triple {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} is VALID [2022-04-15 00:52:12,899 INFO L290 TraceCheckUtils]: 12: Hoare triple {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11791#(or (<= main_~i~0 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-15 00:52:12,899 INFO L290 TraceCheckUtils]: 11: Hoare triple {11823#(or (= 20 (* main_~i~0 4)) (<= main_~i~0 4))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11795#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= main_~i~0 4))} is VALID [2022-04-15 00:52:12,900 INFO L290 TraceCheckUtils]: 10: Hoare triple {11827#(or (= 20 (+ 4 (* main_~i~0 4))) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11823#(or (= 20 (* main_~i~0 4)) (<= main_~i~0 4))} is VALID [2022-04-15 00:52:12,900 INFO L290 TraceCheckUtils]: 9: Hoare triple {11827#(or (= 20 (+ 4 (* main_~i~0 4))) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11827#(or (= 20 (+ 4 (* main_~i~0 4))) (<= main_~i~0 3))} is VALID [2022-04-15 00:52:12,901 INFO L290 TraceCheckUtils]: 8: Hoare triple {11834#(or (<= main_~i~0 2) (= (+ 8 (* main_~i~0 4)) 20))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11827#(or (= 20 (+ 4 (* main_~i~0 4))) (<= main_~i~0 3))} is VALID [2022-04-15 00:52:12,901 INFO L290 TraceCheckUtils]: 7: Hoare triple {11834#(or (<= main_~i~0 2) (= (+ 8 (* main_~i~0 4)) 20))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11834#(or (<= main_~i~0 2) (= (+ 8 (* main_~i~0 4)) 20))} is VALID [2022-04-15 00:52:12,902 INFO L290 TraceCheckUtils]: 6: Hoare triple {11366#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11834#(or (<= main_~i~0 2) (= (+ 8 (* main_~i~0 4)) 20))} is VALID [2022-04-15 00:52:12,902 INFO L290 TraceCheckUtils]: 5: Hoare triple {11366#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11366#true} is VALID [2022-04-15 00:52:12,902 INFO L272 TraceCheckUtils]: 4: Hoare triple {11366#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,902 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11366#true} {11366#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,902 INFO L290 TraceCheckUtils]: 2: Hoare triple {11366#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {11366#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11366#true} is VALID [2022-04-15 00:52:12,902 INFO L272 TraceCheckUtils]: 0: Hoare triple {11366#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11366#true} is VALID [2022-04-15 00:52:12,903 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 79 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-15 00:52:12,903 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1307372067] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-15 00:52:12,903 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-15 00:52:12,903 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 35, 17] total 65 [2022-04-15 00:52:12,903 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102690812] [2022-04-15 00:52:12,903 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-15 00:52:12,904 INFO L78 Accepts]: Start accepts. Automaton has has 65 states, 64 states have (on average 1.859375) internal successors, (119), 62 states have internal predecessors, (119), 17 states have call successors, (20), 9 states have call predecessors, (20), 6 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 68 [2022-04-15 00:52:12,904 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-15 00:52:12,905 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 65 states, 64 states have (on average 1.859375) internal successors, (119), 62 states have internal predecessors, (119), 17 states have call successors, (20), 9 states have call predecessors, (20), 6 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-15 00:53:31,318 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 155 edges. 116 inductive. 0 not inductive. 39 times theorem prover too weak to decide inductivity. [2022-04-15 00:53:31,318 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 65 states [2022-04-15 00:53:31,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-15 00:53:31,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2022-04-15 00:53:31,319 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=3694, Unknown=103, NotChecked=0, Total=4160 [2022-04-15 00:53:31,320 INFO L87 Difference]: Start difference. First operand 71 states and 72 transitions. Second operand has 65 states, 64 states have (on average 1.859375) internal successors, (119), 62 states have internal predecessors, (119), 17 states have call successors, (20), 9 states have call predecessors, (20), 6 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16)