/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/Mono3_1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-28 03:28:37,361 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-28 03:28:37,363 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-28 03:28:37,393 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-28 03:28:37,413 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-28 03:28:37,415 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-28 03:28:37,415 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-28 03:28:37,417 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-28 03:28:37,418 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-28 03:28:37,418 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-28 03:28:37,421 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-28 03:28:37,422 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-28 03:28:37,423 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-28 03:28:37,425 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-28 03:28:37,426 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-28 03:28:37,426 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-28 03:28:37,428 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-28 03:28:37,432 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-28 03:28:37,437 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-28 03:28:37,438 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-28 03:28:37,439 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-28 03:28:37,439 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf [2022-04-28 03:28:37,448 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-28 03:28:37,448 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-28 03:28:37,449 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-28 03:28:37,449 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-28 03:28:37,450 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-28 03:28:37,450 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-28 03:28:37,450 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-28 03:28:37,450 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-28 03:28:37,450 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-28 03:28:37,450 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-28 03:28:37,451 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-28 03:28:37,451 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-28 03:28:37,451 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-28 03:28:37,451 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-28 03:28:37,451 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-28 03:28:37,451 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-28 03:28:37,451 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-28 03:28:37,451 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-28 03:28:37,451 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 03:28:37,452 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-28 03:28:37,452 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-28 03:28:37,452 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-28 03:28:37,452 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-28 03:28:37,452 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-28 03:28:37,452 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=JORDAN [2022-04-28 03:28:37,452 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-28 03:28:37,652 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-28 03:28:37,668 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-28 03:28:37,670 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-28 03:28:37,671 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-28 03:28:37,671 INFO L275 PluginConnector]: CDTParser initialized [2022-04-28 03:28:37,672 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/Mono3_1.c [2022-04-28 03:28:37,710 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6b81f6128/35fe4ba80f1245f0a8dbee32f02d9aec/FLAGc72c0ec21 [2022-04-28 03:28:38,018 INFO L306 CDTParser]: Found 1 translation units. [2022-04-28 03:28:38,019 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/Mono3_1.c [2022-04-28 03:28:38,022 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6b81f6128/35fe4ba80f1245f0a8dbee32f02d9aec/FLAGc72c0ec21 [2022-04-28 03:28:38,450 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6b81f6128/35fe4ba80f1245f0a8dbee32f02d9aec [2022-04-28 03:28:38,452 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-28 03:28:38,453 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-28 03:28:38,454 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-28 03:28:38,454 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-28 03:28:38,457 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-28 03:28:38,458 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,460 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12994f94 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38, skipping insertion in model container [2022-04-28 03:28:38,460 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,464 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-28 03:28:38,472 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-28 03:28:38,637 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/Mono3_1.c[311,324] [2022-04-28 03:28:38,650 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 03:28:38,667 INFO L203 MainTranslator]: Completed pre-run [2022-04-28 03:28:38,676 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/Mono3_1.c[311,324] [2022-04-28 03:28:38,679 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 03:28:38,690 INFO L208 MainTranslator]: Completed translation [2022-04-28 03:28:38,690 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38 WrapperNode [2022-04-28 03:28:38,691 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-28 03:28:38,691 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-28 03:28:38,692 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-28 03:28:38,692 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-28 03:28:38,699 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,699 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,706 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,706 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,711 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,714 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,717 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,719 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-28 03:28:38,720 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-28 03:28:38,720 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-28 03:28:38,720 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-28 03:28:38,721 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (1/1) ... [2022-04-28 03:28:38,726 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 03:28:38,737 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:28:38,785 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-28 03:28:38,828 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-28 03:28:38,840 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-28 03:28:38,840 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-28 03:28:38,840 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-28 03:28:38,840 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-28 03:28:38,840 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-28 03:28:38,841 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-28 03:28:38,841 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-28 03:28:38,841 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-28 03:28:38,841 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-28 03:28:38,841 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-28 03:28:38,841 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-28 03:28:38,842 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-28 03:28:38,842 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-28 03:28:38,842 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-28 03:28:38,842 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-28 03:28:38,843 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-28 03:28:38,843 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-28 03:28:38,891 INFO L234 CfgBuilder]: Building ICFG [2022-04-28 03:28:38,892 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-28 03:28:38,973 INFO L275 CfgBuilder]: Performing block encoding [2022-04-28 03:28:38,977 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-28 03:28:38,977 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-28 03:28:38,978 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 03:28:38 BoogieIcfgContainer [2022-04-28 03:28:38,978 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-28 03:28:38,979 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-28 03:28:38,979 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-28 03:28:38,982 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-28 03:28:38,982 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.04 03:28:38" (1/3) ... [2022-04-28 03:28:38,982 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bd61240 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 03:28:38, skipping insertion in model container [2022-04-28 03:28:38,982 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:28:38" (2/3) ... [2022-04-28 03:28:38,982 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bd61240 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 03:28:38, skipping insertion in model container [2022-04-28 03:28:38,982 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 03:28:38" (3/3) ... [2022-04-28 03:28:38,983 INFO L111 eAbstractionObserver]: Analyzing ICFG Mono3_1.c [2022-04-28 03:28:38,992 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-28 03:28:38,992 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-28 03:28:39,017 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-28 03:28:39,021 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@2907c94e, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@4c8fa0af [2022-04-28 03:28:39,021 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-28 03:28:39,026 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-28 03:28:39,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-28 03:28:39,030 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:28:39,030 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:28:39,031 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:28:39,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:28:39,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1326077006, now seen corresponding path program 1 times [2022-04-28 03:28:39,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:39,039 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [637473328] [2022-04-28 03:28:39,045 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:28:39,045 INFO L85 PathProgramCache]: Analyzing trace with hash 1326077006, now seen corresponding path program 2 times [2022-04-28 03:28:39,047 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:28:39,048 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022806392] [2022-04-28 03:28:39,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:28:39,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:28:39,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:39,190 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:28:39,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:39,212 INFO L290 TraceCheckUtils]: 0: Hoare triple {28#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23#true} is VALID [2022-04-28 03:28:39,212 INFO L290 TraceCheckUtils]: 1: Hoare triple {23#true} assume true; {23#true} is VALID [2022-04-28 03:28:39,212 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23#true} {23#true} #41#return; {23#true} is VALID [2022-04-28 03:28:39,228 INFO L272 TraceCheckUtils]: 0: Hoare triple {23#true} call ULTIMATE.init(); {28#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:28:39,228 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23#true} is VALID [2022-04-28 03:28:39,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {23#true} assume true; {23#true} is VALID [2022-04-28 03:28:39,229 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23#true} {23#true} #41#return; {23#true} is VALID [2022-04-28 03:28:39,229 INFO L272 TraceCheckUtils]: 4: Hoare triple {23#true} call #t~ret7 := main(); {23#true} is VALID [2022-04-28 03:28:39,229 INFO L290 TraceCheckUtils]: 5: Hoare triple {23#true} ~x~0 := 0;~y~0 := 0; {23#true} is VALID [2022-04-28 03:28:39,230 INFO L290 TraceCheckUtils]: 6: Hoare triple {23#true} assume !true; {24#false} is VALID [2022-04-28 03:28:39,230 INFO L272 TraceCheckUtils]: 7: Hoare triple {24#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {24#false} is VALID [2022-04-28 03:28:39,230 INFO L290 TraceCheckUtils]: 8: Hoare triple {24#false} ~cond := #in~cond; {24#false} is VALID [2022-04-28 03:28:39,230 INFO L290 TraceCheckUtils]: 9: Hoare triple {24#false} assume 0 == ~cond; {24#false} is VALID [2022-04-28 03:28:39,230 INFO L290 TraceCheckUtils]: 10: Hoare triple {24#false} assume !false; {24#false} is VALID [2022-04-28 03:28:39,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 03:28:39,231 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:28:39,232 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022806392] [2022-04-28 03:28:39,232 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2022806392] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:28:39,232 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:28:39,232 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-28 03:28:39,234 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:28:39,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [637473328] [2022-04-28 03:28:39,235 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [637473328] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:28:39,235 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:28:39,235 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-28 03:28:39,235 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [173785822] [2022-04-28 03:28:39,235 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:28:39,238 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-28 03:28:39,239 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:28:39,241 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,268 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:39,269 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-28 03:28:39,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:39,282 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-28 03:28:39,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-28 03:28:39,285 INFO L87 Difference]: Start difference. First operand has 20 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:39,357 INFO L93 Difference]: Finished difference Result 31 states and 35 transitions. [2022-04-28 03:28:39,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-28 03:28:39,357 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-28 03:28:39,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:28:39,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-28 03:28:39,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-28 03:28:39,376 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 35 transitions. [2022-04-28 03:28:39,422 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:39,427 INFO L225 Difference]: With dead ends: 31 [2022-04-28 03:28:39,427 INFO L226 Difference]: Without dead ends: 14 [2022-04-28 03:28:39,429 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-28 03:28:39,431 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 12 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:28:39,432 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 23 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 03:28:39,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-04-28 03:28:39,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2022-04-28 03:28:39,449 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:28:39,449 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,449 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,450 INFO L87 Difference]: Start difference. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:39,453 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2022-04-28 03:28:39,454 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-28 03:28:39,454 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:28:39,454 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:28:39,454 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-28 03:28:39,454 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-28 03:28:39,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:39,456 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2022-04-28 03:28:39,456 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-28 03:28:39,456 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:28:39,456 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:28:39,456 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:28:39,456 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:28:39,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2022-04-28 03:28:39,458 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 11 [2022-04-28 03:28:39,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:28:39,458 INFO L495 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-04-28 03:28:39,459 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,459 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 15 transitions. [2022-04-28 03:28:39,477 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:39,477 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-28 03:28:39,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-28 03:28:39,478 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:28:39,478 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:28:39,478 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-28 03:28:39,478 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:28:39,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:28:39,481 INFO L85 PathProgramCache]: Analyzing trace with hash 1315918275, now seen corresponding path program 1 times [2022-04-28 03:28:39,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:39,482 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1190959610] [2022-04-28 03:28:39,483 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:28:39,483 INFO L85 PathProgramCache]: Analyzing trace with hash 1315918275, now seen corresponding path program 2 times [2022-04-28 03:28:39,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:28:39,483 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434643651] [2022-04-28 03:28:39,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:28:39,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:28:39,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:39,541 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:28:39,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:39,568 INFO L290 TraceCheckUtils]: 0: Hoare triple {155#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {149#true} is VALID [2022-04-28 03:28:39,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {149#true} assume true; {149#true} is VALID [2022-04-28 03:28:39,568 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {149#true} {149#true} #41#return; {149#true} is VALID [2022-04-28 03:28:39,569 INFO L272 TraceCheckUtils]: 0: Hoare triple {149#true} call ULTIMATE.init(); {155#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:28:39,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {155#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {149#true} is VALID [2022-04-28 03:28:39,569 INFO L290 TraceCheckUtils]: 2: Hoare triple {149#true} assume true; {149#true} is VALID [2022-04-28 03:28:39,570 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {149#true} {149#true} #41#return; {149#true} is VALID [2022-04-28 03:28:39,570 INFO L272 TraceCheckUtils]: 4: Hoare triple {149#true} call #t~ret7 := main(); {149#true} is VALID [2022-04-28 03:28:39,570 INFO L290 TraceCheckUtils]: 5: Hoare triple {149#true} ~x~0 := 0;~y~0 := 0; {154#(= main_~x~0 0)} is VALID [2022-04-28 03:28:39,571 INFO L290 TraceCheckUtils]: 6: Hoare triple {154#(= main_~x~0 0)} assume !(~x~0 % 4294967296 < 1000000); {150#false} is VALID [2022-04-28 03:28:39,571 INFO L272 TraceCheckUtils]: 7: Hoare triple {150#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {150#false} is VALID [2022-04-28 03:28:39,571 INFO L290 TraceCheckUtils]: 8: Hoare triple {150#false} ~cond := #in~cond; {150#false} is VALID [2022-04-28 03:28:39,571 INFO L290 TraceCheckUtils]: 9: Hoare triple {150#false} assume 0 == ~cond; {150#false} is VALID [2022-04-28 03:28:39,571 INFO L290 TraceCheckUtils]: 10: Hoare triple {150#false} assume !false; {150#false} is VALID [2022-04-28 03:28:39,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 03:28:39,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:28:39,572 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434643651] [2022-04-28 03:28:39,572 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1434643651] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:28:39,572 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:28:39,572 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 03:28:39,573 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:28:39,573 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1190959610] [2022-04-28 03:28:39,573 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1190959610] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:28:39,573 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:28:39,573 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 03:28:39,573 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672028477] [2022-04-28 03:28:39,573 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:28:39,574 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-28 03:28:39,574 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:28:39,574 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,585 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:39,585 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 03:28:39,585 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:39,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 03:28:39,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 03:28:39,586 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:39,649 INFO L93 Difference]: Finished difference Result 25 states and 29 transitions. [2022-04-28 03:28:39,649 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 03:28:39,649 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-28 03:28:39,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:28:39,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 29 transitions. [2022-04-28 03:28:39,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 29 transitions. [2022-04-28 03:28:39,652 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 29 transitions. [2022-04-28 03:28:39,677 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:39,678 INFO L225 Difference]: With dead ends: 25 [2022-04-28 03:28:39,678 INFO L226 Difference]: Without dead ends: 17 [2022-04-28 03:28:39,679 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 03:28:39,680 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 13 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:28:39,681 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 19 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 03:28:39,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-28 03:28:39,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 16. [2022-04-28 03:28:39,685 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:28:39,685 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,685 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,686 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:39,687 INFO L93 Difference]: Finished difference Result 17 states and 18 transitions. [2022-04-28 03:28:39,687 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 18 transitions. [2022-04-28 03:28:39,687 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:28:39,687 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:28:39,687 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-28 03:28:39,688 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-28 03:28:39,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:39,689 INFO L93 Difference]: Finished difference Result 17 states and 18 transitions. [2022-04-28 03:28:39,689 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 18 transitions. [2022-04-28 03:28:39,689 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:28:39,689 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:28:39,689 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:28:39,689 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:28:39,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 11 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2022-04-28 03:28:39,690 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 11 [2022-04-28 03:28:39,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:28:39,691 INFO L495 AbstractCegarLoop]: Abstraction has 16 states and 17 transitions. [2022-04-28 03:28:39,691 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:39,691 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 17 transitions. [2022-04-28 03:28:39,705 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:39,706 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2022-04-28 03:28:39,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-28 03:28:39,706 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:28:39,706 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:28:39,706 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-28 03:28:39,706 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:28:39,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:28:39,707 INFO L85 PathProgramCache]: Analyzing trace with hash 644646283, now seen corresponding path program 1 times [2022-04-28 03:28:39,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:39,707 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1974633436] [2022-04-28 03:28:44,668 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:28:44,864 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:28:44,866 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:28:44,869 INFO L85 PathProgramCache]: Analyzing trace with hash -1209153456, now seen corresponding path program 1 times [2022-04-28 03:28:44,869 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:28:44,870 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400036162] [2022-04-28 03:28:44,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:28:44,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:28:44,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:45,029 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:28:45,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:45,049 INFO L290 TraceCheckUtils]: 0: Hoare triple {283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {276#true} is VALID [2022-04-28 03:28:45,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {276#true} assume true; {276#true} is VALID [2022-04-28 03:28:45,050 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {276#true} {276#true} #41#return; {276#true} is VALID [2022-04-28 03:28:45,051 INFO L272 TraceCheckUtils]: 0: Hoare triple {276#true} call ULTIMATE.init(); {283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:28:45,051 INFO L290 TraceCheckUtils]: 1: Hoare triple {283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {276#true} is VALID [2022-04-28 03:28:45,051 INFO L290 TraceCheckUtils]: 2: Hoare triple {276#true} assume true; {276#true} is VALID [2022-04-28 03:28:45,051 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {276#true} {276#true} #41#return; {276#true} is VALID [2022-04-28 03:28:45,052 INFO L272 TraceCheckUtils]: 4: Hoare triple {276#true} call #t~ret7 := main(); {276#true} is VALID [2022-04-28 03:28:45,052 INFO L290 TraceCheckUtils]: 5: Hoare triple {276#true} ~x~0 := 0;~y~0 := 0; {281#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:28:45,054 INFO L290 TraceCheckUtils]: 6: Hoare triple {281#(and (= main_~x~0 0) (= main_~y~0 0))} [47] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_4| |v_main_#t~post6_3|)) (.cse1 (= v_main_~x~0_9 v_main_~x~0_8)) (.cse2 (= v_main_~y~0_9 v_main_~y~0_8)) (.cse4 (mod v_main_~x~0_9 4294967296)) (.cse3 (= |v_main_#t~post4_4| |v_main_#t~post4_3|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= (div (+ (* (- 1) v_main_~y~0_8) v_main_~y~0_9 (* (- 1) v_main_~x~0_9) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_9 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_9 v_main_~y~0_8) (= (+ v_main_~x~0_8 v_main_~y~0_9) (+ v_main_~x~0_9 v_main_~y~0_8)) (< .cse4 500000)) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_4|, main_~y~0=v_main_~y~0_9, main_~x~0=v_main_~x~0_9, main_#t~post6=|v_main_#t~post6_4|} OutVars{main_#t~post4=|v_main_#t~post4_3|, main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_8, main_#t~post6=|v_main_#t~post6_3|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {282#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:28:45,056 INFO L290 TraceCheckUtils]: 7: Hoare triple {282#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [46] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {277#false} is VALID [2022-04-28 03:28:45,056 INFO L272 TraceCheckUtils]: 8: Hoare triple {277#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {277#false} is VALID [2022-04-28 03:28:45,057 INFO L290 TraceCheckUtils]: 9: Hoare triple {277#false} ~cond := #in~cond; {277#false} is VALID [2022-04-28 03:28:45,057 INFO L290 TraceCheckUtils]: 10: Hoare triple {277#false} assume 0 == ~cond; {277#false} is VALID [2022-04-28 03:28:45,057 INFO L290 TraceCheckUtils]: 11: Hoare triple {277#false} assume !false; {277#false} is VALID [2022-04-28 03:28:45,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 03:28:45,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:28:45,058 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [400036162] [2022-04-28 03:28:45,058 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [400036162] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:28:45,058 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:28:45,058 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 03:28:45,201 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:28:45,201 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1974633436] [2022-04-28 03:28:45,201 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1974633436] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:28:45,201 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:28:45,201 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-28 03:28:45,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462386920] [2022-04-28 03:28:45,201 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:28:45,202 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-28 03:28:45,202 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:28:45,202 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,216 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:45,216 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-28 03:28:45,216 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:45,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-28 03:28:45,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2022-04-28 03:28:45,217 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:45,425 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-28 03:28:45,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-28 03:28:45,425 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-28 03:28:45,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:28:45,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-28 03:28:45,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-28 03:28:45,428 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 26 transitions. [2022-04-28 03:28:45,453 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:45,454 INFO L225 Difference]: With dead ends: 24 [2022-04-28 03:28:45,454 INFO L226 Difference]: Without dead ends: 19 [2022-04-28 03:28:45,455 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2022-04-28 03:28:45,455 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 11 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:28:45,456 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 28 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 03:28:45,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2022-04-28 03:28:45,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-04-28 03:28:45,467 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:28:45,467 INFO L82 GeneralOperation]: Start isEquivalent. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,467 INFO L74 IsIncluded]: Start isIncluded. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,467 INFO L87 Difference]: Start difference. First operand 19 states. Second operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:45,468 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2022-04-28 03:28:45,469 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2022-04-28 03:28:45,469 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:28:45,469 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:28:45,469 INFO L74 IsIncluded]: Start isIncluded. First operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19 states. [2022-04-28 03:28:45,469 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19 states. [2022-04-28 03:28:45,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:45,470 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2022-04-28 03:28:45,470 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2022-04-28 03:28:45,471 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:28:45,471 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:28:45,471 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:28:45,471 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:28:45,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2022-04-28 03:28:45,472 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 21 transitions. Word has length 14 [2022-04-28 03:28:45,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:28:45,472 INFO L495 AbstractCegarLoop]: Abstraction has 19 states and 21 transitions. [2022-04-28 03:28:45,472 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:45,472 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 21 transitions. [2022-04-28 03:28:45,495 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:45,495 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 21 transitions. [2022-04-28 03:28:45,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-28 03:28:45,495 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:28:45,496 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:28:45,496 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-28 03:28:45,496 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:28:45,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:28:45,496 INFO L85 PathProgramCache]: Analyzing trace with hash 1923470149, now seen corresponding path program 1 times [2022-04-28 03:28:45,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:45,497 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1974129087] [2022-04-28 03:28:49,904 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:28:50,159 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:28:50,839 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:28:50,841 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:28:50,844 INFO L85 PathProgramCache]: Analyzing trace with hash 603671471, now seen corresponding path program 1 times [2022-04-28 03:28:50,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:28:50,845 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274523103] [2022-04-28 03:28:50,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:28:50,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:28:50,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:50,991 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:28:50,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:50,998 INFO L290 TraceCheckUtils]: 0: Hoare triple {426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {419#true} is VALID [2022-04-28 03:28:50,998 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#true} assume true; {419#true} is VALID [2022-04-28 03:28:50,998 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {419#true} {419#true} #41#return; {419#true} is VALID [2022-04-28 03:28:50,999 INFO L272 TraceCheckUtils]: 0: Hoare triple {419#true} call ULTIMATE.init(); {426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:28:50,999 INFO L290 TraceCheckUtils]: 1: Hoare triple {426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {419#true} is VALID [2022-04-28 03:28:51,001 INFO L290 TraceCheckUtils]: 2: Hoare triple {419#true} assume true; {419#true} is VALID [2022-04-28 03:28:51,002 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {419#true} {419#true} #41#return; {419#true} is VALID [2022-04-28 03:28:51,002 INFO L272 TraceCheckUtils]: 4: Hoare triple {419#true} call #t~ret7 := main(); {419#true} is VALID [2022-04-28 03:28:51,003 INFO L290 TraceCheckUtils]: 5: Hoare triple {419#true} ~x~0 := 0;~y~0 := 0; {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:28:51,004 INFO L290 TraceCheckUtils]: 6: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [49] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_16 4294967296))) (let ((.cse0 (= v_main_~x~0_16 v_main_~x~0_15)) (.cse1 (= |v_main_#t~post5_4| |v_main_#t~post5_3|)) (.cse2 (= v_main_~y~0_16 v_main_~y~0_15)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post6_10| |v_main_#t~post6_8|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= |v_main_#t~post6_8| |v_main_#t~post6_10|) .cse2) (and (= (+ v_main_~x~0_15 v_main_~y~0_15) (+ v_main_~x~0_16 v_main_~y~0_16)) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_15)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_16 (- 4294967295)) 4294967296))) (< v_main_~x~0_16 v_main_~x~0_15) .cse3)))) InVars {main_~y~0=v_main_~y~0_16, main_#t~post5=|v_main_#t~post5_4|, main_~x~0=v_main_~x~0_16, main_#t~post6=|v_main_#t~post6_10|} OutVars{main_#t~post5=|v_main_#t~post5_3|, main_~y~0=v_main_~y~0_15, main_~x~0=v_main_~x~0_15, main_#t~post6=|v_main_#t~post6_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:28:51,005 INFO L290 TraceCheckUtils]: 7: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [50] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:28:51,006 INFO L290 TraceCheckUtils]: 8: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [51] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_18 4294967296)) (.cse0 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse1 (= v_main_~y~0_18 v_main_~y~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (= |v_main_#t~post6_9| |v_main_#t~post6_13|) .cse0 .cse1 .cse2 (<= 500000 .cse3)) (and (= (+ v_main_~x~0_17 v_main_~y~0_18) (+ v_main_~x~0_18 v_main_~y~0_17)) (< .cse3 500000) (< v_main_~y~0_18 v_main_~y~0_17) (<= (div (+ (* (- 1) v_main_~x~0_18) v_main_~y~0_18 (* (- 1) v_main_~y~0_17) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_13| |v_main_#t~post6_9|)))) InVars {main_#t~post4=|v_main_#t~post4_9|, main_~y~0=v_main_~y~0_18, main_~x~0=v_main_~x~0_18, main_#t~post6=|v_main_#t~post6_13|} OutVars{main_#t~post4=|v_main_#t~post4_8|, main_~y~0=v_main_~y~0_17, main_~x~0=v_main_~x~0_17, main_#t~post6=|v_main_#t~post6_9|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {425#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:28:51,007 INFO L290 TraceCheckUtils]: 9: Hoare triple {425#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [48] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {420#false} is VALID [2022-04-28 03:28:51,008 INFO L272 TraceCheckUtils]: 10: Hoare triple {420#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {420#false} is VALID [2022-04-28 03:28:51,008 INFO L290 TraceCheckUtils]: 11: Hoare triple {420#false} ~cond := #in~cond; {420#false} is VALID [2022-04-28 03:28:51,008 INFO L290 TraceCheckUtils]: 12: Hoare triple {420#false} assume 0 == ~cond; {420#false} is VALID [2022-04-28 03:28:51,008 INFO L290 TraceCheckUtils]: 13: Hoare triple {420#false} assume !false; {420#false} is VALID [2022-04-28 03:28:51,009 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:28:51,009 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:28:51,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274523103] [2022-04-28 03:28:51,009 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [274523103] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:28:51,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [745429055] [2022-04-28 03:28:51,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:28:51,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:28:51,009 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:28:51,011 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:28:51,015 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-28 03:28:51,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:51,054 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:28:51,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:28:51,087 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:28:51,284 INFO L272 TraceCheckUtils]: 0: Hoare triple {419#true} call ULTIMATE.init(); {419#true} is VALID [2022-04-28 03:28:51,284 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {419#true} is VALID [2022-04-28 03:28:51,285 INFO L290 TraceCheckUtils]: 2: Hoare triple {419#true} assume true; {419#true} is VALID [2022-04-28 03:28:51,285 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {419#true} {419#true} #41#return; {419#true} is VALID [2022-04-28 03:28:51,285 INFO L272 TraceCheckUtils]: 4: Hoare triple {419#true} call #t~ret7 := main(); {419#true} is VALID [2022-04-28 03:28:51,285 INFO L290 TraceCheckUtils]: 5: Hoare triple {419#true} ~x~0 := 0;~y~0 := 0; {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:28:51,286 INFO L290 TraceCheckUtils]: 6: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [49] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_16 4294967296))) (let ((.cse0 (= v_main_~x~0_16 v_main_~x~0_15)) (.cse1 (= |v_main_#t~post5_4| |v_main_#t~post5_3|)) (.cse2 (= v_main_~y~0_16 v_main_~y~0_15)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post6_10| |v_main_#t~post6_8|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= |v_main_#t~post6_8| |v_main_#t~post6_10|) .cse2) (and (= (+ v_main_~x~0_15 v_main_~y~0_15) (+ v_main_~x~0_16 v_main_~y~0_16)) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_15)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_16 (- 4294967295)) 4294967296))) (< v_main_~x~0_16 v_main_~x~0_15) .cse3)))) InVars {main_~y~0=v_main_~y~0_16, main_#t~post5=|v_main_#t~post5_4|, main_~x~0=v_main_~x~0_16, main_#t~post6=|v_main_#t~post6_10|} OutVars{main_#t~post5=|v_main_#t~post5_3|, main_~y~0=v_main_~y~0_15, main_~x~0=v_main_~x~0_15, main_#t~post6=|v_main_#t~post6_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:28:51,287 INFO L290 TraceCheckUtils]: 7: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [50] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:28:51,287 INFO L290 TraceCheckUtils]: 8: Hoare triple {424#(and (= main_~x~0 0) (= main_~y~0 0))} [51] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_18 4294967296)) (.cse0 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse1 (= v_main_~y~0_18 v_main_~y~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (= |v_main_#t~post6_9| |v_main_#t~post6_13|) .cse0 .cse1 .cse2 (<= 500000 .cse3)) (and (= (+ v_main_~x~0_17 v_main_~y~0_18) (+ v_main_~x~0_18 v_main_~y~0_17)) (< .cse3 500000) (< v_main_~y~0_18 v_main_~y~0_17) (<= (div (+ (* (- 1) v_main_~x~0_18) v_main_~y~0_18 (* (- 1) v_main_~y~0_17) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_13| |v_main_#t~post6_9|)))) InVars {main_#t~post4=|v_main_#t~post4_9|, main_~y~0=v_main_~y~0_18, main_~x~0=v_main_~x~0_18, main_#t~post6=|v_main_#t~post6_13|} OutVars{main_#t~post4=|v_main_#t~post4_8|, main_~y~0=v_main_~y~0_17, main_~x~0=v_main_~x~0_17, main_#t~post6=|v_main_#t~post6_9|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {454#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:28:51,288 INFO L290 TraceCheckUtils]: 9: Hoare triple {454#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [48] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {420#false} is VALID [2022-04-28 03:28:51,289 INFO L272 TraceCheckUtils]: 10: Hoare triple {420#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {420#false} is VALID [2022-04-28 03:28:51,289 INFO L290 TraceCheckUtils]: 11: Hoare triple {420#false} ~cond := #in~cond; {420#false} is VALID [2022-04-28 03:28:51,289 INFO L290 TraceCheckUtils]: 12: Hoare triple {420#false} assume 0 == ~cond; {420#false} is VALID [2022-04-28 03:28:51,289 INFO L290 TraceCheckUtils]: 13: Hoare triple {420#false} assume !false; {420#false} is VALID [2022-04-28 03:28:51,289 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:28:51,289 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:28:52,292 INFO L290 TraceCheckUtils]: 13: Hoare triple {420#false} assume !false; {420#false} is VALID [2022-04-28 03:28:52,293 INFO L290 TraceCheckUtils]: 12: Hoare triple {473#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {420#false} is VALID [2022-04-28 03:28:52,294 INFO L290 TraceCheckUtils]: 11: Hoare triple {477#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {473#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:28:52,294 INFO L272 TraceCheckUtils]: 10: Hoare triple {481#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {477#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:28:52,295 INFO L290 TraceCheckUtils]: 9: Hoare triple {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [48] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {481#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:28:52,380 INFO L290 TraceCheckUtils]: 8: Hoare triple {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [51] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_18 4294967296)) (.cse0 (= v_main_~x~0_18 v_main_~x~0_17)) (.cse1 (= v_main_~y~0_18 v_main_~y~0_17)) (.cse2 (= |v_main_#t~post4_9| |v_main_#t~post4_8|))) (or (and (= |v_main_#t~post6_9| |v_main_#t~post6_13|) .cse0 .cse1 .cse2 (<= 500000 .cse3)) (and (= (+ v_main_~x~0_17 v_main_~y~0_18) (+ v_main_~x~0_18 v_main_~y~0_17)) (< .cse3 500000) (< v_main_~y~0_18 v_main_~y~0_17) (<= (div (+ (* (- 1) v_main_~x~0_18) v_main_~y~0_18 (* (- 1) v_main_~y~0_17) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_18 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_13| |v_main_#t~post6_9|)))) InVars {main_#t~post4=|v_main_#t~post4_9|, main_~y~0=v_main_~y~0_18, main_~x~0=v_main_~x~0_18, main_#t~post6=|v_main_#t~post6_13|} OutVars{main_#t~post4=|v_main_#t~post4_8|, main_~y~0=v_main_~y~0_17, main_~x~0=v_main_~x~0_17, main_#t~post6=|v_main_#t~post6_9|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:28:52,381 INFO L290 TraceCheckUtils]: 7: Hoare triple {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [50] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:28:52,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {495#(and (or (forall ((aux_div_v_main_~y~0_28_31 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_28_31 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_28_31 4294967296) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [49] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_16 4294967296))) (let ((.cse0 (= v_main_~x~0_16 v_main_~x~0_15)) (.cse1 (= |v_main_#t~post5_4| |v_main_#t~post5_3|)) (.cse2 (= v_main_~y~0_16 v_main_~y~0_15)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post6_10| |v_main_#t~post6_8|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= |v_main_#t~post6_8| |v_main_#t~post6_10|) .cse2) (and (= (+ v_main_~x~0_15 v_main_~y~0_15) (+ v_main_~x~0_16 v_main_~y~0_16)) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_15)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_16 (- 4294967295)) 4294967296))) (< v_main_~x~0_16 v_main_~x~0_15) .cse3)))) InVars {main_~y~0=v_main_~y~0_16, main_#t~post5=|v_main_#t~post5_4|, main_~x~0=v_main_~x~0_16, main_#t~post6=|v_main_#t~post6_10|} OutVars{main_#t~post5=|v_main_#t~post5_3|, main_~y~0=v_main_~y~0_15, main_~x~0=v_main_~x~0_15, main_#t~post6=|v_main_#t~post6_8|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {485#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:28:52,392 INFO L290 TraceCheckUtils]: 5: Hoare triple {419#true} ~x~0 := 0;~y~0 := 0; {495#(and (or (forall ((aux_div_v_main_~y~0_28_31 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_28_31 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_28_31 4294967296) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:28:52,392 INFO L272 TraceCheckUtils]: 4: Hoare triple {419#true} call #t~ret7 := main(); {419#true} is VALID [2022-04-28 03:28:52,392 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {419#true} {419#true} #41#return; {419#true} is VALID [2022-04-28 03:28:52,392 INFO L290 TraceCheckUtils]: 2: Hoare triple {419#true} assume true; {419#true} is VALID [2022-04-28 03:28:52,392 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {419#true} is VALID [2022-04-28 03:28:52,393 INFO L272 TraceCheckUtils]: 0: Hoare triple {419#true} call ULTIMATE.init(); {419#true} is VALID [2022-04-28 03:28:52,393 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:28:52,393 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [745429055] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:28:52,393 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:28:52,393 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-28 03:28:52,571 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:28:52,572 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1974129087] [2022-04-28 03:28:52,572 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1974129087] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:28:52,572 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:28:52,572 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-28 03:28:52,572 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1773069584] [2022-04-28 03:28:52,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:28:52,572 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-28 03:28:52,573 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:28:52,573 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,589 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:52,590 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-28 03:28:52,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:52,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-28 03:28:52,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-28 03:28:52,590 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:52,739 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2022-04-28 03:28:52,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-28 03:28:52,739 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-28 03:28:52,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:28:52,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 30 transitions. [2022-04-28 03:28:52,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 30 transitions. [2022-04-28 03:28:52,742 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 30 transitions. [2022-04-28 03:28:52,764 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:52,765 INFO L225 Difference]: With dead ends: 30 [2022-04-28 03:28:52,765 INFO L226 Difference]: Without dead ends: 22 [2022-04-28 03:28:52,765 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 [2022-04-28 03:28:52,766 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 11 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:28:52,766 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 29 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 03:28:52,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-28 03:28:52,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-28 03:28:52,780 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:28:52,780 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,780 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,780 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:52,781 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-28 03:28:52,781 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-28 03:28:52,782 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:28:52,782 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:28:52,782 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-28 03:28:52,782 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-28 03:28:52,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:28:52,783 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-28 03:28:52,783 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-28 03:28:52,783 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:28:52,783 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:28:52,783 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:28:52,783 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:28:52,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2022-04-28 03:28:52,784 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 17 [2022-04-28 03:28:52,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:28:52,785 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2022-04-28 03:28:52,785 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:28:52,785 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 24 transitions. [2022-04-28 03:28:52,808 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:28:52,808 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-28 03:28:52,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-28 03:28:52,809 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:28:52,809 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:28:52,826 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-28 03:28:53,009 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:28:53,010 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:28:53,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:28:53,010 INFO L85 PathProgramCache]: Analyzing trace with hash -896593651, now seen corresponding path program 2 times [2022-04-28 03:28:53,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:28:53,010 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [528726561] [2022-04-28 03:28:56,727 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:28:56,982 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:01,293 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:29:01,447 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:01,448 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:01,451 INFO L85 PathProgramCache]: Analyzing trace with hash -1641763665, now seen corresponding path program 1 times [2022-04-28 03:29:01,451 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:01,451 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394288807] [2022-04-28 03:29:01,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:01,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:01,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:01,509 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:01,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:01,514 INFO L290 TraceCheckUtils]: 0: Hoare triple {679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {672#true} is VALID [2022-04-28 03:29:01,514 INFO L290 TraceCheckUtils]: 1: Hoare triple {672#true} assume true; {672#true} is VALID [2022-04-28 03:29:01,514 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {672#true} {672#true} #41#return; {672#true} is VALID [2022-04-28 03:29:01,514 INFO L272 TraceCheckUtils]: 0: Hoare triple {672#true} call ULTIMATE.init(); {679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:01,514 INFO L290 TraceCheckUtils]: 1: Hoare triple {679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {672#true} is VALID [2022-04-28 03:29:01,515 INFO L290 TraceCheckUtils]: 2: Hoare triple {672#true} assume true; {672#true} is VALID [2022-04-28 03:29:01,515 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {672#true} {672#true} #41#return; {672#true} is VALID [2022-04-28 03:29:01,515 INFO L272 TraceCheckUtils]: 4: Hoare triple {672#true} call #t~ret7 := main(); {672#true} is VALID [2022-04-28 03:29:01,515 INFO L290 TraceCheckUtils]: 5: Hoare triple {672#true} ~x~0 := 0;~y~0 := 0; {677#(= main_~x~0 0)} is VALID [2022-04-28 03:29:01,516 INFO L290 TraceCheckUtils]: 6: Hoare triple {677#(= main_~x~0 0)} [53] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_34 4294967296))) (let ((.cse2 (= v_main_~x~0_34 v_main_~x~0_33)) (.cse3 (= |v_main_#t~post5_11| |v_main_#t~post5_10|)) (.cse4 (= |v_main_#t~post6_24| |v_main_#t~post6_22|)) (.cse5 (= v_main_~y~0_35 v_main_~y~0_34)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_33 v_main_~y~0_34) (+ v_main_~x~0_34 v_main_~y~0_35)) .cse0 (<= (div (+ v_main_~y~0_34 (* (- 1) v_main_~x~0_34) 1000000 (* (- 1) v_main_~y~0_35)) (- 4294967296)) (+ (div (+ v_main_~x~0_34 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_34 v_main_~y~0_35) .cse1) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse0) (not .cse1)))))) InVars {main_~y~0=v_main_~y~0_35, main_#t~post5=|v_main_#t~post5_11|, main_~x~0=v_main_~x~0_34, main_#t~post6=|v_main_#t~post6_24|} OutVars{main_#t~post5=|v_main_#t~post5_10|, main_~y~0=v_main_~y~0_34, main_~x~0=v_main_~x~0_33, main_#t~post6=|v_main_#t~post6_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {677#(= main_~x~0 0)} is VALID [2022-04-28 03:29:01,516 INFO L290 TraceCheckUtils]: 7: Hoare triple {677#(= main_~x~0 0)} [54] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {677#(= main_~x~0 0)} is VALID [2022-04-28 03:29:01,517 INFO L290 TraceCheckUtils]: 8: Hoare triple {677#(= main_~x~0 0)} [55] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_36 4294967296)) (.cse0 (= |v_main_#t~post6_27| |v_main_#t~post6_23|)) (.cse1 (= v_main_~y~0_37 v_main_~y~0_36)) (.cse2 (= |v_main_#t~post4_16| |v_main_#t~post4_15|)) (.cse3 (= v_main_~x~0_36 v_main_~x~0_35))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_36 v_main_~x~0_35) (= (+ v_main_~x~0_35 v_main_~y~0_37) (+ v_main_~x~0_36 v_main_~y~0_36)) (<= (div (+ (* (- 1) v_main_~x~0_35) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_36 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_16|, main_~y~0=v_main_~y~0_37, main_~x~0=v_main_~x~0_36, main_#t~post6=|v_main_#t~post6_27|} OutVars{main_#t~post4=|v_main_#t~post4_15|, main_~y~0=v_main_~y~0_36, main_~x~0=v_main_~x~0_35, main_#t~post6=|v_main_#t~post6_23|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {678#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:29:01,518 INFO L290 TraceCheckUtils]: 9: Hoare triple {678#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [52] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {673#false} is VALID [2022-04-28 03:29:01,518 INFO L272 TraceCheckUtils]: 10: Hoare triple {673#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {673#false} is VALID [2022-04-28 03:29:01,518 INFO L290 TraceCheckUtils]: 11: Hoare triple {673#false} ~cond := #in~cond; {673#false} is VALID [2022-04-28 03:29:01,518 INFO L290 TraceCheckUtils]: 12: Hoare triple {673#false} assume 0 == ~cond; {673#false} is VALID [2022-04-28 03:29:01,518 INFO L290 TraceCheckUtils]: 13: Hoare triple {673#false} assume !false; {673#false} is VALID [2022-04-28 03:29:01,518 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:01,518 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:01,520 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394288807] [2022-04-28 03:29:01,520 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [394288807] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:01,520 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [591267173] [2022-04-28 03:29:01,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:01,520 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:01,520 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:01,532 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:01,554 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-28 03:29:01,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:01,593 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:01,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:01,603 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:01,785 INFO L272 TraceCheckUtils]: 0: Hoare triple {672#true} call ULTIMATE.init(); {672#true} is VALID [2022-04-28 03:29:01,785 INFO L290 TraceCheckUtils]: 1: Hoare triple {672#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {672#true} is VALID [2022-04-28 03:29:01,786 INFO L290 TraceCheckUtils]: 2: Hoare triple {672#true} assume true; {672#true} is VALID [2022-04-28 03:29:01,786 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {672#true} {672#true} #41#return; {672#true} is VALID [2022-04-28 03:29:01,786 INFO L272 TraceCheckUtils]: 4: Hoare triple {672#true} call #t~ret7 := main(); {672#true} is VALID [2022-04-28 03:29:01,786 INFO L290 TraceCheckUtils]: 5: Hoare triple {672#true} ~x~0 := 0;~y~0 := 0; {698#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:01,787 INFO L290 TraceCheckUtils]: 6: Hoare triple {698#(and (= main_~x~0 0) (= main_~y~0 0))} [53] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_34 4294967296))) (let ((.cse2 (= v_main_~x~0_34 v_main_~x~0_33)) (.cse3 (= |v_main_#t~post5_11| |v_main_#t~post5_10|)) (.cse4 (= |v_main_#t~post6_24| |v_main_#t~post6_22|)) (.cse5 (= v_main_~y~0_35 v_main_~y~0_34)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_33 v_main_~y~0_34) (+ v_main_~x~0_34 v_main_~y~0_35)) .cse0 (<= (div (+ v_main_~y~0_34 (* (- 1) v_main_~x~0_34) 1000000 (* (- 1) v_main_~y~0_35)) (- 4294967296)) (+ (div (+ v_main_~x~0_34 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_34 v_main_~y~0_35) .cse1) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse0) (not .cse1)))))) InVars {main_~y~0=v_main_~y~0_35, main_#t~post5=|v_main_#t~post5_11|, main_~x~0=v_main_~x~0_34, main_#t~post6=|v_main_#t~post6_24|} OutVars{main_#t~post5=|v_main_#t~post5_10|, main_~y~0=v_main_~y~0_34, main_~x~0=v_main_~x~0_33, main_#t~post6=|v_main_#t~post6_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {698#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:01,787 INFO L290 TraceCheckUtils]: 7: Hoare triple {698#(and (= main_~x~0 0) (= main_~y~0 0))} [54] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {698#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:01,788 INFO L290 TraceCheckUtils]: 8: Hoare triple {698#(and (= main_~x~0 0) (= main_~y~0 0))} [55] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_36 4294967296)) (.cse0 (= |v_main_#t~post6_27| |v_main_#t~post6_23|)) (.cse1 (= v_main_~y~0_37 v_main_~y~0_36)) (.cse2 (= |v_main_#t~post4_16| |v_main_#t~post4_15|)) (.cse3 (= v_main_~x~0_36 v_main_~x~0_35))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_36 v_main_~x~0_35) (= (+ v_main_~x~0_35 v_main_~y~0_37) (+ v_main_~x~0_36 v_main_~y~0_36)) (<= (div (+ (* (- 1) v_main_~x~0_35) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_36 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_16|, main_~y~0=v_main_~y~0_37, main_~x~0=v_main_~x~0_36, main_#t~post6=|v_main_#t~post6_27|} OutVars{main_#t~post4=|v_main_#t~post4_15|, main_~y~0=v_main_~y~0_36, main_~x~0=v_main_~x~0_35, main_#t~post6=|v_main_#t~post6_23|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {708#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:29:01,789 INFO L290 TraceCheckUtils]: 9: Hoare triple {708#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [52] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {673#false} is VALID [2022-04-28 03:29:01,789 INFO L272 TraceCheckUtils]: 10: Hoare triple {673#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {673#false} is VALID [2022-04-28 03:29:01,789 INFO L290 TraceCheckUtils]: 11: Hoare triple {673#false} ~cond := #in~cond; {673#false} is VALID [2022-04-28 03:29:01,790 INFO L290 TraceCheckUtils]: 12: Hoare triple {673#false} assume 0 == ~cond; {673#false} is VALID [2022-04-28 03:29:01,790 INFO L290 TraceCheckUtils]: 13: Hoare triple {673#false} assume !false; {673#false} is VALID [2022-04-28 03:29:01,790 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:01,790 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:02,659 INFO L290 TraceCheckUtils]: 13: Hoare triple {673#false} assume !false; {673#false} is VALID [2022-04-28 03:29:02,669 INFO L290 TraceCheckUtils]: 12: Hoare triple {727#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {673#false} is VALID [2022-04-28 03:29:02,669 INFO L290 TraceCheckUtils]: 11: Hoare triple {731#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {727#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:02,672 INFO L272 TraceCheckUtils]: 10: Hoare triple {735#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {731#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:02,673 INFO L290 TraceCheckUtils]: 9: Hoare triple {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [52] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {735#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:02,677 INFO L290 TraceCheckUtils]: 8: Hoare triple {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [55] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_36 4294967296)) (.cse0 (= |v_main_#t~post6_27| |v_main_#t~post6_23|)) (.cse1 (= v_main_~y~0_37 v_main_~y~0_36)) (.cse2 (= |v_main_#t~post4_16| |v_main_#t~post4_15|)) (.cse3 (= v_main_~x~0_36 v_main_~x~0_35))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_36 v_main_~x~0_35) (= (+ v_main_~x~0_35 v_main_~y~0_37) (+ v_main_~x~0_36 v_main_~y~0_36)) (<= (div (+ (* (- 1) v_main_~x~0_35) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_36 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_16|, main_~y~0=v_main_~y~0_37, main_~x~0=v_main_~x~0_36, main_#t~post6=|v_main_#t~post6_27|} OutVars{main_#t~post4=|v_main_#t~post4_15|, main_~y~0=v_main_~y~0_36, main_~x~0=v_main_~x~0_35, main_#t~post6=|v_main_#t~post6_23|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:02,677 INFO L290 TraceCheckUtils]: 7: Hoare triple {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [54] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:02,686 INFO L290 TraceCheckUtils]: 6: Hoare triple {749#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_47_31 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_47_31 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_47_31 4294967296) main_~y~0))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [53] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_34 4294967296))) (let ((.cse2 (= v_main_~x~0_34 v_main_~x~0_33)) (.cse3 (= |v_main_#t~post5_11| |v_main_#t~post5_10|)) (.cse4 (= |v_main_#t~post6_24| |v_main_#t~post6_22|)) (.cse5 (= v_main_~y~0_35 v_main_~y~0_34)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_33 v_main_~y~0_34) (+ v_main_~x~0_34 v_main_~y~0_35)) .cse0 (<= (div (+ v_main_~y~0_34 (* (- 1) v_main_~x~0_34) 1000000 (* (- 1) v_main_~y~0_35)) (- 4294967296)) (+ (div (+ v_main_~x~0_34 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_34 v_main_~y~0_35) .cse1) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse0) (not .cse1)))))) InVars {main_~y~0=v_main_~y~0_35, main_#t~post5=|v_main_#t~post5_11|, main_~x~0=v_main_~x~0_34, main_#t~post6=|v_main_#t~post6_24|} OutVars{main_#t~post5=|v_main_#t~post5_10|, main_~y~0=v_main_~y~0_34, main_~x~0=v_main_~x~0_33, main_#t~post6=|v_main_#t~post6_22|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {739#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:02,687 INFO L290 TraceCheckUtils]: 5: Hoare triple {672#true} ~x~0 := 0;~y~0 := 0; {749#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_47_31 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_47_31 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_47_31 4294967296) main_~y~0))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:02,687 INFO L272 TraceCheckUtils]: 4: Hoare triple {672#true} call #t~ret7 := main(); {672#true} is VALID [2022-04-28 03:29:02,687 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {672#true} {672#true} #41#return; {672#true} is VALID [2022-04-28 03:29:02,687 INFO L290 TraceCheckUtils]: 2: Hoare triple {672#true} assume true; {672#true} is VALID [2022-04-28 03:29:02,687 INFO L290 TraceCheckUtils]: 1: Hoare triple {672#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {672#true} is VALID [2022-04-28 03:29:02,688 INFO L272 TraceCheckUtils]: 0: Hoare triple {672#true} call ULTIMATE.init(); {672#true} is VALID [2022-04-28 03:29:02,688 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:02,688 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [591267173] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:02,688 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:02,688 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:02,865 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:02,866 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [528726561] [2022-04-28 03:29:02,866 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [528726561] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:02,866 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:02,866 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-28 03:29:02,866 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [618041598] [2022-04-28 03:29:02,866 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:02,866 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-28 03:29:02,867 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:02,867 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:02,881 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:02,881 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-28 03:29:02,881 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:02,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-28 03:29:02,882 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2022-04-28 03:29:02,882 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:03,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:03,023 INFO L93 Difference]: Finished difference Result 34 states and 38 transitions. [2022-04-28 03:29:03,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-28 03:29:03,023 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-28 03:29:03,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:03,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:03,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 34 transitions. [2022-04-28 03:29:03,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:03,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 34 transitions. [2022-04-28 03:29:03,026 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 34 transitions. [2022-04-28 03:29:03,049 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:03,050 INFO L225 Difference]: With dead ends: 34 [2022-04-28 03:29:03,050 INFO L226 Difference]: Without dead ends: 26 [2022-04-28 03:29:03,050 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 28 SyntacticMatches, 8 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=207, Unknown=0, NotChecked=0, Total=272 [2022-04-28 03:29:03,051 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 16 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:03,051 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 29 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 03:29:03,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-28 03:29:03,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2022-04-28 03:29:03,070 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:03,070 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:03,070 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:03,070 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:03,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:03,071 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-28 03:29:03,071 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-28 03:29:03,071 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:03,071 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:03,072 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-28 03:29:03,072 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-28 03:29:03,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:03,073 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-28 03:29:03,073 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-28 03:29:03,073 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:03,073 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:03,073 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:03,073 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:03,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:03,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2022-04-28 03:29:03,074 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 20 [2022-04-28 03:29:03,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:03,074 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2022-04-28 03:29:03,074 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 5 states have internal predecessors, (16), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:03,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 27 transitions. [2022-04-28 03:29:03,101 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:03,101 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-28 03:29:03,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-28 03:29:03,102 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:03,102 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:03,150 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-28 03:29:03,302 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:03,302 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:03,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:03,303 INFO L85 PathProgramCache]: Analyzing trace with hash 438017605, now seen corresponding path program 3 times [2022-04-28 03:29:03,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:03,303 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [136812746] [2022-04-28 03:29:04,145 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:07,537 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:29:07,716 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:07,717 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:07,719 INFO L85 PathProgramCache]: Analyzing trace with hash 407768495, now seen corresponding path program 1 times [2022-04-28 03:29:07,720 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:07,720 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742130495] [2022-04-28 03:29:07,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:07,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:07,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:07,781 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:07,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:07,795 INFO L290 TraceCheckUtils]: 0: Hoare triple {955#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {948#true} is VALID [2022-04-28 03:29:07,795 INFO L290 TraceCheckUtils]: 1: Hoare triple {948#true} assume true; {948#true} is VALID [2022-04-28 03:29:07,796 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {948#true} {948#true} #41#return; {948#true} is VALID [2022-04-28 03:29:07,796 INFO L272 TraceCheckUtils]: 0: Hoare triple {948#true} call ULTIMATE.init(); {955#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:07,796 INFO L290 TraceCheckUtils]: 1: Hoare triple {955#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {948#true} is VALID [2022-04-28 03:29:07,796 INFO L290 TraceCheckUtils]: 2: Hoare triple {948#true} assume true; {948#true} is VALID [2022-04-28 03:29:07,796 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {948#true} {948#true} #41#return; {948#true} is VALID [2022-04-28 03:29:07,796 INFO L272 TraceCheckUtils]: 4: Hoare triple {948#true} call #t~ret7 := main(); {948#true} is VALID [2022-04-28 03:29:07,797 INFO L290 TraceCheckUtils]: 5: Hoare triple {948#true} ~x~0 := 0;~y~0 := 0; {953#(= main_~x~0 0)} is VALID [2022-04-28 03:29:07,797 INFO L290 TraceCheckUtils]: 6: Hoare triple {953#(= main_~x~0 0)} [57] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_53 4294967296))) (let ((.cse0 (= v_main_~x~0_53 v_main_~x~0_52)) (.cse1 (= |v_main_#t~post5_18| |v_main_#t~post5_17|)) (.cse2 (= v_main_~y~0_55 v_main_~y~0_54)) (.cse5 (= |v_main_#t~post6_38| |v_main_#t~post6_36|)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (= (+ v_main_~x~0_53 v_main_~y~0_55) (+ v_main_~x~0_52 v_main_~y~0_54)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_52)) (- 4294967296)) (+ (div (+ v_main_~x~0_53 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_53 v_main_~x~0_52))))) InVars {main_~y~0=v_main_~y~0_55, main_#t~post5=|v_main_#t~post5_18|, main_~x~0=v_main_~x~0_53, main_#t~post6=|v_main_#t~post6_38|} OutVars{main_#t~post5=|v_main_#t~post5_17|, main_~y~0=v_main_~y~0_54, main_~x~0=v_main_~x~0_52, main_#t~post6=|v_main_#t~post6_36|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {953#(= main_~x~0 0)} is VALID [2022-04-28 03:29:07,798 INFO L290 TraceCheckUtils]: 7: Hoare triple {953#(= main_~x~0 0)} [58] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {953#(= main_~x~0 0)} is VALID [2022-04-28 03:29:07,799 INFO L290 TraceCheckUtils]: 8: Hoare triple {953#(= main_~x~0 0)} [59] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse1 (= v_main_~y~0_57 v_main_~y~0_56)) (.cse2 (= v_main_~x~0_55 v_main_~x~0_54)) (.cse3 (= |v_main_#t~post6_41| |v_main_#t~post6_37|)) (.cse4 (mod v_main_~x~0_55 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_54 v_main_~y~0_57) (+ v_main_~x~0_55 v_main_~y~0_56)) (< v_main_~y~0_57 v_main_~y~0_56) (<= (div (+ v_main_~y~0_57 (* (- 1) v_main_~y~0_56) (* (- 1) v_main_~x~0_55) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_55 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_23|, main_~y~0=v_main_~y~0_57, main_~x~0=v_main_~x~0_55, main_#t~post6=|v_main_#t~post6_41|} OutVars{main_#t~post4=|v_main_#t~post4_22|, main_~y~0=v_main_~y~0_56, main_~x~0=v_main_~x~0_54, main_#t~post6=|v_main_#t~post6_37|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {954#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:29:07,799 INFO L290 TraceCheckUtils]: 9: Hoare triple {954#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [56] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {949#false} is VALID [2022-04-28 03:29:07,799 INFO L272 TraceCheckUtils]: 10: Hoare triple {949#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {949#false} is VALID [2022-04-28 03:29:07,799 INFO L290 TraceCheckUtils]: 11: Hoare triple {949#false} ~cond := #in~cond; {949#false} is VALID [2022-04-28 03:29:07,800 INFO L290 TraceCheckUtils]: 12: Hoare triple {949#false} assume 0 == ~cond; {949#false} is VALID [2022-04-28 03:29:07,800 INFO L290 TraceCheckUtils]: 13: Hoare triple {949#false} assume !false; {949#false} is VALID [2022-04-28 03:29:07,800 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:07,800 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:07,800 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742130495] [2022-04-28 03:29:07,800 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1742130495] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:07,800 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [300363776] [2022-04-28 03:29:07,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:07,800 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:07,800 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:07,801 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:07,802 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-28 03:29:07,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:07,835 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:07,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:07,845 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:08,019 INFO L272 TraceCheckUtils]: 0: Hoare triple {948#true} call ULTIMATE.init(); {948#true} is VALID [2022-04-28 03:29:08,019 INFO L290 TraceCheckUtils]: 1: Hoare triple {948#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {948#true} is VALID [2022-04-28 03:29:08,019 INFO L290 TraceCheckUtils]: 2: Hoare triple {948#true} assume true; {948#true} is VALID [2022-04-28 03:29:08,020 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {948#true} {948#true} #41#return; {948#true} is VALID [2022-04-28 03:29:08,020 INFO L272 TraceCheckUtils]: 4: Hoare triple {948#true} call #t~ret7 := main(); {948#true} is VALID [2022-04-28 03:29:08,022 INFO L290 TraceCheckUtils]: 5: Hoare triple {948#true} ~x~0 := 0;~y~0 := 0; {974#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:08,022 INFO L290 TraceCheckUtils]: 6: Hoare triple {974#(and (= main_~x~0 0) (= main_~y~0 0))} [57] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_53 4294967296))) (let ((.cse0 (= v_main_~x~0_53 v_main_~x~0_52)) (.cse1 (= |v_main_#t~post5_18| |v_main_#t~post5_17|)) (.cse2 (= v_main_~y~0_55 v_main_~y~0_54)) (.cse5 (= |v_main_#t~post6_38| |v_main_#t~post6_36|)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (= (+ v_main_~x~0_53 v_main_~y~0_55) (+ v_main_~x~0_52 v_main_~y~0_54)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_52)) (- 4294967296)) (+ (div (+ v_main_~x~0_53 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_53 v_main_~x~0_52))))) InVars {main_~y~0=v_main_~y~0_55, main_#t~post5=|v_main_#t~post5_18|, main_~x~0=v_main_~x~0_53, main_#t~post6=|v_main_#t~post6_38|} OutVars{main_#t~post5=|v_main_#t~post5_17|, main_~y~0=v_main_~y~0_54, main_~x~0=v_main_~x~0_52, main_#t~post6=|v_main_#t~post6_36|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {974#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:08,023 INFO L290 TraceCheckUtils]: 7: Hoare triple {974#(and (= main_~x~0 0) (= main_~y~0 0))} [58] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {974#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:08,024 INFO L290 TraceCheckUtils]: 8: Hoare triple {974#(and (= main_~x~0 0) (= main_~y~0 0))} [59] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse1 (= v_main_~y~0_57 v_main_~y~0_56)) (.cse2 (= v_main_~x~0_55 v_main_~x~0_54)) (.cse3 (= |v_main_#t~post6_41| |v_main_#t~post6_37|)) (.cse4 (mod v_main_~x~0_55 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_54 v_main_~y~0_57) (+ v_main_~x~0_55 v_main_~y~0_56)) (< v_main_~y~0_57 v_main_~y~0_56) (<= (div (+ v_main_~y~0_57 (* (- 1) v_main_~y~0_56) (* (- 1) v_main_~x~0_55) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_55 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_23|, main_~y~0=v_main_~y~0_57, main_~x~0=v_main_~x~0_55, main_#t~post6=|v_main_#t~post6_41|} OutVars{main_#t~post4=|v_main_#t~post4_22|, main_~y~0=v_main_~y~0_56, main_~x~0=v_main_~x~0_54, main_#t~post6=|v_main_#t~post6_37|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {984#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:29:08,025 INFO L290 TraceCheckUtils]: 9: Hoare triple {984#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [56] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {949#false} is VALID [2022-04-28 03:29:08,025 INFO L272 TraceCheckUtils]: 10: Hoare triple {949#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {949#false} is VALID [2022-04-28 03:29:08,025 INFO L290 TraceCheckUtils]: 11: Hoare triple {949#false} ~cond := #in~cond; {949#false} is VALID [2022-04-28 03:29:08,025 INFO L290 TraceCheckUtils]: 12: Hoare triple {949#false} assume 0 == ~cond; {949#false} is VALID [2022-04-28 03:29:08,025 INFO L290 TraceCheckUtils]: 13: Hoare triple {949#false} assume !false; {949#false} is VALID [2022-04-28 03:29:08,026 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:08,026 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:09,056 INFO L290 TraceCheckUtils]: 13: Hoare triple {949#false} assume !false; {949#false} is VALID [2022-04-28 03:29:09,056 INFO L290 TraceCheckUtils]: 12: Hoare triple {1003#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {949#false} is VALID [2022-04-28 03:29:09,056 INFO L290 TraceCheckUtils]: 11: Hoare triple {1007#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {1003#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:09,057 INFO L272 TraceCheckUtils]: 10: Hoare triple {1011#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1007#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:09,057 INFO L290 TraceCheckUtils]: 9: Hoare triple {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [56] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1011#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:09,063 INFO L290 TraceCheckUtils]: 8: Hoare triple {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [59] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_23| |v_main_#t~post4_22|)) (.cse1 (= v_main_~y~0_57 v_main_~y~0_56)) (.cse2 (= v_main_~x~0_55 v_main_~x~0_54)) (.cse3 (= |v_main_#t~post6_41| |v_main_#t~post6_37|)) (.cse4 (mod v_main_~x~0_55 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_54 v_main_~y~0_57) (+ v_main_~x~0_55 v_main_~y~0_56)) (< v_main_~y~0_57 v_main_~y~0_56) (<= (div (+ v_main_~y~0_57 (* (- 1) v_main_~y~0_56) (* (- 1) v_main_~x~0_55) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_55 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_23|, main_~y~0=v_main_~y~0_57, main_~x~0=v_main_~x~0_55, main_#t~post6=|v_main_#t~post6_41|} OutVars{main_#t~post4=|v_main_#t~post4_22|, main_~y~0=v_main_~y~0_56, main_~x~0=v_main_~x~0_54, main_#t~post6=|v_main_#t~post6_37|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:09,064 INFO L290 TraceCheckUtils]: 7: Hoare triple {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [58] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:09,078 INFO L290 TraceCheckUtils]: 6: Hoare triple {1025#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_67_31 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_67_31 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_67_31 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [57] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_53 4294967296))) (let ((.cse0 (= v_main_~x~0_53 v_main_~x~0_52)) (.cse1 (= |v_main_#t~post5_18| |v_main_#t~post5_17|)) (.cse2 (= v_main_~y~0_55 v_main_~y~0_54)) (.cse5 (= |v_main_#t~post6_38| |v_main_#t~post6_36|)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (= (+ v_main_~x~0_53 v_main_~y~0_55) (+ v_main_~x~0_52 v_main_~y~0_54)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_52)) (- 4294967296)) (+ (div (+ v_main_~x~0_53 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_53 v_main_~x~0_52))))) InVars {main_~y~0=v_main_~y~0_55, main_#t~post5=|v_main_#t~post5_18|, main_~x~0=v_main_~x~0_53, main_#t~post6=|v_main_#t~post6_38|} OutVars{main_#t~post5=|v_main_#t~post5_17|, main_~y~0=v_main_~y~0_54, main_~x~0=v_main_~x~0_52, main_#t~post6=|v_main_#t~post6_36|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1015#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:09,079 INFO L290 TraceCheckUtils]: 5: Hoare triple {948#true} ~x~0 := 0;~y~0 := 0; {1025#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_67_31 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_67_31 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_67_31 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:09,079 INFO L272 TraceCheckUtils]: 4: Hoare triple {948#true} call #t~ret7 := main(); {948#true} is VALID [2022-04-28 03:29:09,079 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {948#true} {948#true} #41#return; {948#true} is VALID [2022-04-28 03:29:09,079 INFO L290 TraceCheckUtils]: 2: Hoare triple {948#true} assume true; {948#true} is VALID [2022-04-28 03:29:09,079 INFO L290 TraceCheckUtils]: 1: Hoare triple {948#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {948#true} is VALID [2022-04-28 03:29:09,080 INFO L272 TraceCheckUtils]: 0: Hoare triple {948#true} call ULTIMATE.init(); {948#true} is VALID [2022-04-28 03:29:09,080 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:09,080 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [300363776] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:09,080 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:09,080 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:09,267 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:09,267 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [136812746] [2022-04-28 03:29:09,267 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [136812746] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:09,267 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:09,267 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-04-28 03:29:09,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802876420] [2022-04-28 03:29:09,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:09,267 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-28 03:29:09,268 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:09,268 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,282 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:09,282 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-28 03:29:09,282 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:09,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-28 03:29:09,283 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=161, Unknown=0, NotChecked=0, Total=210 [2022-04-28 03:29:09,283 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:09,443 INFO L93 Difference]: Finished difference Result 37 states and 41 transitions. [2022-04-28 03:29:09,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-28 03:29:09,443 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-28 03:29:09,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:09,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 37 transitions. [2022-04-28 03:29:09,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 37 transitions. [2022-04-28 03:29:09,445 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 37 transitions. [2022-04-28 03:29:09,471 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:09,471 INFO L225 Difference]: With dead ends: 37 [2022-04-28 03:29:09,471 INFO L226 Difference]: Without dead ends: 29 [2022-04-28 03:29:09,472 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 29 SyntacticMatches, 9 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2022-04-28 03:29:09,472 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 18 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:09,472 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 34 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 03:29:09,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-28 03:29:09,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 28. [2022-04-28 03:29:09,493 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:09,493 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,494 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,494 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:09,495 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2022-04-28 03:29:09,495 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2022-04-28 03:29:09,495 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:09,495 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:09,495 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-28 03:29:09,495 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-28 03:29:09,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:09,496 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2022-04-28 03:29:09,496 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2022-04-28 03:29:09,496 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:09,496 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:09,496 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:09,496 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:09,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.1304347826086956) internal successors, (26), 23 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 30 transitions. [2022-04-28 03:29:09,497 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 30 transitions. Word has length 23 [2022-04-28 03:29:09,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:09,497 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 30 transitions. [2022-04-28 03:29:09,497 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.7142857142857144) internal successors, (19), 6 states have internal predecessors, (19), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:09,497 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 30 transitions. [2022-04-28 03:29:09,527 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:09,527 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 30 transitions. [2022-04-28 03:29:09,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-28 03:29:09,527 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:09,527 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:09,545 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-28 03:29:09,728 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:09,728 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:09,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:09,728 INFO L85 PathProgramCache]: Analyzing trace with hash 1329686029, now seen corresponding path program 4 times [2022-04-28 03:29:09,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:09,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1028828575] [2022-04-28 03:29:11,180 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:29:11,793 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:12,124 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:12,125 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:12,128 INFO L85 PathProgramCache]: Analyzing trace with hash -1837666641, now seen corresponding path program 1 times [2022-04-28 03:29:12,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:12,128 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653998525] [2022-04-28 03:29:12,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:12,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:12,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:12,181 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:12,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:12,184 INFO L290 TraceCheckUtils]: 0: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1245#true} is VALID [2022-04-28 03:29:12,184 INFO L290 TraceCheckUtils]: 1: Hoare triple {1245#true} assume true; {1245#true} is VALID [2022-04-28 03:29:12,184 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1245#true} {1245#true} #41#return; {1245#true} is VALID [2022-04-28 03:29:12,185 INFO L272 TraceCheckUtils]: 0: Hoare triple {1245#true} call ULTIMATE.init(); {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:12,185 INFO L290 TraceCheckUtils]: 1: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1245#true} is VALID [2022-04-28 03:29:12,185 INFO L290 TraceCheckUtils]: 2: Hoare triple {1245#true} assume true; {1245#true} is VALID [2022-04-28 03:29:12,185 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1245#true} {1245#true} #41#return; {1245#true} is VALID [2022-04-28 03:29:12,185 INFO L272 TraceCheckUtils]: 4: Hoare triple {1245#true} call #t~ret7 := main(); {1245#true} is VALID [2022-04-28 03:29:12,185 INFO L290 TraceCheckUtils]: 5: Hoare triple {1245#true} ~x~0 := 0;~y~0 := 0; {1250#(= main_~x~0 0)} is VALID [2022-04-28 03:29:12,186 INFO L290 TraceCheckUtils]: 6: Hoare triple {1250#(= main_~x~0 0)} [61] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_73 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post5_25| |v_main_#t~post5_24|)) (.cse1 (= v_main_~x~0_73 v_main_~x~0_72)) (.cse2 (= |v_main_#t~post6_52| |v_main_#t~post6_50|)) (.cse5 (= v_main_~y~0_76 v_main_~y~0_75))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse3 (= (+ v_main_~x~0_72 v_main_~y~0_75) (+ v_main_~x~0_73 v_main_~y~0_76)) (< v_main_~y~0_75 v_main_~y~0_76) (<= (div (+ v_main_~y~0_75 1000000 (* (- 1) v_main_~x~0_73) (* (- 1) v_main_~y~0_76)) (- 4294967296)) (+ (div (+ v_main_~x~0_73 (- 4294967295)) 4294967296) 1)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_76, main_#t~post5=|v_main_#t~post5_25|, main_~x~0=v_main_~x~0_73, main_#t~post6=|v_main_#t~post6_52|} OutVars{main_#t~post5=|v_main_#t~post5_24|, main_~y~0=v_main_~y~0_75, main_~x~0=v_main_~x~0_72, main_#t~post6=|v_main_#t~post6_50|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1250#(= main_~x~0 0)} is VALID [2022-04-28 03:29:12,186 INFO L290 TraceCheckUtils]: 7: Hoare triple {1250#(= main_~x~0 0)} [62] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1250#(= main_~x~0 0)} is VALID [2022-04-28 03:29:12,188 INFO L290 TraceCheckUtils]: 8: Hoare triple {1250#(= main_~x~0 0)} [63] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_75 4294967296)) (.cse0 (= |v_main_#t~post6_55| |v_main_#t~post6_51|)) (.cse1 (= v_main_~x~0_75 v_main_~x~0_74)) (.cse2 (= v_main_~y~0_78 v_main_~y~0_77))) (or (and .cse0 .cse1 (= |v_main_#t~post4_30| |v_main_#t~post4_29|) .cse2) (and (<= (div (+ v_main_~y~0_78 (* (- 1) v_main_~y~0_77) (* (- 1) v_main_~x~0_75) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_75 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_78 v_main_~y~0_77) (= (+ v_main_~x~0_74 v_main_~y~0_78) (+ v_main_~x~0_75 v_main_~y~0_77)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post4_29| |v_main_#t~post4_30|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_30|, main_~y~0=v_main_~y~0_78, main_~x~0=v_main_~x~0_75, main_#t~post6=|v_main_#t~post6_55|} OutVars{main_#t~post4=|v_main_#t~post4_29|, main_~y~0=v_main_~y~0_77, main_~x~0=v_main_~x~0_74, main_#t~post6=|v_main_#t~post6_51|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:29:12,188 INFO L290 TraceCheckUtils]: 9: Hoare triple {1251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [60] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1246#false} is VALID [2022-04-28 03:29:12,188 INFO L272 TraceCheckUtils]: 10: Hoare triple {1246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1246#false} is VALID [2022-04-28 03:29:12,188 INFO L290 TraceCheckUtils]: 11: Hoare triple {1246#false} ~cond := #in~cond; {1246#false} is VALID [2022-04-28 03:29:12,188 INFO L290 TraceCheckUtils]: 12: Hoare triple {1246#false} assume 0 == ~cond; {1246#false} is VALID [2022-04-28 03:29:12,188 INFO L290 TraceCheckUtils]: 13: Hoare triple {1246#false} assume !false; {1246#false} is VALID [2022-04-28 03:29:12,189 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:12,189 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:12,189 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653998525] [2022-04-28 03:29:12,189 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [653998525] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:12,189 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1611375125] [2022-04-28 03:29:12,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:12,189 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:12,189 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:12,190 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:12,191 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-28 03:29:12,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:12,219 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:12,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:12,227 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:12,421 INFO L272 TraceCheckUtils]: 0: Hoare triple {1245#true} call ULTIMATE.init(); {1245#true} is VALID [2022-04-28 03:29:12,422 INFO L290 TraceCheckUtils]: 1: Hoare triple {1245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1245#true} is VALID [2022-04-28 03:29:12,422 INFO L290 TraceCheckUtils]: 2: Hoare triple {1245#true} assume true; {1245#true} is VALID [2022-04-28 03:29:12,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1245#true} {1245#true} #41#return; {1245#true} is VALID [2022-04-28 03:29:12,422 INFO L272 TraceCheckUtils]: 4: Hoare triple {1245#true} call #t~ret7 := main(); {1245#true} is VALID [2022-04-28 03:29:12,422 INFO L290 TraceCheckUtils]: 5: Hoare triple {1245#true} ~x~0 := 0;~y~0 := 0; {1271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:12,423 INFO L290 TraceCheckUtils]: 6: Hoare triple {1271#(and (= main_~x~0 0) (= main_~y~0 0))} [61] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_73 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post5_25| |v_main_#t~post5_24|)) (.cse1 (= v_main_~x~0_73 v_main_~x~0_72)) (.cse2 (= |v_main_#t~post6_52| |v_main_#t~post6_50|)) (.cse5 (= v_main_~y~0_76 v_main_~y~0_75))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse3 (= (+ v_main_~x~0_72 v_main_~y~0_75) (+ v_main_~x~0_73 v_main_~y~0_76)) (< v_main_~y~0_75 v_main_~y~0_76) (<= (div (+ v_main_~y~0_75 1000000 (* (- 1) v_main_~x~0_73) (* (- 1) v_main_~y~0_76)) (- 4294967296)) (+ (div (+ v_main_~x~0_73 (- 4294967295)) 4294967296) 1)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_76, main_#t~post5=|v_main_#t~post5_25|, main_~x~0=v_main_~x~0_73, main_#t~post6=|v_main_#t~post6_52|} OutVars{main_#t~post5=|v_main_#t~post5_24|, main_~y~0=v_main_~y~0_75, main_~x~0=v_main_~x~0_72, main_#t~post6=|v_main_#t~post6_50|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:12,423 INFO L290 TraceCheckUtils]: 7: Hoare triple {1271#(and (= main_~x~0 0) (= main_~y~0 0))} [62] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:12,424 INFO L290 TraceCheckUtils]: 8: Hoare triple {1271#(and (= main_~x~0 0) (= main_~y~0 0))} [63] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_75 4294967296)) (.cse0 (= |v_main_#t~post6_55| |v_main_#t~post6_51|)) (.cse1 (= v_main_~x~0_75 v_main_~x~0_74)) (.cse2 (= v_main_~y~0_78 v_main_~y~0_77))) (or (and .cse0 .cse1 (= |v_main_#t~post4_30| |v_main_#t~post4_29|) .cse2) (and (<= (div (+ v_main_~y~0_78 (* (- 1) v_main_~y~0_77) (* (- 1) v_main_~x~0_75) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_75 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_78 v_main_~y~0_77) (= (+ v_main_~x~0_74 v_main_~y~0_78) (+ v_main_~x~0_75 v_main_~y~0_77)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post4_29| |v_main_#t~post4_30|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_30|, main_~y~0=v_main_~y~0_78, main_~x~0=v_main_~x~0_75, main_#t~post6=|v_main_#t~post6_55|} OutVars{main_#t~post4=|v_main_#t~post4_29|, main_~y~0=v_main_~y~0_77, main_~x~0=v_main_~x~0_74, main_#t~post6=|v_main_#t~post6_51|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1281#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:29:12,425 INFO L290 TraceCheckUtils]: 9: Hoare triple {1281#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [60] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1246#false} is VALID [2022-04-28 03:29:12,425 INFO L272 TraceCheckUtils]: 10: Hoare triple {1246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1246#false} is VALID [2022-04-28 03:29:12,425 INFO L290 TraceCheckUtils]: 11: Hoare triple {1246#false} ~cond := #in~cond; {1246#false} is VALID [2022-04-28 03:29:12,425 INFO L290 TraceCheckUtils]: 12: Hoare triple {1246#false} assume 0 == ~cond; {1246#false} is VALID [2022-04-28 03:29:12,426 INFO L290 TraceCheckUtils]: 13: Hoare triple {1246#false} assume !false; {1246#false} is VALID [2022-04-28 03:29:12,426 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:12,426 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:13,426 INFO L290 TraceCheckUtils]: 13: Hoare triple {1246#false} assume !false; {1246#false} is VALID [2022-04-28 03:29:13,426 INFO L290 TraceCheckUtils]: 12: Hoare triple {1300#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {1246#false} is VALID [2022-04-28 03:29:13,427 INFO L290 TraceCheckUtils]: 11: Hoare triple {1304#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {1300#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:13,427 INFO L272 TraceCheckUtils]: 10: Hoare triple {1308#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1304#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:13,428 INFO L290 TraceCheckUtils]: 9: Hoare triple {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [60] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1308#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:13,430 INFO L290 TraceCheckUtils]: 8: Hoare triple {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [63] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_75 4294967296)) (.cse0 (= |v_main_#t~post6_55| |v_main_#t~post6_51|)) (.cse1 (= v_main_~x~0_75 v_main_~x~0_74)) (.cse2 (= v_main_~y~0_78 v_main_~y~0_77))) (or (and .cse0 .cse1 (= |v_main_#t~post4_30| |v_main_#t~post4_29|) .cse2) (and (<= (div (+ v_main_~y~0_78 (* (- 1) v_main_~y~0_77) (* (- 1) v_main_~x~0_75) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_75 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_78 v_main_~y~0_77) (= (+ v_main_~x~0_74 v_main_~y~0_78) (+ v_main_~x~0_75 v_main_~y~0_77)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post4_29| |v_main_#t~post4_30|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_30|, main_~y~0=v_main_~y~0_78, main_~x~0=v_main_~x~0_75, main_#t~post6=|v_main_#t~post6_55|} OutVars{main_#t~post4=|v_main_#t~post4_29|, main_~y~0=v_main_~y~0_77, main_~x~0=v_main_~x~0_74, main_#t~post6=|v_main_#t~post6_51|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:13,430 INFO L290 TraceCheckUtils]: 7: Hoare triple {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [62] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:13,504 INFO L290 TraceCheckUtils]: 6: Hoare triple {1322#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_88_31 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_88_31 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_88_31 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [61] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_73 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post5_25| |v_main_#t~post5_24|)) (.cse1 (= v_main_~x~0_73 v_main_~x~0_72)) (.cse2 (= |v_main_#t~post6_52| |v_main_#t~post6_50|)) (.cse5 (= v_main_~y~0_76 v_main_~y~0_75))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse3 (= (+ v_main_~x~0_72 v_main_~y~0_75) (+ v_main_~x~0_73 v_main_~y~0_76)) (< v_main_~y~0_75 v_main_~y~0_76) (<= (div (+ v_main_~y~0_75 1000000 (* (- 1) v_main_~x~0_73) (* (- 1) v_main_~y~0_76)) (- 4294967296)) (+ (div (+ v_main_~x~0_73 (- 4294967295)) 4294967296) 1)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_76, main_#t~post5=|v_main_#t~post5_25|, main_~x~0=v_main_~x~0_73, main_#t~post6=|v_main_#t~post6_52|} OutVars{main_#t~post5=|v_main_#t~post5_24|, main_~y~0=v_main_~y~0_75, main_~x~0=v_main_~x~0_72, main_#t~post6=|v_main_#t~post6_50|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:13,505 INFO L290 TraceCheckUtils]: 5: Hoare triple {1245#true} ~x~0 := 0;~y~0 := 0; {1322#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_88_31 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_88_31 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_88_31 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:13,505 INFO L272 TraceCheckUtils]: 4: Hoare triple {1245#true} call #t~ret7 := main(); {1245#true} is VALID [2022-04-28 03:29:13,505 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1245#true} {1245#true} #41#return; {1245#true} is VALID [2022-04-28 03:29:13,505 INFO L290 TraceCheckUtils]: 2: Hoare triple {1245#true} assume true; {1245#true} is VALID [2022-04-28 03:29:13,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {1245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1245#true} is VALID [2022-04-28 03:29:13,505 INFO L272 TraceCheckUtils]: 0: Hoare triple {1245#true} call ULTIMATE.init(); {1245#true} is VALID [2022-04-28 03:29:13,505 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:13,505 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1611375125] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:13,506 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:13,506 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:13,733 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:13,733 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1028828575] [2022-04-28 03:29:13,733 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1028828575] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:13,733 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:13,733 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-28 03:29:13,733 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632219942] [2022-04-28 03:29:13,733 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:13,734 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 03:29:13,734 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:13,734 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:13,751 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:13,751 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-28 03:29:13,751 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:13,751 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-28 03:29:13,752 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2022-04-28 03:29:13,752 INFO L87 Difference]: Start difference. First operand 28 states and 30 transitions. Second operand has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:13,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:13,991 INFO L93 Difference]: Finished difference Result 40 states and 44 transitions. [2022-04-28 03:29:13,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-28 03:29:13,991 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 03:29:13,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:13,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:13,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 40 transitions. [2022-04-28 03:29:13,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:13,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 40 transitions. [2022-04-28 03:29:13,993 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 40 transitions. [2022-04-28 03:29:14,021 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:14,021 INFO L225 Difference]: With dead ends: 40 [2022-04-28 03:29:14,021 INFO L226 Difference]: Without dead ends: 32 [2022-04-28 03:29:14,022 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 29 SyntacticMatches, 11 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=89, Invalid=331, Unknown=0, NotChecked=0, Total=420 [2022-04-28 03:29:14,022 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 20 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:14,022 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 39 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 111 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 03:29:14,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-28 03:29:14,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2022-04-28 03:29:14,048 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:14,048 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:14,048 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:14,048 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:14,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:14,049 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2022-04-28 03:29:14,049 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2022-04-28 03:29:14,049 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:14,049 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:14,049 INFO L74 IsIncluded]: Start isIncluded. First operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-28 03:29:14,050 INFO L87 Difference]: Start difference. First operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-28 03:29:14,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:14,050 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2022-04-28 03:29:14,050 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 34 transitions. [2022-04-28 03:29:14,050 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:14,050 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:14,051 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:14,051 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:14,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 26 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:14,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2022-04-28 03:29:14,051 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 33 transitions. Word has length 26 [2022-04-28 03:29:14,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:14,051 INFO L495 AbstractCegarLoop]: Abstraction has 31 states and 33 transitions. [2022-04-28 03:29:14,052 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.75) internal successors, (22), 7 states have internal predecessors, (22), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:14,052 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 33 transitions. [2022-04-28 03:29:14,085 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:14,085 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 33 transitions. [2022-04-28 03:29:14,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-28 03:29:14,086 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:14,086 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:14,105 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-28 03:29:14,286 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:14,286 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:14,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:14,287 INFO L85 PathProgramCache]: Analyzing trace with hash 650979653, now seen corresponding path program 5 times [2022-04-28 03:29:14,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:14,287 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1529074397] [2022-04-28 03:29:16,021 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:16,422 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:16,423 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:16,425 INFO L85 PathProgramCache]: Analyzing trace with hash 211865519, now seen corresponding path program 1 times [2022-04-28 03:29:16,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:16,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157541745] [2022-04-28 03:29:16,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:16,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:16,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:16,478 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:16,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:16,482 INFO L290 TraceCheckUtils]: 0: Hoare triple {1570#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1563#true} is VALID [2022-04-28 03:29:16,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {1563#true} assume true; {1563#true} is VALID [2022-04-28 03:29:16,482 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1563#true} {1563#true} #41#return; {1563#true} is VALID [2022-04-28 03:29:16,483 INFO L272 TraceCheckUtils]: 0: Hoare triple {1563#true} call ULTIMATE.init(); {1570#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:16,483 INFO L290 TraceCheckUtils]: 1: Hoare triple {1570#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1563#true} is VALID [2022-04-28 03:29:16,483 INFO L290 TraceCheckUtils]: 2: Hoare triple {1563#true} assume true; {1563#true} is VALID [2022-04-28 03:29:16,483 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1563#true} {1563#true} #41#return; {1563#true} is VALID [2022-04-28 03:29:16,483 INFO L272 TraceCheckUtils]: 4: Hoare triple {1563#true} call #t~ret7 := main(); {1563#true} is VALID [2022-04-28 03:29:16,483 INFO L290 TraceCheckUtils]: 5: Hoare triple {1563#true} ~x~0 := 0;~y~0 := 0; {1568#(= main_~x~0 0)} is VALID [2022-04-28 03:29:16,484 INFO L290 TraceCheckUtils]: 6: Hoare triple {1568#(= main_~x~0 0)} [65] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_94 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_98 v_main_~y~0_97)) (.cse1 (= |v_main_#t~post6_66| |v_main_#t~post6_64|)) (.cse2 (= v_main_~x~0_94 v_main_~x~0_93)) (.cse5 (= |v_main_#t~post5_32| |v_main_#t~post5_31|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~x~0_94 v_main_~x~0_93) .cse4 .cse3 (= (+ v_main_~x~0_93 v_main_~y~0_97) (+ v_main_~x~0_94 v_main_~y~0_98)) (<= (div (+ (* (- 1) v_main_~x~0_93) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_94 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_98, main_#t~post5=|v_main_#t~post5_32|, main_~x~0=v_main_~x~0_94, main_#t~post6=|v_main_#t~post6_66|} OutVars{main_#t~post5=|v_main_#t~post5_31|, main_~y~0=v_main_~y~0_97, main_~x~0=v_main_~x~0_93, main_#t~post6=|v_main_#t~post6_64|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1568#(= main_~x~0 0)} is VALID [2022-04-28 03:29:16,484 INFO L290 TraceCheckUtils]: 7: Hoare triple {1568#(= main_~x~0 0)} [66] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1568#(= main_~x~0 0)} is VALID [2022-04-28 03:29:16,485 INFO L290 TraceCheckUtils]: 8: Hoare triple {1568#(= main_~x~0 0)} [67] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_96 4294967296)) (.cse1 (= |v_main_#t~post6_69| |v_main_#t~post6_65|)) (.cse2 (= |v_main_#t~post4_37| |v_main_#t~post4_36|)) (.cse3 (= v_main_~x~0_96 v_main_~x~0_95))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_99 v_main_~y~0_100)) (and (<= (div (+ (* (- 1) v_main_~x~0_96) v_main_~y~0_100 500000 (* (- 1) v_main_~y~0_99)) (- 4294967296)) (+ (div (+ v_main_~x~0_96 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_95 v_main_~y~0_100) (+ v_main_~x~0_96 v_main_~y~0_99)) (< .cse0 500000) (< v_main_~y~0_100 v_main_~y~0_99)) (and (= v_main_~y~0_100 v_main_~y~0_99) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_37|, main_~y~0=v_main_~y~0_100, main_~x~0=v_main_~x~0_96, main_#t~post6=|v_main_#t~post6_69|} OutVars{main_#t~post4=|v_main_#t~post4_36|, main_~y~0=v_main_~y~0_99, main_~x~0=v_main_~x~0_95, main_#t~post6=|v_main_#t~post6_65|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1569#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:29:16,486 INFO L290 TraceCheckUtils]: 9: Hoare triple {1569#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [64] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1564#false} is VALID [2022-04-28 03:29:16,486 INFO L272 TraceCheckUtils]: 10: Hoare triple {1564#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1564#false} is VALID [2022-04-28 03:29:16,486 INFO L290 TraceCheckUtils]: 11: Hoare triple {1564#false} ~cond := #in~cond; {1564#false} is VALID [2022-04-28 03:29:16,486 INFO L290 TraceCheckUtils]: 12: Hoare triple {1564#false} assume 0 == ~cond; {1564#false} is VALID [2022-04-28 03:29:16,486 INFO L290 TraceCheckUtils]: 13: Hoare triple {1564#false} assume !false; {1564#false} is VALID [2022-04-28 03:29:16,486 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:16,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:16,487 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1157541745] [2022-04-28 03:29:16,487 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1157541745] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:16,487 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1992506081] [2022-04-28 03:29:16,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:16,487 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:16,487 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:16,488 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:16,489 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-28 03:29:16,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:16,517 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:16,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:16,525 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:16,709 INFO L272 TraceCheckUtils]: 0: Hoare triple {1563#true} call ULTIMATE.init(); {1563#true} is VALID [2022-04-28 03:29:16,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {1563#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1563#true} is VALID [2022-04-28 03:29:16,709 INFO L290 TraceCheckUtils]: 2: Hoare triple {1563#true} assume true; {1563#true} is VALID [2022-04-28 03:29:16,709 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1563#true} {1563#true} #41#return; {1563#true} is VALID [2022-04-28 03:29:16,709 INFO L272 TraceCheckUtils]: 4: Hoare triple {1563#true} call #t~ret7 := main(); {1563#true} is VALID [2022-04-28 03:29:16,710 INFO L290 TraceCheckUtils]: 5: Hoare triple {1563#true} ~x~0 := 0;~y~0 := 0; {1589#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:16,710 INFO L290 TraceCheckUtils]: 6: Hoare triple {1589#(and (= main_~x~0 0) (= main_~y~0 0))} [65] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_94 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_98 v_main_~y~0_97)) (.cse1 (= |v_main_#t~post6_66| |v_main_#t~post6_64|)) (.cse2 (= v_main_~x~0_94 v_main_~x~0_93)) (.cse5 (= |v_main_#t~post5_32| |v_main_#t~post5_31|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~x~0_94 v_main_~x~0_93) .cse4 .cse3 (= (+ v_main_~x~0_93 v_main_~y~0_97) (+ v_main_~x~0_94 v_main_~y~0_98)) (<= (div (+ (* (- 1) v_main_~x~0_93) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_94 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_98, main_#t~post5=|v_main_#t~post5_32|, main_~x~0=v_main_~x~0_94, main_#t~post6=|v_main_#t~post6_66|} OutVars{main_#t~post5=|v_main_#t~post5_31|, main_~y~0=v_main_~y~0_97, main_~x~0=v_main_~x~0_93, main_#t~post6=|v_main_#t~post6_64|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1589#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:16,711 INFO L290 TraceCheckUtils]: 7: Hoare triple {1589#(and (= main_~x~0 0) (= main_~y~0 0))} [66] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1589#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:16,712 INFO L290 TraceCheckUtils]: 8: Hoare triple {1589#(and (= main_~x~0 0) (= main_~y~0 0))} [67] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_96 4294967296)) (.cse1 (= |v_main_#t~post6_69| |v_main_#t~post6_65|)) (.cse2 (= |v_main_#t~post4_37| |v_main_#t~post4_36|)) (.cse3 (= v_main_~x~0_96 v_main_~x~0_95))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_99 v_main_~y~0_100)) (and (<= (div (+ (* (- 1) v_main_~x~0_96) v_main_~y~0_100 500000 (* (- 1) v_main_~y~0_99)) (- 4294967296)) (+ (div (+ v_main_~x~0_96 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_95 v_main_~y~0_100) (+ v_main_~x~0_96 v_main_~y~0_99)) (< .cse0 500000) (< v_main_~y~0_100 v_main_~y~0_99)) (and (= v_main_~y~0_100 v_main_~y~0_99) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_37|, main_~y~0=v_main_~y~0_100, main_~x~0=v_main_~x~0_96, main_#t~post6=|v_main_#t~post6_69|} OutVars{main_#t~post4=|v_main_#t~post4_36|, main_~y~0=v_main_~y~0_99, main_~x~0=v_main_~x~0_95, main_#t~post6=|v_main_#t~post6_65|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1599#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:29:16,713 INFO L290 TraceCheckUtils]: 9: Hoare triple {1599#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [64] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1564#false} is VALID [2022-04-28 03:29:16,713 INFO L272 TraceCheckUtils]: 10: Hoare triple {1564#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1564#false} is VALID [2022-04-28 03:29:16,713 INFO L290 TraceCheckUtils]: 11: Hoare triple {1564#false} ~cond := #in~cond; {1564#false} is VALID [2022-04-28 03:29:16,713 INFO L290 TraceCheckUtils]: 12: Hoare triple {1564#false} assume 0 == ~cond; {1564#false} is VALID [2022-04-28 03:29:16,713 INFO L290 TraceCheckUtils]: 13: Hoare triple {1564#false} assume !false; {1564#false} is VALID [2022-04-28 03:29:16,714 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:16,714 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:18,274 INFO L290 TraceCheckUtils]: 13: Hoare triple {1564#false} assume !false; {1564#false} is VALID [2022-04-28 03:29:18,274 INFO L290 TraceCheckUtils]: 12: Hoare triple {1618#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {1564#false} is VALID [2022-04-28 03:29:18,275 INFO L290 TraceCheckUtils]: 11: Hoare triple {1622#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {1618#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:18,275 INFO L272 TraceCheckUtils]: 10: Hoare triple {1626#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1622#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:18,276 INFO L290 TraceCheckUtils]: 9: Hoare triple {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [64] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1626#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:18,278 INFO L290 TraceCheckUtils]: 8: Hoare triple {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [67] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_96 4294967296)) (.cse1 (= |v_main_#t~post6_69| |v_main_#t~post6_65|)) (.cse2 (= |v_main_#t~post4_37| |v_main_#t~post4_36|)) (.cse3 (= v_main_~x~0_96 v_main_~x~0_95))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_99 v_main_~y~0_100)) (and (<= (div (+ (* (- 1) v_main_~x~0_96) v_main_~y~0_100 500000 (* (- 1) v_main_~y~0_99)) (- 4294967296)) (+ (div (+ v_main_~x~0_96 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_95 v_main_~y~0_100) (+ v_main_~x~0_96 v_main_~y~0_99)) (< .cse0 500000) (< v_main_~y~0_100 v_main_~y~0_99)) (and (= v_main_~y~0_100 v_main_~y~0_99) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_37|, main_~y~0=v_main_~y~0_100, main_~x~0=v_main_~x~0_96, main_#t~post6=|v_main_#t~post6_69|} OutVars{main_#t~post4=|v_main_#t~post4_36|, main_~y~0=v_main_~y~0_99, main_~x~0=v_main_~x~0_95, main_#t~post6=|v_main_#t~post6_65|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:18,278 INFO L290 TraceCheckUtils]: 7: Hoare triple {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [66] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:18,411 INFO L290 TraceCheckUtils]: 6: Hoare triple {1640#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_110_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_110_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_110_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [65] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_94 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_98 v_main_~y~0_97)) (.cse1 (= |v_main_#t~post6_66| |v_main_#t~post6_64|)) (.cse2 (= v_main_~x~0_94 v_main_~x~0_93)) (.cse5 (= |v_main_#t~post5_32| |v_main_#t~post5_31|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~x~0_94 v_main_~x~0_93) .cse4 .cse3 (= (+ v_main_~x~0_93 v_main_~y~0_97) (+ v_main_~x~0_94 v_main_~y~0_98)) (<= (div (+ (* (- 1) v_main_~x~0_93) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_94 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_98, main_#t~post5=|v_main_#t~post5_32|, main_~x~0=v_main_~x~0_94, main_#t~post6=|v_main_#t~post6_66|} OutVars{main_#t~post5=|v_main_#t~post5_31|, main_~y~0=v_main_~y~0_97, main_~x~0=v_main_~x~0_93, main_#t~post6=|v_main_#t~post6_64|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1630#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:18,412 INFO L290 TraceCheckUtils]: 5: Hoare triple {1563#true} ~x~0 := 0;~y~0 := 0; {1640#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_110_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_110_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_110_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:18,413 INFO L272 TraceCheckUtils]: 4: Hoare triple {1563#true} call #t~ret7 := main(); {1563#true} is VALID [2022-04-28 03:29:18,413 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1563#true} {1563#true} #41#return; {1563#true} is VALID [2022-04-28 03:29:18,413 INFO L290 TraceCheckUtils]: 2: Hoare triple {1563#true} assume true; {1563#true} is VALID [2022-04-28 03:29:18,413 INFO L290 TraceCheckUtils]: 1: Hoare triple {1563#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1563#true} is VALID [2022-04-28 03:29:18,413 INFO L272 TraceCheckUtils]: 0: Hoare triple {1563#true} call ULTIMATE.init(); {1563#true} is VALID [2022-04-28 03:29:18,413 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:18,413 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1992506081] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:18,413 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:18,413 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:18,673 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:18,673 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1529074397] [2022-04-28 03:29:18,673 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1529074397] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:18,673 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:18,673 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-28 03:29:18,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [103439777] [2022-04-28 03:29:18,673 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:18,673 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 03:29:18,674 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:18,674 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:18,693 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:18,693 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-28 03:29:18,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:18,693 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-28 03:29:18,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2022-04-28 03:29:18,694 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. Second operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:18,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:18,986 INFO L93 Difference]: Finished difference Result 43 states and 47 transitions. [2022-04-28 03:29:18,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-28 03:29:18,986 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 03:29:18,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:18,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:18,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 43 transitions. [2022-04-28 03:29:18,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:18,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 43 transitions. [2022-04-28 03:29:18,988 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 43 transitions. [2022-04-28 03:29:19,019 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:19,020 INFO L225 Difference]: With dead ends: 43 [2022-04-28 03:29:19,020 INFO L226 Difference]: Without dead ends: 35 [2022-04-28 03:29:19,020 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 29 SyntacticMatches, 13 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=101, Invalid=405, Unknown=0, NotChecked=0, Total=506 [2022-04-28 03:29:19,020 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 22 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 151 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 151 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:19,021 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 44 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 151 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 03:29:19,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2022-04-28 03:29:19,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2022-04-28 03:29:19,051 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:19,051 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:19,051 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:19,051 INFO L87 Difference]: Start difference. First operand 35 states. Second operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:19,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:19,052 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2022-04-28 03:29:19,052 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 37 transitions. [2022-04-28 03:29:19,052 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:19,052 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:19,052 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-28 03:29:19,052 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-28 03:29:19,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:19,053 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2022-04-28 03:29:19,053 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 37 transitions. [2022-04-28 03:29:19,053 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:19,054 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:19,054 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:19,054 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:19,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.103448275862069) internal successors, (32), 29 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:19,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 36 transitions. [2022-04-28 03:29:19,054 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 36 transitions. Word has length 29 [2022-04-28 03:29:19,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:19,055 INFO L495 AbstractCegarLoop]: Abstraction has 34 states and 36 transitions. [2022-04-28 03:29:19,055 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:19,055 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 36 transitions. [2022-04-28 03:29:19,093 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:19,093 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 36 transitions. [2022-04-28 03:29:19,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-28 03:29:19,094 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:19,094 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:19,110 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-28 03:29:19,294 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:19,295 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:19,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:19,295 INFO L85 PathProgramCache]: Analyzing trace with hash 2015361805, now seen corresponding path program 6 times [2022-04-28 03:29:19,295 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:19,295 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1178441914] [2022-04-28 03:29:20,285 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:20,622 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:20,623 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:20,626 INFO L85 PathProgramCache]: Analyzing trace with hash -2033569617, now seen corresponding path program 1 times [2022-04-28 03:29:20,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:20,626 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495163691] [2022-04-28 03:29:20,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:20,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:20,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:20,677 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:20,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:20,681 INFO L290 TraceCheckUtils]: 0: Hoare triple {1909#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1902#true} is VALID [2022-04-28 03:29:20,681 INFO L290 TraceCheckUtils]: 1: Hoare triple {1902#true} assume true; {1902#true} is VALID [2022-04-28 03:29:20,681 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1902#true} {1902#true} #41#return; {1902#true} is VALID [2022-04-28 03:29:20,682 INFO L272 TraceCheckUtils]: 0: Hoare triple {1902#true} call ULTIMATE.init(); {1909#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:20,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {1909#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1902#true} is VALID [2022-04-28 03:29:20,682 INFO L290 TraceCheckUtils]: 2: Hoare triple {1902#true} assume true; {1902#true} is VALID [2022-04-28 03:29:20,682 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1902#true} {1902#true} #41#return; {1902#true} is VALID [2022-04-28 03:29:20,682 INFO L272 TraceCheckUtils]: 4: Hoare triple {1902#true} call #t~ret7 := main(); {1902#true} is VALID [2022-04-28 03:29:20,682 INFO L290 TraceCheckUtils]: 5: Hoare triple {1902#true} ~x~0 := 0;~y~0 := 0; {1907#(= main_~x~0 0)} is VALID [2022-04-28 03:29:20,683 INFO L290 TraceCheckUtils]: 6: Hoare triple {1907#(= main_~x~0 0)} [69] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_116 4294967296))) (let ((.cse0 (= |v_main_#t~post6_80| |v_main_#t~post6_78|)) (.cse1 (= v_main_~y~0_121 v_main_~y~0_120)) (.cse2 (= v_main_~x~0_116 v_main_~x~0_115)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post5_39| |v_main_#t~post5_38|) .cse2) (and (<= (div (+ 1000000 (* v_main_~x~0_115 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_116 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_116 v_main_~x~0_115) .cse3 .cse4 (= (+ v_main_~x~0_115 v_main_~y~0_120) (+ v_main_~x~0_116 v_main_~y~0_121))) (and (= |v_main_#t~post5_38| |v_main_#t~post5_39|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_121, main_#t~post5=|v_main_#t~post5_39|, main_~x~0=v_main_~x~0_116, main_#t~post6=|v_main_#t~post6_80|} OutVars{main_#t~post5=|v_main_#t~post5_38|, main_~y~0=v_main_~y~0_120, main_~x~0=v_main_~x~0_115, main_#t~post6=|v_main_#t~post6_78|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1907#(= main_~x~0 0)} is VALID [2022-04-28 03:29:20,683 INFO L290 TraceCheckUtils]: 7: Hoare triple {1907#(= main_~x~0 0)} [70] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1907#(= main_~x~0 0)} is VALID [2022-04-28 03:29:20,685 INFO L290 TraceCheckUtils]: 8: Hoare triple {1907#(= main_~x~0 0)} [71] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_83| |v_main_#t~post6_79|)) (.cse4 (mod v_main_~x~0_118 4294967296)) (.cse1 (= |v_main_#t~post4_44| |v_main_#t~post4_43|)) (.cse2 (= v_main_~x~0_118 v_main_~x~0_117)) (.cse3 (= v_main_~y~0_123 v_main_~y~0_122))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_117 v_main_~y~0_123) (+ v_main_~x~0_118 v_main_~y~0_122)) (<= (div (+ (* v_main_~x~0_118 (- 1)) v_main_~y~0_123 500000 (* (- 1) v_main_~y~0_122)) (- 4294967296)) (+ (div (+ v_main_~x~0_118 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_123 v_main_~y~0_122)) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_44|, main_~y~0=v_main_~y~0_123, main_~x~0=v_main_~x~0_118, main_#t~post6=|v_main_#t~post6_83|} OutVars{main_#t~post4=|v_main_#t~post4_43|, main_~y~0=v_main_~y~0_122, main_~x~0=v_main_~x~0_117, main_#t~post6=|v_main_#t~post6_79|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1908#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:29:20,685 INFO L290 TraceCheckUtils]: 9: Hoare triple {1908#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [68] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1903#false} is VALID [2022-04-28 03:29:20,685 INFO L272 TraceCheckUtils]: 10: Hoare triple {1903#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1903#false} is VALID [2022-04-28 03:29:20,685 INFO L290 TraceCheckUtils]: 11: Hoare triple {1903#false} ~cond := #in~cond; {1903#false} is VALID [2022-04-28 03:29:20,685 INFO L290 TraceCheckUtils]: 12: Hoare triple {1903#false} assume 0 == ~cond; {1903#false} is VALID [2022-04-28 03:29:20,685 INFO L290 TraceCheckUtils]: 13: Hoare triple {1903#false} assume !false; {1903#false} is VALID [2022-04-28 03:29:20,686 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:20,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:20,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495163691] [2022-04-28 03:29:20,686 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495163691] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:20,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [903484146] [2022-04-28 03:29:20,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:20,686 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:20,686 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:20,687 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:20,688 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-28 03:29:20,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:20,713 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:20,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:20,722 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:20,891 INFO L272 TraceCheckUtils]: 0: Hoare triple {1902#true} call ULTIMATE.init(); {1902#true} is VALID [2022-04-28 03:29:20,891 INFO L290 TraceCheckUtils]: 1: Hoare triple {1902#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1902#true} is VALID [2022-04-28 03:29:20,891 INFO L290 TraceCheckUtils]: 2: Hoare triple {1902#true} assume true; {1902#true} is VALID [2022-04-28 03:29:20,891 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1902#true} {1902#true} #41#return; {1902#true} is VALID [2022-04-28 03:29:20,891 INFO L272 TraceCheckUtils]: 4: Hoare triple {1902#true} call #t~ret7 := main(); {1902#true} is VALID [2022-04-28 03:29:20,892 INFO L290 TraceCheckUtils]: 5: Hoare triple {1902#true} ~x~0 := 0;~y~0 := 0; {1928#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:20,892 INFO L290 TraceCheckUtils]: 6: Hoare triple {1928#(and (= main_~x~0 0) (= main_~y~0 0))} [69] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_116 4294967296))) (let ((.cse0 (= |v_main_#t~post6_80| |v_main_#t~post6_78|)) (.cse1 (= v_main_~y~0_121 v_main_~y~0_120)) (.cse2 (= v_main_~x~0_116 v_main_~x~0_115)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post5_39| |v_main_#t~post5_38|) .cse2) (and (<= (div (+ 1000000 (* v_main_~x~0_115 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_116 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_116 v_main_~x~0_115) .cse3 .cse4 (= (+ v_main_~x~0_115 v_main_~y~0_120) (+ v_main_~x~0_116 v_main_~y~0_121))) (and (= |v_main_#t~post5_38| |v_main_#t~post5_39|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_121, main_#t~post5=|v_main_#t~post5_39|, main_~x~0=v_main_~x~0_116, main_#t~post6=|v_main_#t~post6_80|} OutVars{main_#t~post5=|v_main_#t~post5_38|, main_~y~0=v_main_~y~0_120, main_~x~0=v_main_~x~0_115, main_#t~post6=|v_main_#t~post6_78|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1928#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:20,893 INFO L290 TraceCheckUtils]: 7: Hoare triple {1928#(and (= main_~x~0 0) (= main_~y~0 0))} [70] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1928#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:20,894 INFO L290 TraceCheckUtils]: 8: Hoare triple {1928#(and (= main_~x~0 0) (= main_~y~0 0))} [71] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_83| |v_main_#t~post6_79|)) (.cse4 (mod v_main_~x~0_118 4294967296)) (.cse1 (= |v_main_#t~post4_44| |v_main_#t~post4_43|)) (.cse2 (= v_main_~x~0_118 v_main_~x~0_117)) (.cse3 (= v_main_~y~0_123 v_main_~y~0_122))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_117 v_main_~y~0_123) (+ v_main_~x~0_118 v_main_~y~0_122)) (<= (div (+ (* v_main_~x~0_118 (- 1)) v_main_~y~0_123 500000 (* (- 1) v_main_~y~0_122)) (- 4294967296)) (+ (div (+ v_main_~x~0_118 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_123 v_main_~y~0_122)) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_44|, main_~y~0=v_main_~y~0_123, main_~x~0=v_main_~x~0_118, main_#t~post6=|v_main_#t~post6_83|} OutVars{main_#t~post4=|v_main_#t~post4_43|, main_~y~0=v_main_~y~0_122, main_~x~0=v_main_~x~0_117, main_#t~post6=|v_main_#t~post6_79|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1938#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:29:20,895 INFO L290 TraceCheckUtils]: 9: Hoare triple {1938#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [68] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1903#false} is VALID [2022-04-28 03:29:20,895 INFO L272 TraceCheckUtils]: 10: Hoare triple {1903#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1903#false} is VALID [2022-04-28 03:29:20,895 INFO L290 TraceCheckUtils]: 11: Hoare triple {1903#false} ~cond := #in~cond; {1903#false} is VALID [2022-04-28 03:29:20,895 INFO L290 TraceCheckUtils]: 12: Hoare triple {1903#false} assume 0 == ~cond; {1903#false} is VALID [2022-04-28 03:29:20,895 INFO L290 TraceCheckUtils]: 13: Hoare triple {1903#false} assume !false; {1903#false} is VALID [2022-04-28 03:29:20,895 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:20,895 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:21,790 INFO L290 TraceCheckUtils]: 13: Hoare triple {1903#false} assume !false; {1903#false} is VALID [2022-04-28 03:29:21,791 INFO L290 TraceCheckUtils]: 12: Hoare triple {1957#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {1903#false} is VALID [2022-04-28 03:29:21,791 INFO L290 TraceCheckUtils]: 11: Hoare triple {1961#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {1957#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:21,791 INFO L272 TraceCheckUtils]: 10: Hoare triple {1965#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {1961#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:21,792 INFO L290 TraceCheckUtils]: 9: Hoare triple {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [68] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {1965#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:21,797 INFO L290 TraceCheckUtils]: 8: Hoare triple {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [71] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_83| |v_main_#t~post6_79|)) (.cse4 (mod v_main_~x~0_118 4294967296)) (.cse1 (= |v_main_#t~post4_44| |v_main_#t~post4_43|)) (.cse2 (= v_main_~x~0_118 v_main_~x~0_117)) (.cse3 (= v_main_~y~0_123 v_main_~y~0_122))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_117 v_main_~y~0_123) (+ v_main_~x~0_118 v_main_~y~0_122)) (<= (div (+ (* v_main_~x~0_118 (- 1)) v_main_~y~0_123 500000 (* (- 1) v_main_~y~0_122)) (- 4294967296)) (+ (div (+ v_main_~x~0_118 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_123 v_main_~y~0_122)) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_44|, main_~y~0=v_main_~y~0_123, main_~x~0=v_main_~x~0_118, main_#t~post6=|v_main_#t~post6_83|} OutVars{main_#t~post4=|v_main_#t~post4_43|, main_~y~0=v_main_~y~0_122, main_~x~0=v_main_~x~0_117, main_#t~post6=|v_main_#t~post6_79|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:21,797 INFO L290 TraceCheckUtils]: 7: Hoare triple {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [70] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:22,066 INFO L290 TraceCheckUtils]: 6: Hoare triple {1979#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_133_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_133_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_133_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [69] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_116 4294967296))) (let ((.cse0 (= |v_main_#t~post6_80| |v_main_#t~post6_78|)) (.cse1 (= v_main_~y~0_121 v_main_~y~0_120)) (.cse2 (= v_main_~x~0_116 v_main_~x~0_115)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post5_39| |v_main_#t~post5_38|) .cse2) (and (<= (div (+ 1000000 (* v_main_~x~0_115 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_116 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_116 v_main_~x~0_115) .cse3 .cse4 (= (+ v_main_~x~0_115 v_main_~y~0_120) (+ v_main_~x~0_116 v_main_~y~0_121))) (and (= |v_main_#t~post5_38| |v_main_#t~post5_39|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_121, main_#t~post5=|v_main_#t~post5_39|, main_~x~0=v_main_~x~0_116, main_#t~post6=|v_main_#t~post6_80|} OutVars{main_#t~post5=|v_main_#t~post5_38|, main_~y~0=v_main_~y~0_120, main_~x~0=v_main_~x~0_115, main_#t~post6=|v_main_#t~post6_78|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {1969#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:22,067 INFO L290 TraceCheckUtils]: 5: Hoare triple {1902#true} ~x~0 := 0;~y~0 := 0; {1979#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_133_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_133_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_133_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:22,067 INFO L272 TraceCheckUtils]: 4: Hoare triple {1902#true} call #t~ret7 := main(); {1902#true} is VALID [2022-04-28 03:29:22,067 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1902#true} {1902#true} #41#return; {1902#true} is VALID [2022-04-28 03:29:22,067 INFO L290 TraceCheckUtils]: 2: Hoare triple {1902#true} assume true; {1902#true} is VALID [2022-04-28 03:29:22,067 INFO L290 TraceCheckUtils]: 1: Hoare triple {1902#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {1902#true} is VALID [2022-04-28 03:29:22,067 INFO L272 TraceCheckUtils]: 0: Hoare triple {1902#true} call ULTIMATE.init(); {1902#true} is VALID [2022-04-28 03:29:22,067 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:22,067 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [903484146] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:22,067 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:22,068 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:22,371 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:22,371 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1178441914] [2022-04-28 03:29:22,371 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1178441914] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:22,371 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:22,371 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-28 03:29:22,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137986234] [2022-04-28 03:29:22,372 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:22,372 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 03:29:22,372 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:22,372 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,387 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:22,387 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-28 03:29:22,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:22,388 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-28 03:29:22,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=242, Unknown=0, NotChecked=0, Total=306 [2022-04-28 03:29:22,388 INFO L87 Difference]: Start difference. First operand 34 states and 36 transitions. Second operand has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:22,733 INFO L93 Difference]: Finished difference Result 46 states and 50 transitions. [2022-04-28 03:29:22,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-28 03:29:22,733 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 03:29:22,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:22,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 46 transitions. [2022-04-28 03:29:22,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 46 transitions. [2022-04-28 03:29:22,735 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 46 transitions. [2022-04-28 03:29:22,762 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:22,763 INFO L225 Difference]: With dead ends: 46 [2022-04-28 03:29:22,763 INFO L226 Difference]: Without dead ends: 38 [2022-04-28 03:29:22,763 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 29 SyntacticMatches, 15 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=113, Invalid=487, Unknown=0, NotChecked=0, Total=600 [2022-04-28 03:29:22,765 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 24 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 49 SdHoareTripleChecker+Invalid, 206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:22,765 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 49 Invalid, 206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 03:29:22,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-28 03:29:22,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2022-04-28 03:29:22,813 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:22,813 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,813 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,813 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:22,814 INFO L93 Difference]: Finished difference Result 38 states and 40 transitions. [2022-04-28 03:29:22,814 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 40 transitions. [2022-04-28 03:29:22,814 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:22,814 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:22,815 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-28 03:29:22,815 INFO L87 Difference]: Start difference. First operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-28 03:29:22,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:22,822 INFO L93 Difference]: Finished difference Result 38 states and 40 transitions. [2022-04-28 03:29:22,822 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 40 transitions. [2022-04-28 03:29:22,822 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:22,822 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:22,822 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:22,822 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:22,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 32 states have (on average 1.09375) internal successors, (35), 32 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 39 transitions. [2022-04-28 03:29:22,823 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 39 transitions. Word has length 32 [2022-04-28 03:29:22,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:22,823 INFO L495 AbstractCegarLoop]: Abstraction has 37 states and 39 transitions. [2022-04-28 03:29:22,829 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.8) internal successors, (28), 9 states have internal predecessors, (28), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:22,829 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 39 transitions. [2022-04-28 03:29:22,878 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:22,879 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 39 transitions. [2022-04-28 03:29:22,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-28 03:29:22,881 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:22,881 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:22,898 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-28 03:29:23,097 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:23,097 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:23,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:23,098 INFO L85 PathProgramCache]: Analyzing trace with hash 753562693, now seen corresponding path program 7 times [2022-04-28 03:29:23,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:23,098 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [310891198] [2022-04-28 03:29:24,681 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:29:25,590 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:25,988 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:25,989 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:25,991 INFO L85 PathProgramCache]: Analyzing trace with hash 15962543, now seen corresponding path program 1 times [2022-04-28 03:29:25,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:25,992 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368955221] [2022-04-28 03:29:25,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:25,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:26,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:26,042 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:26,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:26,045 INFO L290 TraceCheckUtils]: 0: Hoare triple {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2262#true} is VALID [2022-04-28 03:29:26,045 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#true} assume true; {2262#true} is VALID [2022-04-28 03:29:26,045 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2262#true} {2262#true} #41#return; {2262#true} is VALID [2022-04-28 03:29:26,046 INFO L272 TraceCheckUtils]: 0: Hoare triple {2262#true} call ULTIMATE.init(); {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:26,046 INFO L290 TraceCheckUtils]: 1: Hoare triple {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2262#true} is VALID [2022-04-28 03:29:26,046 INFO L290 TraceCheckUtils]: 2: Hoare triple {2262#true} assume true; {2262#true} is VALID [2022-04-28 03:29:26,046 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2262#true} {2262#true} #41#return; {2262#true} is VALID [2022-04-28 03:29:26,046 INFO L272 TraceCheckUtils]: 4: Hoare triple {2262#true} call #t~ret7 := main(); {2262#true} is VALID [2022-04-28 03:29:26,046 INFO L290 TraceCheckUtils]: 5: Hoare triple {2262#true} ~x~0 := 0;~y~0 := 0; {2267#(= main_~x~0 0)} is VALID [2022-04-28 03:29:26,047 INFO L290 TraceCheckUtils]: 6: Hoare triple {2267#(= main_~x~0 0)} [73] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_139 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_94| |v_main_#t~post6_92|)) (.cse1 (= v_main_~x~0_139 v_main_~x~0_138)) (.cse2 (= v_main_~y~0_145 v_main_~y~0_144)) (.cse5 (= |v_main_#t~post5_46| |v_main_#t~post5_45|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_144 v_main_~y~0_145) (<= (div (+ (* v_main_~x~0_139 (- 1)) (* (- 1) v_main_~y~0_145) v_main_~y~0_144 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_139 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_138 v_main_~y~0_144) (+ v_main_~x~0_139 v_main_~y~0_145)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_145, main_#t~post5=|v_main_#t~post5_46|, main_~x~0=v_main_~x~0_139, main_#t~post6=|v_main_#t~post6_94|} OutVars{main_#t~post5=|v_main_#t~post5_45|, main_~y~0=v_main_~y~0_144, main_~x~0=v_main_~x~0_138, main_#t~post6=|v_main_#t~post6_92|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2267#(= main_~x~0 0)} is VALID [2022-04-28 03:29:26,047 INFO L290 TraceCheckUtils]: 7: Hoare triple {2267#(= main_~x~0 0)} [74] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2267#(= main_~x~0 0)} is VALID [2022-04-28 03:29:26,048 INFO L290 TraceCheckUtils]: 8: Hoare triple {2267#(= main_~x~0 0)} [75] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_97| |v_main_#t~post6_93|)) (.cse2 (= v_main_~x~0_141 v_main_~x~0_140)) (.cse3 (= |v_main_#t~post4_51| |v_main_#t~post4_50|)) (.cse4 (= v_main_~y~0_147 v_main_~y~0_146)) (.cse0 (mod v_main_~x~0_141 4294967296))) (or (and (< v_main_~x~0_141 v_main_~x~0_140) (= (+ v_main_~x~0_141 v_main_~y~0_146) (+ v_main_~x~0_140 v_main_~y~0_147)) (<= (div (+ (* v_main_~x~0_140 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_141 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_51|, main_~y~0=v_main_~y~0_147, main_~x~0=v_main_~x~0_141, main_#t~post6=|v_main_#t~post6_97|} OutVars{main_#t~post4=|v_main_#t~post4_50|, main_~y~0=v_main_~y~0_146, main_~x~0=v_main_~x~0_140, main_#t~post6=|v_main_#t~post6_93|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2268#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:29:26,049 INFO L290 TraceCheckUtils]: 9: Hoare triple {2268#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [72] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2263#false} is VALID [2022-04-28 03:29:26,049 INFO L272 TraceCheckUtils]: 10: Hoare triple {2263#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2263#false} is VALID [2022-04-28 03:29:26,049 INFO L290 TraceCheckUtils]: 11: Hoare triple {2263#false} ~cond := #in~cond; {2263#false} is VALID [2022-04-28 03:29:26,049 INFO L290 TraceCheckUtils]: 12: Hoare triple {2263#false} assume 0 == ~cond; {2263#false} is VALID [2022-04-28 03:29:26,049 INFO L290 TraceCheckUtils]: 13: Hoare triple {2263#false} assume !false; {2263#false} is VALID [2022-04-28 03:29:26,049 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:26,049 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:26,049 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368955221] [2022-04-28 03:29:26,049 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1368955221] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:26,050 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1076053417] [2022-04-28 03:29:26,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:26,050 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:26,050 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:26,051 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:26,052 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-28 03:29:26,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:26,079 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:26,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:26,087 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:26,263 INFO L272 TraceCheckUtils]: 0: Hoare triple {2262#true} call ULTIMATE.init(); {2262#true} is VALID [2022-04-28 03:29:26,263 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2262#true} is VALID [2022-04-28 03:29:26,263 INFO L290 TraceCheckUtils]: 2: Hoare triple {2262#true} assume true; {2262#true} is VALID [2022-04-28 03:29:26,263 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2262#true} {2262#true} #41#return; {2262#true} is VALID [2022-04-28 03:29:26,263 INFO L272 TraceCheckUtils]: 4: Hoare triple {2262#true} call #t~ret7 := main(); {2262#true} is VALID [2022-04-28 03:29:26,264 INFO L290 TraceCheckUtils]: 5: Hoare triple {2262#true} ~x~0 := 0;~y~0 := 0; {2288#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:26,264 INFO L290 TraceCheckUtils]: 6: Hoare triple {2288#(and (= main_~x~0 0) (= main_~y~0 0))} [73] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_139 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_94| |v_main_#t~post6_92|)) (.cse1 (= v_main_~x~0_139 v_main_~x~0_138)) (.cse2 (= v_main_~y~0_145 v_main_~y~0_144)) (.cse5 (= |v_main_#t~post5_46| |v_main_#t~post5_45|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_144 v_main_~y~0_145) (<= (div (+ (* v_main_~x~0_139 (- 1)) (* (- 1) v_main_~y~0_145) v_main_~y~0_144 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_139 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_138 v_main_~y~0_144) (+ v_main_~x~0_139 v_main_~y~0_145)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_145, main_#t~post5=|v_main_#t~post5_46|, main_~x~0=v_main_~x~0_139, main_#t~post6=|v_main_#t~post6_94|} OutVars{main_#t~post5=|v_main_#t~post5_45|, main_~y~0=v_main_~y~0_144, main_~x~0=v_main_~x~0_138, main_#t~post6=|v_main_#t~post6_92|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2288#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:26,265 INFO L290 TraceCheckUtils]: 7: Hoare triple {2288#(and (= main_~x~0 0) (= main_~y~0 0))} [74] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2288#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:26,266 INFO L290 TraceCheckUtils]: 8: Hoare triple {2288#(and (= main_~x~0 0) (= main_~y~0 0))} [75] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_97| |v_main_#t~post6_93|)) (.cse2 (= v_main_~x~0_141 v_main_~x~0_140)) (.cse3 (= |v_main_#t~post4_51| |v_main_#t~post4_50|)) (.cse4 (= v_main_~y~0_147 v_main_~y~0_146)) (.cse0 (mod v_main_~x~0_141 4294967296))) (or (and (< v_main_~x~0_141 v_main_~x~0_140) (= (+ v_main_~x~0_141 v_main_~y~0_146) (+ v_main_~x~0_140 v_main_~y~0_147)) (<= (div (+ (* v_main_~x~0_140 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_141 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_51|, main_~y~0=v_main_~y~0_147, main_~x~0=v_main_~x~0_141, main_#t~post6=|v_main_#t~post6_97|} OutVars{main_#t~post4=|v_main_#t~post4_50|, main_~y~0=v_main_~y~0_146, main_~x~0=v_main_~x~0_140, main_#t~post6=|v_main_#t~post6_93|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2298#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:29:26,267 INFO L290 TraceCheckUtils]: 9: Hoare triple {2298#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [72] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2263#false} is VALID [2022-04-28 03:29:26,267 INFO L272 TraceCheckUtils]: 10: Hoare triple {2263#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2263#false} is VALID [2022-04-28 03:29:26,267 INFO L290 TraceCheckUtils]: 11: Hoare triple {2263#false} ~cond := #in~cond; {2263#false} is VALID [2022-04-28 03:29:26,267 INFO L290 TraceCheckUtils]: 12: Hoare triple {2263#false} assume 0 == ~cond; {2263#false} is VALID [2022-04-28 03:29:26,267 INFO L290 TraceCheckUtils]: 13: Hoare triple {2263#false} assume !false; {2263#false} is VALID [2022-04-28 03:29:26,267 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:26,267 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:27,251 INFO L290 TraceCheckUtils]: 13: Hoare triple {2263#false} assume !false; {2263#false} is VALID [2022-04-28 03:29:27,252 INFO L290 TraceCheckUtils]: 12: Hoare triple {2317#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {2263#false} is VALID [2022-04-28 03:29:27,252 INFO L290 TraceCheckUtils]: 11: Hoare triple {2321#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {2317#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:27,252 INFO L272 TraceCheckUtils]: 10: Hoare triple {2325#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2321#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:27,253 INFO L290 TraceCheckUtils]: 9: Hoare triple {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [72] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2325#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:27,255 INFO L290 TraceCheckUtils]: 8: Hoare triple {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [75] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_97| |v_main_#t~post6_93|)) (.cse2 (= v_main_~x~0_141 v_main_~x~0_140)) (.cse3 (= |v_main_#t~post4_51| |v_main_#t~post4_50|)) (.cse4 (= v_main_~y~0_147 v_main_~y~0_146)) (.cse0 (mod v_main_~x~0_141 4294967296))) (or (and (< v_main_~x~0_141 v_main_~x~0_140) (= (+ v_main_~x~0_141 v_main_~y~0_146) (+ v_main_~x~0_140 v_main_~y~0_147)) (<= (div (+ (* v_main_~x~0_140 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_141 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_51|, main_~y~0=v_main_~y~0_147, main_~x~0=v_main_~x~0_141, main_#t~post6=|v_main_#t~post6_97|} OutVars{main_#t~post4=|v_main_#t~post4_50|, main_~y~0=v_main_~y~0_146, main_~x~0=v_main_~x~0_140, main_#t~post6=|v_main_#t~post6_93|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:27,256 INFO L290 TraceCheckUtils]: 7: Hoare triple {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [74] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:27,286 INFO L290 TraceCheckUtils]: 6: Hoare triple {2339#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_157_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_157_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_157_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [73] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_139 4294967296))) (let ((.cse3 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_94| |v_main_#t~post6_92|)) (.cse1 (= v_main_~x~0_139 v_main_~x~0_138)) (.cse2 (= v_main_~y~0_145 v_main_~y~0_144)) (.cse5 (= |v_main_#t~post5_46| |v_main_#t~post5_45|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_144 v_main_~y~0_145) (<= (div (+ (* v_main_~x~0_139 (- 1)) (* (- 1) v_main_~y~0_145) v_main_~y~0_144 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_139 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_138 v_main_~y~0_144) (+ v_main_~x~0_139 v_main_~y~0_145)) .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_145, main_#t~post5=|v_main_#t~post5_46|, main_~x~0=v_main_~x~0_139, main_#t~post6=|v_main_#t~post6_94|} OutVars{main_#t~post5=|v_main_#t~post5_45|, main_~y~0=v_main_~y~0_144, main_~x~0=v_main_~x~0_138, main_#t~post6=|v_main_#t~post6_92|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2329#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:27,287 INFO L290 TraceCheckUtils]: 5: Hoare triple {2262#true} ~x~0 := 0;~y~0 := 0; {2339#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_157_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_157_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_157_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:27,288 INFO L272 TraceCheckUtils]: 4: Hoare triple {2262#true} call #t~ret7 := main(); {2262#true} is VALID [2022-04-28 03:29:27,288 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2262#true} {2262#true} #41#return; {2262#true} is VALID [2022-04-28 03:29:27,288 INFO L290 TraceCheckUtils]: 2: Hoare triple {2262#true} assume true; {2262#true} is VALID [2022-04-28 03:29:27,288 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2262#true} is VALID [2022-04-28 03:29:27,288 INFO L272 TraceCheckUtils]: 0: Hoare triple {2262#true} call ULTIMATE.init(); {2262#true} is VALID [2022-04-28 03:29:27,288 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:27,288 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1076053417] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:27,288 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:27,288 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:27,589 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:27,589 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [310891198] [2022-04-28 03:29:27,589 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [310891198] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:27,589 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:27,589 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-04-28 03:29:27,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807896659] [2022-04-28 03:29:27,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:27,590 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-28 03:29:27,590 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:27,591 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:27,619 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:27,619 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-28 03:29:27,620 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:27,620 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-28 03:29:27,620 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2022-04-28 03:29:27,620 INFO L87 Difference]: Start difference. First operand 37 states and 39 transitions. Second operand has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:28,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:28,054 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2022-04-28 03:29:28,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-28 03:29:28,054 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-28 03:29:28,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:28,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:28,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 49 transitions. [2022-04-28 03:29:28,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:28,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 49 transitions. [2022-04-28 03:29:28,056 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 49 transitions. [2022-04-28 03:29:28,092 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:28,092 INFO L225 Difference]: With dead ends: 49 [2022-04-28 03:29:28,092 INFO L226 Difference]: Without dead ends: 41 [2022-04-28 03:29:28,093 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 29 SyntacticMatches, 17 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 192 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=125, Invalid=577, Unknown=0, NotChecked=0, Total=702 [2022-04-28 03:29:28,093 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 26 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 249 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 259 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 249 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:28,093 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 54 Invalid, 259 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 249 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-28 03:29:28,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-04-28 03:29:28,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 40. [2022-04-28 03:29:28,132 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:28,132 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:28,133 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:28,133 INFO L87 Difference]: Start difference. First operand 41 states. Second operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:28,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:28,133 INFO L93 Difference]: Finished difference Result 41 states and 43 transitions. [2022-04-28 03:29:28,134 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 43 transitions. [2022-04-28 03:29:28,134 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:28,134 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:28,134 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-28 03:29:28,134 INFO L87 Difference]: Start difference. First operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-28 03:29:28,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:28,135 INFO L93 Difference]: Finished difference Result 41 states and 43 transitions. [2022-04-28 03:29:28,135 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 43 transitions. [2022-04-28 03:29:28,135 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:28,135 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:28,135 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:28,135 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:28,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.0857142857142856) internal successors, (38), 35 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:28,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 42 transitions. [2022-04-28 03:29:28,136 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 42 transitions. Word has length 35 [2022-04-28 03:29:28,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:28,136 INFO L495 AbstractCegarLoop]: Abstraction has 40 states and 42 transitions. [2022-04-28 03:29:28,136 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 10 states have internal predecessors, (31), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:28,136 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 40 states and 42 transitions. [2022-04-28 03:29:28,181 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:28,181 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 42 transitions. [2022-04-28 03:29:28,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-28 03:29:28,181 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:28,181 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:28,199 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-28 03:29:28,382 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:28,382 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:28,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:28,382 INFO L85 PathProgramCache]: Analyzing trace with hash 49991693, now seen corresponding path program 8 times [2022-04-28 03:29:28,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:28,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1988875862] [2022-04-28 03:29:29,120 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:29,523 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:29,524 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:29,526 INFO L85 PathProgramCache]: Analyzing trace with hash 2065494703, now seen corresponding path program 1 times [2022-04-28 03:29:29,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:29,526 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833002271] [2022-04-28 03:29:29,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:29,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:29,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:29,589 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:29,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:29,592 INFO L290 TraceCheckUtils]: 0: Hoare triple {2650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2643#true} is VALID [2022-04-28 03:29:29,592 INFO L290 TraceCheckUtils]: 1: Hoare triple {2643#true} assume true; {2643#true} is VALID [2022-04-28 03:29:29,592 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2643#true} {2643#true} #41#return; {2643#true} is VALID [2022-04-28 03:29:29,593 INFO L272 TraceCheckUtils]: 0: Hoare triple {2643#true} call ULTIMATE.init(); {2650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:29,593 INFO L290 TraceCheckUtils]: 1: Hoare triple {2650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2643#true} is VALID [2022-04-28 03:29:29,593 INFO L290 TraceCheckUtils]: 2: Hoare triple {2643#true} assume true; {2643#true} is VALID [2022-04-28 03:29:29,593 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2643#true} {2643#true} #41#return; {2643#true} is VALID [2022-04-28 03:29:29,593 INFO L272 TraceCheckUtils]: 4: Hoare triple {2643#true} call #t~ret7 := main(); {2643#true} is VALID [2022-04-28 03:29:29,594 INFO L290 TraceCheckUtils]: 5: Hoare triple {2643#true} ~x~0 := 0;~y~0 := 0; {2648#(= main_~x~0 0)} is VALID [2022-04-28 03:29:29,594 INFO L290 TraceCheckUtils]: 6: Hoare triple {2648#(= main_~x~0 0)} [77] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_163 4294967296))) (let ((.cse0 (= |v_main_#t~post5_53| |v_main_#t~post5_52|)) (.cse1 (= v_main_~x~0_163 v_main_~x~0_162)) (.cse2 (= |v_main_#t~post6_108| |v_main_#t~post6_106|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= v_main_~y~0_170 v_main_~y~0_169) .cse2) (and (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2 (= v_main_~y~0_169 v_main_~y~0_170)) (and (< v_main_~x~0_163 v_main_~x~0_162) (<= (div (+ (* v_main_~x~0_162 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_163 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_163 v_main_~y~0_170) (+ v_main_~x~0_162 v_main_~y~0_169)) .cse3)))) InVars {main_~y~0=v_main_~y~0_170, main_#t~post5=|v_main_#t~post5_53|, main_~x~0=v_main_~x~0_163, main_#t~post6=|v_main_#t~post6_108|} OutVars{main_#t~post5=|v_main_#t~post5_52|, main_~y~0=v_main_~y~0_169, main_~x~0=v_main_~x~0_162, main_#t~post6=|v_main_#t~post6_106|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2648#(= main_~x~0 0)} is VALID [2022-04-28 03:29:29,595 INFO L290 TraceCheckUtils]: 7: Hoare triple {2648#(= main_~x~0 0)} [78] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2648#(= main_~x~0 0)} is VALID [2022-04-28 03:29:29,595 INFO L290 TraceCheckUtils]: 8: Hoare triple {2648#(= main_~x~0 0)} [79] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_58| |v_main_#t~post4_57|)) (.cse1 (= v_main_~x~0_165 v_main_~x~0_164)) (.cse3 (= v_main_~y~0_172 v_main_~y~0_171)) (.cse4 (= |v_main_#t~post6_111| |v_main_#t~post6_107|)) (.cse2 (mod v_main_~x~0_165 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (= (+ v_main_~x~0_165 v_main_~y~0_171) (+ v_main_~x~0_164 v_main_~y~0_172)) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_164 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_165 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_165 v_main_~x~0_164)))) InVars {main_#t~post4=|v_main_#t~post4_58|, main_~y~0=v_main_~y~0_172, main_~x~0=v_main_~x~0_165, main_#t~post6=|v_main_#t~post6_111|} OutVars{main_#t~post4=|v_main_#t~post4_57|, main_~y~0=v_main_~y~0_171, main_~x~0=v_main_~x~0_164, main_#t~post6=|v_main_#t~post6_107|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2649#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:29:29,596 INFO L290 TraceCheckUtils]: 9: Hoare triple {2649#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [76] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2644#false} is VALID [2022-04-28 03:29:29,596 INFO L272 TraceCheckUtils]: 10: Hoare triple {2644#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2644#false} is VALID [2022-04-28 03:29:29,596 INFO L290 TraceCheckUtils]: 11: Hoare triple {2644#false} ~cond := #in~cond; {2644#false} is VALID [2022-04-28 03:29:29,596 INFO L290 TraceCheckUtils]: 12: Hoare triple {2644#false} assume 0 == ~cond; {2644#false} is VALID [2022-04-28 03:29:29,596 INFO L290 TraceCheckUtils]: 13: Hoare triple {2644#false} assume !false; {2644#false} is VALID [2022-04-28 03:29:29,596 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:29,597 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:29,597 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833002271] [2022-04-28 03:29:29,597 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1833002271] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:29,597 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2038411421] [2022-04-28 03:29:29,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:29,597 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:29,597 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:29,598 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:29,599 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-28 03:29:29,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:29,625 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:29,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:29,632 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:29,802 INFO L272 TraceCheckUtils]: 0: Hoare triple {2643#true} call ULTIMATE.init(); {2643#true} is VALID [2022-04-28 03:29:29,802 INFO L290 TraceCheckUtils]: 1: Hoare triple {2643#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2643#true} is VALID [2022-04-28 03:29:29,802 INFO L290 TraceCheckUtils]: 2: Hoare triple {2643#true} assume true; {2643#true} is VALID [2022-04-28 03:29:29,802 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2643#true} {2643#true} #41#return; {2643#true} is VALID [2022-04-28 03:29:29,802 INFO L272 TraceCheckUtils]: 4: Hoare triple {2643#true} call #t~ret7 := main(); {2643#true} is VALID [2022-04-28 03:29:29,802 INFO L290 TraceCheckUtils]: 5: Hoare triple {2643#true} ~x~0 := 0;~y~0 := 0; {2669#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:29,803 INFO L290 TraceCheckUtils]: 6: Hoare triple {2669#(and (= main_~x~0 0) (= main_~y~0 0))} [77] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_163 4294967296))) (let ((.cse0 (= |v_main_#t~post5_53| |v_main_#t~post5_52|)) (.cse1 (= v_main_~x~0_163 v_main_~x~0_162)) (.cse2 (= |v_main_#t~post6_108| |v_main_#t~post6_106|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= v_main_~y~0_170 v_main_~y~0_169) .cse2) (and (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2 (= v_main_~y~0_169 v_main_~y~0_170)) (and (< v_main_~x~0_163 v_main_~x~0_162) (<= (div (+ (* v_main_~x~0_162 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_163 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_163 v_main_~y~0_170) (+ v_main_~x~0_162 v_main_~y~0_169)) .cse3)))) InVars {main_~y~0=v_main_~y~0_170, main_#t~post5=|v_main_#t~post5_53|, main_~x~0=v_main_~x~0_163, main_#t~post6=|v_main_#t~post6_108|} OutVars{main_#t~post5=|v_main_#t~post5_52|, main_~y~0=v_main_~y~0_169, main_~x~0=v_main_~x~0_162, main_#t~post6=|v_main_#t~post6_106|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2669#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:29,803 INFO L290 TraceCheckUtils]: 7: Hoare triple {2669#(and (= main_~x~0 0) (= main_~y~0 0))} [78] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2669#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:29,804 INFO L290 TraceCheckUtils]: 8: Hoare triple {2669#(and (= main_~x~0 0) (= main_~y~0 0))} [79] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_58| |v_main_#t~post4_57|)) (.cse1 (= v_main_~x~0_165 v_main_~x~0_164)) (.cse3 (= v_main_~y~0_172 v_main_~y~0_171)) (.cse4 (= |v_main_#t~post6_111| |v_main_#t~post6_107|)) (.cse2 (mod v_main_~x~0_165 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (= (+ v_main_~x~0_165 v_main_~y~0_171) (+ v_main_~x~0_164 v_main_~y~0_172)) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_164 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_165 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_165 v_main_~x~0_164)))) InVars {main_#t~post4=|v_main_#t~post4_58|, main_~y~0=v_main_~y~0_172, main_~x~0=v_main_~x~0_165, main_#t~post6=|v_main_#t~post6_111|} OutVars{main_#t~post4=|v_main_#t~post4_57|, main_~y~0=v_main_~y~0_171, main_~x~0=v_main_~x~0_164, main_#t~post6=|v_main_#t~post6_107|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2679#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:29:29,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {2679#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [76] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2644#false} is VALID [2022-04-28 03:29:29,805 INFO L272 TraceCheckUtils]: 10: Hoare triple {2644#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2644#false} is VALID [2022-04-28 03:29:29,805 INFO L290 TraceCheckUtils]: 11: Hoare triple {2644#false} ~cond := #in~cond; {2644#false} is VALID [2022-04-28 03:29:29,805 INFO L290 TraceCheckUtils]: 12: Hoare triple {2644#false} assume 0 == ~cond; {2644#false} is VALID [2022-04-28 03:29:29,805 INFO L290 TraceCheckUtils]: 13: Hoare triple {2644#false} assume !false; {2644#false} is VALID [2022-04-28 03:29:29,806 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:29,806 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:31,206 INFO L290 TraceCheckUtils]: 13: Hoare triple {2644#false} assume !false; {2644#false} is VALID [2022-04-28 03:29:31,206 INFO L290 TraceCheckUtils]: 12: Hoare triple {2698#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {2644#false} is VALID [2022-04-28 03:29:31,206 INFO L290 TraceCheckUtils]: 11: Hoare triple {2702#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {2698#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:31,207 INFO L272 TraceCheckUtils]: 10: Hoare triple {2706#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {2702#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:31,207 INFO L290 TraceCheckUtils]: 9: Hoare triple {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [76] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {2706#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:31,209 INFO L290 TraceCheckUtils]: 8: Hoare triple {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [79] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_58| |v_main_#t~post4_57|)) (.cse1 (= v_main_~x~0_165 v_main_~x~0_164)) (.cse3 (= v_main_~y~0_172 v_main_~y~0_171)) (.cse4 (= |v_main_#t~post6_111| |v_main_#t~post6_107|)) (.cse2 (mod v_main_~x~0_165 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (= (+ v_main_~x~0_165 v_main_~y~0_171) (+ v_main_~x~0_164 v_main_~y~0_172)) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_164 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_165 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_165 v_main_~x~0_164)))) InVars {main_#t~post4=|v_main_#t~post4_58|, main_~y~0=v_main_~y~0_172, main_~x~0=v_main_~x~0_165, main_#t~post6=|v_main_#t~post6_111|} OutVars{main_#t~post4=|v_main_#t~post4_57|, main_~y~0=v_main_~y~0_171, main_~x~0=v_main_~x~0_164, main_#t~post6=|v_main_#t~post6_107|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:31,210 INFO L290 TraceCheckUtils]: 7: Hoare triple {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [78] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:31,229 INFO L290 TraceCheckUtils]: 6: Hoare triple {2720#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_182_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_182_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_182_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [77] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_163 4294967296))) (let ((.cse0 (= |v_main_#t~post5_53| |v_main_#t~post5_52|)) (.cse1 (= v_main_~x~0_163 v_main_~x~0_162)) (.cse2 (= |v_main_#t~post6_108| |v_main_#t~post6_106|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= v_main_~y~0_170 v_main_~y~0_169) .cse2) (and (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2 (= v_main_~y~0_169 v_main_~y~0_170)) (and (< v_main_~x~0_163 v_main_~x~0_162) (<= (div (+ (* v_main_~x~0_162 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_163 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_163 v_main_~y~0_170) (+ v_main_~x~0_162 v_main_~y~0_169)) .cse3)))) InVars {main_~y~0=v_main_~y~0_170, main_#t~post5=|v_main_#t~post5_53|, main_~x~0=v_main_~x~0_163, main_#t~post6=|v_main_#t~post6_108|} OutVars{main_#t~post5=|v_main_#t~post5_52|, main_~y~0=v_main_~y~0_169, main_~x~0=v_main_~x~0_162, main_#t~post6=|v_main_#t~post6_106|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {2710#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:31,230 INFO L290 TraceCheckUtils]: 5: Hoare triple {2643#true} ~x~0 := 0;~y~0 := 0; {2720#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_182_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_182_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_182_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:31,230 INFO L272 TraceCheckUtils]: 4: Hoare triple {2643#true} call #t~ret7 := main(); {2643#true} is VALID [2022-04-28 03:29:31,230 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2643#true} {2643#true} #41#return; {2643#true} is VALID [2022-04-28 03:29:31,230 INFO L290 TraceCheckUtils]: 2: Hoare triple {2643#true} assume true; {2643#true} is VALID [2022-04-28 03:29:31,230 INFO L290 TraceCheckUtils]: 1: Hoare triple {2643#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {2643#true} is VALID [2022-04-28 03:29:31,231 INFO L272 TraceCheckUtils]: 0: Hoare triple {2643#true} call ULTIMATE.init(); {2643#true} is VALID [2022-04-28 03:29:31,231 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:31,231 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2038411421] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:31,231 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:31,231 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:31,562 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:31,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1988875862] [2022-04-28 03:29:31,563 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1988875862] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:31,563 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:31,563 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2022-04-28 03:29:31,563 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869550877] [2022-04-28 03:29:31,563 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:31,563 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-28 03:29:31,563 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:31,563 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:31,581 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:31,581 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-28 03:29:31,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:31,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-28 03:29:31,582 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=306, Unknown=0, NotChecked=0, Total=380 [2022-04-28 03:29:31,582 INFO L87 Difference]: Start difference. First operand 40 states and 42 transitions. Second operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:32,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:32,112 INFO L93 Difference]: Finished difference Result 52 states and 56 transitions. [2022-04-28 03:29:32,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-28 03:29:32,112 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-28 03:29:32,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:32,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:32,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 52 transitions. [2022-04-28 03:29:32,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:32,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 52 transitions. [2022-04-28 03:29:32,114 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 52 transitions. [2022-04-28 03:29:32,152 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:32,152 INFO L225 Difference]: With dead ends: 52 [2022-04-28 03:29:32,152 INFO L226 Difference]: Without dead ends: 44 [2022-04-28 03:29:32,153 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 29 SyntacticMatches, 19 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=137, Invalid=675, Unknown=0, NotChecked=0, Total=812 [2022-04-28 03:29:32,153 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 28 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 307 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 59 SdHoareTripleChecker+Invalid, 318 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 307 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:32,154 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 59 Invalid, 318 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 307 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-28 03:29:32,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-28 03:29:32,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2022-04-28 03:29:32,199 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:32,199 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:32,199 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:32,200 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:32,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:32,201 INFO L93 Difference]: Finished difference Result 44 states and 46 transitions. [2022-04-28 03:29:32,201 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 46 transitions. [2022-04-28 03:29:32,201 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:32,201 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:32,201 INFO L74 IsIncluded]: Start isIncluded. First operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-28 03:29:32,201 INFO L87 Difference]: Start difference. First operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-28 03:29:32,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:32,202 INFO L93 Difference]: Finished difference Result 44 states and 46 transitions. [2022-04-28 03:29:32,202 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 46 transitions. [2022-04-28 03:29:32,203 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:32,203 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:32,203 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:32,203 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:32,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 38 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:32,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 45 transitions. [2022-04-28 03:29:32,203 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 45 transitions. Word has length 38 [2022-04-28 03:29:32,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:32,204 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 45 transitions. [2022-04-28 03:29:32,204 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 11 states have internal predecessors, (34), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:32,204 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 45 transitions. [2022-04-28 03:29:32,243 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:32,244 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 45 transitions. [2022-04-28 03:29:32,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-28 03:29:32,244 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:32,244 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:32,260 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-28 03:29:32,460 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-28 03:29:32,460 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:32,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:32,460 INFO L85 PathProgramCache]: Analyzing trace with hash -593264827, now seen corresponding path program 9 times [2022-04-28 03:29:32,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:32,461 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1676475777] [2022-04-28 03:29:35,391 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:36,692 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:29:36,851 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:36,852 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:36,867 INFO L85 PathProgramCache]: Analyzing trace with hash -179940433, now seen corresponding path program 1 times [2022-04-28 03:29:36,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:36,868 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005130251] [2022-04-28 03:29:36,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:36,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:36,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:36,934 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:36,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:36,937 INFO L290 TraceCheckUtils]: 0: Hoare triple {3052#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3045#true} is VALID [2022-04-28 03:29:36,938 INFO L290 TraceCheckUtils]: 1: Hoare triple {3045#true} assume true; {3045#true} is VALID [2022-04-28 03:29:36,938 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3045#true} {3045#true} #41#return; {3045#true} is VALID [2022-04-28 03:29:36,938 INFO L272 TraceCheckUtils]: 0: Hoare triple {3045#true} call ULTIMATE.init(); {3052#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:36,938 INFO L290 TraceCheckUtils]: 1: Hoare triple {3052#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3045#true} is VALID [2022-04-28 03:29:36,938 INFO L290 TraceCheckUtils]: 2: Hoare triple {3045#true} assume true; {3045#true} is VALID [2022-04-28 03:29:36,939 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3045#true} {3045#true} #41#return; {3045#true} is VALID [2022-04-28 03:29:36,939 INFO L272 TraceCheckUtils]: 4: Hoare triple {3045#true} call #t~ret7 := main(); {3045#true} is VALID [2022-04-28 03:29:36,939 INFO L290 TraceCheckUtils]: 5: Hoare triple {3045#true} ~x~0 := 0;~y~0 := 0; {3050#(= main_~x~0 0)} is VALID [2022-04-28 03:29:36,940 INFO L290 TraceCheckUtils]: 6: Hoare triple {3050#(= main_~x~0 0)} [81] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_188 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_122| |v_main_#t~post6_120|)) (.cse3 (= v_main_~x~0_188 v_main_~x~0_187)) (.cse4 (= v_main_~y~0_196 v_main_~y~0_195))) (or (and (< v_main_~y~0_195 v_main_~y~0_196) .cse0 (<= (div (+ v_main_~y~0_195 (* (- 1) v_main_~y~0_196) (* v_main_~x~0_188 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_188 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_187 v_main_~y~0_195) (+ v_main_~x~0_188 v_main_~y~0_196)) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) (= |v_main_#t~post5_59| |v_main_#t~post5_60|) .cse3 .cse4) (and (= |v_main_#t~post5_60| |v_main_#t~post5_59|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_196, main_#t~post5=|v_main_#t~post5_60|, main_~x~0=v_main_~x~0_188, main_#t~post6=|v_main_#t~post6_122|} OutVars{main_#t~post5=|v_main_#t~post5_59|, main_~y~0=v_main_~y~0_195, main_~x~0=v_main_~x~0_187, main_#t~post6=|v_main_#t~post6_120|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3050#(= main_~x~0 0)} is VALID [2022-04-28 03:29:36,940 INFO L290 TraceCheckUtils]: 7: Hoare triple {3050#(= main_~x~0 0)} [82] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3050#(= main_~x~0 0)} is VALID [2022-04-28 03:29:36,941 INFO L290 TraceCheckUtils]: 8: Hoare triple {3050#(= main_~x~0 0)} [83] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_65| |v_main_#t~post4_64|)) (.cse1 (= |v_main_#t~post6_125| |v_main_#t~post6_121|)) (.cse3 (mod v_main_~x~0_190 4294967296)) (.cse2 (= v_main_~y~0_198 v_main_~y~0_197))) (or (and .cse0 .cse1 (= v_main_~x~0_190 v_main_~x~0_189) .cse2) (and (= (+ v_main_~x~0_189 v_main_~y~0_198) (+ v_main_~x~0_190 v_main_~y~0_197)) (< v_main_~x~0_190 v_main_~x~0_189) (<= (div (+ 500000 (* v_main_~x~0_189 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_190 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)) (and .cse0 .cse1 (= v_main_~x~0_189 v_main_~x~0_190) (<= 500000 .cse3) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_65|, main_~y~0=v_main_~y~0_198, main_~x~0=v_main_~x~0_190, main_#t~post6=|v_main_#t~post6_125|} OutVars{main_#t~post4=|v_main_#t~post4_64|, main_~y~0=v_main_~y~0_197, main_~x~0=v_main_~x~0_189, main_#t~post6=|v_main_#t~post6_121|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3051#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:29:36,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {3051#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [80] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3046#false} is VALID [2022-04-28 03:29:36,942 INFO L272 TraceCheckUtils]: 10: Hoare triple {3046#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3046#false} is VALID [2022-04-28 03:29:36,942 INFO L290 TraceCheckUtils]: 11: Hoare triple {3046#false} ~cond := #in~cond; {3046#false} is VALID [2022-04-28 03:29:36,942 INFO L290 TraceCheckUtils]: 12: Hoare triple {3046#false} assume 0 == ~cond; {3046#false} is VALID [2022-04-28 03:29:36,942 INFO L290 TraceCheckUtils]: 13: Hoare triple {3046#false} assume !false; {3046#false} is VALID [2022-04-28 03:29:36,942 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:36,942 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:36,942 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005130251] [2022-04-28 03:29:36,942 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1005130251] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:36,943 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [449527444] [2022-04-28 03:29:36,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:36,943 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:36,943 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:36,944 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:36,945 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-28 03:29:36,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:36,973 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:36,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:36,981 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:37,168 INFO L272 TraceCheckUtils]: 0: Hoare triple {3045#true} call ULTIMATE.init(); {3045#true} is VALID [2022-04-28 03:29:37,169 INFO L290 TraceCheckUtils]: 1: Hoare triple {3045#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3045#true} is VALID [2022-04-28 03:29:37,169 INFO L290 TraceCheckUtils]: 2: Hoare triple {3045#true} assume true; {3045#true} is VALID [2022-04-28 03:29:37,169 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3045#true} {3045#true} #41#return; {3045#true} is VALID [2022-04-28 03:29:37,169 INFO L272 TraceCheckUtils]: 4: Hoare triple {3045#true} call #t~ret7 := main(); {3045#true} is VALID [2022-04-28 03:29:37,169 INFO L290 TraceCheckUtils]: 5: Hoare triple {3045#true} ~x~0 := 0;~y~0 := 0; {3071#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:37,170 INFO L290 TraceCheckUtils]: 6: Hoare triple {3071#(and (= main_~x~0 0) (= main_~y~0 0))} [81] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_188 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_122| |v_main_#t~post6_120|)) (.cse3 (= v_main_~x~0_188 v_main_~x~0_187)) (.cse4 (= v_main_~y~0_196 v_main_~y~0_195))) (or (and (< v_main_~y~0_195 v_main_~y~0_196) .cse0 (<= (div (+ v_main_~y~0_195 (* (- 1) v_main_~y~0_196) (* v_main_~x~0_188 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_188 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_187 v_main_~y~0_195) (+ v_main_~x~0_188 v_main_~y~0_196)) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) (= |v_main_#t~post5_59| |v_main_#t~post5_60|) .cse3 .cse4) (and (= |v_main_#t~post5_60| |v_main_#t~post5_59|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_196, main_#t~post5=|v_main_#t~post5_60|, main_~x~0=v_main_~x~0_188, main_#t~post6=|v_main_#t~post6_122|} OutVars{main_#t~post5=|v_main_#t~post5_59|, main_~y~0=v_main_~y~0_195, main_~x~0=v_main_~x~0_187, main_#t~post6=|v_main_#t~post6_120|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3071#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:37,170 INFO L290 TraceCheckUtils]: 7: Hoare triple {3071#(and (= main_~x~0 0) (= main_~y~0 0))} [82] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3071#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:37,171 INFO L290 TraceCheckUtils]: 8: Hoare triple {3071#(and (= main_~x~0 0) (= main_~y~0 0))} [83] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_65| |v_main_#t~post4_64|)) (.cse1 (= |v_main_#t~post6_125| |v_main_#t~post6_121|)) (.cse3 (mod v_main_~x~0_190 4294967296)) (.cse2 (= v_main_~y~0_198 v_main_~y~0_197))) (or (and .cse0 .cse1 (= v_main_~x~0_190 v_main_~x~0_189) .cse2) (and (= (+ v_main_~x~0_189 v_main_~y~0_198) (+ v_main_~x~0_190 v_main_~y~0_197)) (< v_main_~x~0_190 v_main_~x~0_189) (<= (div (+ 500000 (* v_main_~x~0_189 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_190 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)) (and .cse0 .cse1 (= v_main_~x~0_189 v_main_~x~0_190) (<= 500000 .cse3) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_65|, main_~y~0=v_main_~y~0_198, main_~x~0=v_main_~x~0_190, main_#t~post6=|v_main_#t~post6_125|} OutVars{main_#t~post4=|v_main_#t~post4_64|, main_~y~0=v_main_~y~0_197, main_~x~0=v_main_~x~0_189, main_#t~post6=|v_main_#t~post6_121|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3081#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:29:37,172 INFO L290 TraceCheckUtils]: 9: Hoare triple {3081#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [80] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3046#false} is VALID [2022-04-28 03:29:37,172 INFO L272 TraceCheckUtils]: 10: Hoare triple {3046#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3046#false} is VALID [2022-04-28 03:29:37,172 INFO L290 TraceCheckUtils]: 11: Hoare triple {3046#false} ~cond := #in~cond; {3046#false} is VALID [2022-04-28 03:29:37,172 INFO L290 TraceCheckUtils]: 12: Hoare triple {3046#false} assume 0 == ~cond; {3046#false} is VALID [2022-04-28 03:29:37,173 INFO L290 TraceCheckUtils]: 13: Hoare triple {3046#false} assume !false; {3046#false} is VALID [2022-04-28 03:29:37,173 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:37,173 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:38,112 INFO L290 TraceCheckUtils]: 13: Hoare triple {3046#false} assume !false; {3046#false} is VALID [2022-04-28 03:29:38,112 INFO L290 TraceCheckUtils]: 12: Hoare triple {3100#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {3046#false} is VALID [2022-04-28 03:29:38,113 INFO L290 TraceCheckUtils]: 11: Hoare triple {3104#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {3100#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:38,113 INFO L272 TraceCheckUtils]: 10: Hoare triple {3108#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3104#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:38,114 INFO L290 TraceCheckUtils]: 9: Hoare triple {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [80] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3108#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:38,127 INFO L290 TraceCheckUtils]: 8: Hoare triple {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [83] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_65| |v_main_#t~post4_64|)) (.cse1 (= |v_main_#t~post6_125| |v_main_#t~post6_121|)) (.cse3 (mod v_main_~x~0_190 4294967296)) (.cse2 (= v_main_~y~0_198 v_main_~y~0_197))) (or (and .cse0 .cse1 (= v_main_~x~0_190 v_main_~x~0_189) .cse2) (and (= (+ v_main_~x~0_189 v_main_~y~0_198) (+ v_main_~x~0_190 v_main_~y~0_197)) (< v_main_~x~0_190 v_main_~x~0_189) (<= (div (+ 500000 (* v_main_~x~0_189 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_190 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)) (and .cse0 .cse1 (= v_main_~x~0_189 v_main_~x~0_190) (<= 500000 .cse3) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_65|, main_~y~0=v_main_~y~0_198, main_~x~0=v_main_~x~0_190, main_#t~post6=|v_main_#t~post6_125|} OutVars{main_#t~post4=|v_main_#t~post4_64|, main_~y~0=v_main_~y~0_197, main_~x~0=v_main_~x~0_189, main_#t~post6=|v_main_#t~post6_121|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:38,127 INFO L290 TraceCheckUtils]: 7: Hoare triple {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [82] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:38,257 INFO L290 TraceCheckUtils]: 6: Hoare triple {3122#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_208_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_208_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_208_32) main_~y~0))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [81] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_188 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_122| |v_main_#t~post6_120|)) (.cse3 (= v_main_~x~0_188 v_main_~x~0_187)) (.cse4 (= v_main_~y~0_196 v_main_~y~0_195))) (or (and (< v_main_~y~0_195 v_main_~y~0_196) .cse0 (<= (div (+ v_main_~y~0_195 (* (- 1) v_main_~y~0_196) (* v_main_~x~0_188 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_188 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_187 v_main_~y~0_195) (+ v_main_~x~0_188 v_main_~y~0_196)) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) (= |v_main_#t~post5_59| |v_main_#t~post5_60|) .cse3 .cse4) (and (= |v_main_#t~post5_60| |v_main_#t~post5_59|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_196, main_#t~post5=|v_main_#t~post5_60|, main_~x~0=v_main_~x~0_188, main_#t~post6=|v_main_#t~post6_122|} OutVars{main_#t~post5=|v_main_#t~post5_59|, main_~y~0=v_main_~y~0_195, main_~x~0=v_main_~x~0_187, main_#t~post6=|v_main_#t~post6_120|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3112#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:38,258 INFO L290 TraceCheckUtils]: 5: Hoare triple {3045#true} ~x~0 := 0;~y~0 := 0; {3122#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_208_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_208_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_208_32) main_~y~0))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:38,258 INFO L272 TraceCheckUtils]: 4: Hoare triple {3045#true} call #t~ret7 := main(); {3045#true} is VALID [2022-04-28 03:29:38,259 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3045#true} {3045#true} #41#return; {3045#true} is VALID [2022-04-28 03:29:38,259 INFO L290 TraceCheckUtils]: 2: Hoare triple {3045#true} assume true; {3045#true} is VALID [2022-04-28 03:29:38,259 INFO L290 TraceCheckUtils]: 1: Hoare triple {3045#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3045#true} is VALID [2022-04-28 03:29:38,259 INFO L272 TraceCheckUtils]: 0: Hoare triple {3045#true} call ULTIMATE.init(); {3045#true} is VALID [2022-04-28 03:29:38,259 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:38,259 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [449527444] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:38,259 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:38,259 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:38,669 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:38,669 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1676475777] [2022-04-28 03:29:38,669 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1676475777] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:38,669 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:38,669 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2022-04-28 03:29:38,669 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1562815907] [2022-04-28 03:29:38,669 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:38,670 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-28 03:29:38,670 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:38,670 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:38,697 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:38,697 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-28 03:29:38,697 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:38,698 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-28 03:29:38,698 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2022-04-28 03:29:38,698 INFO L87 Difference]: Start difference. First operand 43 states and 45 transitions. Second operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:39,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:39,322 INFO L93 Difference]: Finished difference Result 55 states and 59 transitions. [2022-04-28 03:29:39,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-28 03:29:39,323 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-28 03:29:39,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:39,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:39,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 55 transitions. [2022-04-28 03:29:39,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:39,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 55 transitions. [2022-04-28 03:29:39,324 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 55 transitions. [2022-04-28 03:29:39,364 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:39,365 INFO L225 Difference]: With dead ends: 55 [2022-04-28 03:29:39,365 INFO L226 Difference]: Without dead ends: 47 [2022-04-28 03:29:39,366 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 28 SyntacticMatches, 22 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=149, Invalid=781, Unknown=0, NotChecked=0, Total=930 [2022-04-28 03:29:39,366 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 30 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 371 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 383 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 371 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:39,366 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 64 Invalid, 383 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 371 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-28 03:29:39,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-28 03:29:39,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 46. [2022-04-28 03:29:39,413 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:39,414 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:39,414 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:39,414 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:39,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:39,415 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2022-04-28 03:29:39,415 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 49 transitions. [2022-04-28 03:29:39,415 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:39,415 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:39,415 INFO L74 IsIncluded]: Start isIncluded. First operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-28 03:29:39,415 INFO L87 Difference]: Start difference. First operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-28 03:29:39,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:39,416 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2022-04-28 03:29:39,416 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 49 transitions. [2022-04-28 03:29:39,416 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:39,416 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:39,416 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:39,416 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:39,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 41 states have (on average 1.0731707317073171) internal successors, (44), 41 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:39,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 48 transitions. [2022-04-28 03:29:39,417 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 48 transitions. Word has length 41 [2022-04-28 03:29:39,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:39,417 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 48 transitions. [2022-04-28 03:29:39,417 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 12 states have internal predecessors, (37), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:39,417 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 48 transitions. [2022-04-28 03:29:39,478 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:39,478 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 48 transitions. [2022-04-28 03:29:39,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-04-28 03:29:39,478 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:39,478 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:39,495 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-04-28 03:29:39,679 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:39,679 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:39,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:39,680 INFO L85 PathProgramCache]: Analyzing trace with hash 295822605, now seen corresponding path program 10 times [2022-04-28 03:29:39,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:39,680 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1220666674] [2022-04-28 03:29:40,476 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:42,054 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:29:42,213 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:42,215 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:42,217 INFO L85 PathProgramCache]: Analyzing trace with hash 1869591727, now seen corresponding path program 1 times [2022-04-28 03:29:42,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:42,217 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519692361] [2022-04-28 03:29:42,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:42,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:42,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:42,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:42,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:42,280 INFO L290 TraceCheckUtils]: 0: Hoare triple {3475#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3468#true} is VALID [2022-04-28 03:29:42,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {3468#true} assume true; {3468#true} is VALID [2022-04-28 03:29:42,280 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3468#true} {3468#true} #41#return; {3468#true} is VALID [2022-04-28 03:29:42,280 INFO L272 TraceCheckUtils]: 0: Hoare triple {3468#true} call ULTIMATE.init(); {3475#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:42,281 INFO L290 TraceCheckUtils]: 1: Hoare triple {3475#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3468#true} is VALID [2022-04-28 03:29:42,281 INFO L290 TraceCheckUtils]: 2: Hoare triple {3468#true} assume true; {3468#true} is VALID [2022-04-28 03:29:42,281 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3468#true} {3468#true} #41#return; {3468#true} is VALID [2022-04-28 03:29:42,281 INFO L272 TraceCheckUtils]: 4: Hoare triple {3468#true} call #t~ret7 := main(); {3468#true} is VALID [2022-04-28 03:29:42,281 INFO L290 TraceCheckUtils]: 5: Hoare triple {3468#true} ~x~0 := 0;~y~0 := 0; {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:42,282 INFO L290 TraceCheckUtils]: 6: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [85] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_214 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse2 (<= 500000 .cse6)) (.cse0 (= v_main_~x~0_214 v_main_~x~0_213)) (.cse1 (= v_main_~y~0_223 v_main_~y~0_222)) (.cse4 (= |v_main_#t~post6_136| |v_main_#t~post6_134|)) (.cse5 (= |v_main_#t~post5_67| |v_main_#t~post5_66|))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (< v_main_~y~0_222 v_main_~y~0_223) .cse3 (= (+ v_main_~x~0_214 v_main_~y~0_223) (+ v_main_~x~0_213 v_main_~y~0_222)) (<= (div (+ (* v_main_~x~0_214 (- 1)) v_main_~y~0_222 1000000 (* (- 1) v_main_~y~0_223)) (- 4294967296)) (+ (div (+ v_main_~x~0_214 (- 4294967295)) 4294967296) 1)) .cse2) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_223, main_#t~post5=|v_main_#t~post5_67|, main_~x~0=v_main_~x~0_214, main_#t~post6=|v_main_#t~post6_136|} OutVars{main_#t~post5=|v_main_#t~post5_66|, main_~y~0=v_main_~y~0_222, main_~x~0=v_main_~x~0_213, main_#t~post6=|v_main_#t~post6_134|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:42,282 INFO L290 TraceCheckUtils]: 7: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [86] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:42,283 INFO L290 TraceCheckUtils]: 8: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [87] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_216 4294967296)) (.cse1 (= |v_main_#t~post6_139| |v_main_#t~post6_135|)) (.cse2 (= v_main_~x~0_216 v_main_~x~0_215)) (.cse3 (= |v_main_#t~post4_72| |v_main_#t~post4_71|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_216 v_main_~y~0_224) (+ v_main_~x~0_215 v_main_~y~0_225)) (< v_main_~x~0_216 v_main_~x~0_215) (<= (div (+ (* v_main_~x~0_215 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_216 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse0) .cse1 .cse2 (= v_main_~y~0_224 v_main_~y~0_225) .cse3) (and .cse1 .cse2 (= v_main_~y~0_225 v_main_~y~0_224) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_72|, main_~y~0=v_main_~y~0_225, main_~x~0=v_main_~x~0_216, main_#t~post6=|v_main_#t~post6_139|} OutVars{main_#t~post4=|v_main_#t~post4_71|, main_~y~0=v_main_~y~0_224, main_~x~0=v_main_~x~0_215, main_#t~post6=|v_main_#t~post6_135|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3474#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:29:42,284 INFO L290 TraceCheckUtils]: 9: Hoare triple {3474#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} [84] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3469#false} is VALID [2022-04-28 03:29:42,284 INFO L272 TraceCheckUtils]: 10: Hoare triple {3469#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3469#false} is VALID [2022-04-28 03:29:42,284 INFO L290 TraceCheckUtils]: 11: Hoare triple {3469#false} ~cond := #in~cond; {3469#false} is VALID [2022-04-28 03:29:42,284 INFO L290 TraceCheckUtils]: 12: Hoare triple {3469#false} assume 0 == ~cond; {3469#false} is VALID [2022-04-28 03:29:42,284 INFO L290 TraceCheckUtils]: 13: Hoare triple {3469#false} assume !false; {3469#false} is VALID [2022-04-28 03:29:42,284 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:42,284 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:42,284 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519692361] [2022-04-28 03:29:42,285 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1519692361] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:42,285 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1648348754] [2022-04-28 03:29:42,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:42,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:42,285 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:42,286 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:42,287 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-28 03:29:42,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:42,313 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:42,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:42,322 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:42,483 INFO L272 TraceCheckUtils]: 0: Hoare triple {3468#true} call ULTIMATE.init(); {3468#true} is VALID [2022-04-28 03:29:42,483 INFO L290 TraceCheckUtils]: 1: Hoare triple {3468#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3468#true} is VALID [2022-04-28 03:29:42,484 INFO L290 TraceCheckUtils]: 2: Hoare triple {3468#true} assume true; {3468#true} is VALID [2022-04-28 03:29:42,485 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3468#true} {3468#true} #41#return; {3468#true} is VALID [2022-04-28 03:29:42,485 INFO L272 TraceCheckUtils]: 4: Hoare triple {3468#true} call #t~ret7 := main(); {3468#true} is VALID [2022-04-28 03:29:42,485 INFO L290 TraceCheckUtils]: 5: Hoare triple {3468#true} ~x~0 := 0;~y~0 := 0; {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:42,486 INFO L290 TraceCheckUtils]: 6: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [85] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_214 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse2 (<= 500000 .cse6)) (.cse0 (= v_main_~x~0_214 v_main_~x~0_213)) (.cse1 (= v_main_~y~0_223 v_main_~y~0_222)) (.cse4 (= |v_main_#t~post6_136| |v_main_#t~post6_134|)) (.cse5 (= |v_main_#t~post5_67| |v_main_#t~post5_66|))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (< v_main_~y~0_222 v_main_~y~0_223) .cse3 (= (+ v_main_~x~0_214 v_main_~y~0_223) (+ v_main_~x~0_213 v_main_~y~0_222)) (<= (div (+ (* v_main_~x~0_214 (- 1)) v_main_~y~0_222 1000000 (* (- 1) v_main_~y~0_223)) (- 4294967296)) (+ (div (+ v_main_~x~0_214 (- 4294967295)) 4294967296) 1)) .cse2) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_223, main_#t~post5=|v_main_#t~post5_67|, main_~x~0=v_main_~x~0_214, main_#t~post6=|v_main_#t~post6_136|} OutVars{main_#t~post5=|v_main_#t~post5_66|, main_~y~0=v_main_~y~0_222, main_~x~0=v_main_~x~0_213, main_#t~post6=|v_main_#t~post6_134|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:42,486 INFO L290 TraceCheckUtils]: 7: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [86] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3473#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:42,487 INFO L290 TraceCheckUtils]: 8: Hoare triple {3473#(and (= main_~x~0 0) (= main_~y~0 0))} [87] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_216 4294967296)) (.cse1 (= |v_main_#t~post6_139| |v_main_#t~post6_135|)) (.cse2 (= v_main_~x~0_216 v_main_~x~0_215)) (.cse3 (= |v_main_#t~post4_72| |v_main_#t~post4_71|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_216 v_main_~y~0_224) (+ v_main_~x~0_215 v_main_~y~0_225)) (< v_main_~x~0_216 v_main_~x~0_215) (<= (div (+ (* v_main_~x~0_215 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_216 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse0) .cse1 .cse2 (= v_main_~y~0_224 v_main_~y~0_225) .cse3) (and .cse1 .cse2 (= v_main_~y~0_225 v_main_~y~0_224) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_72|, main_~y~0=v_main_~y~0_225, main_~x~0=v_main_~x~0_216, main_#t~post6=|v_main_#t~post6_139|} OutVars{main_#t~post4=|v_main_#t~post4_71|, main_~y~0=v_main_~y~0_224, main_~x~0=v_main_~x~0_215, main_#t~post6=|v_main_#t~post6_135|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3503#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:29:42,488 INFO L290 TraceCheckUtils]: 9: Hoare triple {3503#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [84] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3469#false} is VALID [2022-04-28 03:29:42,488 INFO L272 TraceCheckUtils]: 10: Hoare triple {3469#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3469#false} is VALID [2022-04-28 03:29:42,488 INFO L290 TraceCheckUtils]: 11: Hoare triple {3469#false} ~cond := #in~cond; {3469#false} is VALID [2022-04-28 03:29:42,488 INFO L290 TraceCheckUtils]: 12: Hoare triple {3469#false} assume 0 == ~cond; {3469#false} is VALID [2022-04-28 03:29:42,488 INFO L290 TraceCheckUtils]: 13: Hoare triple {3469#false} assume !false; {3469#false} is VALID [2022-04-28 03:29:42,488 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:42,488 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:44,394 INFO L290 TraceCheckUtils]: 13: Hoare triple {3469#false} assume !false; {3469#false} is VALID [2022-04-28 03:29:44,394 INFO L290 TraceCheckUtils]: 12: Hoare triple {3522#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {3469#false} is VALID [2022-04-28 03:29:44,395 INFO L290 TraceCheckUtils]: 11: Hoare triple {3526#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {3522#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:44,395 INFO L272 TraceCheckUtils]: 10: Hoare triple {3530#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3526#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:44,395 INFO L290 TraceCheckUtils]: 9: Hoare triple {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [84] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3530#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:44,407 INFO L290 TraceCheckUtils]: 8: Hoare triple {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [87] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_216 4294967296)) (.cse1 (= |v_main_#t~post6_139| |v_main_#t~post6_135|)) (.cse2 (= v_main_~x~0_216 v_main_~x~0_215)) (.cse3 (= |v_main_#t~post4_72| |v_main_#t~post4_71|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_216 v_main_~y~0_224) (+ v_main_~x~0_215 v_main_~y~0_225)) (< v_main_~x~0_216 v_main_~x~0_215) (<= (div (+ (* v_main_~x~0_215 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_216 (- 4294967295)) 4294967296) 1))) (and (<= 500000 .cse0) .cse1 .cse2 (= v_main_~y~0_224 v_main_~y~0_225) .cse3) (and .cse1 .cse2 (= v_main_~y~0_225 v_main_~y~0_224) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_72|, main_~y~0=v_main_~y~0_225, main_~x~0=v_main_~x~0_216, main_#t~post6=|v_main_#t~post6_139|} OutVars{main_#t~post4=|v_main_#t~post4_71|, main_~y~0=v_main_~y~0_224, main_~x~0=v_main_~x~0_215, main_#t~post6=|v_main_#t~post6_135|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:44,408 INFO L290 TraceCheckUtils]: 7: Hoare triple {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [86] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:44,417 INFO L290 TraceCheckUtils]: 6: Hoare triple {3544#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_235_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_235_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_235_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [85] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_214 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse2 (<= 500000 .cse6)) (.cse0 (= v_main_~x~0_214 v_main_~x~0_213)) (.cse1 (= v_main_~y~0_223 v_main_~y~0_222)) (.cse4 (= |v_main_#t~post6_136| |v_main_#t~post6_134|)) (.cse5 (= |v_main_#t~post5_67| |v_main_#t~post5_66|))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (< v_main_~y~0_222 v_main_~y~0_223) .cse3 (= (+ v_main_~x~0_214 v_main_~y~0_223) (+ v_main_~x~0_213 v_main_~y~0_222)) (<= (div (+ (* v_main_~x~0_214 (- 1)) v_main_~y~0_222 1000000 (* (- 1) v_main_~y~0_223)) (- 4294967296)) (+ (div (+ v_main_~x~0_214 (- 4294967295)) 4294967296) 1)) .cse2) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_223, main_#t~post5=|v_main_#t~post5_67|, main_~x~0=v_main_~x~0_214, main_#t~post6=|v_main_#t~post6_136|} OutVars{main_#t~post5=|v_main_#t~post5_66|, main_~y~0=v_main_~y~0_222, main_~x~0=v_main_~x~0_213, main_#t~post6=|v_main_#t~post6_134|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3534#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:44,418 INFO L290 TraceCheckUtils]: 5: Hoare triple {3468#true} ~x~0 := 0;~y~0 := 0; {3544#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_235_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_235_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_235_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:44,418 INFO L272 TraceCheckUtils]: 4: Hoare triple {3468#true} call #t~ret7 := main(); {3468#true} is VALID [2022-04-28 03:29:44,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3468#true} {3468#true} #41#return; {3468#true} is VALID [2022-04-28 03:29:44,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {3468#true} assume true; {3468#true} is VALID [2022-04-28 03:29:44,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {3468#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3468#true} is VALID [2022-04-28 03:29:44,418 INFO L272 TraceCheckUtils]: 0: Hoare triple {3468#true} call ULTIMATE.init(); {3468#true} is VALID [2022-04-28 03:29:44,418 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:44,418 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1648348754] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:44,419 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:44,419 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-28 03:29:44,977 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:44,977 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1220666674] [2022-04-28 03:29:44,977 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1220666674] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:44,977 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:44,977 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2022-04-28 03:29:44,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2015136650] [2022-04-28 03:29:44,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:44,978 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 44 [2022-04-28 03:29:44,978 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:44,978 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:45,006 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:45,006 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-28 03:29:45,006 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:45,006 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-28 03:29:45,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=772, Unknown=0, NotChecked=0, Total=930 [2022-04-28 03:29:45,007 INFO L87 Difference]: Start difference. First operand 46 states and 48 transitions. Second operand has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:46,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:46,312 INFO L93 Difference]: Finished difference Result 57 states and 61 transitions. [2022-04-28 03:29:46,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-28 03:29:46,313 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 44 [2022-04-28 03:29:46,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:46,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:46,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 57 transitions. [2022-04-28 03:29:46,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:46,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 57 transitions. [2022-04-28 03:29:46,314 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 57 transitions. [2022-04-28 03:29:46,356 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:46,356 INFO L225 Difference]: With dead ends: 57 [2022-04-28 03:29:46,357 INFO L226 Difference]: Without dead ends: 49 [2022-04-28 03:29:46,357 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 30 SyntacticMatches, 13 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 545 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=336, Invalid=2316, Unknown=0, NotChecked=0, Total=2652 [2022-04-28 03:29:46,358 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 20 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 820 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 843 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 820 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:46,358 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 119 Invalid, 843 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 820 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-28 03:29:46,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-28 03:29:46,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2022-04-28 03:29:46,409 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:46,409 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:46,409 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:46,409 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:46,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:46,410 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2022-04-28 03:29:46,410 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2022-04-28 03:29:46,410 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:46,410 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:46,410 INFO L74 IsIncluded]: Start isIncluded. First operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-28 03:29:46,410 INFO L87 Difference]: Start difference. First operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-28 03:29:46,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:46,411 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2022-04-28 03:29:46,411 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2022-04-28 03:29:46,411 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:46,411 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:46,411 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:46,411 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:46,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 44 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:46,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 51 transitions. [2022-04-28 03:29:46,412 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 51 transitions. Word has length 44 [2022-04-28 03:29:46,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:46,412 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 51 transitions. [2022-04-28 03:29:46,412 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.6666666666666667) internal successors, (40), 23 states have internal predecessors, (40), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:46,412 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 49 states and 51 transitions. [2022-04-28 03:29:46,466 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:46,466 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2022-04-28 03:29:46,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-04-28 03:29:46,467 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:46,467 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:46,482 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-04-28 03:29:46,667 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-28 03:29:46,667 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:46,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:46,668 INFO L85 PathProgramCache]: Analyzing trace with hash 36194885, now seen corresponding path program 11 times [2022-04-28 03:29:46,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:46,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [870858013] [2022-04-28 03:29:47,679 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:48,762 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:29:49,361 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:49,362 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:49,365 INFO L85 PathProgramCache]: Analyzing trace with hash -375843409, now seen corresponding path program 1 times [2022-04-28 03:29:49,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:49,365 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008819472] [2022-04-28 03:29:49,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:49,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:49,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:49,424 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:49,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:49,427 INFO L290 TraceCheckUtils]: 0: Hoare triple {3944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3937#true} is VALID [2022-04-28 03:29:49,427 INFO L290 TraceCheckUtils]: 1: Hoare triple {3937#true} assume true; {3937#true} is VALID [2022-04-28 03:29:49,427 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3937#true} {3937#true} #41#return; {3937#true} is VALID [2022-04-28 03:29:49,427 INFO L272 TraceCheckUtils]: 0: Hoare triple {3937#true} call ULTIMATE.init(); {3944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:49,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {3944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3937#true} is VALID [2022-04-28 03:29:49,428 INFO L290 TraceCheckUtils]: 2: Hoare triple {3937#true} assume true; {3937#true} is VALID [2022-04-28 03:29:49,428 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3937#true} {3937#true} #41#return; {3937#true} is VALID [2022-04-28 03:29:49,428 INFO L272 TraceCheckUtils]: 4: Hoare triple {3937#true} call #t~ret7 := main(); {3937#true} is VALID [2022-04-28 03:29:49,428 INFO L290 TraceCheckUtils]: 5: Hoare triple {3937#true} ~x~0 := 0;~y~0 := 0; {3942#(= main_~x~0 0)} is VALID [2022-04-28 03:29:49,429 INFO L290 TraceCheckUtils]: 6: Hoare triple {3942#(= main_~x~0 0)} [89] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_241 4294967296))) (let ((.cse2 (= v_main_~x~0_241 v_main_~x~0_240)) (.cse3 (= v_main_~y~0_251 v_main_~y~0_250)) (.cse4 (= |v_main_#t~post5_74| |v_main_#t~post5_73|)) (.cse5 (= |v_main_#t~post6_150| |v_main_#t~post6_148|)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (< v_main_~x~0_241 v_main_~x~0_240) .cse0 (<= (div (+ (* v_main_~x~0_240 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_241 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_240 v_main_~y~0_250) (+ v_main_~x~0_241 v_main_~y~0_251)) .cse1)))) InVars {main_~y~0=v_main_~y~0_251, main_#t~post5=|v_main_#t~post5_74|, main_~x~0=v_main_~x~0_241, main_#t~post6=|v_main_#t~post6_150|} OutVars{main_#t~post5=|v_main_#t~post5_73|, main_~y~0=v_main_~y~0_250, main_~x~0=v_main_~x~0_240, main_#t~post6=|v_main_#t~post6_148|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3942#(= main_~x~0 0)} is VALID [2022-04-28 03:29:49,429 INFO L290 TraceCheckUtils]: 7: Hoare triple {3942#(= main_~x~0 0)} [90] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3942#(= main_~x~0 0)} is VALID [2022-04-28 03:29:49,430 INFO L290 TraceCheckUtils]: 8: Hoare triple {3942#(= main_~x~0 0)} [91] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_253 v_main_~y~0_252)) (.cse1 (= |v_main_#t~post4_79| |v_main_#t~post4_78|)) (.cse2 (= v_main_~x~0_243 v_main_~x~0_242)) (.cse4 (= |v_main_#t~post6_153| |v_main_#t~post6_149|)) (.cse3 (mod v_main_~x~0_243 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (= (+ v_main_~x~0_242 v_main_~y~0_253) (+ v_main_~x~0_243 v_main_~y~0_252)) (< .cse3 500000) (<= (div (+ v_main_~y~0_253 (* v_main_~x~0_243 (- 1)) 500000 (* (- 1) v_main_~y~0_252)) (- 4294967296)) (+ (div (+ v_main_~x~0_243 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_253 v_main_~y~0_252)))) InVars {main_#t~post4=|v_main_#t~post4_79|, main_~y~0=v_main_~y~0_253, main_~x~0=v_main_~x~0_243, main_#t~post6=|v_main_#t~post6_153|} OutVars{main_#t~post4=|v_main_#t~post4_78|, main_~y~0=v_main_~y~0_252, main_~x~0=v_main_~x~0_242, main_#t~post6=|v_main_#t~post6_149|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3943#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:29:49,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {3943#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [88] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3938#false} is VALID [2022-04-28 03:29:49,431 INFO L272 TraceCheckUtils]: 10: Hoare triple {3938#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3938#false} is VALID [2022-04-28 03:29:49,431 INFO L290 TraceCheckUtils]: 11: Hoare triple {3938#false} ~cond := #in~cond; {3938#false} is VALID [2022-04-28 03:29:49,431 INFO L290 TraceCheckUtils]: 12: Hoare triple {3938#false} assume 0 == ~cond; {3938#false} is VALID [2022-04-28 03:29:49,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {3938#false} assume !false; {3938#false} is VALID [2022-04-28 03:29:49,431 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:49,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:49,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008819472] [2022-04-28 03:29:49,432 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1008819472] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:49,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1387492732] [2022-04-28 03:29:49,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:49,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:49,432 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:49,433 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:49,434 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-28 03:29:49,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:49,460 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:49,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:49,468 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:49,632 INFO L272 TraceCheckUtils]: 0: Hoare triple {3937#true} call ULTIMATE.init(); {3937#true} is VALID [2022-04-28 03:29:49,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {3937#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3937#true} is VALID [2022-04-28 03:29:49,632 INFO L290 TraceCheckUtils]: 2: Hoare triple {3937#true} assume true; {3937#true} is VALID [2022-04-28 03:29:49,632 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3937#true} {3937#true} #41#return; {3937#true} is VALID [2022-04-28 03:29:49,632 INFO L272 TraceCheckUtils]: 4: Hoare triple {3937#true} call #t~ret7 := main(); {3937#true} is VALID [2022-04-28 03:29:49,633 INFO L290 TraceCheckUtils]: 5: Hoare triple {3937#true} ~x~0 := 0;~y~0 := 0; {3963#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:49,633 INFO L290 TraceCheckUtils]: 6: Hoare triple {3963#(and (= main_~x~0 0) (= main_~y~0 0))} [89] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_241 4294967296))) (let ((.cse2 (= v_main_~x~0_241 v_main_~x~0_240)) (.cse3 (= v_main_~y~0_251 v_main_~y~0_250)) (.cse4 (= |v_main_#t~post5_74| |v_main_#t~post5_73|)) (.cse5 (= |v_main_#t~post6_150| |v_main_#t~post6_148|)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (< v_main_~x~0_241 v_main_~x~0_240) .cse0 (<= (div (+ (* v_main_~x~0_240 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_241 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_240 v_main_~y~0_250) (+ v_main_~x~0_241 v_main_~y~0_251)) .cse1)))) InVars {main_~y~0=v_main_~y~0_251, main_#t~post5=|v_main_#t~post5_74|, main_~x~0=v_main_~x~0_241, main_#t~post6=|v_main_#t~post6_150|} OutVars{main_#t~post5=|v_main_#t~post5_73|, main_~y~0=v_main_~y~0_250, main_~x~0=v_main_~x~0_240, main_#t~post6=|v_main_#t~post6_148|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {3963#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:49,634 INFO L290 TraceCheckUtils]: 7: Hoare triple {3963#(and (= main_~x~0 0) (= main_~y~0 0))} [90] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3963#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:49,634 INFO L290 TraceCheckUtils]: 8: Hoare triple {3963#(and (= main_~x~0 0) (= main_~y~0 0))} [91] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_253 v_main_~y~0_252)) (.cse1 (= |v_main_#t~post4_79| |v_main_#t~post4_78|)) (.cse2 (= v_main_~x~0_243 v_main_~x~0_242)) (.cse4 (= |v_main_#t~post6_153| |v_main_#t~post6_149|)) (.cse3 (mod v_main_~x~0_243 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (= (+ v_main_~x~0_242 v_main_~y~0_253) (+ v_main_~x~0_243 v_main_~y~0_252)) (< .cse3 500000) (<= (div (+ v_main_~y~0_253 (* v_main_~x~0_243 (- 1)) 500000 (* (- 1) v_main_~y~0_252)) (- 4294967296)) (+ (div (+ v_main_~x~0_243 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_253 v_main_~y~0_252)))) InVars {main_#t~post4=|v_main_#t~post4_79|, main_~y~0=v_main_~y~0_253, main_~x~0=v_main_~x~0_243, main_#t~post6=|v_main_#t~post6_153|} OutVars{main_#t~post4=|v_main_#t~post4_78|, main_~y~0=v_main_~y~0_252, main_~x~0=v_main_~x~0_242, main_#t~post6=|v_main_#t~post6_149|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {3973#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:29:49,636 INFO L290 TraceCheckUtils]: 9: Hoare triple {3973#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [88] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {3938#false} is VALID [2022-04-28 03:29:49,636 INFO L272 TraceCheckUtils]: 10: Hoare triple {3938#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3938#false} is VALID [2022-04-28 03:29:49,636 INFO L290 TraceCheckUtils]: 11: Hoare triple {3938#false} ~cond := #in~cond; {3938#false} is VALID [2022-04-28 03:29:49,636 INFO L290 TraceCheckUtils]: 12: Hoare triple {3938#false} assume 0 == ~cond; {3938#false} is VALID [2022-04-28 03:29:49,636 INFO L290 TraceCheckUtils]: 13: Hoare triple {3938#false} assume !false; {3938#false} is VALID [2022-04-28 03:29:49,636 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:49,636 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:50,587 INFO L290 TraceCheckUtils]: 13: Hoare triple {3938#false} assume !false; {3938#false} is VALID [2022-04-28 03:29:50,587 INFO L290 TraceCheckUtils]: 12: Hoare triple {3992#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {3938#false} is VALID [2022-04-28 03:29:50,587 INFO L290 TraceCheckUtils]: 11: Hoare triple {3996#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {3992#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:50,588 INFO L272 TraceCheckUtils]: 10: Hoare triple {4000#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {3996#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:50,588 INFO L290 TraceCheckUtils]: 9: Hoare triple {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [88] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4000#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:50,590 INFO L290 TraceCheckUtils]: 8: Hoare triple {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [91] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_253 v_main_~y~0_252)) (.cse1 (= |v_main_#t~post4_79| |v_main_#t~post4_78|)) (.cse2 (= v_main_~x~0_243 v_main_~x~0_242)) (.cse4 (= |v_main_#t~post6_153| |v_main_#t~post6_149|)) (.cse3 (mod v_main_~x~0_243 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (= (+ v_main_~x~0_242 v_main_~y~0_253) (+ v_main_~x~0_243 v_main_~y~0_252)) (< .cse3 500000) (<= (div (+ v_main_~y~0_253 (* v_main_~x~0_243 (- 1)) 500000 (* (- 1) v_main_~y~0_252)) (- 4294967296)) (+ (div (+ v_main_~x~0_243 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_253 v_main_~y~0_252)))) InVars {main_#t~post4=|v_main_#t~post4_79|, main_~y~0=v_main_~y~0_253, main_~x~0=v_main_~x~0_243, main_#t~post6=|v_main_#t~post6_153|} OutVars{main_#t~post4=|v_main_#t~post4_78|, main_~y~0=v_main_~y~0_252, main_~x~0=v_main_~x~0_242, main_#t~post6=|v_main_#t~post6_149|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:50,590 INFO L290 TraceCheckUtils]: 7: Hoare triple {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [90] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:50,663 INFO L290 TraceCheckUtils]: 6: Hoare triple {4014#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_263_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_263_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_263_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [89] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_241 4294967296))) (let ((.cse2 (= v_main_~x~0_241 v_main_~x~0_240)) (.cse3 (= v_main_~y~0_251 v_main_~y~0_250)) (.cse4 (= |v_main_#t~post5_74| |v_main_#t~post5_73|)) (.cse5 (= |v_main_#t~post6_150| |v_main_#t~post6_148|)) (.cse0 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (< v_main_~x~0_241 v_main_~x~0_240) .cse0 (<= (div (+ (* v_main_~x~0_240 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_241 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_240 v_main_~y~0_250) (+ v_main_~x~0_241 v_main_~y~0_251)) .cse1)))) InVars {main_~y~0=v_main_~y~0_251, main_#t~post5=|v_main_#t~post5_74|, main_~x~0=v_main_~x~0_241, main_#t~post6=|v_main_#t~post6_150|} OutVars{main_#t~post5=|v_main_#t~post5_73|, main_~y~0=v_main_~y~0_250, main_~x~0=v_main_~x~0_240, main_#t~post6=|v_main_#t~post6_148|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4004#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:50,664 INFO L290 TraceCheckUtils]: 5: Hoare triple {3937#true} ~x~0 := 0;~y~0 := 0; {4014#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_263_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_263_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_263_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:50,664 INFO L272 TraceCheckUtils]: 4: Hoare triple {3937#true} call #t~ret7 := main(); {3937#true} is VALID [2022-04-28 03:29:50,664 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3937#true} {3937#true} #41#return; {3937#true} is VALID [2022-04-28 03:29:50,664 INFO L290 TraceCheckUtils]: 2: Hoare triple {3937#true} assume true; {3937#true} is VALID [2022-04-28 03:29:50,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {3937#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {3937#true} is VALID [2022-04-28 03:29:50,664 INFO L272 TraceCheckUtils]: 0: Hoare triple {3937#true} call ULTIMATE.init(); {3937#true} is VALID [2022-04-28 03:29:50,665 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:50,665 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1387492732] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:50,665 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:50,665 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:51,151 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:51,151 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [870858013] [2022-04-28 03:29:51,151 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [870858013] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:51,151 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:51,151 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2022-04-28 03:29:51,151 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641020970] [2022-04-28 03:29:51,151 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:51,152 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 47 [2022-04-28 03:29:51,152 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:51,152 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,172 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:51,172 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-28 03:29:51,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:51,173 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-28 03:29:51,173 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=417, Unknown=0, NotChecked=0, Total=506 [2022-04-28 03:29:51,173 INFO L87 Difference]: Start difference. First operand 49 states and 51 transitions. Second operand has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:51,749 INFO L93 Difference]: Finished difference Result 61 states and 65 transitions. [2022-04-28 03:29:51,749 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-28 03:29:51,749 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 47 [2022-04-28 03:29:51,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:51,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 61 transitions. [2022-04-28 03:29:51,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 61 transitions. [2022-04-28 03:29:51,754 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 61 transitions. [2022-04-28 03:29:51,788 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:51,789 INFO L225 Difference]: With dead ends: 61 [2022-04-28 03:29:51,790 INFO L226 Difference]: Without dead ends: 53 [2022-04-28 03:29:51,791 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 29 SyntacticMatches, 25 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=173, Invalid=1017, Unknown=0, NotChecked=0, Total=1190 [2022-04-28 03:29:51,791 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 34 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 517 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 531 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 517 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:51,791 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 74 Invalid, 531 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 517 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-28 03:29:51,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-04-28 03:29:51,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 52. [2022-04-28 03:29:51,829 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:51,829 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,830 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,830 INFO L87 Difference]: Start difference. First operand 53 states. Second operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:51,830 INFO L93 Difference]: Finished difference Result 53 states and 55 transitions. [2022-04-28 03:29:51,831 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 55 transitions. [2022-04-28 03:29:51,831 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:51,831 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:51,831 INFO L74 IsIncluded]: Start isIncluded. First operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-28 03:29:51,831 INFO L87 Difference]: Start difference. First operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-28 03:29:51,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:51,832 INFO L93 Difference]: Finished difference Result 53 states and 55 transitions. [2022-04-28 03:29:51,832 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 55 transitions. [2022-04-28 03:29:51,832 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:51,832 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:51,832 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:51,832 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:51,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 47 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2022-04-28 03:29:51,833 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 54 transitions. Word has length 47 [2022-04-28 03:29:51,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:51,833 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 54 transitions. [2022-04-28 03:29:51,833 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.8666666666666667) internal successors, (43), 14 states have internal predecessors, (43), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:51,833 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 54 transitions. [2022-04-28 03:29:51,912 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:51,912 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 54 transitions. [2022-04-28 03:29:51,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-28 03:29:51,913 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:51,913 INFO L195 NwaCegarLoop]: trace histogram [13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:51,929 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-28 03:29:52,134 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-28 03:29:52,134 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:52,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:52,135 INFO L85 PathProgramCache]: Analyzing trace with hash 702888461, now seen corresponding path program 12 times [2022-04-28 03:29:52,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:52,135 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1139960863] [2022-04-28 03:29:52,964 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:53,973 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:29:53,975 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:29:53,977 INFO L85 PathProgramCache]: Analyzing trace with hash 1673688751, now seen corresponding path program 1 times [2022-04-28 03:29:53,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:29:53,977 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565550564] [2022-04-28 03:29:53,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:53,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:29:53,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:54,024 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:29:54,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:54,027 INFO L290 TraceCheckUtils]: 0: Hoare triple {4409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4402#true} is VALID [2022-04-28 03:29:54,028 INFO L290 TraceCheckUtils]: 1: Hoare triple {4402#true} assume true; {4402#true} is VALID [2022-04-28 03:29:54,028 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4402#true} {4402#true} #41#return; {4402#true} is VALID [2022-04-28 03:29:54,028 INFO L272 TraceCheckUtils]: 0: Hoare triple {4402#true} call ULTIMATE.init(); {4409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:29:54,028 INFO L290 TraceCheckUtils]: 1: Hoare triple {4409#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4402#true} is VALID [2022-04-28 03:29:54,028 INFO L290 TraceCheckUtils]: 2: Hoare triple {4402#true} assume true; {4402#true} is VALID [2022-04-28 03:29:54,028 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4402#true} {4402#true} #41#return; {4402#true} is VALID [2022-04-28 03:29:54,028 INFO L272 TraceCheckUtils]: 4: Hoare triple {4402#true} call #t~ret7 := main(); {4402#true} is VALID [2022-04-28 03:29:54,029 INFO L290 TraceCheckUtils]: 5: Hoare triple {4402#true} ~x~0 := 0;~y~0 := 0; {4407#(= main_~x~0 0)} is VALID [2022-04-28 03:29:54,029 INFO L290 TraceCheckUtils]: 6: Hoare triple {4407#(= main_~x~0 0)} [93] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_269 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_280 v_main_~y~0_279)) (.cse3 (= |v_main_#t~post6_164| |v_main_#t~post6_162|)) (.cse4 (= v_main_~x~0_269 v_main_~x~0_268)) (.cse5 (= |v_main_#t~post5_81| |v_main_#t~post5_80|))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse1 (<= (div (+ v_main_~y~0_279 (* v_main_~x~0_269 (- 1)) (* (- 1) v_main_~y~0_280) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_269 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_269 v_main_~y~0_280) (+ v_main_~x~0_268 v_main_~y~0_279)) .cse0 (< v_main_~y~0_279 v_main_~y~0_280)) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_280, main_#t~post5=|v_main_#t~post5_81|, main_~x~0=v_main_~x~0_269, main_#t~post6=|v_main_#t~post6_164|} OutVars{main_#t~post5=|v_main_#t~post5_80|, main_~y~0=v_main_~y~0_279, main_~x~0=v_main_~x~0_268, main_#t~post6=|v_main_#t~post6_162|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4407#(= main_~x~0 0)} is VALID [2022-04-28 03:29:54,030 INFO L290 TraceCheckUtils]: 7: Hoare triple {4407#(= main_~x~0 0)} [94] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4407#(= main_~x~0 0)} is VALID [2022-04-28 03:29:54,031 INFO L290 TraceCheckUtils]: 8: Hoare triple {4407#(= main_~x~0 0)} [95] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_86| |v_main_#t~post4_85|)) (.cse1 (= v_main_~x~0_271 v_main_~x~0_270)) (.cse2 (= |v_main_#t~post6_167| |v_main_#t~post6_163|)) (.cse3 (= v_main_~y~0_282 v_main_~y~0_281)) (.cse4 (mod v_main_~x~0_271 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< v_main_~y~0_282 v_main_~y~0_281) (< .cse4 500000) (<= (div (+ (* v_main_~x~0_271 (- 1)) v_main_~y~0_282 500000 (* (- 1) v_main_~y~0_281)) (- 4294967296)) (+ (div (+ v_main_~x~0_271 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_271 v_main_~y~0_281) (+ v_main_~x~0_270 v_main_~y~0_282))))) InVars {main_#t~post4=|v_main_#t~post4_86|, main_~y~0=v_main_~y~0_282, main_~x~0=v_main_~x~0_271, main_#t~post6=|v_main_#t~post6_167|} OutVars{main_#t~post4=|v_main_#t~post4_85|, main_~y~0=v_main_~y~0_281, main_~x~0=v_main_~x~0_270, main_#t~post6=|v_main_#t~post6_163|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4408#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:29:54,031 INFO L290 TraceCheckUtils]: 9: Hoare triple {4408#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [92] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4403#false} is VALID [2022-04-28 03:29:54,031 INFO L272 TraceCheckUtils]: 10: Hoare triple {4403#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4403#false} is VALID [2022-04-28 03:29:54,032 INFO L290 TraceCheckUtils]: 11: Hoare triple {4403#false} ~cond := #in~cond; {4403#false} is VALID [2022-04-28 03:29:54,032 INFO L290 TraceCheckUtils]: 12: Hoare triple {4403#false} assume 0 == ~cond; {4403#false} is VALID [2022-04-28 03:29:54,032 INFO L290 TraceCheckUtils]: 13: Hoare triple {4403#false} assume !false; {4403#false} is VALID [2022-04-28 03:29:54,032 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:54,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:29:54,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565550564] [2022-04-28 03:29:54,032 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [565550564] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:29:54,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [951287198] [2022-04-28 03:29:54,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:29:54,032 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:29:54,032 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:29:54,033 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:29:54,034 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-28 03:29:54,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:54,065 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:29:54,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:29:54,072 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:29:54,232 INFO L272 TraceCheckUtils]: 0: Hoare triple {4402#true} call ULTIMATE.init(); {4402#true} is VALID [2022-04-28 03:29:54,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {4402#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4402#true} is VALID [2022-04-28 03:29:54,232 INFO L290 TraceCheckUtils]: 2: Hoare triple {4402#true} assume true; {4402#true} is VALID [2022-04-28 03:29:54,233 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4402#true} {4402#true} #41#return; {4402#true} is VALID [2022-04-28 03:29:54,233 INFO L272 TraceCheckUtils]: 4: Hoare triple {4402#true} call #t~ret7 := main(); {4402#true} is VALID [2022-04-28 03:29:54,233 INFO L290 TraceCheckUtils]: 5: Hoare triple {4402#true} ~x~0 := 0;~y~0 := 0; {4428#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:54,234 INFO L290 TraceCheckUtils]: 6: Hoare triple {4428#(and (= main_~x~0 0) (= main_~y~0 0))} [93] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_269 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_280 v_main_~y~0_279)) (.cse3 (= |v_main_#t~post6_164| |v_main_#t~post6_162|)) (.cse4 (= v_main_~x~0_269 v_main_~x~0_268)) (.cse5 (= |v_main_#t~post5_81| |v_main_#t~post5_80|))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse1 (<= (div (+ v_main_~y~0_279 (* v_main_~x~0_269 (- 1)) (* (- 1) v_main_~y~0_280) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_269 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_269 v_main_~y~0_280) (+ v_main_~x~0_268 v_main_~y~0_279)) .cse0 (< v_main_~y~0_279 v_main_~y~0_280)) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_280, main_#t~post5=|v_main_#t~post5_81|, main_~x~0=v_main_~x~0_269, main_#t~post6=|v_main_#t~post6_164|} OutVars{main_#t~post5=|v_main_#t~post5_80|, main_~y~0=v_main_~y~0_279, main_~x~0=v_main_~x~0_268, main_#t~post6=|v_main_#t~post6_162|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4428#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:54,234 INFO L290 TraceCheckUtils]: 7: Hoare triple {4428#(and (= main_~x~0 0) (= main_~y~0 0))} [94] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4428#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:29:54,235 INFO L290 TraceCheckUtils]: 8: Hoare triple {4428#(and (= main_~x~0 0) (= main_~y~0 0))} [95] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_86| |v_main_#t~post4_85|)) (.cse1 (= v_main_~x~0_271 v_main_~x~0_270)) (.cse2 (= |v_main_#t~post6_167| |v_main_#t~post6_163|)) (.cse3 (= v_main_~y~0_282 v_main_~y~0_281)) (.cse4 (mod v_main_~x~0_271 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< v_main_~y~0_282 v_main_~y~0_281) (< .cse4 500000) (<= (div (+ (* v_main_~x~0_271 (- 1)) v_main_~y~0_282 500000 (* (- 1) v_main_~y~0_281)) (- 4294967296)) (+ (div (+ v_main_~x~0_271 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_271 v_main_~y~0_281) (+ v_main_~x~0_270 v_main_~y~0_282))))) InVars {main_#t~post4=|v_main_#t~post4_86|, main_~y~0=v_main_~y~0_282, main_~x~0=v_main_~x~0_271, main_#t~post6=|v_main_#t~post6_167|} OutVars{main_#t~post4=|v_main_#t~post4_85|, main_~y~0=v_main_~y~0_281, main_~x~0=v_main_~x~0_270, main_#t~post6=|v_main_#t~post6_163|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4438#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:29:54,235 INFO L290 TraceCheckUtils]: 9: Hoare triple {4438#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [92] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4403#false} is VALID [2022-04-28 03:29:54,236 INFO L272 TraceCheckUtils]: 10: Hoare triple {4403#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4403#false} is VALID [2022-04-28 03:29:54,236 INFO L290 TraceCheckUtils]: 11: Hoare triple {4403#false} ~cond := #in~cond; {4403#false} is VALID [2022-04-28 03:29:54,236 INFO L290 TraceCheckUtils]: 12: Hoare triple {4403#false} assume 0 == ~cond; {4403#false} is VALID [2022-04-28 03:29:54,236 INFO L290 TraceCheckUtils]: 13: Hoare triple {4403#false} assume !false; {4403#false} is VALID [2022-04-28 03:29:54,236 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:54,236 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:29:55,101 INFO L290 TraceCheckUtils]: 13: Hoare triple {4403#false} assume !false; {4403#false} is VALID [2022-04-28 03:29:55,101 INFO L290 TraceCheckUtils]: 12: Hoare triple {4457#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {4403#false} is VALID [2022-04-28 03:29:55,101 INFO L290 TraceCheckUtils]: 11: Hoare triple {4461#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {4457#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:29:55,102 INFO L272 TraceCheckUtils]: 10: Hoare triple {4465#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4461#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:29:55,102 INFO L290 TraceCheckUtils]: 9: Hoare triple {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [92] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4465#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:29:55,108 INFO L290 TraceCheckUtils]: 8: Hoare triple {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [95] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_86| |v_main_#t~post4_85|)) (.cse1 (= v_main_~x~0_271 v_main_~x~0_270)) (.cse2 (= |v_main_#t~post6_167| |v_main_#t~post6_163|)) (.cse3 (= v_main_~y~0_282 v_main_~y~0_281)) (.cse4 (mod v_main_~x~0_271 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< v_main_~y~0_282 v_main_~y~0_281) (< .cse4 500000) (<= (div (+ (* v_main_~x~0_271 (- 1)) v_main_~y~0_282 500000 (* (- 1) v_main_~y~0_281)) (- 4294967296)) (+ (div (+ v_main_~x~0_271 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_271 v_main_~y~0_281) (+ v_main_~x~0_270 v_main_~y~0_282))))) InVars {main_#t~post4=|v_main_#t~post4_86|, main_~y~0=v_main_~y~0_282, main_~x~0=v_main_~x~0_271, main_#t~post6=|v_main_#t~post6_167|} OutVars{main_#t~post4=|v_main_#t~post4_85|, main_~y~0=v_main_~y~0_281, main_~x~0=v_main_~x~0_270, main_#t~post6=|v_main_#t~post6_163|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:55,108 INFO L290 TraceCheckUtils]: 7: Hoare triple {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [94] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:55,120 INFO L290 TraceCheckUtils]: 6: Hoare triple {4479#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_292_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_292_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_292_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [93] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_269 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_280 v_main_~y~0_279)) (.cse3 (= |v_main_#t~post6_164| |v_main_#t~post6_162|)) (.cse4 (= v_main_~x~0_269 v_main_~x~0_268)) (.cse5 (= |v_main_#t~post5_81| |v_main_#t~post5_80|))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse1 (<= (div (+ v_main_~y~0_279 (* v_main_~x~0_269 (- 1)) (* (- 1) v_main_~y~0_280) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_269 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_269 v_main_~y~0_280) (+ v_main_~x~0_268 v_main_~y~0_279)) .cse0 (< v_main_~y~0_279 v_main_~y~0_280)) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_280, main_#t~post5=|v_main_#t~post5_81|, main_~x~0=v_main_~x~0_269, main_#t~post6=|v_main_#t~post6_164|} OutVars{main_#t~post5=|v_main_#t~post5_80|, main_~y~0=v_main_~y~0_279, main_~x~0=v_main_~x~0_268, main_#t~post6=|v_main_#t~post6_162|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4469#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:29:55,121 INFO L290 TraceCheckUtils]: 5: Hoare triple {4402#true} ~x~0 := 0;~y~0 := 0; {4479#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_292_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_292_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_292_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:29:55,121 INFO L272 TraceCheckUtils]: 4: Hoare triple {4402#true} call #t~ret7 := main(); {4402#true} is VALID [2022-04-28 03:29:55,121 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4402#true} {4402#true} #41#return; {4402#true} is VALID [2022-04-28 03:29:55,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {4402#true} assume true; {4402#true} is VALID [2022-04-28 03:29:55,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {4402#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4402#true} is VALID [2022-04-28 03:29:55,121 INFO L272 TraceCheckUtils]: 0: Hoare triple {4402#true} call ULTIMATE.init(); {4402#true} is VALID [2022-04-28 03:29:55,121 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:29:55,122 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [951287198] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:29:55,122 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:29:55,122 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:29:55,658 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:29:55,658 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1139960863] [2022-04-28 03:29:55,658 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1139960863] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:29:55,658 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:29:55,658 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2022-04-28 03:29:55,659 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [528938495] [2022-04-28 03:29:55,659 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:29:55,659 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 50 [2022-04-28 03:29:55,659 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:29:55,659 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:55,693 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:55,693 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-28 03:29:55,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:55,693 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-28 03:29:55,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=458, Unknown=0, NotChecked=0, Total=552 [2022-04-28 03:29:55,694 INFO L87 Difference]: Start difference. First operand 52 states and 54 transitions. Second operand has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:56,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:56,651 INFO L93 Difference]: Finished difference Result 64 states and 68 transitions. [2022-04-28 03:29:56,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-28 03:29:56,651 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 50 [2022-04-28 03:29:56,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:29:56,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:56,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 64 transitions. [2022-04-28 03:29:56,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:56,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 64 transitions. [2022-04-28 03:29:56,653 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 64 transitions. [2022-04-28 03:29:56,699 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:56,700 INFO L225 Difference]: With dead ends: 64 [2022-04-28 03:29:56,700 INFO L226 Difference]: Without dead ends: 56 [2022-04-28 03:29:56,700 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 29 SyntacticMatches, 27 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=185, Invalid=1147, Unknown=0, NotChecked=0, Total=1332 [2022-04-28 03:29:56,700 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 36 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 599 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 614 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 599 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:29:56,701 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 79 Invalid, 614 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 599 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-28 03:29:56,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-04-28 03:29:56,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 55. [2022-04-28 03:29:56,760 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:29:56,760 INFO L82 GeneralOperation]: Start isEquivalent. First operand 56 states. Second operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:56,761 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:56,761 INFO L87 Difference]: Start difference. First operand 56 states. Second operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:56,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:56,761 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2022-04-28 03:29:56,762 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 58 transitions. [2022-04-28 03:29:56,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:56,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:56,762 INFO L74 IsIncluded]: Start isIncluded. First operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-28 03:29:56,762 INFO L87 Difference]: Start difference. First operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-28 03:29:56,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:29:56,763 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2022-04-28 03:29:56,763 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 58 transitions. [2022-04-28 03:29:56,763 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:29:56,763 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:29:56,763 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:29:56,763 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:29:56,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 50 states have (on average 1.06) internal successors, (53), 50 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:56,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2022-04-28 03:29:56,764 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 57 transitions. Word has length 50 [2022-04-28 03:29:56,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:29:56,764 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 57 transitions. [2022-04-28 03:29:56,764 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.875) internal successors, (46), 15 states have internal predecessors, (46), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:29:56,764 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 55 states and 57 transitions. [2022-04-28 03:29:56,826 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:29:56,826 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 57 transitions. [2022-04-28 03:29:56,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-04-28 03:29:56,826 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:29:56,827 INFO L195 NwaCegarLoop]: trace histogram [14, 14, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:29:56,842 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-28 03:29:57,027 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-28 03:29:57,027 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:29:57,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:29:57,028 INFO L85 PathProgramCache]: Analyzing trace with hash -2052532923, now seen corresponding path program 13 times [2022-04-28 03:29:57,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:29:57,028 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [266547418] [2022-04-28 03:29:57,720 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:00,833 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:30:01,058 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:01,059 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:30:01,061 INFO L85 PathProgramCache]: Analyzing trace with hash -571746385, now seen corresponding path program 1 times [2022-04-28 03:30:01,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:30:01,062 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503792585] [2022-04-28 03:30:01,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:01,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:30:01,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:01,131 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:30:01,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:01,135 INFO L290 TraceCheckUtils]: 0: Hoare triple {4895#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4888#true} is VALID [2022-04-28 03:30:01,135 INFO L290 TraceCheckUtils]: 1: Hoare triple {4888#true} assume true; {4888#true} is VALID [2022-04-28 03:30:01,135 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4888#true} {4888#true} #41#return; {4888#true} is VALID [2022-04-28 03:30:01,135 INFO L272 TraceCheckUtils]: 0: Hoare triple {4888#true} call ULTIMATE.init(); {4895#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:30:01,136 INFO L290 TraceCheckUtils]: 1: Hoare triple {4895#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4888#true} is VALID [2022-04-28 03:30:01,136 INFO L290 TraceCheckUtils]: 2: Hoare triple {4888#true} assume true; {4888#true} is VALID [2022-04-28 03:30:01,136 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4888#true} {4888#true} #41#return; {4888#true} is VALID [2022-04-28 03:30:01,136 INFO L272 TraceCheckUtils]: 4: Hoare triple {4888#true} call #t~ret7 := main(); {4888#true} is VALID [2022-04-28 03:30:01,136 INFO L290 TraceCheckUtils]: 5: Hoare triple {4888#true} ~x~0 := 0;~y~0 := 0; {4893#(= main_~x~0 0)} is VALID [2022-04-28 03:30:01,137 INFO L290 TraceCheckUtils]: 6: Hoare triple {4893#(= main_~x~0 0)} [97] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_298 4294967296))) (let ((.cse0 (= |v_main_#t~post6_178| |v_main_#t~post6_176|)) (.cse1 (= v_main_~x~0_298 v_main_~x~0_297)) (.cse2 (= |v_main_#t~post5_88| |v_main_#t~post5_87|)) (.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5))) (or (and (= v_main_~y~0_310 v_main_~y~0_309) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= v_main_~y~0_309 v_main_~y~0_310) .cse2) (and (< v_main_~x~0_298 v_main_~x~0_297) .cse3 (<= (div (+ 1000000 (* v_main_~x~0_297 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_298 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_297 v_main_~y~0_309) (+ v_main_~x~0_298 v_main_~y~0_310)) .cse4)))) InVars {main_~y~0=v_main_~y~0_310, main_#t~post5=|v_main_#t~post5_88|, main_~x~0=v_main_~x~0_298, main_#t~post6=|v_main_#t~post6_178|} OutVars{main_#t~post5=|v_main_#t~post5_87|, main_~y~0=v_main_~y~0_309, main_~x~0=v_main_~x~0_297, main_#t~post6=|v_main_#t~post6_176|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4893#(= main_~x~0 0)} is VALID [2022-04-28 03:30:01,137 INFO L290 TraceCheckUtils]: 7: Hoare triple {4893#(= main_~x~0 0)} [98] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4893#(= main_~x~0 0)} is VALID [2022-04-28 03:30:01,138 INFO L290 TraceCheckUtils]: 8: Hoare triple {4893#(= main_~x~0 0)} [99] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_300 v_main_~x~0_299)) (.cse1 (= v_main_~y~0_312 v_main_~y~0_311)) (.cse2 (= |v_main_#t~post4_93| |v_main_#t~post4_92|)) (.cse3 (mod v_main_~x~0_300 4294967296))) (or (and .cse0 (= |v_main_#t~post6_181| |v_main_#t~post6_177|) .cse1 .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_300 v_main_~y~0_311) (+ v_main_~x~0_299 v_main_~y~0_312)) (< v_main_~x~0_300 v_main_~x~0_299) (<= (div (+ (* v_main_~x~0_299 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_300 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 (= |v_main_#t~post6_177| |v_main_#t~post6_181|) .cse2 (<= 500000 .cse3)))) InVars {main_#t~post4=|v_main_#t~post4_93|, main_~y~0=v_main_~y~0_312, main_~x~0=v_main_~x~0_300, main_#t~post6=|v_main_#t~post6_181|} OutVars{main_#t~post4=|v_main_#t~post4_92|, main_~y~0=v_main_~y~0_311, main_~x~0=v_main_~x~0_299, main_#t~post6=|v_main_#t~post6_177|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4894#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:30:01,138 INFO L290 TraceCheckUtils]: 9: Hoare triple {4894#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [96] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4889#false} is VALID [2022-04-28 03:30:01,138 INFO L272 TraceCheckUtils]: 10: Hoare triple {4889#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4889#false} is VALID [2022-04-28 03:30:01,139 INFO L290 TraceCheckUtils]: 11: Hoare triple {4889#false} ~cond := #in~cond; {4889#false} is VALID [2022-04-28 03:30:01,139 INFO L290 TraceCheckUtils]: 12: Hoare triple {4889#false} assume 0 == ~cond; {4889#false} is VALID [2022-04-28 03:30:01,139 INFO L290 TraceCheckUtils]: 13: Hoare triple {4889#false} assume !false; {4889#false} is VALID [2022-04-28 03:30:01,139 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:01,139 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:30:01,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503792585] [2022-04-28 03:30:01,139 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1503792585] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:30:01,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2057042230] [2022-04-28 03:30:01,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:01,139 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:01,139 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:30:01,141 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:30:01,142 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-28 03:30:01,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:01,172 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:30:01,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:01,186 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:30:01,339 INFO L272 TraceCheckUtils]: 0: Hoare triple {4888#true} call ULTIMATE.init(); {4888#true} is VALID [2022-04-28 03:30:01,339 INFO L290 TraceCheckUtils]: 1: Hoare triple {4888#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4888#true} is VALID [2022-04-28 03:30:01,339 INFO L290 TraceCheckUtils]: 2: Hoare triple {4888#true} assume true; {4888#true} is VALID [2022-04-28 03:30:01,339 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4888#true} {4888#true} #41#return; {4888#true} is VALID [2022-04-28 03:30:01,339 INFO L272 TraceCheckUtils]: 4: Hoare triple {4888#true} call #t~ret7 := main(); {4888#true} is VALID [2022-04-28 03:30:01,340 INFO L290 TraceCheckUtils]: 5: Hoare triple {4888#true} ~x~0 := 0;~y~0 := 0; {4914#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:01,340 INFO L290 TraceCheckUtils]: 6: Hoare triple {4914#(and (= main_~x~0 0) (= main_~y~0 0))} [97] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_298 4294967296))) (let ((.cse0 (= |v_main_#t~post6_178| |v_main_#t~post6_176|)) (.cse1 (= v_main_~x~0_298 v_main_~x~0_297)) (.cse2 (= |v_main_#t~post5_88| |v_main_#t~post5_87|)) (.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5))) (or (and (= v_main_~y~0_310 v_main_~y~0_309) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= v_main_~y~0_309 v_main_~y~0_310) .cse2) (and (< v_main_~x~0_298 v_main_~x~0_297) .cse3 (<= (div (+ 1000000 (* v_main_~x~0_297 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_298 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_297 v_main_~y~0_309) (+ v_main_~x~0_298 v_main_~y~0_310)) .cse4)))) InVars {main_~y~0=v_main_~y~0_310, main_#t~post5=|v_main_#t~post5_88|, main_~x~0=v_main_~x~0_298, main_#t~post6=|v_main_#t~post6_178|} OutVars{main_#t~post5=|v_main_#t~post5_87|, main_~y~0=v_main_~y~0_309, main_~x~0=v_main_~x~0_297, main_#t~post6=|v_main_#t~post6_176|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4914#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:01,341 INFO L290 TraceCheckUtils]: 7: Hoare triple {4914#(and (= main_~x~0 0) (= main_~y~0 0))} [98] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4914#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:01,342 INFO L290 TraceCheckUtils]: 8: Hoare triple {4914#(and (= main_~x~0 0) (= main_~y~0 0))} [99] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_300 v_main_~x~0_299)) (.cse1 (= v_main_~y~0_312 v_main_~y~0_311)) (.cse2 (= |v_main_#t~post4_93| |v_main_#t~post4_92|)) (.cse3 (mod v_main_~x~0_300 4294967296))) (or (and .cse0 (= |v_main_#t~post6_181| |v_main_#t~post6_177|) .cse1 .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_300 v_main_~y~0_311) (+ v_main_~x~0_299 v_main_~y~0_312)) (< v_main_~x~0_300 v_main_~x~0_299) (<= (div (+ (* v_main_~x~0_299 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_300 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 (= |v_main_#t~post6_177| |v_main_#t~post6_181|) .cse2 (<= 500000 .cse3)))) InVars {main_#t~post4=|v_main_#t~post4_93|, main_~y~0=v_main_~y~0_312, main_~x~0=v_main_~x~0_300, main_#t~post6=|v_main_#t~post6_181|} OutVars{main_#t~post4=|v_main_#t~post4_92|, main_~y~0=v_main_~y~0_311, main_~x~0=v_main_~x~0_299, main_#t~post6=|v_main_#t~post6_177|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4924#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:30:01,342 INFO L290 TraceCheckUtils]: 9: Hoare triple {4924#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [96] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4889#false} is VALID [2022-04-28 03:30:01,343 INFO L272 TraceCheckUtils]: 10: Hoare triple {4889#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4889#false} is VALID [2022-04-28 03:30:01,343 INFO L290 TraceCheckUtils]: 11: Hoare triple {4889#false} ~cond := #in~cond; {4889#false} is VALID [2022-04-28 03:30:01,343 INFO L290 TraceCheckUtils]: 12: Hoare triple {4889#false} assume 0 == ~cond; {4889#false} is VALID [2022-04-28 03:30:01,343 INFO L290 TraceCheckUtils]: 13: Hoare triple {4889#false} assume !false; {4889#false} is VALID [2022-04-28 03:30:01,343 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:01,343 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:30:02,144 INFO L290 TraceCheckUtils]: 13: Hoare triple {4889#false} assume !false; {4889#false} is VALID [2022-04-28 03:30:02,144 INFO L290 TraceCheckUtils]: 12: Hoare triple {4943#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {4889#false} is VALID [2022-04-28 03:30:02,144 INFO L290 TraceCheckUtils]: 11: Hoare triple {4947#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {4943#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:30:02,145 INFO L272 TraceCheckUtils]: 10: Hoare triple {4951#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {4947#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:30:02,145 INFO L290 TraceCheckUtils]: 9: Hoare triple {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [96] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {4951#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:30:02,146 INFO L290 TraceCheckUtils]: 8: Hoare triple {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [99] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_300 v_main_~x~0_299)) (.cse1 (= v_main_~y~0_312 v_main_~y~0_311)) (.cse2 (= |v_main_#t~post4_93| |v_main_#t~post4_92|)) (.cse3 (mod v_main_~x~0_300 4294967296))) (or (and .cse0 (= |v_main_#t~post6_181| |v_main_#t~post6_177|) .cse1 .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_300 v_main_~y~0_311) (+ v_main_~x~0_299 v_main_~y~0_312)) (< v_main_~x~0_300 v_main_~x~0_299) (<= (div (+ (* v_main_~x~0_299 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_300 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 (= |v_main_#t~post6_177| |v_main_#t~post6_181|) .cse2 (<= 500000 .cse3)))) InVars {main_#t~post4=|v_main_#t~post4_93|, main_~y~0=v_main_~y~0_312, main_~x~0=v_main_~x~0_300, main_#t~post6=|v_main_#t~post6_181|} OutVars{main_#t~post4=|v_main_#t~post4_92|, main_~y~0=v_main_~y~0_311, main_~x~0=v_main_~x~0_299, main_#t~post6=|v_main_#t~post6_177|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:02,147 INFO L290 TraceCheckUtils]: 7: Hoare triple {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [98] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:02,843 INFO L290 TraceCheckUtils]: 6: Hoare triple {4965#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_322_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_322_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_322_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [97] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_298 4294967296))) (let ((.cse0 (= |v_main_#t~post6_178| |v_main_#t~post6_176|)) (.cse1 (= v_main_~x~0_298 v_main_~x~0_297)) (.cse2 (= |v_main_#t~post5_88| |v_main_#t~post5_87|)) (.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5))) (or (and (= v_main_~y~0_310 v_main_~y~0_309) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) (= v_main_~y~0_309 v_main_~y~0_310) .cse2) (and (< v_main_~x~0_298 v_main_~x~0_297) .cse3 (<= (div (+ 1000000 (* v_main_~x~0_297 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_298 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_297 v_main_~y~0_309) (+ v_main_~x~0_298 v_main_~y~0_310)) .cse4)))) InVars {main_~y~0=v_main_~y~0_310, main_#t~post5=|v_main_#t~post5_88|, main_~x~0=v_main_~x~0_298, main_#t~post6=|v_main_#t~post6_178|} OutVars{main_#t~post5=|v_main_#t~post5_87|, main_~y~0=v_main_~y~0_309, main_~x~0=v_main_~x~0_297, main_#t~post6=|v_main_#t~post6_176|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {4955#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:02,845 INFO L290 TraceCheckUtils]: 5: Hoare triple {4888#true} ~x~0 := 0;~y~0 := 0; {4965#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_322_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_322_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_322_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:30:02,845 INFO L272 TraceCheckUtils]: 4: Hoare triple {4888#true} call #t~ret7 := main(); {4888#true} is VALID [2022-04-28 03:30:02,845 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4888#true} {4888#true} #41#return; {4888#true} is VALID [2022-04-28 03:30:02,845 INFO L290 TraceCheckUtils]: 2: Hoare triple {4888#true} assume true; {4888#true} is VALID [2022-04-28 03:30:02,845 INFO L290 TraceCheckUtils]: 1: Hoare triple {4888#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {4888#true} is VALID [2022-04-28 03:30:02,845 INFO L272 TraceCheckUtils]: 0: Hoare triple {4888#true} call ULTIMATE.init(); {4888#true} is VALID [2022-04-28 03:30:02,845 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:02,845 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2057042230] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:30:02,846 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:30:02,846 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:30:03,337 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:30:03,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [266547418] [2022-04-28 03:30:03,338 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [266547418] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:30:03,338 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:30:03,338 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-04-28 03:30:03,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [863856453] [2022-04-28 03:30:03,338 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:30:03,338 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 53 [2022-04-28 03:30:03,339 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:30:03,339 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:03,368 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:03,368 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-28 03:30:03,368 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:03,369 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-28 03:30:03,369 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=501, Unknown=0, NotChecked=0, Total=600 [2022-04-28 03:30:03,383 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. Second operand has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:04,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:04,429 INFO L93 Difference]: Finished difference Result 67 states and 71 transitions. [2022-04-28 03:30:04,429 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-28 03:30:04,429 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 53 [2022-04-28 03:30:04,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:30:04,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:04,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 67 transitions. [2022-04-28 03:30:04,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:04,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 67 transitions. [2022-04-28 03:30:04,431 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 67 transitions. [2022-04-28 03:30:04,479 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:04,480 INFO L225 Difference]: With dead ends: 67 [2022-04-28 03:30:04,480 INFO L226 Difference]: Without dead ends: 59 [2022-04-28 03:30:04,481 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 29 SyntacticMatches, 29 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=197, Invalid=1285, Unknown=0, NotChecked=0, Total=1482 [2022-04-28 03:30:04,481 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 38 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 687 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 703 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 687 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:30:04,481 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [38 Valid, 84 Invalid, 703 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 687 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 03:30:04,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-04-28 03:30:04,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 58. [2022-04-28 03:30:04,545 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:30:04,546 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:04,546 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:04,546 INFO L87 Difference]: Start difference. First operand 59 states. Second operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:04,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:04,547 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2022-04-28 03:30:04,547 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2022-04-28 03:30:04,547 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:04,547 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:04,548 INFO L74 IsIncluded]: Start isIncluded. First operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-28 03:30:04,548 INFO L87 Difference]: Start difference. First operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-28 03:30:04,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:04,548 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2022-04-28 03:30:04,548 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2022-04-28 03:30:04,549 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:04,549 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:04,549 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:30:04,549 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:30:04,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 53 states have (on average 1.0566037735849056) internal successors, (56), 53 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:04,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 60 transitions. [2022-04-28 03:30:04,550 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 60 transitions. Word has length 53 [2022-04-28 03:30:04,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:30:04,550 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 60 transitions. [2022-04-28 03:30:04,550 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.8823529411764706) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:04,550 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 58 states and 60 transitions. [2022-04-28 03:30:04,614 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:04,615 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 60 transitions. [2022-04-28 03:30:04,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-28 03:30:04,615 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:30:04,615 INFO L195 NwaCegarLoop]: trace histogram [15, 15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:30:04,631 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2022-04-28 03:30:04,831 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-28 03:30:04,831 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:30:04,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:30:04,832 INFO L85 PathProgramCache]: Analyzing trace with hash 898944781, now seen corresponding path program 14 times [2022-04-28 03:30:04,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:04,832 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2036281520] [2022-04-28 03:30:06,338 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:06,749 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:06,750 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:30:06,753 INFO L85 PathProgramCache]: Analyzing trace with hash 1477785775, now seen corresponding path program 1 times [2022-04-28 03:30:06,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:30:06,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015067989] [2022-04-28 03:30:06,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:06,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:30:06,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:06,800 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:30:06,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:06,809 INFO L290 TraceCheckUtils]: 0: Hoare triple {5402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5395#true} is VALID [2022-04-28 03:30:06,809 INFO L290 TraceCheckUtils]: 1: Hoare triple {5395#true} assume true; {5395#true} is VALID [2022-04-28 03:30:06,810 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5395#true} {5395#true} #41#return; {5395#true} is VALID [2022-04-28 03:30:06,810 INFO L272 TraceCheckUtils]: 0: Hoare triple {5395#true} call ULTIMATE.init(); {5402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:30:06,810 INFO L290 TraceCheckUtils]: 1: Hoare triple {5402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5395#true} is VALID [2022-04-28 03:30:06,810 INFO L290 TraceCheckUtils]: 2: Hoare triple {5395#true} assume true; {5395#true} is VALID [2022-04-28 03:30:06,810 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5395#true} {5395#true} #41#return; {5395#true} is VALID [2022-04-28 03:30:06,810 INFO L272 TraceCheckUtils]: 4: Hoare triple {5395#true} call #t~ret7 := main(); {5395#true} is VALID [2022-04-28 03:30:06,811 INFO L290 TraceCheckUtils]: 5: Hoare triple {5395#true} ~x~0 := 0;~y~0 := 0; {5400#(= main_~x~0 0)} is VALID [2022-04-28 03:30:06,811 INFO L290 TraceCheckUtils]: 6: Hoare triple {5400#(= main_~x~0 0)} [101] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_328 4294967296))) (let ((.cse0 (= |v_main_#t~post5_95| |v_main_#t~post5_94|)) (.cse1 (= v_main_~x~0_328 v_main_~x~0_327)) (.cse2 (= v_main_~y~0_341 v_main_~y~0_340)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_192| |v_main_#t~post6_190|)) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= |v_main_#t~post6_190| |v_main_#t~post6_192|)) (and (<= (div (+ v_main_~y~0_340 (* (- 1) v_main_~y~0_341) 1000000 (* v_main_~x~0_328 (- 1))) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_328 (- 4294967295)) 4294967296))) (= (+ v_main_~x~0_328 v_main_~y~0_341) (+ v_main_~x~0_327 v_main_~y~0_340)) .cse4 (< v_main_~y~0_340 v_main_~y~0_341) .cse3)))) InVars {main_~y~0=v_main_~y~0_341, main_#t~post5=|v_main_#t~post5_95|, main_~x~0=v_main_~x~0_328, main_#t~post6=|v_main_#t~post6_192|} OutVars{main_#t~post5=|v_main_#t~post5_94|, main_~y~0=v_main_~y~0_340, main_~x~0=v_main_~x~0_327, main_#t~post6=|v_main_#t~post6_190|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5400#(= main_~x~0 0)} is VALID [2022-04-28 03:30:06,811 INFO L290 TraceCheckUtils]: 7: Hoare triple {5400#(= main_~x~0 0)} [102] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5400#(= main_~x~0 0)} is VALID [2022-04-28 03:30:06,812 INFO L290 TraceCheckUtils]: 8: Hoare triple {5400#(= main_~x~0 0)} [103] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_195| |v_main_#t~post6_191|)) (.cse1 (= v_main_~y~0_343 v_main_~y~0_342)) (.cse2 (mod v_main_~x~0_330 4294967296))) (or (and (= |v_main_#t~post4_100| |v_main_#t~post4_99|) (= v_main_~x~0_330 v_main_~x~0_329) .cse0 .cse1) (and .cse0 .cse1 (<= 500000 .cse2) (= |v_main_#t~post4_99| |v_main_#t~post4_100|) (= v_main_~x~0_329 v_main_~x~0_330)) (and (= (+ v_main_~x~0_330 v_main_~y~0_342) (+ v_main_~x~0_329 v_main_~y~0_343)) (< v_main_~x~0_330 v_main_~x~0_329) (<= (div (+ (* v_main_~x~0_329 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_330 (- 4294967295)) 4294967296) 1)) (< .cse2 500000)))) InVars {main_#t~post4=|v_main_#t~post4_100|, main_~y~0=v_main_~y~0_343, main_~x~0=v_main_~x~0_330, main_#t~post6=|v_main_#t~post6_195|} OutVars{main_#t~post4=|v_main_#t~post4_99|, main_~y~0=v_main_~y~0_342, main_~x~0=v_main_~x~0_329, main_#t~post6=|v_main_#t~post6_191|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5401#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:30:06,813 INFO L290 TraceCheckUtils]: 9: Hoare triple {5401#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [100] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5396#false} is VALID [2022-04-28 03:30:06,813 INFO L272 TraceCheckUtils]: 10: Hoare triple {5396#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5396#false} is VALID [2022-04-28 03:30:06,814 INFO L290 TraceCheckUtils]: 11: Hoare triple {5396#false} ~cond := #in~cond; {5396#false} is VALID [2022-04-28 03:30:06,814 INFO L290 TraceCheckUtils]: 12: Hoare triple {5396#false} assume 0 == ~cond; {5396#false} is VALID [2022-04-28 03:30:06,814 INFO L290 TraceCheckUtils]: 13: Hoare triple {5396#false} assume !false; {5396#false} is VALID [2022-04-28 03:30:06,814 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:06,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:30:06,814 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015067989] [2022-04-28 03:30:06,814 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1015067989] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:30:06,814 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1447092217] [2022-04-28 03:30:06,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:06,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:06,815 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:30:06,816 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:30:06,817 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-28 03:30:06,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:06,846 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:30:06,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:06,854 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:30:07,020 INFO L272 TraceCheckUtils]: 0: Hoare triple {5395#true} call ULTIMATE.init(); {5395#true} is VALID [2022-04-28 03:30:07,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {5395#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5395#true} is VALID [2022-04-28 03:30:07,021 INFO L290 TraceCheckUtils]: 2: Hoare triple {5395#true} assume true; {5395#true} is VALID [2022-04-28 03:30:07,021 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5395#true} {5395#true} #41#return; {5395#true} is VALID [2022-04-28 03:30:07,021 INFO L272 TraceCheckUtils]: 4: Hoare triple {5395#true} call #t~ret7 := main(); {5395#true} is VALID [2022-04-28 03:30:07,021 INFO L290 TraceCheckUtils]: 5: Hoare triple {5395#true} ~x~0 := 0;~y~0 := 0; {5421#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:07,022 INFO L290 TraceCheckUtils]: 6: Hoare triple {5421#(and (= main_~x~0 0) (= main_~y~0 0))} [101] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_328 4294967296))) (let ((.cse0 (= |v_main_#t~post5_95| |v_main_#t~post5_94|)) (.cse1 (= v_main_~x~0_328 v_main_~x~0_327)) (.cse2 (= v_main_~y~0_341 v_main_~y~0_340)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_192| |v_main_#t~post6_190|)) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= |v_main_#t~post6_190| |v_main_#t~post6_192|)) (and (<= (div (+ v_main_~y~0_340 (* (- 1) v_main_~y~0_341) 1000000 (* v_main_~x~0_328 (- 1))) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_328 (- 4294967295)) 4294967296))) (= (+ v_main_~x~0_328 v_main_~y~0_341) (+ v_main_~x~0_327 v_main_~y~0_340)) .cse4 (< v_main_~y~0_340 v_main_~y~0_341) .cse3)))) InVars {main_~y~0=v_main_~y~0_341, main_#t~post5=|v_main_#t~post5_95|, main_~x~0=v_main_~x~0_328, main_#t~post6=|v_main_#t~post6_192|} OutVars{main_#t~post5=|v_main_#t~post5_94|, main_~y~0=v_main_~y~0_340, main_~x~0=v_main_~x~0_327, main_#t~post6=|v_main_#t~post6_190|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5421#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:07,022 INFO L290 TraceCheckUtils]: 7: Hoare triple {5421#(and (= main_~x~0 0) (= main_~y~0 0))} [102] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5421#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:07,023 INFO L290 TraceCheckUtils]: 8: Hoare triple {5421#(and (= main_~x~0 0) (= main_~y~0 0))} [103] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_195| |v_main_#t~post6_191|)) (.cse1 (= v_main_~y~0_343 v_main_~y~0_342)) (.cse2 (mod v_main_~x~0_330 4294967296))) (or (and (= |v_main_#t~post4_100| |v_main_#t~post4_99|) (= v_main_~x~0_330 v_main_~x~0_329) .cse0 .cse1) (and .cse0 .cse1 (<= 500000 .cse2) (= |v_main_#t~post4_99| |v_main_#t~post4_100|) (= v_main_~x~0_329 v_main_~x~0_330)) (and (= (+ v_main_~x~0_330 v_main_~y~0_342) (+ v_main_~x~0_329 v_main_~y~0_343)) (< v_main_~x~0_330 v_main_~x~0_329) (<= (div (+ (* v_main_~x~0_329 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_330 (- 4294967295)) 4294967296) 1)) (< .cse2 500000)))) InVars {main_#t~post4=|v_main_#t~post4_100|, main_~y~0=v_main_~y~0_343, main_~x~0=v_main_~x~0_330, main_#t~post6=|v_main_#t~post6_195|} OutVars{main_#t~post4=|v_main_#t~post4_99|, main_~y~0=v_main_~y~0_342, main_~x~0=v_main_~x~0_329, main_#t~post6=|v_main_#t~post6_191|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5431#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:30:07,024 INFO L290 TraceCheckUtils]: 9: Hoare triple {5431#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [100] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5396#false} is VALID [2022-04-28 03:30:07,024 INFO L272 TraceCheckUtils]: 10: Hoare triple {5396#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5396#false} is VALID [2022-04-28 03:30:07,024 INFO L290 TraceCheckUtils]: 11: Hoare triple {5396#false} ~cond := #in~cond; {5396#false} is VALID [2022-04-28 03:30:07,024 INFO L290 TraceCheckUtils]: 12: Hoare triple {5396#false} assume 0 == ~cond; {5396#false} is VALID [2022-04-28 03:30:07,024 INFO L290 TraceCheckUtils]: 13: Hoare triple {5396#false} assume !false; {5396#false} is VALID [2022-04-28 03:30:07,024 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:07,024 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:30:08,084 INFO L290 TraceCheckUtils]: 13: Hoare triple {5396#false} assume !false; {5396#false} is VALID [2022-04-28 03:30:08,084 INFO L290 TraceCheckUtils]: 12: Hoare triple {5450#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {5396#false} is VALID [2022-04-28 03:30:08,085 INFO L290 TraceCheckUtils]: 11: Hoare triple {5454#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {5450#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:30:08,085 INFO L272 TraceCheckUtils]: 10: Hoare triple {5458#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5454#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:30:08,086 INFO L290 TraceCheckUtils]: 9: Hoare triple {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [100] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5458#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:30:08,240 INFO L290 TraceCheckUtils]: 8: Hoare triple {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [103] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_195| |v_main_#t~post6_191|)) (.cse1 (= v_main_~y~0_343 v_main_~y~0_342)) (.cse2 (mod v_main_~x~0_330 4294967296))) (or (and (= |v_main_#t~post4_100| |v_main_#t~post4_99|) (= v_main_~x~0_330 v_main_~x~0_329) .cse0 .cse1) (and .cse0 .cse1 (<= 500000 .cse2) (= |v_main_#t~post4_99| |v_main_#t~post4_100|) (= v_main_~x~0_329 v_main_~x~0_330)) (and (= (+ v_main_~x~0_330 v_main_~y~0_342) (+ v_main_~x~0_329 v_main_~y~0_343)) (< v_main_~x~0_330 v_main_~x~0_329) (<= (div (+ (* v_main_~x~0_329 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_330 (- 4294967295)) 4294967296) 1)) (< .cse2 500000)))) InVars {main_#t~post4=|v_main_#t~post4_100|, main_~y~0=v_main_~y~0_343, main_~x~0=v_main_~x~0_330, main_#t~post6=|v_main_#t~post6_195|} OutVars{main_#t~post4=|v_main_#t~post4_99|, main_~y~0=v_main_~y~0_342, main_~x~0=v_main_~x~0_329, main_#t~post6=|v_main_#t~post6_191|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:08,240 INFO L290 TraceCheckUtils]: 7: Hoare triple {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [102] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:08,253 INFO L290 TraceCheckUtils]: 6: Hoare triple {5472#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_353_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_353_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_353_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))))} [101] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_328 4294967296))) (let ((.cse0 (= |v_main_#t~post5_95| |v_main_#t~post5_94|)) (.cse1 (= v_main_~x~0_328 v_main_~x~0_327)) (.cse2 (= v_main_~y~0_341 v_main_~y~0_340)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_192| |v_main_#t~post6_190|)) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= |v_main_#t~post6_190| |v_main_#t~post6_192|)) (and (<= (div (+ v_main_~y~0_340 (* (- 1) v_main_~y~0_341) 1000000 (* v_main_~x~0_328 (- 1))) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_328 (- 4294967295)) 4294967296))) (= (+ v_main_~x~0_328 v_main_~y~0_341) (+ v_main_~x~0_327 v_main_~y~0_340)) .cse4 (< v_main_~y~0_340 v_main_~y~0_341) .cse3)))) InVars {main_~y~0=v_main_~y~0_341, main_#t~post5=|v_main_#t~post5_95|, main_~x~0=v_main_~x~0_328, main_#t~post6=|v_main_#t~post6_192|} OutVars{main_#t~post5=|v_main_#t~post5_94|, main_~y~0=v_main_~y~0_340, main_~x~0=v_main_~x~0_327, main_#t~post6=|v_main_#t~post6_190|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5462#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:08,254 INFO L290 TraceCheckUtils]: 5: Hoare triple {5395#true} ~x~0 := 0;~y~0 := 0; {5472#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_353_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_353_32) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_353_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))))} is VALID [2022-04-28 03:30:08,254 INFO L272 TraceCheckUtils]: 4: Hoare triple {5395#true} call #t~ret7 := main(); {5395#true} is VALID [2022-04-28 03:30:08,254 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5395#true} {5395#true} #41#return; {5395#true} is VALID [2022-04-28 03:30:08,254 INFO L290 TraceCheckUtils]: 2: Hoare triple {5395#true} assume true; {5395#true} is VALID [2022-04-28 03:30:08,254 INFO L290 TraceCheckUtils]: 1: Hoare triple {5395#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5395#true} is VALID [2022-04-28 03:30:08,254 INFO L272 TraceCheckUtils]: 0: Hoare triple {5395#true} call ULTIMATE.init(); {5395#true} is VALID [2022-04-28 03:30:08,254 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:08,254 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1447092217] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:30:08,255 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:30:08,255 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:30:08,887 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:30:08,887 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2036281520] [2022-04-28 03:30:08,887 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2036281520] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:30:08,887 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:30:08,887 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-04-28 03:30:08,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1373123823] [2022-04-28 03:30:08,887 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:30:08,887 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 56 [2022-04-28 03:30:08,888 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:30:08,888 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:08,924 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:08,924 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-28 03:30:08,925 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:08,925 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-28 03:30:08,925 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=546, Unknown=0, NotChecked=0, Total=650 [2022-04-28 03:30:08,925 INFO L87 Difference]: Start difference. First operand 58 states and 60 transitions. Second operand has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:10,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:10,099 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2022-04-28 03:30:10,099 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-28 03:30:10,099 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 56 [2022-04-28 03:30:10,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:30:10,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:10,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 70 transitions. [2022-04-28 03:30:10,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:10,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 70 transitions. [2022-04-28 03:30:10,101 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 70 transitions. [2022-04-28 03:30:10,137 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:10,138 INFO L225 Difference]: With dead ends: 70 [2022-04-28 03:30:10,138 INFO L226 Difference]: Without dead ends: 62 [2022-04-28 03:30:10,138 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 29 SyntacticMatches, 31 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=209, Invalid=1431, Unknown=0, NotChecked=0, Total=1640 [2022-04-28 03:30:10,139 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 40 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 781 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 798 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 781 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:30:10,139 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 89 Invalid, 798 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 781 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 03:30:10,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2022-04-28 03:30:10,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 61. [2022-04-28 03:30:10,191 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:30:10,191 INFO L82 GeneralOperation]: Start isEquivalent. First operand 62 states. Second operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:10,191 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:10,191 INFO L87 Difference]: Start difference. First operand 62 states. Second operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:10,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:10,192 INFO L93 Difference]: Finished difference Result 62 states and 64 transitions. [2022-04-28 03:30:10,192 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 64 transitions. [2022-04-28 03:30:10,192 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:10,192 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:10,192 INFO L74 IsIncluded]: Start isIncluded. First operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 62 states. [2022-04-28 03:30:10,192 INFO L87 Difference]: Start difference. First operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 62 states. [2022-04-28 03:30:10,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:10,193 INFO L93 Difference]: Finished difference Result 62 states and 64 transitions. [2022-04-28 03:30:10,193 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 64 transitions. [2022-04-28 03:30:10,193 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:10,193 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:10,193 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:30:10,193 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:30:10,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 56 states have internal predecessors, (59), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:10,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 63 transitions. [2022-04-28 03:30:10,194 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 63 transitions. Word has length 56 [2022-04-28 03:30:10,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:30:10,194 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 63 transitions. [2022-04-28 03:30:10,195 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 17 states have internal predecessors, (52), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:10,195 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 61 states and 63 transitions. [2022-04-28 03:30:10,304 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:10,304 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 63 transitions. [2022-04-28 03:30:10,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-04-28 03:30:10,304 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:30:10,304 INFO L195 NwaCegarLoop]: trace histogram [16, 16, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:30:10,332 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-04-28 03:30:10,519 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:10,519 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:30:10,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:30:10,520 INFO L85 PathProgramCache]: Analyzing trace with hash 1800740933, now seen corresponding path program 15 times [2022-04-28 03:30:10,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:10,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2001666870] [2022-04-28 03:30:11,496 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:11,922 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:11,923 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:30:11,925 INFO L85 PathProgramCache]: Analyzing trace with hash -767649361, now seen corresponding path program 1 times [2022-04-28 03:30:11,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:30:11,925 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1244900660] [2022-04-28 03:30:11,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:11,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:30:11,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:11,973 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:30:11,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:11,976 INFO L290 TraceCheckUtils]: 0: Hoare triple {5930#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5923#true} is VALID [2022-04-28 03:30:11,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {5923#true} assume true; {5923#true} is VALID [2022-04-28 03:30:11,976 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5923#true} {5923#true} #41#return; {5923#true} is VALID [2022-04-28 03:30:11,977 INFO L272 TraceCheckUtils]: 0: Hoare triple {5923#true} call ULTIMATE.init(); {5930#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:30:11,977 INFO L290 TraceCheckUtils]: 1: Hoare triple {5930#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5923#true} is VALID [2022-04-28 03:30:11,977 INFO L290 TraceCheckUtils]: 2: Hoare triple {5923#true} assume true; {5923#true} is VALID [2022-04-28 03:30:11,977 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5923#true} {5923#true} #41#return; {5923#true} is VALID [2022-04-28 03:30:11,977 INFO L272 TraceCheckUtils]: 4: Hoare triple {5923#true} call #t~ret7 := main(); {5923#true} is VALID [2022-04-28 03:30:11,977 INFO L290 TraceCheckUtils]: 5: Hoare triple {5923#true} ~x~0 := 0;~y~0 := 0; {5928#(= main_~x~0 0)} is VALID [2022-04-28 03:30:11,978 INFO L290 TraceCheckUtils]: 6: Hoare triple {5928#(= main_~x~0 0)} [105] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_359 4294967296))) (let ((.cse0 (= |v_main_#t~post6_206| |v_main_#t~post6_204|)) (.cse1 (= v_main_~x~0_359 v_main_~x~0_358)) (.cse2 (= v_main_~y~0_373 v_main_~y~0_372)) (.cse3 (= |v_main_#t~post5_102| |v_main_#t~post5_101|)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and (= (+ v_main_~x~0_358 v_main_~y~0_372) (+ v_main_~x~0_359 v_main_~y~0_373)) .cse4 .cse5 (<= (div (+ 1000000 (* v_main_~x~0_358 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_359 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_359 v_main_~x~0_358))))) InVars {main_~y~0=v_main_~y~0_373, main_#t~post5=|v_main_#t~post5_102|, main_~x~0=v_main_~x~0_359, main_#t~post6=|v_main_#t~post6_206|} OutVars{main_#t~post5=|v_main_#t~post5_101|, main_~y~0=v_main_~y~0_372, main_~x~0=v_main_~x~0_358, main_#t~post6=|v_main_#t~post6_204|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5928#(= main_~x~0 0)} is VALID [2022-04-28 03:30:11,978 INFO L290 TraceCheckUtils]: 7: Hoare triple {5928#(= main_~x~0 0)} [106] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5928#(= main_~x~0 0)} is VALID [2022-04-28 03:30:11,979 INFO L290 TraceCheckUtils]: 8: Hoare triple {5928#(= main_~x~0 0)} [107] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_361 4294967296)) (.cse1 (= |v_main_#t~post6_209| |v_main_#t~post6_205|)) (.cse2 (= |v_main_#t~post4_107| |v_main_#t~post4_106|)) (.cse3 (= v_main_~y~0_375 v_main_~y~0_374)) (.cse4 (= v_main_~x~0_361 v_main_~x~0_360))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and (= (+ v_main_~x~0_360 v_main_~y~0_375) (+ v_main_~x~0_361 v_main_~y~0_374)) (<= (div (+ 500000 (* v_main_~x~0_360 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_361 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_361 v_main_~x~0_360)) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_107|, main_~y~0=v_main_~y~0_375, main_~x~0=v_main_~x~0_361, main_#t~post6=|v_main_#t~post6_209|} OutVars{main_#t~post4=|v_main_#t~post4_106|, main_~y~0=v_main_~y~0_374, main_~x~0=v_main_~x~0_360, main_#t~post6=|v_main_#t~post6_205|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5929#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:30:11,980 INFO L290 TraceCheckUtils]: 9: Hoare triple {5929#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [104] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5924#false} is VALID [2022-04-28 03:30:11,980 INFO L272 TraceCheckUtils]: 10: Hoare triple {5924#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5924#false} is VALID [2022-04-28 03:30:11,980 INFO L290 TraceCheckUtils]: 11: Hoare triple {5924#false} ~cond := #in~cond; {5924#false} is VALID [2022-04-28 03:30:11,980 INFO L290 TraceCheckUtils]: 12: Hoare triple {5924#false} assume 0 == ~cond; {5924#false} is VALID [2022-04-28 03:30:11,980 INFO L290 TraceCheckUtils]: 13: Hoare triple {5924#false} assume !false; {5924#false} is VALID [2022-04-28 03:30:11,980 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:11,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:30:11,980 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1244900660] [2022-04-28 03:30:11,980 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1244900660] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:30:11,980 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [76036880] [2022-04-28 03:30:11,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:11,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:11,981 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:30:11,994 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:30:11,996 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-28 03:30:12,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:12,024 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-28 03:30:12,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:12,031 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:30:12,283 INFO L272 TraceCheckUtils]: 0: Hoare triple {5923#true} call ULTIMATE.init(); {5923#true} is VALID [2022-04-28 03:30:12,283 INFO L290 TraceCheckUtils]: 1: Hoare triple {5923#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5923#true} is VALID [2022-04-28 03:30:12,283 INFO L290 TraceCheckUtils]: 2: Hoare triple {5923#true} assume true; {5923#true} is VALID [2022-04-28 03:30:12,283 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5923#true} {5923#true} #41#return; {5923#true} is VALID [2022-04-28 03:30:12,283 INFO L272 TraceCheckUtils]: 4: Hoare triple {5923#true} call #t~ret7 := main(); {5923#true} is VALID [2022-04-28 03:30:12,284 INFO L290 TraceCheckUtils]: 5: Hoare triple {5923#true} ~x~0 := 0;~y~0 := 0; {5928#(= main_~x~0 0)} is VALID [2022-04-28 03:30:12,284 INFO L290 TraceCheckUtils]: 6: Hoare triple {5928#(= main_~x~0 0)} [105] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_359 4294967296))) (let ((.cse0 (= |v_main_#t~post6_206| |v_main_#t~post6_204|)) (.cse1 (= v_main_~x~0_359 v_main_~x~0_358)) (.cse2 (= v_main_~y~0_373 v_main_~y~0_372)) (.cse3 (= |v_main_#t~post5_102| |v_main_#t~post5_101|)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and (= (+ v_main_~x~0_358 v_main_~y~0_372) (+ v_main_~x~0_359 v_main_~y~0_373)) .cse4 .cse5 (<= (div (+ 1000000 (* v_main_~x~0_358 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_359 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_359 v_main_~x~0_358))))) InVars {main_~y~0=v_main_~y~0_373, main_#t~post5=|v_main_#t~post5_102|, main_~x~0=v_main_~x~0_359, main_#t~post6=|v_main_#t~post6_206|} OutVars{main_#t~post5=|v_main_#t~post5_101|, main_~y~0=v_main_~y~0_372, main_~x~0=v_main_~x~0_358, main_#t~post6=|v_main_#t~post6_204|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5928#(= main_~x~0 0)} is VALID [2022-04-28 03:30:12,285 INFO L290 TraceCheckUtils]: 7: Hoare triple {5928#(= main_~x~0 0)} [106] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5928#(= main_~x~0 0)} is VALID [2022-04-28 03:30:12,285 INFO L290 TraceCheckUtils]: 8: Hoare triple {5928#(= main_~x~0 0)} [107] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_361 4294967296)) (.cse1 (= |v_main_#t~post6_209| |v_main_#t~post6_205|)) (.cse2 (= |v_main_#t~post4_107| |v_main_#t~post4_106|)) (.cse3 (= v_main_~y~0_375 v_main_~y~0_374)) (.cse4 (= v_main_~x~0_361 v_main_~x~0_360))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and (= (+ v_main_~x~0_360 v_main_~y~0_375) (+ v_main_~x~0_361 v_main_~y~0_374)) (<= (div (+ 500000 (* v_main_~x~0_360 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_361 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_361 v_main_~x~0_360)) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_107|, main_~y~0=v_main_~y~0_375, main_~x~0=v_main_~x~0_361, main_#t~post6=|v_main_#t~post6_209|} OutVars{main_#t~post4=|v_main_#t~post4_106|, main_~y~0=v_main_~y~0_374, main_~x~0=v_main_~x~0_360, main_#t~post6=|v_main_#t~post6_205|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5929#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:30:12,286 INFO L290 TraceCheckUtils]: 9: Hoare triple {5929#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [104] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5924#false} is VALID [2022-04-28 03:30:12,286 INFO L272 TraceCheckUtils]: 10: Hoare triple {5924#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5924#false} is VALID [2022-04-28 03:30:12,286 INFO L290 TraceCheckUtils]: 11: Hoare triple {5924#false} ~cond := #in~cond; {5924#false} is VALID [2022-04-28 03:30:12,286 INFO L290 TraceCheckUtils]: 12: Hoare triple {5924#false} assume 0 == ~cond; {5924#false} is VALID [2022-04-28 03:30:12,286 INFO L290 TraceCheckUtils]: 13: Hoare triple {5924#false} assume !false; {5924#false} is VALID [2022-04-28 03:30:12,286 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:12,286 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:30:12,746 INFO L290 TraceCheckUtils]: 13: Hoare triple {5924#false} assume !false; {5924#false} is VALID [2022-04-28 03:30:12,746 INFO L290 TraceCheckUtils]: 12: Hoare triple {5924#false} assume 0 == ~cond; {5924#false} is VALID [2022-04-28 03:30:12,746 INFO L290 TraceCheckUtils]: 11: Hoare triple {5924#false} ~cond := #in~cond; {5924#false} is VALID [2022-04-28 03:30:12,747 INFO L272 TraceCheckUtils]: 10: Hoare triple {5924#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {5924#false} is VALID [2022-04-28 03:30:12,747 INFO L290 TraceCheckUtils]: 9: Hoare triple {5985#(< (mod main_~x~0 4294967296) 1000000)} [104] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {5924#false} is VALID [2022-04-28 03:30:12,749 INFO L290 TraceCheckUtils]: 8: Hoare triple {5985#(< (mod main_~x~0 4294967296) 1000000)} [107] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_361 4294967296)) (.cse1 (= |v_main_#t~post6_209| |v_main_#t~post6_205|)) (.cse2 (= |v_main_#t~post4_107| |v_main_#t~post4_106|)) (.cse3 (= v_main_~y~0_375 v_main_~y~0_374)) (.cse4 (= v_main_~x~0_361 v_main_~x~0_360))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and (= (+ v_main_~x~0_360 v_main_~y~0_375) (+ v_main_~x~0_361 v_main_~y~0_374)) (<= (div (+ 500000 (* v_main_~x~0_360 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_361 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_361 v_main_~x~0_360)) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_107|, main_~y~0=v_main_~y~0_375, main_~x~0=v_main_~x~0_361, main_#t~post6=|v_main_#t~post6_209|} OutVars{main_#t~post4=|v_main_#t~post4_106|, main_~y~0=v_main_~y~0_374, main_~x~0=v_main_~x~0_360, main_#t~post6=|v_main_#t~post6_205|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {5985#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:30:12,750 INFO L290 TraceCheckUtils]: 7: Hoare triple {5985#(< (mod main_~x~0 4294967296) 1000000)} [106] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5985#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:30:12,750 INFO L290 TraceCheckUtils]: 6: Hoare triple {5995#(< (mod main_~x~0 4294967296) 500000)} [105] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_359 4294967296))) (let ((.cse0 (= |v_main_#t~post6_206| |v_main_#t~post6_204|)) (.cse1 (= v_main_~x~0_359 v_main_~x~0_358)) (.cse2 (= v_main_~y~0_373 v_main_~y~0_372)) (.cse3 (= |v_main_#t~post5_102| |v_main_#t~post5_101|)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and (= (+ v_main_~x~0_358 v_main_~y~0_372) (+ v_main_~x~0_359 v_main_~y~0_373)) .cse4 .cse5 (<= (div (+ 1000000 (* v_main_~x~0_358 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_359 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_359 v_main_~x~0_358))))) InVars {main_~y~0=v_main_~y~0_373, main_#t~post5=|v_main_#t~post5_102|, main_~x~0=v_main_~x~0_359, main_#t~post6=|v_main_#t~post6_206|} OutVars{main_#t~post5=|v_main_#t~post5_101|, main_~y~0=v_main_~y~0_372, main_~x~0=v_main_~x~0_358, main_#t~post6=|v_main_#t~post6_204|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {5985#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:30:12,751 INFO L290 TraceCheckUtils]: 5: Hoare triple {5923#true} ~x~0 := 0;~y~0 := 0; {5995#(< (mod main_~x~0 4294967296) 500000)} is VALID [2022-04-28 03:30:12,751 INFO L272 TraceCheckUtils]: 4: Hoare triple {5923#true} call #t~ret7 := main(); {5923#true} is VALID [2022-04-28 03:30:12,751 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5923#true} {5923#true} #41#return; {5923#true} is VALID [2022-04-28 03:30:12,751 INFO L290 TraceCheckUtils]: 2: Hoare triple {5923#true} assume true; {5923#true} is VALID [2022-04-28 03:30:12,751 INFO L290 TraceCheckUtils]: 1: Hoare triple {5923#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {5923#true} is VALID [2022-04-28 03:30:12,751 INFO L272 TraceCheckUtils]: 0: Hoare triple {5923#true} call ULTIMATE.init(); {5923#true} is VALID [2022-04-28 03:30:12,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:12,751 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [76036880] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:30:12,752 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:30:12,752 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 7 [2022-04-28 03:30:13,300 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:30:13,300 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2001666870] [2022-04-28 03:30:13,300 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2001666870] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:30:13,300 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:30:13,300 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2022-04-28 03:30:13,301 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1886718131] [2022-04-28 03:30:13,301 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:30:13,301 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 59 [2022-04-28 03:30:13,301 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:30:13,301 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:13,340 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:13,340 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-28 03:30:13,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:13,341 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-28 03:30:13,341 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=371, Unknown=0, NotChecked=0, Total=462 [2022-04-28 03:30:13,341 INFO L87 Difference]: Start difference. First operand 61 states and 63 transitions. Second operand has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:14,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:14,436 INFO L93 Difference]: Finished difference Result 73 states and 77 transitions. [2022-04-28 03:30:14,436 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-28 03:30:14,437 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 59 [2022-04-28 03:30:14,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:30:14,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:14,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 73 transitions. [2022-04-28 03:30:14,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:14,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 73 transitions. [2022-04-28 03:30:14,438 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 73 transitions. [2022-04-28 03:30:14,474 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:14,474 INFO L225 Difference]: With dead ends: 73 [2022-04-28 03:30:14,474 INFO L226 Difference]: Without dead ends: 65 [2022-04-28 03:30:14,475 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 33 SyntacticMatches, 34 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 304 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=203, Invalid=1203, Unknown=0, NotChecked=0, Total=1406 [2022-04-28 03:30:14,475 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 42 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 881 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 899 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 881 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:30:14,475 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 94 Invalid, 899 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 881 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 03:30:14,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-04-28 03:30:14,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 64. [2022-04-28 03:30:14,542 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:30:14,542 INFO L82 GeneralOperation]: Start isEquivalent. First operand 65 states. Second operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:14,542 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:14,542 INFO L87 Difference]: Start difference. First operand 65 states. Second operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:14,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:14,543 INFO L93 Difference]: Finished difference Result 65 states and 67 transitions. [2022-04-28 03:30:14,543 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 67 transitions. [2022-04-28 03:30:14,543 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:14,543 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:14,543 INFO L74 IsIncluded]: Start isIncluded. First operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-28 03:30:14,544 INFO L87 Difference]: Start difference. First operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-28 03:30:14,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:14,547 INFO L93 Difference]: Finished difference Result 65 states and 67 transitions. [2022-04-28 03:30:14,547 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 67 transitions. [2022-04-28 03:30:14,547 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:14,547 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:14,547 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:30:14,547 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:30:14,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 59 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:14,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 66 transitions. [2022-04-28 03:30:14,548 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 66 transitions. Word has length 59 [2022-04-28 03:30:14,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:30:14,548 INFO L495 AbstractCegarLoop]: Abstraction has 64 states and 66 transitions. [2022-04-28 03:30:14,548 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.8947368421052633) internal successors, (55), 18 states have internal predecessors, (55), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:14,548 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 64 states and 66 transitions. [2022-04-28 03:30:14,614 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:14,614 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 66 transitions. [2022-04-28 03:30:14,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-04-28 03:30:14,614 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:30:14,614 INFO L195 NwaCegarLoop]: trace histogram [17, 17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:30:14,630 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-28 03:30:14,830 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-28 03:30:14,830 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:30:14,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:30:14,830 INFO L85 PathProgramCache]: Analyzing trace with hash -2105498611, now seen corresponding path program 16 times [2022-04-28 03:30:14,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:14,831 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1734981939] [2022-04-28 03:30:16,852 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:30:17,271 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:20,200 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:30:20,380 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:20,381 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:30:20,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1281882799, now seen corresponding path program 1 times [2022-04-28 03:30:20,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:30:20,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048461058] [2022-04-28 03:30:20,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:20,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:30:20,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:20,485 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:30:20,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:20,488 INFO L290 TraceCheckUtils]: 0: Hoare triple {6474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {6467#true} is VALID [2022-04-28 03:30:20,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-04-28 03:30:20,488 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6467#true} {6467#true} #41#return; {6467#true} is VALID [2022-04-28 03:30:20,489 INFO L272 TraceCheckUtils]: 0: Hoare triple {6467#true} call ULTIMATE.init(); {6474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:30:20,489 INFO L290 TraceCheckUtils]: 1: Hoare triple {6474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {6467#true} is VALID [2022-04-28 03:30:20,489 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-04-28 03:30:20,489 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6467#true} #41#return; {6467#true} is VALID [2022-04-28 03:30:20,489 INFO L272 TraceCheckUtils]: 4: Hoare triple {6467#true} call #t~ret7 := main(); {6467#true} is VALID [2022-04-28 03:30:20,489 INFO L290 TraceCheckUtils]: 5: Hoare triple {6467#true} ~x~0 := 0;~y~0 := 0; {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:20,490 INFO L290 TraceCheckUtils]: 6: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [109] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_391 4294967296))) (let ((.cse0 (= v_main_~x~0_391 v_main_~x~0_390)) (.cse1 (= v_main_~y~0_406 v_main_~y~0_405)) (.cse2 (= |v_main_#t~post5_109| |v_main_#t~post5_108|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and (= |v_main_#t~post6_220| |v_main_#t~post6_218|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) .cse2 (= |v_main_#t~post6_218| |v_main_#t~post6_220|)) (and (= (+ v_main_~x~0_390 v_main_~y~0_405) (+ v_main_~x~0_391 v_main_~y~0_406)) (<= (div (+ (* (- 1) v_main_~y~0_406) v_main_~y~0_405 1000000 (* v_main_~x~0_391 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_391 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_405 v_main_~y~0_406) .cse3)))) InVars {main_~y~0=v_main_~y~0_406, main_#t~post5=|v_main_#t~post5_109|, main_~x~0=v_main_~x~0_391, main_#t~post6=|v_main_#t~post6_220|} OutVars{main_#t~post5=|v_main_#t~post5_108|, main_~y~0=v_main_~y~0_405, main_~x~0=v_main_~x~0_390, main_#t~post6=|v_main_#t~post6_218|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:20,490 INFO L290 TraceCheckUtils]: 7: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [110] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:20,491 INFO L290 TraceCheckUtils]: 8: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [111] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_393 4294967296)) (.cse0 (= |v_main_#t~post4_114| |v_main_#t~post4_113|)) (.cse2 (= v_main_~x~0_393 v_main_~x~0_392)) (.cse3 (= v_main_~y~0_408 v_main_~y~0_407))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= |v_main_#t~post6_219| |v_main_#t~post6_223|)) (and (<= (div (+ v_main_~y~0_408 500000 (* v_main_~x~0_393 (- 1)) (* (- 1) v_main_~y~0_407)) (- 4294967296)) (+ (div (+ v_main_~x~0_393 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_408 v_main_~y~0_407) (< .cse1 500000) (= (+ v_main_~x~0_392 v_main_~y~0_408) (+ v_main_~x~0_393 v_main_~y~0_407))) (and .cse0 .cse2 .cse3 (= |v_main_#t~post6_223| |v_main_#t~post6_219|)))) InVars {main_#t~post4=|v_main_#t~post4_114|, main_~y~0=v_main_~y~0_408, main_~x~0=v_main_~x~0_393, main_#t~post6=|v_main_#t~post6_223|} OutVars{main_#t~post4=|v_main_#t~post4_113|, main_~y~0=v_main_~y~0_407, main_~x~0=v_main_~x~0_392, main_#t~post6=|v_main_#t~post6_219|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {6473#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:30:20,492 INFO L290 TraceCheckUtils]: 9: Hoare triple {6473#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} [108] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {6468#false} is VALID [2022-04-28 03:30:20,492 INFO L272 TraceCheckUtils]: 10: Hoare triple {6468#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {6468#false} is VALID [2022-04-28 03:30:20,492 INFO L290 TraceCheckUtils]: 11: Hoare triple {6468#false} ~cond := #in~cond; {6468#false} is VALID [2022-04-28 03:30:20,492 INFO L290 TraceCheckUtils]: 12: Hoare triple {6468#false} assume 0 == ~cond; {6468#false} is VALID [2022-04-28 03:30:20,492 INFO L290 TraceCheckUtils]: 13: Hoare triple {6468#false} assume !false; {6468#false} is VALID [2022-04-28 03:30:20,492 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:20,492 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:30:20,492 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048461058] [2022-04-28 03:30:20,492 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2048461058] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:30:20,493 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1975128340] [2022-04-28 03:30:20,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:20,493 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:20,493 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:30:20,500 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:30:20,500 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-28 03:30:20,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:20,522 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:30:20,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:20,529 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:30:20,663 INFO L272 TraceCheckUtils]: 0: Hoare triple {6467#true} call ULTIMATE.init(); {6467#true} is VALID [2022-04-28 03:30:20,663 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {6467#true} is VALID [2022-04-28 03:30:20,663 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-04-28 03:30:20,663 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6467#true} #41#return; {6467#true} is VALID [2022-04-28 03:30:20,663 INFO L272 TraceCheckUtils]: 4: Hoare triple {6467#true} call #t~ret7 := main(); {6467#true} is VALID [2022-04-28 03:30:20,664 INFO L290 TraceCheckUtils]: 5: Hoare triple {6467#true} ~x~0 := 0;~y~0 := 0; {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:20,664 INFO L290 TraceCheckUtils]: 6: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [109] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_391 4294967296))) (let ((.cse0 (= v_main_~x~0_391 v_main_~x~0_390)) (.cse1 (= v_main_~y~0_406 v_main_~y~0_405)) (.cse2 (= |v_main_#t~post5_109| |v_main_#t~post5_108|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and (= |v_main_#t~post6_220| |v_main_#t~post6_218|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) .cse2 (= |v_main_#t~post6_218| |v_main_#t~post6_220|)) (and (= (+ v_main_~x~0_390 v_main_~y~0_405) (+ v_main_~x~0_391 v_main_~y~0_406)) (<= (div (+ (* (- 1) v_main_~y~0_406) v_main_~y~0_405 1000000 (* v_main_~x~0_391 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_391 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_405 v_main_~y~0_406) .cse3)))) InVars {main_~y~0=v_main_~y~0_406, main_#t~post5=|v_main_#t~post5_109|, main_~x~0=v_main_~x~0_391, main_#t~post6=|v_main_#t~post6_220|} OutVars{main_#t~post5=|v_main_#t~post5_108|, main_~y~0=v_main_~y~0_405, main_~x~0=v_main_~x~0_390, main_#t~post6=|v_main_#t~post6_218|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:20,665 INFO L290 TraceCheckUtils]: 7: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [110] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6472#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:20,665 INFO L290 TraceCheckUtils]: 8: Hoare triple {6472#(and (= main_~x~0 0) (= main_~y~0 0))} [111] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_393 4294967296)) (.cse0 (= |v_main_#t~post4_114| |v_main_#t~post4_113|)) (.cse2 (= v_main_~x~0_393 v_main_~x~0_392)) (.cse3 (= v_main_~y~0_408 v_main_~y~0_407))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= |v_main_#t~post6_219| |v_main_#t~post6_223|)) (and (<= (div (+ v_main_~y~0_408 500000 (* v_main_~x~0_393 (- 1)) (* (- 1) v_main_~y~0_407)) (- 4294967296)) (+ (div (+ v_main_~x~0_393 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_408 v_main_~y~0_407) (< .cse1 500000) (= (+ v_main_~x~0_392 v_main_~y~0_408) (+ v_main_~x~0_393 v_main_~y~0_407))) (and .cse0 .cse2 .cse3 (= |v_main_#t~post6_223| |v_main_#t~post6_219|)))) InVars {main_#t~post4=|v_main_#t~post4_114|, main_~y~0=v_main_~y~0_408, main_~x~0=v_main_~x~0_393, main_#t~post6=|v_main_#t~post6_223|} OutVars{main_#t~post4=|v_main_#t~post4_113|, main_~y~0=v_main_~y~0_407, main_~x~0=v_main_~x~0_392, main_#t~post6=|v_main_#t~post6_219|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {6502#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:30:20,666 INFO L290 TraceCheckUtils]: 9: Hoare triple {6502#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [108] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {6468#false} is VALID [2022-04-28 03:30:20,666 INFO L272 TraceCheckUtils]: 10: Hoare triple {6468#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {6468#false} is VALID [2022-04-28 03:30:20,666 INFO L290 TraceCheckUtils]: 11: Hoare triple {6468#false} ~cond := #in~cond; {6468#false} is VALID [2022-04-28 03:30:20,667 INFO L290 TraceCheckUtils]: 12: Hoare triple {6468#false} assume 0 == ~cond; {6468#false} is VALID [2022-04-28 03:30:20,667 INFO L290 TraceCheckUtils]: 13: Hoare triple {6468#false} assume !false; {6468#false} is VALID [2022-04-28 03:30:20,667 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:20,667 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:30:21,542 INFO L290 TraceCheckUtils]: 13: Hoare triple {6468#false} assume !false; {6468#false} is VALID [2022-04-28 03:30:21,542 INFO L290 TraceCheckUtils]: 12: Hoare triple {6521#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {6468#false} is VALID [2022-04-28 03:30:21,542 INFO L290 TraceCheckUtils]: 11: Hoare triple {6525#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {6521#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:30:21,543 INFO L272 TraceCheckUtils]: 10: Hoare triple {6529#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {6525#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:30:21,543 INFO L290 TraceCheckUtils]: 9: Hoare triple {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [108] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {6529#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:30:21,545 INFO L290 TraceCheckUtils]: 8: Hoare triple {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [111] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_393 4294967296)) (.cse0 (= |v_main_#t~post4_114| |v_main_#t~post4_113|)) (.cse2 (= v_main_~x~0_393 v_main_~x~0_392)) (.cse3 (= v_main_~y~0_408 v_main_~y~0_407))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= |v_main_#t~post6_219| |v_main_#t~post6_223|)) (and (<= (div (+ v_main_~y~0_408 500000 (* v_main_~x~0_393 (- 1)) (* (- 1) v_main_~y~0_407)) (- 4294967296)) (+ (div (+ v_main_~x~0_393 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_408 v_main_~y~0_407) (< .cse1 500000) (= (+ v_main_~x~0_392 v_main_~y~0_408) (+ v_main_~x~0_393 v_main_~y~0_407))) (and .cse0 .cse2 .cse3 (= |v_main_#t~post6_223| |v_main_#t~post6_219|)))) InVars {main_#t~post4=|v_main_#t~post4_114|, main_~y~0=v_main_~y~0_408, main_~x~0=v_main_~x~0_393, main_#t~post6=|v_main_#t~post6_223|} OutVars{main_#t~post4=|v_main_#t~post4_113|, main_~y~0=v_main_~y~0_407, main_~x~0=v_main_~x~0_392, main_#t~post6=|v_main_#t~post6_219|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:21,545 INFO L290 TraceCheckUtils]: 7: Hoare triple {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [110] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:21,784 INFO L290 TraceCheckUtils]: 6: Hoare triple {6543#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_418_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_418_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_418_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [109] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_391 4294967296))) (let ((.cse0 (= v_main_~x~0_391 v_main_~x~0_390)) (.cse1 (= v_main_~y~0_406 v_main_~y~0_405)) (.cse2 (= |v_main_#t~post5_109| |v_main_#t~post5_108|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and (= |v_main_#t~post6_220| |v_main_#t~post6_218|) .cse0 .cse1 .cse2) (and .cse0 .cse1 (or (not .cse3) (not .cse4)) .cse2 (= |v_main_#t~post6_218| |v_main_#t~post6_220|)) (and (= (+ v_main_~x~0_390 v_main_~y~0_405) (+ v_main_~x~0_391 v_main_~y~0_406)) (<= (div (+ (* (- 1) v_main_~y~0_406) v_main_~y~0_405 1000000 (* v_main_~x~0_391 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_391 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_405 v_main_~y~0_406) .cse3)))) InVars {main_~y~0=v_main_~y~0_406, main_#t~post5=|v_main_#t~post5_109|, main_~x~0=v_main_~x~0_391, main_#t~post6=|v_main_#t~post6_220|} OutVars{main_#t~post5=|v_main_#t~post5_108|, main_~y~0=v_main_~y~0_405, main_~x~0=v_main_~x~0_390, main_#t~post6=|v_main_#t~post6_218|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {6533#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:21,785 INFO L290 TraceCheckUtils]: 5: Hoare triple {6467#true} ~x~0 := 0;~y~0 := 0; {6543#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_418_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_418_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_418_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:30:21,785 INFO L272 TraceCheckUtils]: 4: Hoare triple {6467#true} call #t~ret7 := main(); {6467#true} is VALID [2022-04-28 03:30:21,785 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6467#true} {6467#true} #41#return; {6467#true} is VALID [2022-04-28 03:30:21,785 INFO L290 TraceCheckUtils]: 2: Hoare triple {6467#true} assume true; {6467#true} is VALID [2022-04-28 03:30:21,785 INFO L290 TraceCheckUtils]: 1: Hoare triple {6467#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {6467#true} is VALID [2022-04-28 03:30:21,785 INFO L272 TraceCheckUtils]: 0: Hoare triple {6467#true} call ULTIMATE.init(); {6467#true} is VALID [2022-04-28 03:30:21,785 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:21,786 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1975128340] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:30:21,786 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:30:21,786 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-28 03:30:22,786 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:30:22,786 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1734981939] [2022-04-28 03:30:22,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1734981939] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:30:22,787 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:30:22,787 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [36] imperfect sequences [] total 36 [2022-04-28 03:30:22,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1487051743] [2022-04-28 03:30:22,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:30:22,787 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 62 [2022-04-28 03:30:22,787 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:30:22,787 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:22,828 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:22,828 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-28 03:30:22,828 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:22,829 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-28 03:30:22,829 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=236, Invalid=1570, Unknown=0, NotChecked=0, Total=1806 [2022-04-28 03:30:22,829 INFO L87 Difference]: Start difference. First operand 64 states and 66 transitions. Second operand has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:25,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:25,432 INFO L93 Difference]: Finished difference Result 75 states and 79 transitions. [2022-04-28 03:30:25,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-04-28 03:30:25,432 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 62 [2022-04-28 03:30:25,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:30:25,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:25,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 75 transitions. [2022-04-28 03:30:25,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:25,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 75 transitions. [2022-04-28 03:30:25,434 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 36 states and 75 transitions. [2022-04-28 03:30:25,489 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:25,489 INFO L225 Difference]: With dead ends: 75 [2022-04-28 03:30:25,490 INFO L226 Difference]: Without dead ends: 67 [2022-04-28 03:30:25,491 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 31 SyntacticMatches, 19 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1196 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=516, Invalid=5184, Unknown=0, NotChecked=0, Total=5700 [2022-04-28 03:30:25,491 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 26 mSDsluCounter, 167 mSDsCounter, 0 mSdLazyCounter, 1882 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 179 SdHoareTripleChecker+Invalid, 1917 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 1882 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:30:25,491 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 179 Invalid, 1917 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 1882 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-04-28 03:30:25,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-04-28 03:30:25,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2022-04-28 03:30:25,570 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:30:25,570 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:25,570 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:25,570 INFO L87 Difference]: Start difference. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:25,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:25,571 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2022-04-28 03:30:25,571 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 69 transitions. [2022-04-28 03:30:25,571 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:25,571 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:25,571 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 67 states. [2022-04-28 03:30:25,572 INFO L87 Difference]: Start difference. First operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 67 states. [2022-04-28 03:30:25,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:25,575 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2022-04-28 03:30:25,575 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 69 transitions. [2022-04-28 03:30:25,575 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:25,575 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:25,575 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:30:25,575 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:30:25,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 62 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:25,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 69 transitions. [2022-04-28 03:30:25,576 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 69 transitions. Word has length 62 [2022-04-28 03:30:25,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:30:25,576 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 69 transitions. [2022-04-28 03:30:25,576 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.6111111111111112) internal successors, (58), 35 states have internal predecessors, (58), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:25,576 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 67 states and 69 transitions. [2022-04-28 03:30:25,662 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:25,662 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 69 transitions. [2022-04-28 03:30:25,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-04-28 03:30:25,662 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:30:25,662 INFO L195 NwaCegarLoop]: trace histogram [18, 18, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:30:25,679 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-28 03:30:25,878 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:25,879 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:30:25,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:30:25,879 INFO L85 PathProgramCache]: Analyzing trace with hash -748868795, now seen corresponding path program 17 times [2022-04-28 03:30:25,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:25,879 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1573329105] [2022-04-28 03:30:30,054 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:30:30,312 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:34,604 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:30:34,778 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:34,780 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:30:34,782 INFO L85 PathProgramCache]: Analyzing trace with hash -963552337, now seen corresponding path program 1 times [2022-04-28 03:30:34,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:30:34,782 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686701223] [2022-04-28 03:30:34,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:34,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:30:34,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:34,859 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:30:34,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:34,862 INFO L290 TraceCheckUtils]: 0: Hoare triple {7087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7080#true} is VALID [2022-04-28 03:30:34,862 INFO L290 TraceCheckUtils]: 1: Hoare triple {7080#true} assume true; {7080#true} is VALID [2022-04-28 03:30:34,862 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7080#true} {7080#true} #41#return; {7080#true} is VALID [2022-04-28 03:30:34,863 INFO L272 TraceCheckUtils]: 0: Hoare triple {7080#true} call ULTIMATE.init(); {7087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:30:34,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {7087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7080#true} is VALID [2022-04-28 03:30:34,863 INFO L290 TraceCheckUtils]: 2: Hoare triple {7080#true} assume true; {7080#true} is VALID [2022-04-28 03:30:34,863 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7080#true} {7080#true} #41#return; {7080#true} is VALID [2022-04-28 03:30:34,863 INFO L272 TraceCheckUtils]: 4: Hoare triple {7080#true} call #t~ret7 := main(); {7080#true} is VALID [2022-04-28 03:30:34,864 INFO L290 TraceCheckUtils]: 5: Hoare triple {7080#true} ~x~0 := 0;~y~0 := 0; {7085#(= main_~x~0 0)} is VALID [2022-04-28 03:30:34,864 INFO L290 TraceCheckUtils]: 6: Hoare triple {7085#(= main_~x~0 0)} [113] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_424 4294967296))) (let ((.cse1 (< .cse4 1000000)) (.cse0 (<= 500000 .cse4)) (.cse2 (= |v_main_#t~post5_116| |v_main_#t~post5_115|)) (.cse3 (= |v_main_#t~post6_234| |v_main_#t~post6_232|))) (or (and .cse0 (<= (div (+ (* v_main_~x~0_423 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_424 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_424 v_main_~x~0_423) (= (+ v_main_~x~0_423 v_main_~y~0_439) (+ v_main_~x~0_424 v_main_~y~0_440))) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 (= v_main_~x~0_423 v_main_~x~0_424) (= v_main_~y~0_439 v_main_~y~0_440)) (and .cse2 .cse3 (= v_main_~y~0_440 v_main_~y~0_439) (= v_main_~x~0_424 v_main_~x~0_423))))) InVars {main_~y~0=v_main_~y~0_440, main_#t~post5=|v_main_#t~post5_116|, main_~x~0=v_main_~x~0_424, main_#t~post6=|v_main_#t~post6_234|} OutVars{main_#t~post5=|v_main_#t~post5_115|, main_~y~0=v_main_~y~0_439, main_~x~0=v_main_~x~0_423, main_#t~post6=|v_main_#t~post6_232|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7085#(= main_~x~0 0)} is VALID [2022-04-28 03:30:34,865 INFO L290 TraceCheckUtils]: 7: Hoare triple {7085#(= main_~x~0 0)} [114] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7085#(= main_~x~0 0)} is VALID [2022-04-28 03:30:34,866 INFO L290 TraceCheckUtils]: 8: Hoare triple {7085#(= main_~x~0 0)} [115] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_426 v_main_~x~0_425)) (.cse1 (= v_main_~y~0_442 v_main_~y~0_441)) (.cse2 (= |v_main_#t~post6_237| |v_main_#t~post6_233|)) (.cse3 (= |v_main_#t~post4_121| |v_main_#t~post4_120|)) (.cse4 (mod v_main_~x~0_426 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_426 v_main_~y~0_441) (+ v_main_~x~0_425 v_main_~y~0_442)) (<= (div (+ (* v_main_~x~0_425 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_426 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_426 v_main_~x~0_425) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_121|, main_~y~0=v_main_~y~0_442, main_~x~0=v_main_~x~0_426, main_#t~post6=|v_main_#t~post6_237|} OutVars{main_#t~post4=|v_main_#t~post4_120|, main_~y~0=v_main_~y~0_441, main_~x~0=v_main_~x~0_425, main_#t~post6=|v_main_#t~post6_233|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7086#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:30:34,866 INFO L290 TraceCheckUtils]: 9: Hoare triple {7086#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [112] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7081#false} is VALID [2022-04-28 03:30:34,866 INFO L272 TraceCheckUtils]: 10: Hoare triple {7081#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7081#false} is VALID [2022-04-28 03:30:34,866 INFO L290 TraceCheckUtils]: 11: Hoare triple {7081#false} ~cond := #in~cond; {7081#false} is VALID [2022-04-28 03:30:34,866 INFO L290 TraceCheckUtils]: 12: Hoare triple {7081#false} assume 0 == ~cond; {7081#false} is VALID [2022-04-28 03:30:34,866 INFO L290 TraceCheckUtils]: 13: Hoare triple {7081#false} assume !false; {7081#false} is VALID [2022-04-28 03:30:34,866 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:34,867 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:30:34,867 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686701223] [2022-04-28 03:30:34,867 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1686701223] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:30:34,867 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1187360028] [2022-04-28 03:30:34,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:34,867 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:34,867 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:30:34,871 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:30:34,872 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-28 03:30:34,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:34,898 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:30:34,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:34,905 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:30:35,078 INFO L272 TraceCheckUtils]: 0: Hoare triple {7080#true} call ULTIMATE.init(); {7080#true} is VALID [2022-04-28 03:30:35,078 INFO L290 TraceCheckUtils]: 1: Hoare triple {7080#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7080#true} is VALID [2022-04-28 03:30:35,078 INFO L290 TraceCheckUtils]: 2: Hoare triple {7080#true} assume true; {7080#true} is VALID [2022-04-28 03:30:35,078 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7080#true} {7080#true} #41#return; {7080#true} is VALID [2022-04-28 03:30:35,078 INFO L272 TraceCheckUtils]: 4: Hoare triple {7080#true} call #t~ret7 := main(); {7080#true} is VALID [2022-04-28 03:30:35,079 INFO L290 TraceCheckUtils]: 5: Hoare triple {7080#true} ~x~0 := 0;~y~0 := 0; {7106#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:35,079 INFO L290 TraceCheckUtils]: 6: Hoare triple {7106#(and (= main_~x~0 0) (= main_~y~0 0))} [113] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_424 4294967296))) (let ((.cse1 (< .cse4 1000000)) (.cse0 (<= 500000 .cse4)) (.cse2 (= |v_main_#t~post5_116| |v_main_#t~post5_115|)) (.cse3 (= |v_main_#t~post6_234| |v_main_#t~post6_232|))) (or (and .cse0 (<= (div (+ (* v_main_~x~0_423 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_424 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_424 v_main_~x~0_423) (= (+ v_main_~x~0_423 v_main_~y~0_439) (+ v_main_~x~0_424 v_main_~y~0_440))) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 (= v_main_~x~0_423 v_main_~x~0_424) (= v_main_~y~0_439 v_main_~y~0_440)) (and .cse2 .cse3 (= v_main_~y~0_440 v_main_~y~0_439) (= v_main_~x~0_424 v_main_~x~0_423))))) InVars {main_~y~0=v_main_~y~0_440, main_#t~post5=|v_main_#t~post5_116|, main_~x~0=v_main_~x~0_424, main_#t~post6=|v_main_#t~post6_234|} OutVars{main_#t~post5=|v_main_#t~post5_115|, main_~y~0=v_main_~y~0_439, main_~x~0=v_main_~x~0_423, main_#t~post6=|v_main_#t~post6_232|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7106#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:35,080 INFO L290 TraceCheckUtils]: 7: Hoare triple {7106#(and (= main_~x~0 0) (= main_~y~0 0))} [114] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7106#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:35,081 INFO L290 TraceCheckUtils]: 8: Hoare triple {7106#(and (= main_~x~0 0) (= main_~y~0 0))} [115] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_426 v_main_~x~0_425)) (.cse1 (= v_main_~y~0_442 v_main_~y~0_441)) (.cse2 (= |v_main_#t~post6_237| |v_main_#t~post6_233|)) (.cse3 (= |v_main_#t~post4_121| |v_main_#t~post4_120|)) (.cse4 (mod v_main_~x~0_426 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_426 v_main_~y~0_441) (+ v_main_~x~0_425 v_main_~y~0_442)) (<= (div (+ (* v_main_~x~0_425 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_426 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_426 v_main_~x~0_425) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_121|, main_~y~0=v_main_~y~0_442, main_~x~0=v_main_~x~0_426, main_#t~post6=|v_main_#t~post6_237|} OutVars{main_#t~post4=|v_main_#t~post4_120|, main_~y~0=v_main_~y~0_441, main_~x~0=v_main_~x~0_425, main_#t~post6=|v_main_#t~post6_233|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7116#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:30:35,081 INFO L290 TraceCheckUtils]: 9: Hoare triple {7116#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [112] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7081#false} is VALID [2022-04-28 03:30:35,081 INFO L272 TraceCheckUtils]: 10: Hoare triple {7081#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7081#false} is VALID [2022-04-28 03:30:35,081 INFO L290 TraceCheckUtils]: 11: Hoare triple {7081#false} ~cond := #in~cond; {7081#false} is VALID [2022-04-28 03:30:35,082 INFO L290 TraceCheckUtils]: 12: Hoare triple {7081#false} assume 0 == ~cond; {7081#false} is VALID [2022-04-28 03:30:35,082 INFO L290 TraceCheckUtils]: 13: Hoare triple {7081#false} assume !false; {7081#false} is VALID [2022-04-28 03:30:35,082 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:35,082 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:30:35,904 INFO L290 TraceCheckUtils]: 13: Hoare triple {7081#false} assume !false; {7081#false} is VALID [2022-04-28 03:30:35,904 INFO L290 TraceCheckUtils]: 12: Hoare triple {7135#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {7081#false} is VALID [2022-04-28 03:30:35,904 INFO L290 TraceCheckUtils]: 11: Hoare triple {7139#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {7135#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:30:35,905 INFO L272 TraceCheckUtils]: 10: Hoare triple {7143#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7139#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:30:35,905 INFO L290 TraceCheckUtils]: 9: Hoare triple {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [112] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7143#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:30:35,907 INFO L290 TraceCheckUtils]: 8: Hoare triple {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [115] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_426 v_main_~x~0_425)) (.cse1 (= v_main_~y~0_442 v_main_~y~0_441)) (.cse2 (= |v_main_#t~post6_237| |v_main_#t~post6_233|)) (.cse3 (= |v_main_#t~post4_121| |v_main_#t~post4_120|)) (.cse4 (mod v_main_~x~0_426 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (<= 500000 .cse4) .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_426 v_main_~y~0_441) (+ v_main_~x~0_425 v_main_~y~0_442)) (<= (div (+ (* v_main_~x~0_425 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_426 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_426 v_main_~x~0_425) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_121|, main_~y~0=v_main_~y~0_442, main_~x~0=v_main_~x~0_426, main_#t~post6=|v_main_#t~post6_237|} OutVars{main_#t~post4=|v_main_#t~post4_120|, main_~y~0=v_main_~y~0_441, main_~x~0=v_main_~x~0_425, main_#t~post6=|v_main_#t~post6_233|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:35,907 INFO L290 TraceCheckUtils]: 7: Hoare triple {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [114] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:37,920 WARN L290 TraceCheckUtils]: 6: Hoare triple {7157#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_452_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_452_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_452_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [113] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_424 4294967296))) (let ((.cse1 (< .cse4 1000000)) (.cse0 (<= 500000 .cse4)) (.cse2 (= |v_main_#t~post5_116| |v_main_#t~post5_115|)) (.cse3 (= |v_main_#t~post6_234| |v_main_#t~post6_232|))) (or (and .cse0 (<= (div (+ (* v_main_~x~0_423 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_424 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_424 v_main_~x~0_423) (= (+ v_main_~x~0_423 v_main_~y~0_439) (+ v_main_~x~0_424 v_main_~y~0_440))) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 (= v_main_~x~0_423 v_main_~x~0_424) (= v_main_~y~0_439 v_main_~y~0_440)) (and .cse2 .cse3 (= v_main_~y~0_440 v_main_~y~0_439) (= v_main_~x~0_424 v_main_~x~0_423))))) InVars {main_~y~0=v_main_~y~0_440, main_#t~post5=|v_main_#t~post5_116|, main_~x~0=v_main_~x~0_424, main_#t~post6=|v_main_#t~post6_234|} OutVars{main_#t~post5=|v_main_#t~post5_115|, main_~y~0=v_main_~y~0_439, main_~x~0=v_main_~x~0_423, main_#t~post6=|v_main_#t~post6_232|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7147#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is UNKNOWN [2022-04-28 03:30:37,921 INFO L290 TraceCheckUtils]: 5: Hoare triple {7080#true} ~x~0 := 0;~y~0 := 0; {7157#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_452_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_452_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_452_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:30:37,921 INFO L272 TraceCheckUtils]: 4: Hoare triple {7080#true} call #t~ret7 := main(); {7080#true} is VALID [2022-04-28 03:30:37,921 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7080#true} {7080#true} #41#return; {7080#true} is VALID [2022-04-28 03:30:37,921 INFO L290 TraceCheckUtils]: 2: Hoare triple {7080#true} assume true; {7080#true} is VALID [2022-04-28 03:30:37,921 INFO L290 TraceCheckUtils]: 1: Hoare triple {7080#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7080#true} is VALID [2022-04-28 03:30:37,921 INFO L272 TraceCheckUtils]: 0: Hoare triple {7080#true} call ULTIMATE.init(); {7080#true} is VALID [2022-04-28 03:30:37,921 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:37,921 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1187360028] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:30:37,922 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:30:37,922 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:30:38,719 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:30:38,720 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1573329105] [2022-04-28 03:30:38,720 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1573329105] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:30:38,720 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:30:38,720 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2022-04-28 03:30:38,720 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [586027207] [2022-04-28 03:30:38,720 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:30:38,720 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 65 [2022-04-28 03:30:38,721 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:30:38,721 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:38,764 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:38,764 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-28 03:30:38,764 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:38,765 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-28 03:30:38,765 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=693, Unknown=0, NotChecked=0, Total=812 [2022-04-28 03:30:38,765 INFO L87 Difference]: Start difference. First operand 67 states and 69 transitions. Second operand has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:40,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:40,431 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2022-04-28 03:30:40,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-28 03:30:40,431 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 65 [2022-04-28 03:30:40,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:30:40,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:40,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 79 transitions. [2022-04-28 03:30:40,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:40,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 79 transitions. [2022-04-28 03:30:40,433 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 79 transitions. [2022-04-28 03:30:40,496 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:40,496 INFO L225 Difference]: With dead ends: 79 [2022-04-28 03:30:40,496 INFO L226 Difference]: Without dead ends: 71 [2022-04-28 03:30:40,497 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 28 SyntacticMatches, 38 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 507 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=245, Invalid=1917, Unknown=0, NotChecked=0, Total=2162 [2022-04-28 03:30:40,497 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 46 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 1099 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 104 SdHoareTripleChecker+Invalid, 1119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 1099 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-28 03:30:40,498 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 104 Invalid, 1119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 1099 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-28 03:30:40,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2022-04-28 03:30:40,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 70. [2022-04-28 03:30:40,593 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:30:40,594 INFO L82 GeneralOperation]: Start isEquivalent. First operand 71 states. Second operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:40,594 INFO L74 IsIncluded]: Start isIncluded. First operand 71 states. Second operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:40,594 INFO L87 Difference]: Start difference. First operand 71 states. Second operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:40,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:40,595 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2022-04-28 03:30:40,595 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 73 transitions. [2022-04-28 03:30:40,595 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:40,595 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:40,595 INFO L74 IsIncluded]: Start isIncluded. First operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 71 states. [2022-04-28 03:30:40,595 INFO L87 Difference]: Start difference. First operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 71 states. [2022-04-28 03:30:40,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:40,600 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2022-04-28 03:30:40,600 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 73 transitions. [2022-04-28 03:30:40,600 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:40,600 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:40,600 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:30:40,600 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:30:40,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 65 states have (on average 1.0461538461538462) internal successors, (68), 65 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:40,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 72 transitions. [2022-04-28 03:30:40,601 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 72 transitions. Word has length 65 [2022-04-28 03:30:40,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:30:40,602 INFO L495 AbstractCegarLoop]: Abstraction has 70 states and 72 transitions. [2022-04-28 03:30:40,602 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.9047619047619047) internal successors, (61), 20 states have internal predecessors, (61), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:40,602 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 70 states and 72 transitions. [2022-04-28 03:30:40,687 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:40,687 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 72 transitions. [2022-04-28 03:30:40,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-28 03:30:40,687 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:30:40,687 INFO L195 NwaCegarLoop]: trace histogram [19, 19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:30:40,704 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-28 03:30:40,888 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:40,888 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:30:40,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:30:40,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1032275699, now seen corresponding path program 18 times [2022-04-28 03:30:40,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:40,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [64797583] [2022-04-28 03:30:41,718 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:42,633 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:42,636 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:30:42,639 INFO L85 PathProgramCache]: Analyzing trace with hash 1085979823, now seen corresponding path program 1 times [2022-04-28 03:30:42,639 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:30:42,639 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2032571684] [2022-04-28 03:30:42,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:42,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:30:42,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:42,675 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:30:42,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:42,678 INFO L290 TraceCheckUtils]: 0: Hoare triple {7678#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7671#true} is VALID [2022-04-28 03:30:42,678 INFO L290 TraceCheckUtils]: 1: Hoare triple {7671#true} assume true; {7671#true} is VALID [2022-04-28 03:30:42,678 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7671#true} {7671#true} #41#return; {7671#true} is VALID [2022-04-28 03:30:42,679 INFO L272 TraceCheckUtils]: 0: Hoare triple {7671#true} call ULTIMATE.init(); {7678#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:30:42,679 INFO L290 TraceCheckUtils]: 1: Hoare triple {7678#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7671#true} is VALID [2022-04-28 03:30:42,679 INFO L290 TraceCheckUtils]: 2: Hoare triple {7671#true} assume true; {7671#true} is VALID [2022-04-28 03:30:42,679 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7671#true} {7671#true} #41#return; {7671#true} is VALID [2022-04-28 03:30:42,679 INFO L272 TraceCheckUtils]: 4: Hoare triple {7671#true} call #t~ret7 := main(); {7671#true} is VALID [2022-04-28 03:30:42,679 INFO L290 TraceCheckUtils]: 5: Hoare triple {7671#true} ~x~0 := 0;~y~0 := 0; {7676#(= main_~x~0 0)} is VALID [2022-04-28 03:30:42,680 INFO L290 TraceCheckUtils]: 6: Hoare triple {7676#(= main_~x~0 0)} [117] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_458 4294967296))) (let ((.cse0 (= |v_main_#t~post5_123| |v_main_#t~post5_122|)) (.cse1 (= v_main_~y~0_475 v_main_~y~0_474)) (.cse2 (= |v_main_#t~post6_248| |v_main_#t~post6_246|)) (.cse3 (= v_main_~x~0_458 v_main_~x~0_457)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3 (or (not .cse4) (not .cse5))) (and .cse0 .cse1 .cse2 .cse3) (and (<= (div (+ 1000000 (* v_main_~x~0_457 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_458 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~x~0_458 v_main_~x~0_457) .cse5 (= (+ v_main_~x~0_457 v_main_~y~0_474) (+ v_main_~x~0_458 v_main_~y~0_475)))))) InVars {main_~y~0=v_main_~y~0_475, main_#t~post5=|v_main_#t~post5_123|, main_~x~0=v_main_~x~0_458, main_#t~post6=|v_main_#t~post6_248|} OutVars{main_#t~post5=|v_main_#t~post5_122|, main_~y~0=v_main_~y~0_474, main_~x~0=v_main_~x~0_457, main_#t~post6=|v_main_#t~post6_246|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7676#(= main_~x~0 0)} is VALID [2022-04-28 03:30:42,680 INFO L290 TraceCheckUtils]: 7: Hoare triple {7676#(= main_~x~0 0)} [118] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7676#(= main_~x~0 0)} is VALID [2022-04-28 03:30:42,681 INFO L290 TraceCheckUtils]: 8: Hoare triple {7676#(= main_~x~0 0)} [119] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_128| |v_main_#t~post4_127|)) (.cse1 (= v_main_~y~0_477 v_main_~y~0_476)) (.cse2 (= |v_main_#t~post6_251| |v_main_#t~post6_247|)) (.cse3 (mod v_main_~x~0_460 4294967296))) (or (and .cse0 .cse1 .cse2 (= v_main_~x~0_459 v_main_~x~0_460) (<= 500000 .cse3)) (and .cse0 .cse1 .cse2 (= v_main_~x~0_460 v_main_~x~0_459)) (and (<= (div (+ (* v_main_~x~0_459 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_460 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_459 v_main_~y~0_477) (+ v_main_~x~0_460 v_main_~y~0_476)) (< .cse3 500000) (< v_main_~x~0_460 v_main_~x~0_459)))) InVars {main_#t~post4=|v_main_#t~post4_128|, main_~y~0=v_main_~y~0_477, main_~x~0=v_main_~x~0_460, main_#t~post6=|v_main_#t~post6_251|} OutVars{main_#t~post4=|v_main_#t~post4_127|, main_~y~0=v_main_~y~0_476, main_~x~0=v_main_~x~0_459, main_#t~post6=|v_main_#t~post6_247|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7677#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:30:42,681 INFO L290 TraceCheckUtils]: 9: Hoare triple {7677#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [116] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7672#false} is VALID [2022-04-28 03:30:42,681 INFO L272 TraceCheckUtils]: 10: Hoare triple {7672#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7672#false} is VALID [2022-04-28 03:30:42,682 INFO L290 TraceCheckUtils]: 11: Hoare triple {7672#false} ~cond := #in~cond; {7672#false} is VALID [2022-04-28 03:30:42,682 INFO L290 TraceCheckUtils]: 12: Hoare triple {7672#false} assume 0 == ~cond; {7672#false} is VALID [2022-04-28 03:30:42,682 INFO L290 TraceCheckUtils]: 13: Hoare triple {7672#false} assume !false; {7672#false} is VALID [2022-04-28 03:30:42,682 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:42,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:30:42,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2032571684] [2022-04-28 03:30:42,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2032571684] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:30:42,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2118544273] [2022-04-28 03:30:42,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:42,682 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:42,682 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:30:42,690 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:30:42,690 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-28 03:30:42,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:42,721 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:30:42,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:42,731 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:30:42,891 INFO L272 TraceCheckUtils]: 0: Hoare triple {7671#true} call ULTIMATE.init(); {7671#true} is VALID [2022-04-28 03:30:42,892 INFO L290 TraceCheckUtils]: 1: Hoare triple {7671#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7671#true} is VALID [2022-04-28 03:30:42,892 INFO L290 TraceCheckUtils]: 2: Hoare triple {7671#true} assume true; {7671#true} is VALID [2022-04-28 03:30:42,892 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7671#true} {7671#true} #41#return; {7671#true} is VALID [2022-04-28 03:30:42,892 INFO L272 TraceCheckUtils]: 4: Hoare triple {7671#true} call #t~ret7 := main(); {7671#true} is VALID [2022-04-28 03:30:42,892 INFO L290 TraceCheckUtils]: 5: Hoare triple {7671#true} ~x~0 := 0;~y~0 := 0; {7697#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:42,893 INFO L290 TraceCheckUtils]: 6: Hoare triple {7697#(and (= main_~x~0 0) (= main_~y~0 0))} [117] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_458 4294967296))) (let ((.cse0 (= |v_main_#t~post5_123| |v_main_#t~post5_122|)) (.cse1 (= v_main_~y~0_475 v_main_~y~0_474)) (.cse2 (= |v_main_#t~post6_248| |v_main_#t~post6_246|)) (.cse3 (= v_main_~x~0_458 v_main_~x~0_457)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3 (or (not .cse4) (not .cse5))) (and .cse0 .cse1 .cse2 .cse3) (and (<= (div (+ 1000000 (* v_main_~x~0_457 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_458 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~x~0_458 v_main_~x~0_457) .cse5 (= (+ v_main_~x~0_457 v_main_~y~0_474) (+ v_main_~x~0_458 v_main_~y~0_475)))))) InVars {main_~y~0=v_main_~y~0_475, main_#t~post5=|v_main_#t~post5_123|, main_~x~0=v_main_~x~0_458, main_#t~post6=|v_main_#t~post6_248|} OutVars{main_#t~post5=|v_main_#t~post5_122|, main_~y~0=v_main_~y~0_474, main_~x~0=v_main_~x~0_457, main_#t~post6=|v_main_#t~post6_246|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7697#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:42,893 INFO L290 TraceCheckUtils]: 7: Hoare triple {7697#(and (= main_~x~0 0) (= main_~y~0 0))} [118] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7697#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:42,920 INFO L290 TraceCheckUtils]: 8: Hoare triple {7697#(and (= main_~x~0 0) (= main_~y~0 0))} [119] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_128| |v_main_#t~post4_127|)) (.cse1 (= v_main_~y~0_477 v_main_~y~0_476)) (.cse2 (= |v_main_#t~post6_251| |v_main_#t~post6_247|)) (.cse3 (mod v_main_~x~0_460 4294967296))) (or (and .cse0 .cse1 .cse2 (= v_main_~x~0_459 v_main_~x~0_460) (<= 500000 .cse3)) (and .cse0 .cse1 .cse2 (= v_main_~x~0_460 v_main_~x~0_459)) (and (<= (div (+ (* v_main_~x~0_459 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_460 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_459 v_main_~y~0_477) (+ v_main_~x~0_460 v_main_~y~0_476)) (< .cse3 500000) (< v_main_~x~0_460 v_main_~x~0_459)))) InVars {main_#t~post4=|v_main_#t~post4_128|, main_~y~0=v_main_~y~0_477, main_~x~0=v_main_~x~0_460, main_#t~post6=|v_main_#t~post6_251|} OutVars{main_#t~post4=|v_main_#t~post4_127|, main_~y~0=v_main_~y~0_476, main_~x~0=v_main_~x~0_459, main_#t~post6=|v_main_#t~post6_247|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7707#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:30:42,921 INFO L290 TraceCheckUtils]: 9: Hoare triple {7707#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [116] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7672#false} is VALID [2022-04-28 03:30:42,921 INFO L272 TraceCheckUtils]: 10: Hoare triple {7672#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7672#false} is VALID [2022-04-28 03:30:42,921 INFO L290 TraceCheckUtils]: 11: Hoare triple {7672#false} ~cond := #in~cond; {7672#false} is VALID [2022-04-28 03:30:42,921 INFO L290 TraceCheckUtils]: 12: Hoare triple {7672#false} assume 0 == ~cond; {7672#false} is VALID [2022-04-28 03:30:42,921 INFO L290 TraceCheckUtils]: 13: Hoare triple {7672#false} assume !false; {7672#false} is VALID [2022-04-28 03:30:42,921 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:42,921 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:30:43,630 INFO L290 TraceCheckUtils]: 13: Hoare triple {7672#false} assume !false; {7672#false} is VALID [2022-04-28 03:30:43,631 INFO L290 TraceCheckUtils]: 12: Hoare triple {7726#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {7672#false} is VALID [2022-04-28 03:30:43,631 INFO L290 TraceCheckUtils]: 11: Hoare triple {7730#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {7726#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:30:43,631 INFO L272 TraceCheckUtils]: 10: Hoare triple {7734#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {7730#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:30:43,632 INFO L290 TraceCheckUtils]: 9: Hoare triple {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [116] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {7734#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:30:43,634 INFO L290 TraceCheckUtils]: 8: Hoare triple {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [119] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_128| |v_main_#t~post4_127|)) (.cse1 (= v_main_~y~0_477 v_main_~y~0_476)) (.cse2 (= |v_main_#t~post6_251| |v_main_#t~post6_247|)) (.cse3 (mod v_main_~x~0_460 4294967296))) (or (and .cse0 .cse1 .cse2 (= v_main_~x~0_459 v_main_~x~0_460) (<= 500000 .cse3)) (and .cse0 .cse1 .cse2 (= v_main_~x~0_460 v_main_~x~0_459)) (and (<= (div (+ (* v_main_~x~0_459 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_460 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_459 v_main_~y~0_477) (+ v_main_~x~0_460 v_main_~y~0_476)) (< .cse3 500000) (< v_main_~x~0_460 v_main_~x~0_459)))) InVars {main_#t~post4=|v_main_#t~post4_128|, main_~y~0=v_main_~y~0_477, main_~x~0=v_main_~x~0_460, main_#t~post6=|v_main_#t~post6_251|} OutVars{main_#t~post4=|v_main_#t~post4_127|, main_~y~0=v_main_~y~0_476, main_~x~0=v_main_~x~0_459, main_#t~post6=|v_main_#t~post6_247|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:43,635 INFO L290 TraceCheckUtils]: 7: Hoare triple {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [118] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:43,645 INFO L290 TraceCheckUtils]: 6: Hoare triple {7748#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_487_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_487_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_487_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [117] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_458 4294967296))) (let ((.cse0 (= |v_main_#t~post5_123| |v_main_#t~post5_122|)) (.cse1 (= v_main_~y~0_475 v_main_~y~0_474)) (.cse2 (= |v_main_#t~post6_248| |v_main_#t~post6_246|)) (.cse3 (= v_main_~x~0_458 v_main_~x~0_457)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3 (or (not .cse4) (not .cse5))) (and .cse0 .cse1 .cse2 .cse3) (and (<= (div (+ 1000000 (* v_main_~x~0_457 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_458 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~x~0_458 v_main_~x~0_457) .cse5 (= (+ v_main_~x~0_457 v_main_~y~0_474) (+ v_main_~x~0_458 v_main_~y~0_475)))))) InVars {main_~y~0=v_main_~y~0_475, main_#t~post5=|v_main_#t~post5_123|, main_~x~0=v_main_~x~0_458, main_#t~post6=|v_main_#t~post6_248|} OutVars{main_#t~post5=|v_main_#t~post5_122|, main_~y~0=v_main_~y~0_474, main_~x~0=v_main_~x~0_457, main_#t~post6=|v_main_#t~post6_246|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {7738#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:43,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {7671#true} ~x~0 := 0;~y~0 := 0; {7748#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_487_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_487_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_487_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:30:43,646 INFO L272 TraceCheckUtils]: 4: Hoare triple {7671#true} call #t~ret7 := main(); {7671#true} is VALID [2022-04-28 03:30:43,646 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7671#true} {7671#true} #41#return; {7671#true} is VALID [2022-04-28 03:30:43,646 INFO L290 TraceCheckUtils]: 2: Hoare triple {7671#true} assume true; {7671#true} is VALID [2022-04-28 03:30:43,646 INFO L290 TraceCheckUtils]: 1: Hoare triple {7671#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {7671#true} is VALID [2022-04-28 03:30:43,646 INFO L272 TraceCheckUtils]: 0: Hoare triple {7671#true} call ULTIMATE.init(); {7671#true} is VALID [2022-04-28 03:30:43,646 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:43,646 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2118544273] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:30:43,646 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:30:43,647 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:30:44,419 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:30:44,419 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [64797583] [2022-04-28 03:30:44,419 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [64797583] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:30:44,419 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:30:44,419 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2022-04-28 03:30:44,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1582725081] [2022-04-28 03:30:44,419 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:30:44,419 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 68 [2022-04-28 03:30:44,420 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:30:44,420 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:44,467 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:44,467 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-28 03:30:44,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:44,468 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-28 03:30:44,468 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=746, Unknown=0, NotChecked=0, Total=870 [2022-04-28 03:30:44,468 INFO L87 Difference]: Start difference. First operand 70 states and 72 transitions. Second operand has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:45,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:45,824 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2022-04-28 03:30:45,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-28 03:30:45,824 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 68 [2022-04-28 03:30:45,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:30:45,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:45,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 82 transitions. [2022-04-28 03:30:45,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:45,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 82 transitions. [2022-04-28 03:30:45,833 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 82 transitions. [2022-04-28 03:30:45,894 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:45,894 INFO L225 Difference]: With dead ends: 82 [2022-04-28 03:30:45,895 INFO L226 Difference]: Without dead ends: 74 [2022-04-28 03:30:45,895 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 29 SyntacticMatches, 39 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 544 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=257, Invalid=2095, Unknown=0, NotChecked=0, Total=2352 [2022-04-28 03:30:45,896 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 48 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 1217 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 1238 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 1217 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-28 03:30:45,896 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 109 Invalid, 1238 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 1217 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-28 03:30:45,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2022-04-28 03:30:45,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 73. [2022-04-28 03:30:45,983 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:30:45,983 INFO L82 GeneralOperation]: Start isEquivalent. First operand 74 states. Second operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:45,983 INFO L74 IsIncluded]: Start isIncluded. First operand 74 states. Second operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:45,983 INFO L87 Difference]: Start difference. First operand 74 states. Second operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:45,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:45,984 INFO L93 Difference]: Finished difference Result 74 states and 76 transitions. [2022-04-28 03:30:45,984 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 76 transitions. [2022-04-28 03:30:45,984 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:45,984 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:45,984 INFO L74 IsIncluded]: Start isIncluded. First operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 74 states. [2022-04-28 03:30:45,984 INFO L87 Difference]: Start difference. First operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 74 states. [2022-04-28 03:30:45,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:45,985 INFO L93 Difference]: Finished difference Result 74 states and 76 transitions. [2022-04-28 03:30:45,985 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 76 transitions. [2022-04-28 03:30:45,985 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:45,985 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:45,985 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:30:45,985 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:30:45,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 68 states have internal predecessors, (71), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:45,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 75 transitions. [2022-04-28 03:30:45,986 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 75 transitions. Word has length 68 [2022-04-28 03:30:45,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:30:45,986 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 75 transitions. [2022-04-28 03:30:45,987 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.909090909090909) internal successors, (64), 21 states have internal predecessors, (64), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:45,987 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 73 states and 75 transitions. [2022-04-28 03:30:46,074 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:46,074 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 75 transitions. [2022-04-28 03:30:46,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-04-28 03:30:46,074 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:30:46,075 INFO L195 NwaCegarLoop]: trace histogram [20, 20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:30:46,109 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2022-04-28 03:30:46,275 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:46,275 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:30:46,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:30:46,275 INFO L85 PathProgramCache]: Analyzing trace with hash -101648827, now seen corresponding path program 19 times [2022-04-28 03:30:46,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:46,275 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1564627594] [2022-04-28 03:30:50,483 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:50,819 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:30:50,820 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:30:50,823 INFO L85 PathProgramCache]: Analyzing trace with hash -1159455313, now seen corresponding path program 1 times [2022-04-28 03:30:50,823 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:30:50,823 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280539702] [2022-04-28 03:30:50,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:50,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:30:50,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:50,881 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:30:50,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:50,884 INFO L290 TraceCheckUtils]: 0: Hoare triple {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8283#true} is VALID [2022-04-28 03:30:50,884 INFO L290 TraceCheckUtils]: 1: Hoare triple {8283#true} assume true; {8283#true} is VALID [2022-04-28 03:30:50,884 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8283#true} {8283#true} #41#return; {8283#true} is VALID [2022-04-28 03:30:50,884 INFO L272 TraceCheckUtils]: 0: Hoare triple {8283#true} call ULTIMATE.init(); {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:30:50,884 INFO L290 TraceCheckUtils]: 1: Hoare triple {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8283#true} is VALID [2022-04-28 03:30:50,885 INFO L290 TraceCheckUtils]: 2: Hoare triple {8283#true} assume true; {8283#true} is VALID [2022-04-28 03:30:50,885 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8283#true} {8283#true} #41#return; {8283#true} is VALID [2022-04-28 03:30:50,885 INFO L272 TraceCheckUtils]: 4: Hoare triple {8283#true} call #t~ret7 := main(); {8283#true} is VALID [2022-04-28 03:30:50,885 INFO L290 TraceCheckUtils]: 5: Hoare triple {8283#true} ~x~0 := 0;~y~0 := 0; {8288#(= main_~x~0 0)} is VALID [2022-04-28 03:30:50,886 INFO L290 TraceCheckUtils]: 6: Hoare triple {8288#(= main_~x~0 0)} [121] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_493 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_511 v_main_~y~0_510)) (.cse3 (= |v_main_#t~post5_130| |v_main_#t~post5_129|)) (.cse4 (= |v_main_#t~post6_262| |v_main_#t~post6_260|)) (.cse5 (= v_main_~x~0_493 v_main_~x~0_492))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_511) v_main_~y~0_510 (* v_main_~x~0_493 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_493 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_493 v_main_~y~0_511) (+ v_main_~x~0_492 v_main_~y~0_510)) .cse0 .cse1 (< v_main_~y~0_510 v_main_~y~0_511)) (and .cse2 .cse3 .cse4 .cse5) (and (or (not .cse1) (not .cse0)) .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_511, main_#t~post5=|v_main_#t~post5_130|, main_~x~0=v_main_~x~0_493, main_#t~post6=|v_main_#t~post6_262|} OutVars{main_#t~post5=|v_main_#t~post5_129|, main_~y~0=v_main_~y~0_510, main_~x~0=v_main_~x~0_492, main_#t~post6=|v_main_#t~post6_260|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8288#(= main_~x~0 0)} is VALID [2022-04-28 03:30:50,886 INFO L290 TraceCheckUtils]: 7: Hoare triple {8288#(= main_~x~0 0)} [122] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8288#(= main_~x~0 0)} is VALID [2022-04-28 03:30:50,887 INFO L290 TraceCheckUtils]: 8: Hoare triple {8288#(= main_~x~0 0)} [123] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_495 v_main_~x~0_494)) (.cse1 (= v_main_~y~0_513 v_main_~y~0_512)) (.cse2 (= |v_main_#t~post6_265| |v_main_#t~post6_261|)) (.cse3 (= |v_main_#t~post4_135| |v_main_#t~post4_134|)) (.cse4 (mod v_main_~x~0_495 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_495 v_main_~y~0_512) (+ v_main_~x~0_494 v_main_~y~0_513)) (< .cse4 500000) (< v_main_~x~0_495 v_main_~x~0_494) (<= (div (+ 500000 (* v_main_~x~0_494 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_495 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_135|, main_~y~0=v_main_~y~0_513, main_~x~0=v_main_~x~0_495, main_#t~post6=|v_main_#t~post6_265|} OutVars{main_#t~post4=|v_main_#t~post4_134|, main_~y~0=v_main_~y~0_512, main_~x~0=v_main_~x~0_494, main_#t~post6=|v_main_#t~post6_261|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8289#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:30:50,887 INFO L290 TraceCheckUtils]: 9: Hoare triple {8289#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [120] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8284#false} is VALID [2022-04-28 03:30:50,887 INFO L272 TraceCheckUtils]: 10: Hoare triple {8284#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8284#false} is VALID [2022-04-28 03:30:50,888 INFO L290 TraceCheckUtils]: 11: Hoare triple {8284#false} ~cond := #in~cond; {8284#false} is VALID [2022-04-28 03:30:50,888 INFO L290 TraceCheckUtils]: 12: Hoare triple {8284#false} assume 0 == ~cond; {8284#false} is VALID [2022-04-28 03:30:50,888 INFO L290 TraceCheckUtils]: 13: Hoare triple {8284#false} assume !false; {8284#false} is VALID [2022-04-28 03:30:50,888 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:50,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:30:50,888 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280539702] [2022-04-28 03:30:50,888 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [280539702] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:30:50,888 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1019828900] [2022-04-28 03:30:50,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:30:50,888 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:50,888 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:30:50,889 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:30:50,900 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-28 03:30:50,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:50,925 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:30:50,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:30:50,932 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:30:51,098 INFO L272 TraceCheckUtils]: 0: Hoare triple {8283#true} call ULTIMATE.init(); {8283#true} is VALID [2022-04-28 03:30:51,099 INFO L290 TraceCheckUtils]: 1: Hoare triple {8283#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8283#true} is VALID [2022-04-28 03:30:51,099 INFO L290 TraceCheckUtils]: 2: Hoare triple {8283#true} assume true; {8283#true} is VALID [2022-04-28 03:30:51,099 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8283#true} {8283#true} #41#return; {8283#true} is VALID [2022-04-28 03:30:51,099 INFO L272 TraceCheckUtils]: 4: Hoare triple {8283#true} call #t~ret7 := main(); {8283#true} is VALID [2022-04-28 03:30:51,099 INFO L290 TraceCheckUtils]: 5: Hoare triple {8283#true} ~x~0 := 0;~y~0 := 0; {8309#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:51,100 INFO L290 TraceCheckUtils]: 6: Hoare triple {8309#(and (= main_~x~0 0) (= main_~y~0 0))} [121] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_493 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_511 v_main_~y~0_510)) (.cse3 (= |v_main_#t~post5_130| |v_main_#t~post5_129|)) (.cse4 (= |v_main_#t~post6_262| |v_main_#t~post6_260|)) (.cse5 (= v_main_~x~0_493 v_main_~x~0_492))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_511) v_main_~y~0_510 (* v_main_~x~0_493 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_493 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_493 v_main_~y~0_511) (+ v_main_~x~0_492 v_main_~y~0_510)) .cse0 .cse1 (< v_main_~y~0_510 v_main_~y~0_511)) (and .cse2 .cse3 .cse4 .cse5) (and (or (not .cse1) (not .cse0)) .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_511, main_#t~post5=|v_main_#t~post5_130|, main_~x~0=v_main_~x~0_493, main_#t~post6=|v_main_#t~post6_262|} OutVars{main_#t~post5=|v_main_#t~post5_129|, main_~y~0=v_main_~y~0_510, main_~x~0=v_main_~x~0_492, main_#t~post6=|v_main_#t~post6_260|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8309#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:51,100 INFO L290 TraceCheckUtils]: 7: Hoare triple {8309#(and (= main_~x~0 0) (= main_~y~0 0))} [122] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8309#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:30:51,101 INFO L290 TraceCheckUtils]: 8: Hoare triple {8309#(and (= main_~x~0 0) (= main_~y~0 0))} [123] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_495 v_main_~x~0_494)) (.cse1 (= v_main_~y~0_513 v_main_~y~0_512)) (.cse2 (= |v_main_#t~post6_265| |v_main_#t~post6_261|)) (.cse3 (= |v_main_#t~post4_135| |v_main_#t~post4_134|)) (.cse4 (mod v_main_~x~0_495 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_495 v_main_~y~0_512) (+ v_main_~x~0_494 v_main_~y~0_513)) (< .cse4 500000) (< v_main_~x~0_495 v_main_~x~0_494) (<= (div (+ 500000 (* v_main_~x~0_494 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_495 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_135|, main_~y~0=v_main_~y~0_513, main_~x~0=v_main_~x~0_495, main_#t~post6=|v_main_#t~post6_265|} OutVars{main_#t~post4=|v_main_#t~post4_134|, main_~y~0=v_main_~y~0_512, main_~x~0=v_main_~x~0_494, main_#t~post6=|v_main_#t~post6_261|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8319#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:30:51,102 INFO L290 TraceCheckUtils]: 9: Hoare triple {8319#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [120] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8284#false} is VALID [2022-04-28 03:30:51,102 INFO L272 TraceCheckUtils]: 10: Hoare triple {8284#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8284#false} is VALID [2022-04-28 03:30:51,102 INFO L290 TraceCheckUtils]: 11: Hoare triple {8284#false} ~cond := #in~cond; {8284#false} is VALID [2022-04-28 03:30:51,102 INFO L290 TraceCheckUtils]: 12: Hoare triple {8284#false} assume 0 == ~cond; {8284#false} is VALID [2022-04-28 03:30:51,102 INFO L290 TraceCheckUtils]: 13: Hoare triple {8284#false} assume !false; {8284#false} is VALID [2022-04-28 03:30:51,103 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:51,103 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:30:52,143 INFO L290 TraceCheckUtils]: 13: Hoare triple {8284#false} assume !false; {8284#false} is VALID [2022-04-28 03:30:52,143 INFO L290 TraceCheckUtils]: 12: Hoare triple {8338#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {8284#false} is VALID [2022-04-28 03:30:52,143 INFO L290 TraceCheckUtils]: 11: Hoare triple {8342#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {8338#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:30:52,144 INFO L272 TraceCheckUtils]: 10: Hoare triple {8346#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8342#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:30:52,144 INFO L290 TraceCheckUtils]: 9: Hoare triple {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [120] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8346#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:30:52,147 INFO L290 TraceCheckUtils]: 8: Hoare triple {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [123] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_495 v_main_~x~0_494)) (.cse1 (= v_main_~y~0_513 v_main_~y~0_512)) (.cse2 (= |v_main_#t~post6_265| |v_main_#t~post6_261|)) (.cse3 (= |v_main_#t~post4_135| |v_main_#t~post4_134|)) (.cse4 (mod v_main_~x~0_495 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_495 v_main_~y~0_512) (+ v_main_~x~0_494 v_main_~y~0_513)) (< .cse4 500000) (< v_main_~x~0_495 v_main_~x~0_494) (<= (div (+ 500000 (* v_main_~x~0_494 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_495 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)))) InVars {main_#t~post4=|v_main_#t~post4_135|, main_~y~0=v_main_~y~0_513, main_~x~0=v_main_~x~0_495, main_#t~post6=|v_main_#t~post6_265|} OutVars{main_#t~post4=|v_main_#t~post4_134|, main_~y~0=v_main_~y~0_512, main_~x~0=v_main_~x~0_494, main_#t~post6=|v_main_#t~post6_261|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:52,148 INFO L290 TraceCheckUtils]: 7: Hoare triple {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [122] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:52,164 INFO L290 TraceCheckUtils]: 6: Hoare triple {8360#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_523_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_523_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_523_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [121] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_493 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~y~0_511 v_main_~y~0_510)) (.cse3 (= |v_main_#t~post5_130| |v_main_#t~post5_129|)) (.cse4 (= |v_main_#t~post6_262| |v_main_#t~post6_260|)) (.cse5 (= v_main_~x~0_493 v_main_~x~0_492))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_511) v_main_~y~0_510 (* v_main_~x~0_493 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_493 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_493 v_main_~y~0_511) (+ v_main_~x~0_492 v_main_~y~0_510)) .cse0 .cse1 (< v_main_~y~0_510 v_main_~y~0_511)) (and .cse2 .cse3 .cse4 .cse5) (and (or (not .cse1) (not .cse0)) .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_511, main_#t~post5=|v_main_#t~post5_130|, main_~x~0=v_main_~x~0_493, main_#t~post6=|v_main_#t~post6_262|} OutVars{main_#t~post5=|v_main_#t~post5_129|, main_~y~0=v_main_~y~0_510, main_~x~0=v_main_~x~0_492, main_#t~post6=|v_main_#t~post6_260|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8350#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:30:52,165 INFO L290 TraceCheckUtils]: 5: Hoare triple {8283#true} ~x~0 := 0;~y~0 := 0; {8360#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_523_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_523_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_523_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:30:52,165 INFO L272 TraceCheckUtils]: 4: Hoare triple {8283#true} call #t~ret7 := main(); {8283#true} is VALID [2022-04-28 03:30:52,165 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8283#true} {8283#true} #41#return; {8283#true} is VALID [2022-04-28 03:30:52,165 INFO L290 TraceCheckUtils]: 2: Hoare triple {8283#true} assume true; {8283#true} is VALID [2022-04-28 03:30:52,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {8283#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8283#true} is VALID [2022-04-28 03:30:52,165 INFO L272 TraceCheckUtils]: 0: Hoare triple {8283#true} call ULTIMATE.init(); {8283#true} is VALID [2022-04-28 03:30:52,166 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:30:52,166 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1019828900] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:30:52,166 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:30:52,166 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:30:53,068 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:30:53,069 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1564627594] [2022-04-28 03:30:53,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1564627594] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:30:53,069 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:30:53,069 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2022-04-28 03:30:53,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058240000] [2022-04-28 03:30:53,069 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:30:53,069 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 71 [2022-04-28 03:30:53,070 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:30:53,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:53,117 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:53,117 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-28 03:30:53,117 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:53,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-28 03:30:53,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=801, Unknown=0, NotChecked=0, Total=930 [2022-04-28 03:30:53,118 INFO L87 Difference]: Start difference. First operand 73 states and 75 transitions. Second operand has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:55,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:55,059 INFO L93 Difference]: Finished difference Result 85 states and 89 transitions. [2022-04-28 03:30:55,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-28 03:30:55,059 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 71 [2022-04-28 03:30:55,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:30:55,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:55,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 85 transitions. [2022-04-28 03:30:55,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:55,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 85 transitions. [2022-04-28 03:30:55,060 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 85 transitions. [2022-04-28 03:30:55,134 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:55,134 INFO L225 Difference]: With dead ends: 85 [2022-04-28 03:30:55,134 INFO L226 Difference]: Without dead ends: 77 [2022-04-28 03:30:55,135 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 28 SyntacticMatches, 42 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 582 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=269, Invalid=2281, Unknown=0, NotChecked=0, Total=2550 [2022-04-28 03:30:55,135 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 50 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 1341 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 114 SdHoareTripleChecker+Invalid, 1363 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 1341 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-28 03:30:55,136 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 114 Invalid, 1363 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 1341 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-28 03:30:55,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-28 03:30:55,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 76. [2022-04-28 03:30:55,195 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:30:55,196 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:55,196 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:55,196 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:55,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:55,197 INFO L93 Difference]: Finished difference Result 77 states and 79 transitions. [2022-04-28 03:30:55,197 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 79 transitions. [2022-04-28 03:30:55,197 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:55,197 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:55,197 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-28 03:30:55,197 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-28 03:30:55,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:30:55,198 INFO L93 Difference]: Finished difference Result 77 states and 79 transitions. [2022-04-28 03:30:55,198 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 79 transitions. [2022-04-28 03:30:55,198 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:30:55,198 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:30:55,198 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:30:55,198 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:30:55,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.0422535211267605) internal successors, (74), 71 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:55,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 78 transitions. [2022-04-28 03:30:55,199 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 78 transitions. Word has length 71 [2022-04-28 03:30:55,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:30:55,199 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 78 transitions. [2022-04-28 03:30:55,199 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 2.9130434782608696) internal successors, (67), 22 states have internal predecessors, (67), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:30:55,199 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 78 transitions. [2022-04-28 03:30:55,270 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:30:55,270 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 78 transitions. [2022-04-28 03:30:55,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-28 03:30:55,271 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:30:55,271 INFO L195 NwaCegarLoop]: trace histogram [21, 21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:30:55,296 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-28 03:30:55,471 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:30:55,471 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:30:55,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:30:55,472 INFO L85 PathProgramCache]: Analyzing trace with hash 189599245, now seen corresponding path program 20 times [2022-04-28 03:30:55,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:30:55,472 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1173042021] [2022-04-28 03:30:56,413 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:00,579 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:31:00,736 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:00,738 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:31:00,740 INFO L85 PathProgramCache]: Analyzing trace with hash 890076847, now seen corresponding path program 1 times [2022-04-28 03:31:00,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:31:00,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355772767] [2022-04-28 03:31:00,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:00,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:31:00,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:00,788 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:31:00,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:00,791 INFO L290 TraceCheckUtils]: 0: Hoare triple {8923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8916#true} is VALID [2022-04-28 03:31:00,791 INFO L290 TraceCheckUtils]: 1: Hoare triple {8916#true} assume true; {8916#true} is VALID [2022-04-28 03:31:00,791 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8916#true} {8916#true} #41#return; {8916#true} is VALID [2022-04-28 03:31:00,792 INFO L272 TraceCheckUtils]: 0: Hoare triple {8916#true} call ULTIMATE.init(); {8923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:31:00,792 INFO L290 TraceCheckUtils]: 1: Hoare triple {8923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8916#true} is VALID [2022-04-28 03:31:00,792 INFO L290 TraceCheckUtils]: 2: Hoare triple {8916#true} assume true; {8916#true} is VALID [2022-04-28 03:31:00,792 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8916#true} {8916#true} #41#return; {8916#true} is VALID [2022-04-28 03:31:00,792 INFO L272 TraceCheckUtils]: 4: Hoare triple {8916#true} call #t~ret7 := main(); {8916#true} is VALID [2022-04-28 03:31:00,792 INFO L290 TraceCheckUtils]: 5: Hoare triple {8916#true} ~x~0 := 0;~y~0 := 0; {8921#(= main_~x~0 0)} is VALID [2022-04-28 03:31:00,793 INFO L290 TraceCheckUtils]: 6: Hoare triple {8921#(= main_~x~0 0)} [125] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_529 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_529 v_main_~x~0_528)) (.cse3 (= |v_main_#t~post5_137| |v_main_#t~post5_136|)) (.cse4 (= v_main_~y~0_548 v_main_~y~0_547)) (.cse5 (= |v_main_#t~post6_276| |v_main_#t~post6_274|))) (or (and (= (+ v_main_~x~0_529 v_main_~y~0_548) (+ v_main_~x~0_528 v_main_~y~0_547)) (< v_main_~y~0_547 v_main_~y~0_548) (<= (div (+ v_main_~y~0_547 (* (- 1) v_main_~y~0_548) 1000000 (* v_main_~x~0_529 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_529 (- 4294967295)) 4294967296) 1)) .cse0 .cse1) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_548, main_#t~post5=|v_main_#t~post5_137|, main_~x~0=v_main_~x~0_529, main_#t~post6=|v_main_#t~post6_276|} OutVars{main_#t~post5=|v_main_#t~post5_136|, main_~y~0=v_main_~y~0_547, main_~x~0=v_main_~x~0_528, main_#t~post6=|v_main_#t~post6_274|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8921#(= main_~x~0 0)} is VALID [2022-04-28 03:31:00,793 INFO L290 TraceCheckUtils]: 7: Hoare triple {8921#(= main_~x~0 0)} [126] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#(= main_~x~0 0)} is VALID [2022-04-28 03:31:00,794 INFO L290 TraceCheckUtils]: 8: Hoare triple {8921#(= main_~x~0 0)} [127] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_142| |v_main_#t~post4_141|)) (.cse2 (= v_main_~x~0_531 v_main_~x~0_530)) (.cse3 (= |v_main_#t~post6_279| |v_main_#t~post6_275|)) (.cse1 (mod v_main_~x~0_531 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= v_main_~y~0_549 v_main_~y~0_550) .cse3) (and .cse0 .cse2 (= v_main_~y~0_550 v_main_~y~0_549) .cse3) (and (= (+ v_main_~x~0_531 v_main_~y~0_549) (+ v_main_~x~0_530 v_main_~y~0_550)) (< .cse1 500000) (<= (div (+ v_main_~y~0_550 (* (- 1) v_main_~y~0_549) (* v_main_~x~0_531 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_531 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_550 v_main_~y~0_549)))) InVars {main_#t~post4=|v_main_#t~post4_142|, main_~y~0=v_main_~y~0_550, main_~x~0=v_main_~x~0_531, main_#t~post6=|v_main_#t~post6_279|} OutVars{main_#t~post4=|v_main_#t~post4_141|, main_~y~0=v_main_~y~0_549, main_~x~0=v_main_~x~0_530, main_#t~post6=|v_main_#t~post6_275|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8922#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:31:00,795 INFO L290 TraceCheckUtils]: 9: Hoare triple {8922#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [124] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8917#false} is VALID [2022-04-28 03:31:00,795 INFO L272 TraceCheckUtils]: 10: Hoare triple {8917#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8917#false} is VALID [2022-04-28 03:31:00,795 INFO L290 TraceCheckUtils]: 11: Hoare triple {8917#false} ~cond := #in~cond; {8917#false} is VALID [2022-04-28 03:31:00,795 INFO L290 TraceCheckUtils]: 12: Hoare triple {8917#false} assume 0 == ~cond; {8917#false} is VALID [2022-04-28 03:31:00,795 INFO L290 TraceCheckUtils]: 13: Hoare triple {8917#false} assume !false; {8917#false} is VALID [2022-04-28 03:31:00,795 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:00,795 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:31:00,796 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355772767] [2022-04-28 03:31:00,796 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [355772767] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:31:00,796 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1042903156] [2022-04-28 03:31:00,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:00,796 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:31:00,796 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:31:00,799 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:31:00,814 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-28 03:31:00,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:00,839 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:31:00,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:00,847 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:31:01,058 INFO L272 TraceCheckUtils]: 0: Hoare triple {8916#true} call ULTIMATE.init(); {8916#true} is VALID [2022-04-28 03:31:01,059 INFO L290 TraceCheckUtils]: 1: Hoare triple {8916#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8916#true} is VALID [2022-04-28 03:31:01,059 INFO L290 TraceCheckUtils]: 2: Hoare triple {8916#true} assume true; {8916#true} is VALID [2022-04-28 03:31:01,059 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8916#true} {8916#true} #41#return; {8916#true} is VALID [2022-04-28 03:31:01,059 INFO L272 TraceCheckUtils]: 4: Hoare triple {8916#true} call #t~ret7 := main(); {8916#true} is VALID [2022-04-28 03:31:01,059 INFO L290 TraceCheckUtils]: 5: Hoare triple {8916#true} ~x~0 := 0;~y~0 := 0; {8942#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:01,060 INFO L290 TraceCheckUtils]: 6: Hoare triple {8942#(and (= main_~x~0 0) (= main_~y~0 0))} [125] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_529 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_529 v_main_~x~0_528)) (.cse3 (= |v_main_#t~post5_137| |v_main_#t~post5_136|)) (.cse4 (= v_main_~y~0_548 v_main_~y~0_547)) (.cse5 (= |v_main_#t~post6_276| |v_main_#t~post6_274|))) (or (and (= (+ v_main_~x~0_529 v_main_~y~0_548) (+ v_main_~x~0_528 v_main_~y~0_547)) (< v_main_~y~0_547 v_main_~y~0_548) (<= (div (+ v_main_~y~0_547 (* (- 1) v_main_~y~0_548) 1000000 (* v_main_~x~0_529 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_529 (- 4294967295)) 4294967296) 1)) .cse0 .cse1) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_548, main_#t~post5=|v_main_#t~post5_137|, main_~x~0=v_main_~x~0_529, main_#t~post6=|v_main_#t~post6_276|} OutVars{main_#t~post5=|v_main_#t~post5_136|, main_~y~0=v_main_~y~0_547, main_~x~0=v_main_~x~0_528, main_#t~post6=|v_main_#t~post6_274|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8942#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:01,060 INFO L290 TraceCheckUtils]: 7: Hoare triple {8942#(and (= main_~x~0 0) (= main_~y~0 0))} [126] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8942#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:01,061 INFO L290 TraceCheckUtils]: 8: Hoare triple {8942#(and (= main_~x~0 0) (= main_~y~0 0))} [127] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_142| |v_main_#t~post4_141|)) (.cse2 (= v_main_~x~0_531 v_main_~x~0_530)) (.cse3 (= |v_main_#t~post6_279| |v_main_#t~post6_275|)) (.cse1 (mod v_main_~x~0_531 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= v_main_~y~0_549 v_main_~y~0_550) .cse3) (and .cse0 .cse2 (= v_main_~y~0_550 v_main_~y~0_549) .cse3) (and (= (+ v_main_~x~0_531 v_main_~y~0_549) (+ v_main_~x~0_530 v_main_~y~0_550)) (< .cse1 500000) (<= (div (+ v_main_~y~0_550 (* (- 1) v_main_~y~0_549) (* v_main_~x~0_531 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_531 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_550 v_main_~y~0_549)))) InVars {main_#t~post4=|v_main_#t~post4_142|, main_~y~0=v_main_~y~0_550, main_~x~0=v_main_~x~0_531, main_#t~post6=|v_main_#t~post6_279|} OutVars{main_#t~post4=|v_main_#t~post4_141|, main_~y~0=v_main_~y~0_549, main_~x~0=v_main_~x~0_530, main_#t~post6=|v_main_#t~post6_275|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8952#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:31:01,062 INFO L290 TraceCheckUtils]: 9: Hoare triple {8952#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [124] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8917#false} is VALID [2022-04-28 03:31:01,062 INFO L272 TraceCheckUtils]: 10: Hoare triple {8917#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8917#false} is VALID [2022-04-28 03:31:01,062 INFO L290 TraceCheckUtils]: 11: Hoare triple {8917#false} ~cond := #in~cond; {8917#false} is VALID [2022-04-28 03:31:01,062 INFO L290 TraceCheckUtils]: 12: Hoare triple {8917#false} assume 0 == ~cond; {8917#false} is VALID [2022-04-28 03:31:01,062 INFO L290 TraceCheckUtils]: 13: Hoare triple {8917#false} assume !false; {8917#false} is VALID [2022-04-28 03:31:01,062 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:01,062 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:31:04,152 INFO L290 TraceCheckUtils]: 13: Hoare triple {8917#false} assume !false; {8917#false} is VALID [2022-04-28 03:31:04,152 INFO L290 TraceCheckUtils]: 12: Hoare triple {8971#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {8917#false} is VALID [2022-04-28 03:31:04,153 INFO L290 TraceCheckUtils]: 11: Hoare triple {8975#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {8971#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:31:04,153 INFO L272 TraceCheckUtils]: 10: Hoare triple {8979#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {8975#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:31:04,153 INFO L290 TraceCheckUtils]: 9: Hoare triple {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [124] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {8979#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:31:04,155 INFO L290 TraceCheckUtils]: 8: Hoare triple {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [127] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_142| |v_main_#t~post4_141|)) (.cse2 (= v_main_~x~0_531 v_main_~x~0_530)) (.cse3 (= |v_main_#t~post6_279| |v_main_#t~post6_275|)) (.cse1 (mod v_main_~x~0_531 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= v_main_~y~0_549 v_main_~y~0_550) .cse3) (and .cse0 .cse2 (= v_main_~y~0_550 v_main_~y~0_549) .cse3) (and (= (+ v_main_~x~0_531 v_main_~y~0_549) (+ v_main_~x~0_530 v_main_~y~0_550)) (< .cse1 500000) (<= (div (+ v_main_~y~0_550 (* (- 1) v_main_~y~0_549) (* v_main_~x~0_531 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_531 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_550 v_main_~y~0_549)))) InVars {main_#t~post4=|v_main_#t~post4_142|, main_~y~0=v_main_~y~0_550, main_~x~0=v_main_~x~0_531, main_#t~post6=|v_main_#t~post6_279|} OutVars{main_#t~post4=|v_main_#t~post4_141|, main_~y~0=v_main_~y~0_549, main_~x~0=v_main_~x~0_530, main_#t~post6=|v_main_#t~post6_275|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:04,156 INFO L290 TraceCheckUtils]: 7: Hoare triple {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [126] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:04,170 INFO L290 TraceCheckUtils]: 6: Hoare triple {8993#(and (or (forall ((aux_div_v_main_~y~0_560_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_560_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_560_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [125] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_529 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse0 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_529 v_main_~x~0_528)) (.cse3 (= |v_main_#t~post5_137| |v_main_#t~post5_136|)) (.cse4 (= v_main_~y~0_548 v_main_~y~0_547)) (.cse5 (= |v_main_#t~post6_276| |v_main_#t~post6_274|))) (or (and (= (+ v_main_~x~0_529 v_main_~y~0_548) (+ v_main_~x~0_528 v_main_~y~0_547)) (< v_main_~y~0_547 v_main_~y~0_548) (<= (div (+ v_main_~y~0_547 (* (- 1) v_main_~y~0_548) 1000000 (* v_main_~x~0_529 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_529 (- 4294967295)) 4294967296) 1)) .cse0 .cse1) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_548, main_#t~post5=|v_main_#t~post5_137|, main_~x~0=v_main_~x~0_529, main_#t~post6=|v_main_#t~post6_276|} OutVars{main_#t~post5=|v_main_#t~post5_136|, main_~y~0=v_main_~y~0_547, main_~x~0=v_main_~x~0_528, main_#t~post6=|v_main_#t~post6_274|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {8983#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:04,171 INFO L290 TraceCheckUtils]: 5: Hoare triple {8916#true} ~x~0 := 0;~y~0 := 0; {8993#(and (or (forall ((aux_div_v_main_~y~0_560_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_560_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_560_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:31:04,171 INFO L272 TraceCheckUtils]: 4: Hoare triple {8916#true} call #t~ret7 := main(); {8916#true} is VALID [2022-04-28 03:31:04,171 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8916#true} {8916#true} #41#return; {8916#true} is VALID [2022-04-28 03:31:04,171 INFO L290 TraceCheckUtils]: 2: Hoare triple {8916#true} assume true; {8916#true} is VALID [2022-04-28 03:31:04,172 INFO L290 TraceCheckUtils]: 1: Hoare triple {8916#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {8916#true} is VALID [2022-04-28 03:31:04,172 INFO L272 TraceCheckUtils]: 0: Hoare triple {8916#true} call ULTIMATE.init(); {8916#true} is VALID [2022-04-28 03:31:04,172 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:04,172 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1042903156] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:31:04,172 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:31:04,172 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:31:05,215 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:31:05,216 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1173042021] [2022-04-28 03:31:05,216 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1173042021] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:31:05,216 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:31:05,216 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2022-04-28 03:31:05,216 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1963322346] [2022-04-28 03:31:05,216 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:31:05,216 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 74 [2022-04-28 03:31:05,217 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:31:05,217 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:05,298 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:05,299 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-28 03:31:05,299 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:05,299 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-28 03:31:05,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=858, Unknown=0, NotChecked=0, Total=992 [2022-04-28 03:31:05,299 INFO L87 Difference]: Start difference. First operand 76 states and 78 transitions. Second operand has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:07,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:07,275 INFO L93 Difference]: Finished difference Result 88 states and 92 transitions. [2022-04-28 03:31:07,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-28 03:31:07,275 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 74 [2022-04-28 03:31:07,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:31:07,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:07,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 88 transitions. [2022-04-28 03:31:07,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:07,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 88 transitions. [2022-04-28 03:31:07,280 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 88 transitions. [2022-04-28 03:31:07,341 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 88 edges. 88 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:07,342 INFO L225 Difference]: With dead ends: 88 [2022-04-28 03:31:07,342 INFO L226 Difference]: Without dead ends: 80 [2022-04-28 03:31:07,343 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 28 SyntacticMatches, 44 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=281, Invalid=2475, Unknown=0, NotChecked=0, Total=2756 [2022-04-28 03:31:07,343 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 52 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 1471 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 1494 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 1471 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-28 03:31:07,344 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [52 Valid, 119 Invalid, 1494 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 1471 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-28 03:31:07,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-04-28 03:31:07,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 79. [2022-04-28 03:31:07,406 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:31:07,406 INFO L82 GeneralOperation]: Start isEquivalent. First operand 80 states. Second operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:07,407 INFO L74 IsIncluded]: Start isIncluded. First operand 80 states. Second operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:07,407 INFO L87 Difference]: Start difference. First operand 80 states. Second operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:07,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:07,407 INFO L93 Difference]: Finished difference Result 80 states and 82 transitions. [2022-04-28 03:31:07,408 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2022-04-28 03:31:07,408 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:07,408 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:07,408 INFO L74 IsIncluded]: Start isIncluded. First operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 80 states. [2022-04-28 03:31:07,408 INFO L87 Difference]: Start difference. First operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 80 states. [2022-04-28 03:31:07,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:07,409 INFO L93 Difference]: Finished difference Result 80 states and 82 transitions. [2022-04-28 03:31:07,409 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2022-04-28 03:31:07,409 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:07,409 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:07,409 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:31:07,409 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:31:07,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 74 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:07,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 81 transitions. [2022-04-28 03:31:07,410 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 81 transitions. Word has length 74 [2022-04-28 03:31:07,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:31:07,410 INFO L495 AbstractCegarLoop]: Abstraction has 79 states and 81 transitions. [2022-04-28 03:31:07,410 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 2.9166666666666665) internal successors, (70), 23 states have internal predecessors, (70), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:07,410 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 79 states and 81 transitions. [2022-04-28 03:31:07,487 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:07,488 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 81 transitions. [2022-04-28 03:31:07,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-04-28 03:31:07,488 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:31:07,488 INFO L195 NwaCegarLoop]: trace histogram [22, 22, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:31:07,512 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2022-04-28 03:31:07,713 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-28 03:31:07,713 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:31:07,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:31:07,713 INFO L85 PathProgramCache]: Analyzing trace with hash 926974277, now seen corresponding path program 21 times [2022-04-28 03:31:07,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:07,714 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [742880965] [2022-04-28 03:31:10,381 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:14,768 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:31:14,917 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:14,918 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:31:14,920 INFO L85 PathProgramCache]: Analyzing trace with hash -1355358289, now seen corresponding path program 1 times [2022-04-28 03:31:14,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:31:14,921 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019679977] [2022-04-28 03:31:14,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:14,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:31:14,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:15,001 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:31:15,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:15,004 INFO L290 TraceCheckUtils]: 0: Hoare triple {9577#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {9570#true} is VALID [2022-04-28 03:31:15,004 INFO L290 TraceCheckUtils]: 1: Hoare triple {9570#true} assume true; {9570#true} is VALID [2022-04-28 03:31:15,004 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9570#true} {9570#true} #41#return; {9570#true} is VALID [2022-04-28 03:31:15,005 INFO L272 TraceCheckUtils]: 0: Hoare triple {9570#true} call ULTIMATE.init(); {9577#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:31:15,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {9577#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {9570#true} is VALID [2022-04-28 03:31:15,005 INFO L290 TraceCheckUtils]: 2: Hoare triple {9570#true} assume true; {9570#true} is VALID [2022-04-28 03:31:15,005 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9570#true} {9570#true} #41#return; {9570#true} is VALID [2022-04-28 03:31:15,005 INFO L272 TraceCheckUtils]: 4: Hoare triple {9570#true} call #t~ret7 := main(); {9570#true} is VALID [2022-04-28 03:31:15,005 INFO L290 TraceCheckUtils]: 5: Hoare triple {9570#true} ~x~0 := 0;~y~0 := 0; {9575#(= main_~x~0 0)} is VALID [2022-04-28 03:31:15,006 INFO L290 TraceCheckUtils]: 6: Hoare triple {9575#(= main_~x~0 0)} [129] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_566 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_586 v_main_~y~0_585)) (.cse1 (= v_main_~x~0_566 v_main_~x~0_565)) (.cse2 (= |v_main_#t~post6_290| |v_main_#t~post6_288|)) (.cse5 (= |v_main_#t~post5_144| |v_main_#t~post5_143|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (<= (div (+ (* v_main_~x~0_565 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_566 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_566 v_main_~x~0_565) .cse4 (= (+ v_main_~x~0_565 v_main_~y~0_585) (+ v_main_~x~0_566 v_main_~y~0_586))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_586, main_#t~post5=|v_main_#t~post5_144|, main_~x~0=v_main_~x~0_566, main_#t~post6=|v_main_#t~post6_290|} OutVars{main_#t~post5=|v_main_#t~post5_143|, main_~y~0=v_main_~y~0_585, main_~x~0=v_main_~x~0_565, main_#t~post6=|v_main_#t~post6_288|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {9575#(= main_~x~0 0)} is VALID [2022-04-28 03:31:15,006 INFO L290 TraceCheckUtils]: 7: Hoare triple {9575#(= main_~x~0 0)} [130] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#(= main_~x~0 0)} is VALID [2022-04-28 03:31:15,007 INFO L290 TraceCheckUtils]: 8: Hoare triple {9575#(= main_~x~0 0)} [131] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_568 4294967296)) (.cse1 (= |v_main_#t~post6_293| |v_main_#t~post6_289|)) (.cse2 (= |v_main_#t~post4_149| |v_main_#t~post4_148|)) (.cse3 (= v_main_~x~0_568 v_main_~x~0_567))) (or (and (= (+ v_main_~x~0_567 v_main_~y~0_588) (+ v_main_~x~0_568 v_main_~y~0_587)) (< .cse0 500000) (<= (div (+ 500000 (* v_main_~x~0_567 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_568 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_568 v_main_~x~0_567)) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 (= v_main_~y~0_587 v_main_~y~0_588)) (and .cse1 .cse2 .cse3 (= v_main_~y~0_588 v_main_~y~0_587)))) InVars {main_#t~post4=|v_main_#t~post4_149|, main_~y~0=v_main_~y~0_588, main_~x~0=v_main_~x~0_568, main_#t~post6=|v_main_#t~post6_293|} OutVars{main_#t~post4=|v_main_#t~post4_148|, main_~y~0=v_main_~y~0_587, main_~x~0=v_main_~x~0_567, main_#t~post6=|v_main_#t~post6_289|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {9576#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:31:15,007 INFO L290 TraceCheckUtils]: 9: Hoare triple {9576#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [128] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {9571#false} is VALID [2022-04-28 03:31:15,008 INFO L272 TraceCheckUtils]: 10: Hoare triple {9571#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {9571#false} is VALID [2022-04-28 03:31:15,008 INFO L290 TraceCheckUtils]: 11: Hoare triple {9571#false} ~cond := #in~cond; {9571#false} is VALID [2022-04-28 03:31:15,008 INFO L290 TraceCheckUtils]: 12: Hoare triple {9571#false} assume 0 == ~cond; {9571#false} is VALID [2022-04-28 03:31:15,008 INFO L290 TraceCheckUtils]: 13: Hoare triple {9571#false} assume !false; {9571#false} is VALID [2022-04-28 03:31:15,008 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:15,008 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:31:15,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019679977] [2022-04-28 03:31:15,008 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1019679977] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:31:15,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1002971911] [2022-04-28 03:31:15,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:15,008 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:31:15,009 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:31:15,009 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:31:15,011 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-28 03:31:15,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:15,036 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:31:15,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:15,043 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:31:15,217 INFO L272 TraceCheckUtils]: 0: Hoare triple {9570#true} call ULTIMATE.init(); {9570#true} is VALID [2022-04-28 03:31:15,217 INFO L290 TraceCheckUtils]: 1: Hoare triple {9570#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {9570#true} is VALID [2022-04-28 03:31:15,218 INFO L290 TraceCheckUtils]: 2: Hoare triple {9570#true} assume true; {9570#true} is VALID [2022-04-28 03:31:15,218 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9570#true} {9570#true} #41#return; {9570#true} is VALID [2022-04-28 03:31:15,218 INFO L272 TraceCheckUtils]: 4: Hoare triple {9570#true} call #t~ret7 := main(); {9570#true} is VALID [2022-04-28 03:31:15,218 INFO L290 TraceCheckUtils]: 5: Hoare triple {9570#true} ~x~0 := 0;~y~0 := 0; {9596#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:15,219 INFO L290 TraceCheckUtils]: 6: Hoare triple {9596#(and (= main_~x~0 0) (= main_~y~0 0))} [129] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_566 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_586 v_main_~y~0_585)) (.cse1 (= v_main_~x~0_566 v_main_~x~0_565)) (.cse2 (= |v_main_#t~post6_290| |v_main_#t~post6_288|)) (.cse5 (= |v_main_#t~post5_144| |v_main_#t~post5_143|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (<= (div (+ (* v_main_~x~0_565 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_566 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_566 v_main_~x~0_565) .cse4 (= (+ v_main_~x~0_565 v_main_~y~0_585) (+ v_main_~x~0_566 v_main_~y~0_586))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_586, main_#t~post5=|v_main_#t~post5_144|, main_~x~0=v_main_~x~0_566, main_#t~post6=|v_main_#t~post6_290|} OutVars{main_#t~post5=|v_main_#t~post5_143|, main_~y~0=v_main_~y~0_585, main_~x~0=v_main_~x~0_565, main_#t~post6=|v_main_#t~post6_288|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {9596#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:15,219 INFO L290 TraceCheckUtils]: 7: Hoare triple {9596#(and (= main_~x~0 0) (= main_~y~0 0))} [130] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9596#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:15,220 INFO L290 TraceCheckUtils]: 8: Hoare triple {9596#(and (= main_~x~0 0) (= main_~y~0 0))} [131] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_568 4294967296)) (.cse1 (= |v_main_#t~post6_293| |v_main_#t~post6_289|)) (.cse2 (= |v_main_#t~post4_149| |v_main_#t~post4_148|)) (.cse3 (= v_main_~x~0_568 v_main_~x~0_567))) (or (and (= (+ v_main_~x~0_567 v_main_~y~0_588) (+ v_main_~x~0_568 v_main_~y~0_587)) (< .cse0 500000) (<= (div (+ 500000 (* v_main_~x~0_567 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_568 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_568 v_main_~x~0_567)) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 (= v_main_~y~0_587 v_main_~y~0_588)) (and .cse1 .cse2 .cse3 (= v_main_~y~0_588 v_main_~y~0_587)))) InVars {main_#t~post4=|v_main_#t~post4_149|, main_~y~0=v_main_~y~0_588, main_~x~0=v_main_~x~0_568, main_#t~post6=|v_main_#t~post6_293|} OutVars{main_#t~post4=|v_main_#t~post4_148|, main_~y~0=v_main_~y~0_587, main_~x~0=v_main_~x~0_567, main_#t~post6=|v_main_#t~post6_289|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {9606#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:31:15,221 INFO L290 TraceCheckUtils]: 9: Hoare triple {9606#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [128] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {9571#false} is VALID [2022-04-28 03:31:15,221 INFO L272 TraceCheckUtils]: 10: Hoare triple {9571#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {9571#false} is VALID [2022-04-28 03:31:15,221 INFO L290 TraceCheckUtils]: 11: Hoare triple {9571#false} ~cond := #in~cond; {9571#false} is VALID [2022-04-28 03:31:15,221 INFO L290 TraceCheckUtils]: 12: Hoare triple {9571#false} assume 0 == ~cond; {9571#false} is VALID [2022-04-28 03:31:15,221 INFO L290 TraceCheckUtils]: 13: Hoare triple {9571#false} assume !false; {9571#false} is VALID [2022-04-28 03:31:15,221 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:15,221 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:31:16,029 INFO L290 TraceCheckUtils]: 13: Hoare triple {9571#false} assume !false; {9571#false} is VALID [2022-04-28 03:31:16,029 INFO L290 TraceCheckUtils]: 12: Hoare triple {9625#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {9571#false} is VALID [2022-04-28 03:31:16,030 INFO L290 TraceCheckUtils]: 11: Hoare triple {9629#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {9625#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:31:16,030 INFO L272 TraceCheckUtils]: 10: Hoare triple {9633#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {9629#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:31:16,031 INFO L290 TraceCheckUtils]: 9: Hoare triple {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [128] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {9633#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:31:16,033 INFO L290 TraceCheckUtils]: 8: Hoare triple {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [131] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_568 4294967296)) (.cse1 (= |v_main_#t~post6_293| |v_main_#t~post6_289|)) (.cse2 (= |v_main_#t~post4_149| |v_main_#t~post4_148|)) (.cse3 (= v_main_~x~0_568 v_main_~x~0_567))) (or (and (= (+ v_main_~x~0_567 v_main_~y~0_588) (+ v_main_~x~0_568 v_main_~y~0_587)) (< .cse0 500000) (<= (div (+ 500000 (* v_main_~x~0_567 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_568 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_568 v_main_~x~0_567)) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 (= v_main_~y~0_587 v_main_~y~0_588)) (and .cse1 .cse2 .cse3 (= v_main_~y~0_588 v_main_~y~0_587)))) InVars {main_#t~post4=|v_main_#t~post4_149|, main_~y~0=v_main_~y~0_588, main_~x~0=v_main_~x~0_568, main_#t~post6=|v_main_#t~post6_293|} OutVars{main_#t~post4=|v_main_#t~post4_148|, main_~y~0=v_main_~y~0_587, main_~x~0=v_main_~x~0_567, main_#t~post6=|v_main_#t~post6_289|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:16,033 INFO L290 TraceCheckUtils]: 7: Hoare triple {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [130] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:16,064 INFO L290 TraceCheckUtils]: 6: Hoare triple {9647#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_598_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_598_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_598_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [129] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_566 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_586 v_main_~y~0_585)) (.cse1 (= v_main_~x~0_566 v_main_~x~0_565)) (.cse2 (= |v_main_#t~post6_290| |v_main_#t~post6_288|)) (.cse5 (= |v_main_#t~post5_144| |v_main_#t~post5_143|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (<= (div (+ (* v_main_~x~0_565 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_566 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_566 v_main_~x~0_565) .cse4 (= (+ v_main_~x~0_565 v_main_~y~0_585) (+ v_main_~x~0_566 v_main_~y~0_586))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_586, main_#t~post5=|v_main_#t~post5_144|, main_~x~0=v_main_~x~0_566, main_#t~post6=|v_main_#t~post6_290|} OutVars{main_#t~post5=|v_main_#t~post5_143|, main_~y~0=v_main_~y~0_585, main_~x~0=v_main_~x~0_565, main_#t~post6=|v_main_#t~post6_288|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {9637#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:16,065 INFO L290 TraceCheckUtils]: 5: Hoare triple {9570#true} ~x~0 := 0;~y~0 := 0; {9647#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_598_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_598_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_598_32) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:31:16,065 INFO L272 TraceCheckUtils]: 4: Hoare triple {9570#true} call #t~ret7 := main(); {9570#true} is VALID [2022-04-28 03:31:16,065 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9570#true} {9570#true} #41#return; {9570#true} is VALID [2022-04-28 03:31:16,065 INFO L290 TraceCheckUtils]: 2: Hoare triple {9570#true} assume true; {9570#true} is VALID [2022-04-28 03:31:16,065 INFO L290 TraceCheckUtils]: 1: Hoare triple {9570#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {9570#true} is VALID [2022-04-28 03:31:16,065 INFO L272 TraceCheckUtils]: 0: Hoare triple {9570#true} call ULTIMATE.init(); {9570#true} is VALID [2022-04-28 03:31:16,065 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:16,065 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1002971911] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:31:16,065 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:31:16,065 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:31:17,087 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:31:17,087 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [742880965] [2022-04-28 03:31:17,087 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [742880965] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:31:17,087 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:31:17,087 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2022-04-28 03:31:17,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446748377] [2022-04-28 03:31:17,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:31:17,088 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 77 [2022-04-28 03:31:17,088 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:31:17,088 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:17,139 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:17,139 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-28 03:31:17,139 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:17,139 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-28 03:31:17,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056 [2022-04-28 03:31:17,140 INFO L87 Difference]: Start difference. First operand 79 states and 81 transitions. Second operand has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:19,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:19,221 INFO L93 Difference]: Finished difference Result 91 states and 95 transitions. [2022-04-28 03:31:19,221 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-28 03:31:19,221 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 77 [2022-04-28 03:31:19,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:31:19,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:19,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 91 transitions. [2022-04-28 03:31:19,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:19,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 91 transitions. [2022-04-28 03:31:19,223 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 91 transitions. [2022-04-28 03:31:19,297 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 91 edges. 91 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:19,298 INFO L225 Difference]: With dead ends: 91 [2022-04-28 03:31:19,298 INFO L226 Difference]: Without dead ends: 83 [2022-04-28 03:31:19,298 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 29 SyntacticMatches, 45 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 661 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=293, Invalid=2677, Unknown=0, NotChecked=0, Total=2970 [2022-04-28 03:31:19,299 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 54 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 1607 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 54 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 1631 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 1607 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:31:19,299 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [54 Valid, 124 Invalid, 1631 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 1607 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-28 03:31:19,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-04-28 03:31:19,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 82. [2022-04-28 03:31:19,398 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:31:19,399 INFO L82 GeneralOperation]: Start isEquivalent. First operand 83 states. Second operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:19,399 INFO L74 IsIncluded]: Start isIncluded. First operand 83 states. Second operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:19,399 INFO L87 Difference]: Start difference. First operand 83 states. Second operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:19,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:19,400 INFO L93 Difference]: Finished difference Result 83 states and 85 transitions. [2022-04-28 03:31:19,400 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 85 transitions. [2022-04-28 03:31:19,400 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:19,400 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:19,400 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 83 states. [2022-04-28 03:31:19,400 INFO L87 Difference]: Start difference. First operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 83 states. [2022-04-28 03:31:19,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:19,401 INFO L93 Difference]: Finished difference Result 83 states and 85 transitions. [2022-04-28 03:31:19,401 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 85 transitions. [2022-04-28 03:31:19,401 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:19,401 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:19,401 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:31:19,401 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:31:19,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 77 states have (on average 1.0389610389610389) internal successors, (80), 77 states have internal predecessors, (80), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:19,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 84 transitions. [2022-04-28 03:31:19,402 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 84 transitions. Word has length 77 [2022-04-28 03:31:19,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:31:19,403 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 84 transitions. [2022-04-28 03:31:19,403 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.92) internal successors, (73), 24 states have internal predecessors, (73), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:19,403 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 82 states and 84 transitions. [2022-04-28 03:31:19,500 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:19,501 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 84 transitions. [2022-04-28 03:31:19,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-04-28 03:31:19,501 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:31:19,501 INFO L195 NwaCegarLoop]: trace histogram [23, 23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:31:19,517 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-28 03:31:19,701 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-28 03:31:19,702 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:31:19,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:31:19,702 INFO L85 PathProgramCache]: Analyzing trace with hash -691166451, now seen corresponding path program 22 times [2022-04-28 03:31:19,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:19,702 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [936373889] [2022-04-28 03:31:20,265 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:22,951 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:22,953 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:31:22,955 INFO L85 PathProgramCache]: Analyzing trace with hash 694173871, now seen corresponding path program 1 times [2022-04-28 03:31:22,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:31:22,955 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128965298] [2022-04-28 03:31:22,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:22,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:31:22,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:23,001 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:31:23,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:23,004 INFO L290 TraceCheckUtils]: 0: Hoare triple {10252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10245#true} is VALID [2022-04-28 03:31:23,004 INFO L290 TraceCheckUtils]: 1: Hoare triple {10245#true} assume true; {10245#true} is VALID [2022-04-28 03:31:23,004 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10245#true} {10245#true} #41#return; {10245#true} is VALID [2022-04-28 03:31:23,005 INFO L272 TraceCheckUtils]: 0: Hoare triple {10245#true} call ULTIMATE.init(); {10252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:31:23,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {10252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10245#true} is VALID [2022-04-28 03:31:23,005 INFO L290 TraceCheckUtils]: 2: Hoare triple {10245#true} assume true; {10245#true} is VALID [2022-04-28 03:31:23,005 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10245#true} {10245#true} #41#return; {10245#true} is VALID [2022-04-28 03:31:23,005 INFO L272 TraceCheckUtils]: 4: Hoare triple {10245#true} call #t~ret7 := main(); {10245#true} is VALID [2022-04-28 03:31:23,005 INFO L290 TraceCheckUtils]: 5: Hoare triple {10245#true} ~x~0 := 0;~y~0 := 0; {10250#(= main_~x~0 0)} is VALID [2022-04-28 03:31:23,006 INFO L290 TraceCheckUtils]: 6: Hoare triple {10250#(= main_~x~0 0)} [133] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_604 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_604 v_main_~x~0_603)) (.cse1 (= v_main_~y~0_625 v_main_~y~0_624)) (.cse2 (= |v_main_#t~post6_304| |v_main_#t~post6_302|)) (.cse5 (= |v_main_#t~post5_151| |v_main_#t~post5_150|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_624 v_main_~y~0_625) (= (+ v_main_~x~0_604 v_main_~y~0_625) (+ v_main_~x~0_603 v_main_~y~0_624)) .cse4 .cse3 (<= (div (+ v_main_~y~0_624 (* (- 1) v_main_~y~0_625) 1000000 (* v_main_~x~0_604 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_604 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_625, main_#t~post5=|v_main_#t~post5_151|, main_~x~0=v_main_~x~0_604, main_#t~post6=|v_main_#t~post6_304|} OutVars{main_#t~post5=|v_main_#t~post5_150|, main_~y~0=v_main_~y~0_624, main_~x~0=v_main_~x~0_603, main_#t~post6=|v_main_#t~post6_302|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10250#(= main_~x~0 0)} is VALID [2022-04-28 03:31:23,007 INFO L290 TraceCheckUtils]: 7: Hoare triple {10250#(= main_~x~0 0)} [134] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10250#(= main_~x~0 0)} is VALID [2022-04-28 03:31:23,008 INFO L290 TraceCheckUtils]: 8: Hoare triple {10250#(= main_~x~0 0)} [135] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_307| |v_main_#t~post6_303|)) (.cse0 (mod v_main_~x~0_606 4294967296)) (.cse2 (= |v_main_#t~post4_156| |v_main_#t~post4_155|)) (.cse3 (= v_main_~y~0_627 v_main_~y~0_626)) (.cse4 (= v_main_~x~0_606 v_main_~x~0_605))) (or (and (<= (div (+ (* v_main_~x~0_605 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_606 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_606 v_main_~x~0_605) (= (+ v_main_~x~0_606 v_main_~y~0_626) (+ v_main_~x~0_605 v_main_~y~0_627)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 (<= 500000 .cse0) .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_156|, main_~y~0=v_main_~y~0_627, main_~x~0=v_main_~x~0_606, main_#t~post6=|v_main_#t~post6_307|} OutVars{main_#t~post4=|v_main_#t~post4_155|, main_~y~0=v_main_~y~0_626, main_~x~0=v_main_~x~0_605, main_#t~post6=|v_main_#t~post6_303|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:31:23,009 INFO L290 TraceCheckUtils]: 9: Hoare triple {10251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [132] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10246#false} is VALID [2022-04-28 03:31:23,009 INFO L272 TraceCheckUtils]: 10: Hoare triple {10246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10246#false} is VALID [2022-04-28 03:31:23,009 INFO L290 TraceCheckUtils]: 11: Hoare triple {10246#false} ~cond := #in~cond; {10246#false} is VALID [2022-04-28 03:31:23,009 INFO L290 TraceCheckUtils]: 12: Hoare triple {10246#false} assume 0 == ~cond; {10246#false} is VALID [2022-04-28 03:31:23,009 INFO L290 TraceCheckUtils]: 13: Hoare triple {10246#false} assume !false; {10246#false} is VALID [2022-04-28 03:31:23,009 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:23,009 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:31:23,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128965298] [2022-04-28 03:31:23,009 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1128965298] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:31:23,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [348418519] [2022-04-28 03:31:23,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:23,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:31:23,010 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:31:23,010 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:31:23,031 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-28 03:31:23,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:23,041 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:31:23,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:23,048 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:31:23,218 INFO L272 TraceCheckUtils]: 0: Hoare triple {10245#true} call ULTIMATE.init(); {10245#true} is VALID [2022-04-28 03:31:23,218 INFO L290 TraceCheckUtils]: 1: Hoare triple {10245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10245#true} is VALID [2022-04-28 03:31:23,218 INFO L290 TraceCheckUtils]: 2: Hoare triple {10245#true} assume true; {10245#true} is VALID [2022-04-28 03:31:23,218 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10245#true} {10245#true} #41#return; {10245#true} is VALID [2022-04-28 03:31:23,218 INFO L272 TraceCheckUtils]: 4: Hoare triple {10245#true} call #t~ret7 := main(); {10245#true} is VALID [2022-04-28 03:31:23,219 INFO L290 TraceCheckUtils]: 5: Hoare triple {10245#true} ~x~0 := 0;~y~0 := 0; {10271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:23,219 INFO L290 TraceCheckUtils]: 6: Hoare triple {10271#(and (= main_~x~0 0) (= main_~y~0 0))} [133] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_604 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_604 v_main_~x~0_603)) (.cse1 (= v_main_~y~0_625 v_main_~y~0_624)) (.cse2 (= |v_main_#t~post6_304| |v_main_#t~post6_302|)) (.cse5 (= |v_main_#t~post5_151| |v_main_#t~post5_150|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_624 v_main_~y~0_625) (= (+ v_main_~x~0_604 v_main_~y~0_625) (+ v_main_~x~0_603 v_main_~y~0_624)) .cse4 .cse3 (<= (div (+ v_main_~y~0_624 (* (- 1) v_main_~y~0_625) 1000000 (* v_main_~x~0_604 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_604 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_625, main_#t~post5=|v_main_#t~post5_151|, main_~x~0=v_main_~x~0_604, main_#t~post6=|v_main_#t~post6_304|} OutVars{main_#t~post5=|v_main_#t~post5_150|, main_~y~0=v_main_~y~0_624, main_~x~0=v_main_~x~0_603, main_#t~post6=|v_main_#t~post6_302|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:23,220 INFO L290 TraceCheckUtils]: 7: Hoare triple {10271#(and (= main_~x~0 0) (= main_~y~0 0))} [134] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10271#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:23,220 INFO L290 TraceCheckUtils]: 8: Hoare triple {10271#(and (= main_~x~0 0) (= main_~y~0 0))} [135] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_307| |v_main_#t~post6_303|)) (.cse0 (mod v_main_~x~0_606 4294967296)) (.cse2 (= |v_main_#t~post4_156| |v_main_#t~post4_155|)) (.cse3 (= v_main_~y~0_627 v_main_~y~0_626)) (.cse4 (= v_main_~x~0_606 v_main_~x~0_605))) (or (and (<= (div (+ (* v_main_~x~0_605 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_606 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_606 v_main_~x~0_605) (= (+ v_main_~x~0_606 v_main_~y~0_626) (+ v_main_~x~0_605 v_main_~y~0_627)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 (<= 500000 .cse0) .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_156|, main_~y~0=v_main_~y~0_627, main_~x~0=v_main_~x~0_606, main_#t~post6=|v_main_#t~post6_307|} OutVars{main_#t~post4=|v_main_#t~post4_155|, main_~y~0=v_main_~y~0_626, main_~x~0=v_main_~x~0_605, main_#t~post6=|v_main_#t~post6_303|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10281#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:31:23,221 INFO L290 TraceCheckUtils]: 9: Hoare triple {10281#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [132] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10246#false} is VALID [2022-04-28 03:31:23,221 INFO L272 TraceCheckUtils]: 10: Hoare triple {10246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10246#false} is VALID [2022-04-28 03:31:23,221 INFO L290 TraceCheckUtils]: 11: Hoare triple {10246#false} ~cond := #in~cond; {10246#false} is VALID [2022-04-28 03:31:23,221 INFO L290 TraceCheckUtils]: 12: Hoare triple {10246#false} assume 0 == ~cond; {10246#false} is VALID [2022-04-28 03:31:23,221 INFO L290 TraceCheckUtils]: 13: Hoare triple {10246#false} assume !false; {10246#false} is VALID [2022-04-28 03:31:23,222 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:23,222 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:31:24,652 INFO L290 TraceCheckUtils]: 13: Hoare triple {10246#false} assume !false; {10246#false} is VALID [2022-04-28 03:31:24,653 INFO L290 TraceCheckUtils]: 12: Hoare triple {10300#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {10246#false} is VALID [2022-04-28 03:31:24,653 INFO L290 TraceCheckUtils]: 11: Hoare triple {10304#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {10300#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:31:24,653 INFO L272 TraceCheckUtils]: 10: Hoare triple {10308#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10304#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:31:24,654 INFO L290 TraceCheckUtils]: 9: Hoare triple {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [132] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10308#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:31:24,656 INFO L290 TraceCheckUtils]: 8: Hoare triple {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [135] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post6_307| |v_main_#t~post6_303|)) (.cse0 (mod v_main_~x~0_606 4294967296)) (.cse2 (= |v_main_#t~post4_156| |v_main_#t~post4_155|)) (.cse3 (= v_main_~y~0_627 v_main_~y~0_626)) (.cse4 (= v_main_~x~0_606 v_main_~x~0_605))) (or (and (<= (div (+ (* v_main_~x~0_605 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_606 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_606 v_main_~x~0_605) (= (+ v_main_~x~0_606 v_main_~y~0_626) (+ v_main_~x~0_605 v_main_~y~0_627)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 (<= 500000 .cse0) .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_156|, main_~y~0=v_main_~y~0_627, main_~x~0=v_main_~x~0_606, main_#t~post6=|v_main_#t~post6_307|} OutVars{main_#t~post4=|v_main_#t~post4_155|, main_~y~0=v_main_~y~0_626, main_~x~0=v_main_~x~0_605, main_#t~post6=|v_main_#t~post6_303|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:24,656 INFO L290 TraceCheckUtils]: 7: Hoare triple {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [134] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:24,673 INFO L290 TraceCheckUtils]: 6: Hoare triple {10322#(and (or (forall ((aux_div_v_main_~y~0_637_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_637_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_637_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [133] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_604 4294967296))) (let ((.cse4 (<= 500000 .cse6)) (.cse3 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_604 v_main_~x~0_603)) (.cse1 (= v_main_~y~0_625 v_main_~y~0_624)) (.cse2 (= |v_main_#t~post6_304| |v_main_#t~post6_302|)) (.cse5 (= |v_main_#t~post5_151| |v_main_#t~post5_150|))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (< v_main_~y~0_624 v_main_~y~0_625) (= (+ v_main_~x~0_604 v_main_~y~0_625) (+ v_main_~x~0_603 v_main_~y~0_624)) .cse4 .cse3 (<= (div (+ v_main_~y~0_624 (* (- 1) v_main_~y~0_625) 1000000 (* v_main_~x~0_604 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_604 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_625, main_#t~post5=|v_main_#t~post5_151|, main_~x~0=v_main_~x~0_604, main_#t~post6=|v_main_#t~post6_304|} OutVars{main_#t~post5=|v_main_#t~post5_150|, main_~y~0=v_main_~y~0_624, main_~x~0=v_main_~x~0_603, main_#t~post6=|v_main_#t~post6_302|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10312#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:24,674 INFO L290 TraceCheckUtils]: 5: Hoare triple {10245#true} ~x~0 := 0;~y~0 := 0; {10322#(and (or (forall ((aux_div_v_main_~y~0_637_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_637_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_637_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:31:24,674 INFO L272 TraceCheckUtils]: 4: Hoare triple {10245#true} call #t~ret7 := main(); {10245#true} is VALID [2022-04-28 03:31:24,674 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10245#true} {10245#true} #41#return; {10245#true} is VALID [2022-04-28 03:31:24,674 INFO L290 TraceCheckUtils]: 2: Hoare triple {10245#true} assume true; {10245#true} is VALID [2022-04-28 03:31:24,674 INFO L290 TraceCheckUtils]: 1: Hoare triple {10245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10245#true} is VALID [2022-04-28 03:31:24,674 INFO L272 TraceCheckUtils]: 0: Hoare triple {10245#true} call ULTIMATE.init(); {10245#true} is VALID [2022-04-28 03:31:24,674 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:24,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [348418519] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:31:24,674 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:31:24,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:31:25,784 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:31:25,784 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [936373889] [2022-04-28 03:31:25,784 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [936373889] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:31:25,784 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:31:25,784 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2022-04-28 03:31:25,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [888052975] [2022-04-28 03:31:25,784 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:31:25,785 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 80 [2022-04-28 03:31:25,785 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:31:25,785 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:25,838 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 80 edges. 80 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:25,838 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-28 03:31:25,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:25,838 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-28 03:31:25,838 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=144, Invalid=978, Unknown=0, NotChecked=0, Total=1122 [2022-04-28 03:31:25,839 INFO L87 Difference]: Start difference. First operand 82 states and 84 transitions. Second operand has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:28,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:28,225 INFO L93 Difference]: Finished difference Result 94 states and 98 transitions. [2022-04-28 03:31:28,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-28 03:31:28,226 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 80 [2022-04-28 03:31:28,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:31:28,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:28,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 94 transitions. [2022-04-28 03:31:28,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:28,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 94 transitions. [2022-04-28 03:31:28,241 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 94 transitions. [2022-04-28 03:31:28,287 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:28,288 INFO L225 Difference]: With dead ends: 94 [2022-04-28 03:31:28,288 INFO L226 Difference]: Without dead ends: 86 [2022-04-28 03:31:28,289 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 29 SyntacticMatches, 47 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 702 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=305, Invalid=2887, Unknown=0, NotChecked=0, Total=3192 [2022-04-28 03:31:28,290 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 56 mSDsluCounter, 117 mSDsCounter, 0 mSdLazyCounter, 1749 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 1774 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 1749 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:31:28,290 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 129 Invalid, 1774 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 1749 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-04-28 03:31:28,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-04-28 03:31:28,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 85. [2022-04-28 03:31:28,357 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:31:28,358 INFO L82 GeneralOperation]: Start isEquivalent. First operand 86 states. Second operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:28,358 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:28,358 INFO L87 Difference]: Start difference. First operand 86 states. Second operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:28,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:28,362 INFO L93 Difference]: Finished difference Result 86 states and 88 transitions. [2022-04-28 03:31:28,362 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 88 transitions. [2022-04-28 03:31:28,363 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:28,363 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:28,363 INFO L74 IsIncluded]: Start isIncluded. First operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 86 states. [2022-04-28 03:31:28,363 INFO L87 Difference]: Start difference. First operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 86 states. [2022-04-28 03:31:28,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:28,380 INFO L93 Difference]: Finished difference Result 86 states and 88 transitions. [2022-04-28 03:31:28,380 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 88 transitions. [2022-04-28 03:31:28,380 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:28,380 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:28,380 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:31:28,380 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:31:28,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 80 states have (on average 1.0375) internal successors, (83), 80 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:28,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 87 transitions. [2022-04-28 03:31:28,381 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 87 transitions. Word has length 80 [2022-04-28 03:31:28,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:31:28,381 INFO L495 AbstractCegarLoop]: Abstraction has 85 states and 87 transitions. [2022-04-28 03:31:28,382 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 2.923076923076923) internal successors, (76), 25 states have internal predecessors, (76), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:28,382 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 85 states and 87 transitions. [2022-04-28 03:31:28,468 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:28,468 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 87 transitions. [2022-04-28 03:31:28,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-04-28 03:31:28,468 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:31:28,468 INFO L195 NwaCegarLoop]: trace histogram [24, 24, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:31:28,485 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-28 03:31:28,669 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:31:28,669 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:31:28,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:31:28,669 INFO L85 PathProgramCache]: Analyzing trace with hash -8663995, now seen corresponding path program 23 times [2022-04-28 03:31:28,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:28,669 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [196431985] [2022-04-28 03:31:31,622 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:31:31,873 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:32,736 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:32,737 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:31:32,739 INFO L85 PathProgramCache]: Analyzing trace with hash -1551261265, now seen corresponding path program 1 times [2022-04-28 03:31:32,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:31:32,739 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735923739] [2022-04-28 03:31:32,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:32,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:31:32,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:32,789 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:31:32,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:32,801 INFO L290 TraceCheckUtils]: 0: Hoare triple {10948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10941#true} is VALID [2022-04-28 03:31:32,801 INFO L290 TraceCheckUtils]: 1: Hoare triple {10941#true} assume true; {10941#true} is VALID [2022-04-28 03:31:32,801 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10941#true} {10941#true} #41#return; {10941#true} is VALID [2022-04-28 03:31:32,801 INFO L272 TraceCheckUtils]: 0: Hoare triple {10941#true} call ULTIMATE.init(); {10948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:31:32,801 INFO L290 TraceCheckUtils]: 1: Hoare triple {10948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10941#true} is VALID [2022-04-28 03:31:32,802 INFO L290 TraceCheckUtils]: 2: Hoare triple {10941#true} assume true; {10941#true} is VALID [2022-04-28 03:31:32,802 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10941#true} {10941#true} #41#return; {10941#true} is VALID [2022-04-28 03:31:32,802 INFO L272 TraceCheckUtils]: 4: Hoare triple {10941#true} call #t~ret7 := main(); {10941#true} is VALID [2022-04-28 03:31:32,802 INFO L290 TraceCheckUtils]: 5: Hoare triple {10941#true} ~x~0 := 0;~y~0 := 0; {10946#(= main_~x~0 0)} is VALID [2022-04-28 03:31:32,803 INFO L290 TraceCheckUtils]: 6: Hoare triple {10946#(= main_~x~0 0)} [137] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_643 4294967296))) (let ((.cse0 (= v_main_~x~0_643 v_main_~x~0_642)) (.cse3 (< .cse4 1000000)) (.cse2 (<= 500000 .cse4)) (.cse1 (= |v_main_#t~post5_158| |v_main_#t~post5_157|))) (or (and (= v_main_~y~0_665 v_main_~y~0_664) .cse0 (= |v_main_#t~post6_318| |v_main_#t~post6_316|) .cse1) (and (<= (div (+ v_main_~y~0_664 1000000 (* v_main_~x~0_643 (- 1)) (* (- 1) v_main_~y~0_665)) (- 4294967296)) (+ (div (+ v_main_~x~0_643 (- 4294967295)) 4294967296) 1)) .cse2 (< v_main_~y~0_664 v_main_~y~0_665) (= (+ v_main_~x~0_642 v_main_~y~0_664) (+ v_main_~x~0_643 v_main_~y~0_665)) .cse3) (and (= |v_main_#t~post6_316| |v_main_#t~post6_318|) (= v_main_~y~0_664 v_main_~y~0_665) .cse0 (or (not .cse3) (not .cse2)) .cse1)))) InVars {main_~y~0=v_main_~y~0_665, main_#t~post5=|v_main_#t~post5_158|, main_~x~0=v_main_~x~0_643, main_#t~post6=|v_main_#t~post6_318|} OutVars{main_#t~post5=|v_main_#t~post5_157|, main_~y~0=v_main_~y~0_664, main_~x~0=v_main_~x~0_642, main_#t~post6=|v_main_#t~post6_316|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10946#(= main_~x~0 0)} is VALID [2022-04-28 03:31:32,803 INFO L290 TraceCheckUtils]: 7: Hoare triple {10946#(= main_~x~0 0)} [138] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10946#(= main_~x~0 0)} is VALID [2022-04-28 03:31:32,804 INFO L290 TraceCheckUtils]: 8: Hoare triple {10946#(= main_~x~0 0)} [139] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_667 v_main_~y~0_666)) (.cse2 (= |v_main_#t~post4_163| |v_main_#t~post4_162|)) (.cse3 (= v_main_~x~0_645 v_main_~x~0_644)) (.cse1 (mod v_main_~x~0_645 4294967296))) (or (and .cse0 (= |v_main_#t~post6_317| |v_main_#t~post6_321|) (<= 500000 .cse1) .cse2 .cse3) (and .cse0 (= |v_main_#t~post6_321| |v_main_#t~post6_317|) .cse2 .cse3) (and (< v_main_~x~0_645 v_main_~x~0_644) (< .cse1 500000) (<= (div (+ (* v_main_~x~0_644 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_645 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_645 v_main_~y~0_666) (+ v_main_~x~0_644 v_main_~y~0_667))))) InVars {main_#t~post4=|v_main_#t~post4_163|, main_~y~0=v_main_~y~0_667, main_~x~0=v_main_~x~0_645, main_#t~post6=|v_main_#t~post6_321|} OutVars{main_#t~post4=|v_main_#t~post4_162|, main_~y~0=v_main_~y~0_666, main_~x~0=v_main_~x~0_644, main_#t~post6=|v_main_#t~post6_317|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10947#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:31:32,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {10947#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [136] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10942#false} is VALID [2022-04-28 03:31:32,805 INFO L272 TraceCheckUtils]: 10: Hoare triple {10942#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10942#false} is VALID [2022-04-28 03:31:32,805 INFO L290 TraceCheckUtils]: 11: Hoare triple {10942#false} ~cond := #in~cond; {10942#false} is VALID [2022-04-28 03:31:32,805 INFO L290 TraceCheckUtils]: 12: Hoare triple {10942#false} assume 0 == ~cond; {10942#false} is VALID [2022-04-28 03:31:32,805 INFO L290 TraceCheckUtils]: 13: Hoare triple {10942#false} assume !false; {10942#false} is VALID [2022-04-28 03:31:32,805 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:32,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:31:32,805 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1735923739] [2022-04-28 03:31:32,805 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1735923739] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:31:32,805 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [480410873] [2022-04-28 03:31:32,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:32,805 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:31:32,806 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:31:32,806 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:31:32,809 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-28 03:31:32,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:32,836 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:31:32,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:32,844 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:31:33,015 INFO L272 TraceCheckUtils]: 0: Hoare triple {10941#true} call ULTIMATE.init(); {10941#true} is VALID [2022-04-28 03:31:33,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {10941#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10941#true} is VALID [2022-04-28 03:31:33,016 INFO L290 TraceCheckUtils]: 2: Hoare triple {10941#true} assume true; {10941#true} is VALID [2022-04-28 03:31:33,016 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10941#true} {10941#true} #41#return; {10941#true} is VALID [2022-04-28 03:31:33,016 INFO L272 TraceCheckUtils]: 4: Hoare triple {10941#true} call #t~ret7 := main(); {10941#true} is VALID [2022-04-28 03:31:33,016 INFO L290 TraceCheckUtils]: 5: Hoare triple {10941#true} ~x~0 := 0;~y~0 := 0; {10967#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:33,017 INFO L290 TraceCheckUtils]: 6: Hoare triple {10967#(and (= main_~x~0 0) (= main_~y~0 0))} [137] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_643 4294967296))) (let ((.cse0 (= v_main_~x~0_643 v_main_~x~0_642)) (.cse3 (< .cse4 1000000)) (.cse2 (<= 500000 .cse4)) (.cse1 (= |v_main_#t~post5_158| |v_main_#t~post5_157|))) (or (and (= v_main_~y~0_665 v_main_~y~0_664) .cse0 (= |v_main_#t~post6_318| |v_main_#t~post6_316|) .cse1) (and (<= (div (+ v_main_~y~0_664 1000000 (* v_main_~x~0_643 (- 1)) (* (- 1) v_main_~y~0_665)) (- 4294967296)) (+ (div (+ v_main_~x~0_643 (- 4294967295)) 4294967296) 1)) .cse2 (< v_main_~y~0_664 v_main_~y~0_665) (= (+ v_main_~x~0_642 v_main_~y~0_664) (+ v_main_~x~0_643 v_main_~y~0_665)) .cse3) (and (= |v_main_#t~post6_316| |v_main_#t~post6_318|) (= v_main_~y~0_664 v_main_~y~0_665) .cse0 (or (not .cse3) (not .cse2)) .cse1)))) InVars {main_~y~0=v_main_~y~0_665, main_#t~post5=|v_main_#t~post5_158|, main_~x~0=v_main_~x~0_643, main_#t~post6=|v_main_#t~post6_318|} OutVars{main_#t~post5=|v_main_#t~post5_157|, main_~y~0=v_main_~y~0_664, main_~x~0=v_main_~x~0_642, main_#t~post6=|v_main_#t~post6_316|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {10967#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:33,017 INFO L290 TraceCheckUtils]: 7: Hoare triple {10967#(and (= main_~x~0 0) (= main_~y~0 0))} [138] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10967#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:33,018 INFO L290 TraceCheckUtils]: 8: Hoare triple {10967#(and (= main_~x~0 0) (= main_~y~0 0))} [139] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_667 v_main_~y~0_666)) (.cse2 (= |v_main_#t~post4_163| |v_main_#t~post4_162|)) (.cse3 (= v_main_~x~0_645 v_main_~x~0_644)) (.cse1 (mod v_main_~x~0_645 4294967296))) (or (and .cse0 (= |v_main_#t~post6_317| |v_main_#t~post6_321|) (<= 500000 .cse1) .cse2 .cse3) (and .cse0 (= |v_main_#t~post6_321| |v_main_#t~post6_317|) .cse2 .cse3) (and (< v_main_~x~0_645 v_main_~x~0_644) (< .cse1 500000) (<= (div (+ (* v_main_~x~0_644 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_645 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_645 v_main_~y~0_666) (+ v_main_~x~0_644 v_main_~y~0_667))))) InVars {main_#t~post4=|v_main_#t~post4_163|, main_~y~0=v_main_~y~0_667, main_~x~0=v_main_~x~0_645, main_#t~post6=|v_main_#t~post6_321|} OutVars{main_#t~post4=|v_main_#t~post4_162|, main_~y~0=v_main_~y~0_666, main_~x~0=v_main_~x~0_644, main_#t~post6=|v_main_#t~post6_317|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {10977#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:31:33,019 INFO L290 TraceCheckUtils]: 9: Hoare triple {10977#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [136] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {10942#false} is VALID [2022-04-28 03:31:33,019 INFO L272 TraceCheckUtils]: 10: Hoare triple {10942#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {10942#false} is VALID [2022-04-28 03:31:33,019 INFO L290 TraceCheckUtils]: 11: Hoare triple {10942#false} ~cond := #in~cond; {10942#false} is VALID [2022-04-28 03:31:33,019 INFO L290 TraceCheckUtils]: 12: Hoare triple {10942#false} assume 0 == ~cond; {10942#false} is VALID [2022-04-28 03:31:33,019 INFO L290 TraceCheckUtils]: 13: Hoare triple {10942#false} assume !false; {10942#false} is VALID [2022-04-28 03:31:33,019 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:33,020 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:31:35,884 INFO L290 TraceCheckUtils]: 13: Hoare triple {10942#false} assume !false; {10942#false} is VALID [2022-04-28 03:31:35,884 INFO L290 TraceCheckUtils]: 12: Hoare triple {10996#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {10942#false} is VALID [2022-04-28 03:31:35,885 INFO L290 TraceCheckUtils]: 11: Hoare triple {11000#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {10996#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:31:35,885 INFO L272 TraceCheckUtils]: 10: Hoare triple {11004#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {11000#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:31:35,886 INFO L290 TraceCheckUtils]: 9: Hoare triple {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [136] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {11004#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:31:35,888 INFO L290 TraceCheckUtils]: 8: Hoare triple {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [139] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_667 v_main_~y~0_666)) (.cse2 (= |v_main_#t~post4_163| |v_main_#t~post4_162|)) (.cse3 (= v_main_~x~0_645 v_main_~x~0_644)) (.cse1 (mod v_main_~x~0_645 4294967296))) (or (and .cse0 (= |v_main_#t~post6_317| |v_main_#t~post6_321|) (<= 500000 .cse1) .cse2 .cse3) (and .cse0 (= |v_main_#t~post6_321| |v_main_#t~post6_317|) .cse2 .cse3) (and (< v_main_~x~0_645 v_main_~x~0_644) (< .cse1 500000) (<= (div (+ (* v_main_~x~0_644 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_645 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_645 v_main_~y~0_666) (+ v_main_~x~0_644 v_main_~y~0_667))))) InVars {main_#t~post4=|v_main_#t~post4_163|, main_~y~0=v_main_~y~0_667, main_~x~0=v_main_~x~0_645, main_#t~post6=|v_main_#t~post6_321|} OutVars{main_#t~post4=|v_main_#t~post4_162|, main_~y~0=v_main_~y~0_666, main_~x~0=v_main_~x~0_644, main_#t~post6=|v_main_#t~post6_317|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:35,888 INFO L290 TraceCheckUtils]: 7: Hoare triple {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [138] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:35,906 INFO L290 TraceCheckUtils]: 6: Hoare triple {11018#(and (or (forall ((aux_div_v_main_~y~0_677_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_677_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_677_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [137] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_643 4294967296))) (let ((.cse0 (= v_main_~x~0_643 v_main_~x~0_642)) (.cse3 (< .cse4 1000000)) (.cse2 (<= 500000 .cse4)) (.cse1 (= |v_main_#t~post5_158| |v_main_#t~post5_157|))) (or (and (= v_main_~y~0_665 v_main_~y~0_664) .cse0 (= |v_main_#t~post6_318| |v_main_#t~post6_316|) .cse1) (and (<= (div (+ v_main_~y~0_664 1000000 (* v_main_~x~0_643 (- 1)) (* (- 1) v_main_~y~0_665)) (- 4294967296)) (+ (div (+ v_main_~x~0_643 (- 4294967295)) 4294967296) 1)) .cse2 (< v_main_~y~0_664 v_main_~y~0_665) (= (+ v_main_~x~0_642 v_main_~y~0_664) (+ v_main_~x~0_643 v_main_~y~0_665)) .cse3) (and (= |v_main_#t~post6_316| |v_main_#t~post6_318|) (= v_main_~y~0_664 v_main_~y~0_665) .cse0 (or (not .cse3) (not .cse2)) .cse1)))) InVars {main_~y~0=v_main_~y~0_665, main_#t~post5=|v_main_#t~post5_158|, main_~x~0=v_main_~x~0_643, main_#t~post6=|v_main_#t~post6_318|} OutVars{main_#t~post5=|v_main_#t~post5_157|, main_~y~0=v_main_~y~0_664, main_~x~0=v_main_~x~0_642, main_#t~post6=|v_main_#t~post6_316|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {11008#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:35,907 INFO L290 TraceCheckUtils]: 5: Hoare triple {10941#true} ~x~0 := 0;~y~0 := 0; {11018#(and (or (forall ((aux_div_v_main_~y~0_677_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_677_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_677_32) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:31:35,907 INFO L272 TraceCheckUtils]: 4: Hoare triple {10941#true} call #t~ret7 := main(); {10941#true} is VALID [2022-04-28 03:31:35,907 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10941#true} {10941#true} #41#return; {10941#true} is VALID [2022-04-28 03:31:35,907 INFO L290 TraceCheckUtils]: 2: Hoare triple {10941#true} assume true; {10941#true} is VALID [2022-04-28 03:31:35,907 INFO L290 TraceCheckUtils]: 1: Hoare triple {10941#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {10941#true} is VALID [2022-04-28 03:31:35,907 INFO L272 TraceCheckUtils]: 0: Hoare triple {10941#true} call ULTIMATE.init(); {10941#true} is VALID [2022-04-28 03:31:35,907 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:35,907 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [480410873] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:31:35,907 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:31:35,907 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:31:37,092 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:31:37,092 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [196431985] [2022-04-28 03:31:37,092 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [196431985] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:31:37,092 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:31:37,092 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2022-04-28 03:31:37,092 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631640232] [2022-04-28 03:31:37,092 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:31:37,093 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 83 [2022-04-28 03:31:37,093 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:31:37,093 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:37,149 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:37,149 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-04-28 03:31:37,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:37,149 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-04-28 03:31:37,150 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=1041, Unknown=0, NotChecked=0, Total=1190 [2022-04-28 03:31:37,150 INFO L87 Difference]: Start difference. First operand 85 states and 87 transitions. Second operand has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:39,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:39,102 INFO L93 Difference]: Finished difference Result 97 states and 101 transitions. [2022-04-28 03:31:39,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-28 03:31:39,102 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 83 [2022-04-28 03:31:39,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:31:39,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:39,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 97 transitions. [2022-04-28 03:31:39,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:39,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 97 transitions. [2022-04-28 03:31:39,105 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 97 transitions. [2022-04-28 03:31:39,154 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 97 edges. 97 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:39,155 INFO L225 Difference]: With dead ends: 97 [2022-04-28 03:31:39,155 INFO L226 Difference]: Without dead ends: 89 [2022-04-28 03:31:39,155 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 29 SyntacticMatches, 49 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 744 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=317, Invalid=3105, Unknown=0, NotChecked=0, Total=3422 [2022-04-28 03:31:39,156 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 58 mSDsluCounter, 122 mSDsCounter, 0 mSdLazyCounter, 1897 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 1923 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 1897 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-28 03:31:39,156 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [58 Valid, 134 Invalid, 1923 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 1897 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-28 03:31:39,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-04-28 03:31:39,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 88. [2022-04-28 03:31:39,235 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:31:39,235 INFO L82 GeneralOperation]: Start isEquivalent. First operand 89 states. Second operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:39,235 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:39,236 INFO L87 Difference]: Start difference. First operand 89 states. Second operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:39,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:39,237 INFO L93 Difference]: Finished difference Result 89 states and 91 transitions. [2022-04-28 03:31:39,237 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 91 transitions. [2022-04-28 03:31:39,237 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:39,237 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:39,237 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 89 states. [2022-04-28 03:31:39,237 INFO L87 Difference]: Start difference. First operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 89 states. [2022-04-28 03:31:39,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:39,238 INFO L93 Difference]: Finished difference Result 89 states and 91 transitions. [2022-04-28 03:31:39,238 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 91 transitions. [2022-04-28 03:31:39,238 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:39,238 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:39,238 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:31:39,238 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:31:39,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 83 states have (on average 1.036144578313253) internal successors, (86), 83 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:39,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 90 transitions. [2022-04-28 03:31:39,239 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 90 transitions. Word has length 83 [2022-04-28 03:31:39,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:31:39,239 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 90 transitions. [2022-04-28 03:31:39,240 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 2.925925925925926) internal successors, (79), 26 states have internal predecessors, (79), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:39,240 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 88 states and 90 transitions. [2022-04-28 03:31:39,344 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:39,344 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 90 transitions. [2022-04-28 03:31:39,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-04-28 03:31:39,344 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:31:39,344 INFO L195 NwaCegarLoop]: trace histogram [25, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:31:39,362 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-28 03:31:39,558 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:31:39,558 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:31:39,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:31:39,558 INFO L85 PathProgramCache]: Analyzing trace with hash 46823437, now seen corresponding path program 24 times [2022-04-28 03:31:39,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:39,559 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2111067906] [2022-04-28 03:31:43,875 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:31:44,108 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:48,317 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:31:48,492 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:48,493 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:31:48,496 INFO L85 PathProgramCache]: Analyzing trace with hash 498270895, now seen corresponding path program 1 times [2022-04-28 03:31:48,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:31:48,496 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132308366] [2022-04-28 03:31:48,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:48,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:31:48,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:48,539 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:31:48,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:48,542 INFO L290 TraceCheckUtils]: 0: Hoare triple {11665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {11658#true} is VALID [2022-04-28 03:31:48,542 INFO L290 TraceCheckUtils]: 1: Hoare triple {11658#true} assume true; {11658#true} is VALID [2022-04-28 03:31:48,542 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11658#true} {11658#true} #41#return; {11658#true} is VALID [2022-04-28 03:31:48,543 INFO L272 TraceCheckUtils]: 0: Hoare triple {11658#true} call ULTIMATE.init(); {11665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:31:48,543 INFO L290 TraceCheckUtils]: 1: Hoare triple {11665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {11658#true} is VALID [2022-04-28 03:31:48,543 INFO L290 TraceCheckUtils]: 2: Hoare triple {11658#true} assume true; {11658#true} is VALID [2022-04-28 03:31:48,543 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11658#true} {11658#true} #41#return; {11658#true} is VALID [2022-04-28 03:31:48,543 INFO L272 TraceCheckUtils]: 4: Hoare triple {11658#true} call #t~ret7 := main(); {11658#true} is VALID [2022-04-28 03:31:48,543 INFO L290 TraceCheckUtils]: 5: Hoare triple {11658#true} ~x~0 := 0;~y~0 := 0; {11663#(= main_~x~0 0)} is VALID [2022-04-28 03:31:48,544 INFO L290 TraceCheckUtils]: 6: Hoare triple {11663#(= main_~x~0 0)} [141] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_683 4294967296))) (let ((.cse0 (= v_main_~y~0_706 v_main_~y~0_705)) (.cse1 (= |v_main_#t~post6_332| |v_main_#t~post6_330|)) (.cse2 (= v_main_~x~0_683 v_main_~x~0_682)) (.cse3 (= |v_main_#t~post5_165| |v_main_#t~post5_164|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_705 v_main_~y~0_706) (= (+ v_main_~x~0_683 v_main_~y~0_706) (+ v_main_~x~0_682 v_main_~y~0_705)) (<= (div (+ (* v_main_~x~0_683 (- 1)) (* (- 1) v_main_~y~0_706) v_main_~y~0_705 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_683 (- 4294967295)) 4294967296) 1)) .cse5)))) InVars {main_~y~0=v_main_~y~0_706, main_#t~post5=|v_main_#t~post5_165|, main_~x~0=v_main_~x~0_683, main_#t~post6=|v_main_#t~post6_332|} OutVars{main_#t~post5=|v_main_#t~post5_164|, main_~y~0=v_main_~y~0_705, main_~x~0=v_main_~x~0_682, main_#t~post6=|v_main_#t~post6_330|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {11663#(= main_~x~0 0)} is VALID [2022-04-28 03:31:48,544 INFO L290 TraceCheckUtils]: 7: Hoare triple {11663#(= main_~x~0 0)} [142] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11663#(= main_~x~0 0)} is VALID [2022-04-28 03:31:48,545 INFO L290 TraceCheckUtils]: 8: Hoare triple {11663#(= main_~x~0 0)} [143] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_170| |v_main_#t~post4_169|)) (.cse1 (= v_main_~y~0_708 v_main_~y~0_707)) (.cse2 (= v_main_~x~0_685 v_main_~x~0_684)) (.cse3 (= |v_main_#t~post6_335| |v_main_#t~post6_331|)) (.cse4 (mod v_main_~x~0_685 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3) (and (= (+ v_main_~x~0_685 v_main_~y~0_707) (+ v_main_~x~0_684 v_main_~y~0_708)) (< v_main_~x~0_685 v_main_~x~0_684) (<= (div (+ (* v_main_~x~0_684 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_685 (- 4294967295)) 4294967296) 1)) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_170|, main_~y~0=v_main_~y~0_708, main_~x~0=v_main_~x~0_685, main_#t~post6=|v_main_#t~post6_335|} OutVars{main_#t~post4=|v_main_#t~post4_169|, main_~y~0=v_main_~y~0_707, main_~x~0=v_main_~x~0_684, main_#t~post6=|v_main_#t~post6_331|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {11664#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:31:48,546 INFO L290 TraceCheckUtils]: 9: Hoare triple {11664#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [140] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {11659#false} is VALID [2022-04-28 03:31:48,546 INFO L272 TraceCheckUtils]: 10: Hoare triple {11659#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {11659#false} is VALID [2022-04-28 03:31:48,546 INFO L290 TraceCheckUtils]: 11: Hoare triple {11659#false} ~cond := #in~cond; {11659#false} is VALID [2022-04-28 03:31:48,546 INFO L290 TraceCheckUtils]: 12: Hoare triple {11659#false} assume 0 == ~cond; {11659#false} is VALID [2022-04-28 03:31:48,546 INFO L290 TraceCheckUtils]: 13: Hoare triple {11659#false} assume !false; {11659#false} is VALID [2022-04-28 03:31:48,546 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:48,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:31:48,546 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132308366] [2022-04-28 03:31:48,546 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2132308366] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:31:48,546 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1976654053] [2022-04-28 03:31:48,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:48,547 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:31:48,547 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:31:48,548 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:31:48,548 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-28 03:31:48,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:48,576 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:31:48,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:48,585 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:31:48,754 INFO L272 TraceCheckUtils]: 0: Hoare triple {11658#true} call ULTIMATE.init(); {11658#true} is VALID [2022-04-28 03:31:48,754 INFO L290 TraceCheckUtils]: 1: Hoare triple {11658#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {11658#true} is VALID [2022-04-28 03:31:48,754 INFO L290 TraceCheckUtils]: 2: Hoare triple {11658#true} assume true; {11658#true} is VALID [2022-04-28 03:31:48,754 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11658#true} {11658#true} #41#return; {11658#true} is VALID [2022-04-28 03:31:48,754 INFO L272 TraceCheckUtils]: 4: Hoare triple {11658#true} call #t~ret7 := main(); {11658#true} is VALID [2022-04-28 03:31:48,755 INFO L290 TraceCheckUtils]: 5: Hoare triple {11658#true} ~x~0 := 0;~y~0 := 0; {11684#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:48,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {11684#(and (= main_~x~0 0) (= main_~y~0 0))} [141] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_683 4294967296))) (let ((.cse0 (= v_main_~y~0_706 v_main_~y~0_705)) (.cse1 (= |v_main_#t~post6_332| |v_main_#t~post6_330|)) (.cse2 (= v_main_~x~0_683 v_main_~x~0_682)) (.cse3 (= |v_main_#t~post5_165| |v_main_#t~post5_164|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_705 v_main_~y~0_706) (= (+ v_main_~x~0_683 v_main_~y~0_706) (+ v_main_~x~0_682 v_main_~y~0_705)) (<= (div (+ (* v_main_~x~0_683 (- 1)) (* (- 1) v_main_~y~0_706) v_main_~y~0_705 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_683 (- 4294967295)) 4294967296) 1)) .cse5)))) InVars {main_~y~0=v_main_~y~0_706, main_#t~post5=|v_main_#t~post5_165|, main_~x~0=v_main_~x~0_683, main_#t~post6=|v_main_#t~post6_332|} OutVars{main_#t~post5=|v_main_#t~post5_164|, main_~y~0=v_main_~y~0_705, main_~x~0=v_main_~x~0_682, main_#t~post6=|v_main_#t~post6_330|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {11684#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:48,756 INFO L290 TraceCheckUtils]: 7: Hoare triple {11684#(and (= main_~x~0 0) (= main_~y~0 0))} [142] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11684#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:48,757 INFO L290 TraceCheckUtils]: 8: Hoare triple {11684#(and (= main_~x~0 0) (= main_~y~0 0))} [143] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_170| |v_main_#t~post4_169|)) (.cse1 (= v_main_~y~0_708 v_main_~y~0_707)) (.cse2 (= v_main_~x~0_685 v_main_~x~0_684)) (.cse3 (= |v_main_#t~post6_335| |v_main_#t~post6_331|)) (.cse4 (mod v_main_~x~0_685 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3) (and (= (+ v_main_~x~0_685 v_main_~y~0_707) (+ v_main_~x~0_684 v_main_~y~0_708)) (< v_main_~x~0_685 v_main_~x~0_684) (<= (div (+ (* v_main_~x~0_684 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_685 (- 4294967295)) 4294967296) 1)) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_170|, main_~y~0=v_main_~y~0_708, main_~x~0=v_main_~x~0_685, main_#t~post6=|v_main_#t~post6_335|} OutVars{main_#t~post4=|v_main_#t~post4_169|, main_~y~0=v_main_~y~0_707, main_~x~0=v_main_~x~0_684, main_#t~post6=|v_main_#t~post6_331|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {11694#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:31:48,757 INFO L290 TraceCheckUtils]: 9: Hoare triple {11694#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [140] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {11659#false} is VALID [2022-04-28 03:31:48,757 INFO L272 TraceCheckUtils]: 10: Hoare triple {11659#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {11659#false} is VALID [2022-04-28 03:31:48,757 INFO L290 TraceCheckUtils]: 11: Hoare triple {11659#false} ~cond := #in~cond; {11659#false} is VALID [2022-04-28 03:31:48,758 INFO L290 TraceCheckUtils]: 12: Hoare triple {11659#false} assume 0 == ~cond; {11659#false} is VALID [2022-04-28 03:31:48,758 INFO L290 TraceCheckUtils]: 13: Hoare triple {11659#false} assume !false; {11659#false} is VALID [2022-04-28 03:31:48,758 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:48,758 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:31:49,647 INFO L290 TraceCheckUtils]: 13: Hoare triple {11659#false} assume !false; {11659#false} is VALID [2022-04-28 03:31:49,648 INFO L290 TraceCheckUtils]: 12: Hoare triple {11713#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {11659#false} is VALID [2022-04-28 03:31:49,648 INFO L290 TraceCheckUtils]: 11: Hoare triple {11717#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {11713#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:31:49,648 INFO L272 TraceCheckUtils]: 10: Hoare triple {11721#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {11717#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:31:49,649 INFO L290 TraceCheckUtils]: 9: Hoare triple {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [140] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {11721#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:31:49,653 INFO L290 TraceCheckUtils]: 8: Hoare triple {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [143] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_170| |v_main_#t~post4_169|)) (.cse1 (= v_main_~y~0_708 v_main_~y~0_707)) (.cse2 (= v_main_~x~0_685 v_main_~x~0_684)) (.cse3 (= |v_main_#t~post6_335| |v_main_#t~post6_331|)) (.cse4 (mod v_main_~x~0_685 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3) (and (= (+ v_main_~x~0_685 v_main_~y~0_707) (+ v_main_~x~0_684 v_main_~y~0_708)) (< v_main_~x~0_685 v_main_~x~0_684) (<= (div (+ (* v_main_~x~0_684 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_685 (- 4294967295)) 4294967296) 1)) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_170|, main_~y~0=v_main_~y~0_708, main_~x~0=v_main_~x~0_685, main_#t~post6=|v_main_#t~post6_335|} OutVars{main_#t~post4=|v_main_#t~post4_169|, main_~y~0=v_main_~y~0_707, main_~x~0=v_main_~x~0_684, main_#t~post6=|v_main_#t~post6_331|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:49,653 INFO L290 TraceCheckUtils]: 7: Hoare triple {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [142] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:49,668 INFO L290 TraceCheckUtils]: 6: Hoare triple {11735#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_718_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_718_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_718_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [141] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_683 4294967296))) (let ((.cse0 (= v_main_~y~0_706 v_main_~y~0_705)) (.cse1 (= |v_main_#t~post6_332| |v_main_#t~post6_330|)) (.cse2 (= v_main_~x~0_683 v_main_~x~0_682)) (.cse3 (= |v_main_#t~post5_165| |v_main_#t~post5_164|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_705 v_main_~y~0_706) (= (+ v_main_~x~0_683 v_main_~y~0_706) (+ v_main_~x~0_682 v_main_~y~0_705)) (<= (div (+ (* v_main_~x~0_683 (- 1)) (* (- 1) v_main_~y~0_706) v_main_~y~0_705 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_683 (- 4294967295)) 4294967296) 1)) .cse5)))) InVars {main_~y~0=v_main_~y~0_706, main_#t~post5=|v_main_#t~post5_165|, main_~x~0=v_main_~x~0_683, main_#t~post6=|v_main_#t~post6_332|} OutVars{main_#t~post5=|v_main_#t~post5_164|, main_~y~0=v_main_~y~0_705, main_~x~0=v_main_~x~0_682, main_#t~post6=|v_main_#t~post6_330|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {11725#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:49,669 INFO L290 TraceCheckUtils]: 5: Hoare triple {11658#true} ~x~0 := 0;~y~0 := 0; {11735#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_718_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_718_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_718_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:31:49,669 INFO L272 TraceCheckUtils]: 4: Hoare triple {11658#true} call #t~ret7 := main(); {11658#true} is VALID [2022-04-28 03:31:49,669 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11658#true} {11658#true} #41#return; {11658#true} is VALID [2022-04-28 03:31:49,669 INFO L290 TraceCheckUtils]: 2: Hoare triple {11658#true} assume true; {11658#true} is VALID [2022-04-28 03:31:49,669 INFO L290 TraceCheckUtils]: 1: Hoare triple {11658#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {11658#true} is VALID [2022-04-28 03:31:49,669 INFO L272 TraceCheckUtils]: 0: Hoare triple {11658#true} call ULTIMATE.init(); {11658#true} is VALID [2022-04-28 03:31:49,669 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:49,669 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1976654053] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:31:49,669 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:31:49,669 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:31:50,551 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:31:50,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2111067906] [2022-04-28 03:31:50,552 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2111067906] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:31:50,552 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:31:50,552 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [28] imperfect sequences [] total 28 [2022-04-28 03:31:50,552 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1519233372] [2022-04-28 03:31:50,552 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:31:50,552 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 86 [2022-04-28 03:31:50,553 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:31:50,553 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:50,592 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:50,592 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-28 03:31:50,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:50,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-28 03:31:50,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=1106, Unknown=0, NotChecked=0, Total=1260 [2022-04-28 03:31:50,593 INFO L87 Difference]: Start difference. First operand 88 states and 90 transitions. Second operand has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:52,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:52,703 INFO L93 Difference]: Finished difference Result 100 states and 104 transitions. [2022-04-28 03:31:52,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-28 03:31:52,703 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 86 [2022-04-28 03:31:52,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:31:52,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:52,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 100 transitions. [2022-04-28 03:31:52,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:52,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 100 transitions. [2022-04-28 03:31:52,704 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 100 transitions. [2022-04-28 03:31:52,754 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 100 edges. 100 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:52,755 INFO L225 Difference]: With dead ends: 100 [2022-04-28 03:31:52,755 INFO L226 Difference]: Without dead ends: 92 [2022-04-28 03:31:52,756 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 29 SyntacticMatches, 51 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 787 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=329, Invalid=3331, Unknown=0, NotChecked=0, Total=3660 [2022-04-28 03:31:52,756 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 60 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 2051 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 2078 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 2051 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:31:52,756 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 139 Invalid, 2078 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 2051 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-28 03:31:52,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2022-04-28 03:31:52,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 91. [2022-04-28 03:31:52,843 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:31:52,843 INFO L82 GeneralOperation]: Start isEquivalent. First operand 92 states. Second operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:52,844 INFO L74 IsIncluded]: Start isIncluded. First operand 92 states. Second operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:52,844 INFO L87 Difference]: Start difference. First operand 92 states. Second operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:52,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:52,845 INFO L93 Difference]: Finished difference Result 92 states and 94 transitions. [2022-04-28 03:31:52,845 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 94 transitions. [2022-04-28 03:31:52,845 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:52,845 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:52,845 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 92 states. [2022-04-28 03:31:52,845 INFO L87 Difference]: Start difference. First operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 92 states. [2022-04-28 03:31:52,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:31:52,846 INFO L93 Difference]: Finished difference Result 92 states and 94 transitions. [2022-04-28 03:31:52,846 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 94 transitions. [2022-04-28 03:31:52,846 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:31:52,846 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:31:52,846 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:31:52,846 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:31:52,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 86 states have internal predecessors, (89), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:52,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 93 transitions. [2022-04-28 03:31:52,847 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 93 transitions. Word has length 86 [2022-04-28 03:31:52,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:31:52,847 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 93 transitions. [2022-04-28 03:31:52,847 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 2.9285714285714284) internal successors, (82), 27 states have internal predecessors, (82), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:52,847 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 91 states and 93 transitions. [2022-04-28 03:31:52,961 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 93 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:52,961 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 93 transitions. [2022-04-28 03:31:52,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-04-28 03:31:52,961 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:31:52,961 INFO L195 NwaCegarLoop]: trace histogram [26, 26, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:31:52,978 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-28 03:31:53,162 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-28 03:31:53,162 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:31:53,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:31:53,162 INFO L85 PathProgramCache]: Analyzing trace with hash -489498811, now seen corresponding path program 25 times [2022-04-28 03:31:53,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:53,162 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1470629063] [2022-04-28 03:31:53,853 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:55,283 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:31:55,444 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:31:55,445 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:31:55,448 INFO L85 PathProgramCache]: Analyzing trace with hash -1747164241, now seen corresponding path program 1 times [2022-04-28 03:31:55,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:31:55,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [102166277] [2022-04-28 03:31:55,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:55,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:31:55,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:55,488 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:31:55,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:55,491 INFO L290 TraceCheckUtils]: 0: Hoare triple {12403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {12396#true} is VALID [2022-04-28 03:31:55,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {12396#true} assume true; {12396#true} is VALID [2022-04-28 03:31:55,491 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12396#true} {12396#true} #41#return; {12396#true} is VALID [2022-04-28 03:31:55,492 INFO L272 TraceCheckUtils]: 0: Hoare triple {12396#true} call ULTIMATE.init(); {12403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:31:55,492 INFO L290 TraceCheckUtils]: 1: Hoare triple {12403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {12396#true} is VALID [2022-04-28 03:31:55,492 INFO L290 TraceCheckUtils]: 2: Hoare triple {12396#true} assume true; {12396#true} is VALID [2022-04-28 03:31:55,492 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12396#true} {12396#true} #41#return; {12396#true} is VALID [2022-04-28 03:31:55,492 INFO L272 TraceCheckUtils]: 4: Hoare triple {12396#true} call #t~ret7 := main(); {12396#true} is VALID [2022-04-28 03:31:55,492 INFO L290 TraceCheckUtils]: 5: Hoare triple {12396#true} ~x~0 := 0;~y~0 := 0; {12401#(= main_~x~0 0)} is VALID [2022-04-28 03:31:55,493 INFO L290 TraceCheckUtils]: 6: Hoare triple {12401#(= main_~x~0 0)} [145] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_724 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_346| |v_main_#t~post6_344|)) (.cse1 (= v_main_~y~0_748 v_main_~y~0_747)) (.cse2 (= |v_main_#t~post5_172| |v_main_#t~post5_171|)) (.cse3 (= v_main_~x~0_724 v_main_~x~0_723))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* v_main_~x~0_724 (- 1)) v_main_~y~0_747 1000000 (* (- 1) v_main_~y~0_748)) (- 4294967296)) (+ (div (+ v_main_~x~0_724 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_724 v_main_~y~0_748) (+ v_main_~x~0_723 v_main_~y~0_747)) (< v_main_~y~0_747 v_main_~y~0_748) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_748, main_#t~post5=|v_main_#t~post5_172|, main_~x~0=v_main_~x~0_724, main_#t~post6=|v_main_#t~post6_346|} OutVars{main_#t~post5=|v_main_#t~post5_171|, main_~y~0=v_main_~y~0_747, main_~x~0=v_main_~x~0_723, main_#t~post6=|v_main_#t~post6_344|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {12401#(= main_~x~0 0)} is VALID [2022-04-28 03:31:55,493 INFO L290 TraceCheckUtils]: 7: Hoare triple {12401#(= main_~x~0 0)} [146] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12401#(= main_~x~0 0)} is VALID [2022-04-28 03:31:55,494 INFO L290 TraceCheckUtils]: 8: Hoare triple {12401#(= main_~x~0 0)} [147] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_177| |v_main_#t~post4_176|)) (.cse1 (= v_main_~x~0_726 v_main_~x~0_725)) (.cse2 (= |v_main_#t~post6_349| |v_main_#t~post6_345|)) (.cse3 (mod v_main_~x~0_726 4294967296))) (or (and .cse0 (= v_main_~y~0_750 v_main_~y~0_749) .cse1 .cse2) (and .cse0 (<= 500000 .cse3) (= v_main_~y~0_749 v_main_~y~0_750) .cse1 .cse2) (and (< .cse3 500000) (<= (div (+ (* v_main_~x~0_725 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_726 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_726 v_main_~x~0_725) (= (+ v_main_~x~0_725 v_main_~y~0_750) (+ v_main_~x~0_726 v_main_~y~0_749))))) InVars {main_#t~post4=|v_main_#t~post4_177|, main_~y~0=v_main_~y~0_750, main_~x~0=v_main_~x~0_726, main_#t~post6=|v_main_#t~post6_349|} OutVars{main_#t~post4=|v_main_#t~post4_176|, main_~y~0=v_main_~y~0_749, main_~x~0=v_main_~x~0_725, main_#t~post6=|v_main_#t~post6_345|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {12402#(or (= main_~x~0 0) (and (<= main_~x~0 500000) (< 0 main_~x~0)))} is VALID [2022-04-28 03:31:55,495 INFO L290 TraceCheckUtils]: 9: Hoare triple {12402#(or (= main_~x~0 0) (and (<= main_~x~0 500000) (< 0 main_~x~0)))} [144] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {12397#false} is VALID [2022-04-28 03:31:55,495 INFO L272 TraceCheckUtils]: 10: Hoare triple {12397#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {12397#false} is VALID [2022-04-28 03:31:55,495 INFO L290 TraceCheckUtils]: 11: Hoare triple {12397#false} ~cond := #in~cond; {12397#false} is VALID [2022-04-28 03:31:55,495 INFO L290 TraceCheckUtils]: 12: Hoare triple {12397#false} assume 0 == ~cond; {12397#false} is VALID [2022-04-28 03:31:55,495 INFO L290 TraceCheckUtils]: 13: Hoare triple {12397#false} assume !false; {12397#false} is VALID [2022-04-28 03:31:55,495 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:55,495 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:31:55,495 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [102166277] [2022-04-28 03:31:55,495 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [102166277] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:31:55,495 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1359298699] [2022-04-28 03:31:55,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:31:55,495 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:31:55,496 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:31:55,496 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:31:55,508 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-28 03:31:55,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:55,530 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:31:55,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:31:55,537 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:31:55,713 INFO L272 TraceCheckUtils]: 0: Hoare triple {12396#true} call ULTIMATE.init(); {12396#true} is VALID [2022-04-28 03:31:55,713 INFO L290 TraceCheckUtils]: 1: Hoare triple {12396#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {12396#true} is VALID [2022-04-28 03:31:55,713 INFO L290 TraceCheckUtils]: 2: Hoare triple {12396#true} assume true; {12396#true} is VALID [2022-04-28 03:31:55,713 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12396#true} {12396#true} #41#return; {12396#true} is VALID [2022-04-28 03:31:55,713 INFO L272 TraceCheckUtils]: 4: Hoare triple {12396#true} call #t~ret7 := main(); {12396#true} is VALID [2022-04-28 03:31:55,713 INFO L290 TraceCheckUtils]: 5: Hoare triple {12396#true} ~x~0 := 0;~y~0 := 0; {12422#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:55,714 INFO L290 TraceCheckUtils]: 6: Hoare triple {12422#(and (= main_~x~0 0) (= main_~y~0 0))} [145] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_724 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_346| |v_main_#t~post6_344|)) (.cse1 (= v_main_~y~0_748 v_main_~y~0_747)) (.cse2 (= |v_main_#t~post5_172| |v_main_#t~post5_171|)) (.cse3 (= v_main_~x~0_724 v_main_~x~0_723))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* v_main_~x~0_724 (- 1)) v_main_~y~0_747 1000000 (* (- 1) v_main_~y~0_748)) (- 4294967296)) (+ (div (+ v_main_~x~0_724 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_724 v_main_~y~0_748) (+ v_main_~x~0_723 v_main_~y~0_747)) (< v_main_~y~0_747 v_main_~y~0_748) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_748, main_#t~post5=|v_main_#t~post5_172|, main_~x~0=v_main_~x~0_724, main_#t~post6=|v_main_#t~post6_346|} OutVars{main_#t~post5=|v_main_#t~post5_171|, main_~y~0=v_main_~y~0_747, main_~x~0=v_main_~x~0_723, main_#t~post6=|v_main_#t~post6_344|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {12422#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:55,714 INFO L290 TraceCheckUtils]: 7: Hoare triple {12422#(and (= main_~x~0 0) (= main_~y~0 0))} [146] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12422#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:31:55,715 INFO L290 TraceCheckUtils]: 8: Hoare triple {12422#(and (= main_~x~0 0) (= main_~y~0 0))} [147] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_177| |v_main_#t~post4_176|)) (.cse1 (= v_main_~x~0_726 v_main_~x~0_725)) (.cse2 (= |v_main_#t~post6_349| |v_main_#t~post6_345|)) (.cse3 (mod v_main_~x~0_726 4294967296))) (or (and .cse0 (= v_main_~y~0_750 v_main_~y~0_749) .cse1 .cse2) (and .cse0 (<= 500000 .cse3) (= v_main_~y~0_749 v_main_~y~0_750) .cse1 .cse2) (and (< .cse3 500000) (<= (div (+ (* v_main_~x~0_725 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_726 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_726 v_main_~x~0_725) (= (+ v_main_~x~0_725 v_main_~y~0_750) (+ v_main_~x~0_726 v_main_~y~0_749))))) InVars {main_#t~post4=|v_main_#t~post4_177|, main_~y~0=v_main_~y~0_750, main_~x~0=v_main_~x~0_726, main_#t~post6=|v_main_#t~post6_349|} OutVars{main_#t~post4=|v_main_#t~post4_176|, main_~y~0=v_main_~y~0_749, main_~x~0=v_main_~x~0_725, main_#t~post6=|v_main_#t~post6_345|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {12432#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:31:55,716 INFO L290 TraceCheckUtils]: 9: Hoare triple {12432#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [144] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {12397#false} is VALID [2022-04-28 03:31:55,716 INFO L272 TraceCheckUtils]: 10: Hoare triple {12397#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {12397#false} is VALID [2022-04-28 03:31:55,716 INFO L290 TraceCheckUtils]: 11: Hoare triple {12397#false} ~cond := #in~cond; {12397#false} is VALID [2022-04-28 03:31:55,716 INFO L290 TraceCheckUtils]: 12: Hoare triple {12397#false} assume 0 == ~cond; {12397#false} is VALID [2022-04-28 03:31:55,716 INFO L290 TraceCheckUtils]: 13: Hoare triple {12397#false} assume !false; {12397#false} is VALID [2022-04-28 03:31:55,716 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:55,716 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:31:56,576 INFO L290 TraceCheckUtils]: 13: Hoare triple {12397#false} assume !false; {12397#false} is VALID [2022-04-28 03:31:56,576 INFO L290 TraceCheckUtils]: 12: Hoare triple {12451#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {12397#false} is VALID [2022-04-28 03:31:56,576 INFO L290 TraceCheckUtils]: 11: Hoare triple {12455#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {12451#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:31:56,577 INFO L272 TraceCheckUtils]: 10: Hoare triple {12459#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {12455#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:31:56,577 INFO L290 TraceCheckUtils]: 9: Hoare triple {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [144] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {12459#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:31:56,579 INFO L290 TraceCheckUtils]: 8: Hoare triple {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [147] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_177| |v_main_#t~post4_176|)) (.cse1 (= v_main_~x~0_726 v_main_~x~0_725)) (.cse2 (= |v_main_#t~post6_349| |v_main_#t~post6_345|)) (.cse3 (mod v_main_~x~0_726 4294967296))) (or (and .cse0 (= v_main_~y~0_750 v_main_~y~0_749) .cse1 .cse2) (and .cse0 (<= 500000 .cse3) (= v_main_~y~0_749 v_main_~y~0_750) .cse1 .cse2) (and (< .cse3 500000) (<= (div (+ (* v_main_~x~0_725 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_726 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_726 v_main_~x~0_725) (= (+ v_main_~x~0_725 v_main_~y~0_750) (+ v_main_~x~0_726 v_main_~y~0_749))))) InVars {main_#t~post4=|v_main_#t~post4_177|, main_~y~0=v_main_~y~0_750, main_~x~0=v_main_~x~0_726, main_#t~post6=|v_main_#t~post6_349|} OutVars{main_#t~post4=|v_main_#t~post4_176|, main_~y~0=v_main_~y~0_749, main_~x~0=v_main_~x~0_725, main_#t~post6=|v_main_#t~post6_345|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:56,580 INFO L290 TraceCheckUtils]: 7: Hoare triple {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [146] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:56,635 INFO L290 TraceCheckUtils]: 6: Hoare triple {12473#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_760_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_760_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_760_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [145] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_724 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= |v_main_#t~post6_346| |v_main_#t~post6_344|)) (.cse1 (= v_main_~y~0_748 v_main_~y~0_747)) (.cse2 (= |v_main_#t~post5_172| |v_main_#t~post5_171|)) (.cse3 (= v_main_~x~0_724 v_main_~x~0_723))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* v_main_~x~0_724 (- 1)) v_main_~y~0_747 1000000 (* (- 1) v_main_~y~0_748)) (- 4294967296)) (+ (div (+ v_main_~x~0_724 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_724 v_main_~y~0_748) (+ v_main_~x~0_723 v_main_~y~0_747)) (< v_main_~y~0_747 v_main_~y~0_748) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_748, main_#t~post5=|v_main_#t~post5_172|, main_~x~0=v_main_~x~0_724, main_#t~post6=|v_main_#t~post6_346|} OutVars{main_#t~post5=|v_main_#t~post5_171|, main_~y~0=v_main_~y~0_747, main_~x~0=v_main_~x~0_723, main_#t~post6=|v_main_#t~post6_344|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {12463#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:31:56,636 INFO L290 TraceCheckUtils]: 5: Hoare triple {12396#true} ~x~0 := 0;~y~0 := 0; {12473#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_760_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_760_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_760_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:31:56,636 INFO L272 TraceCheckUtils]: 4: Hoare triple {12396#true} call #t~ret7 := main(); {12396#true} is VALID [2022-04-28 03:31:56,636 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12396#true} {12396#true} #41#return; {12396#true} is VALID [2022-04-28 03:31:56,636 INFO L290 TraceCheckUtils]: 2: Hoare triple {12396#true} assume true; {12396#true} is VALID [2022-04-28 03:31:56,636 INFO L290 TraceCheckUtils]: 1: Hoare triple {12396#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {12396#true} is VALID [2022-04-28 03:31:56,636 INFO L272 TraceCheckUtils]: 0: Hoare triple {12396#true} call ULTIMATE.init(); {12396#true} is VALID [2022-04-28 03:31:56,636 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:31:56,636 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1359298699] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:31:56,637 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:31:56,637 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:31:57,894 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:31:57,894 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1470629063] [2022-04-28 03:31:57,894 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1470629063] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:31:57,894 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:31:57,894 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [29] imperfect sequences [] total 29 [2022-04-28 03:31:57,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952342367] [2022-04-28 03:31:57,894 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:31:57,895 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 89 [2022-04-28 03:31:57,895 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:31:57,895 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:31:57,954 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:31:57,954 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-28 03:31:57,955 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:31:57,955 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-28 03:31:57,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=1173, Unknown=0, NotChecked=0, Total=1332 [2022-04-28 03:31:57,955 INFO L87 Difference]: Start difference. First operand 91 states and 93 transitions. Second operand has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:01,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:01,129 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2022-04-28 03:32:01,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-28 03:32:01,129 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 89 [2022-04-28 03:32:01,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:32:01,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:01,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 103 transitions. [2022-04-28 03:32:01,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:01,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 103 transitions. [2022-04-28 03:32:01,131 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 103 transitions. [2022-04-28 03:32:01,207 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:01,208 INFO L225 Difference]: With dead ends: 103 [2022-04-28 03:32:01,208 INFO L226 Difference]: Without dead ends: 95 [2022-04-28 03:32:01,209 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 29 SyntacticMatches, 53 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 831 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=341, Invalid=3565, Unknown=0, NotChecked=0, Total=3906 [2022-04-28 03:32:01,210 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 62 mSDsluCounter, 132 mSDsCounter, 0 mSdLazyCounter, 2211 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 2239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 2211 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:32:01,210 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [62 Valid, 144 Invalid, 2239 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 2211 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-28 03:32:01,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-04-28 03:32:01,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 94. [2022-04-28 03:32:01,288 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:32:01,289 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:01,289 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:01,289 INFO L87 Difference]: Start difference. First operand 95 states. Second operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:01,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:01,307 INFO L93 Difference]: Finished difference Result 95 states and 97 transitions. [2022-04-28 03:32:01,307 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 97 transitions. [2022-04-28 03:32:01,307 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:01,307 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:01,307 INFO L74 IsIncluded]: Start isIncluded. First operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 95 states. [2022-04-28 03:32:01,307 INFO L87 Difference]: Start difference. First operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 95 states. [2022-04-28 03:32:01,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:01,308 INFO L93 Difference]: Finished difference Result 95 states and 97 transitions. [2022-04-28 03:32:01,308 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 97 transitions. [2022-04-28 03:32:01,308 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:01,308 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:01,309 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:32:01,309 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:32:01,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 89 states have internal predecessors, (92), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:01,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 96 transitions. [2022-04-28 03:32:01,309 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 96 transitions. Word has length 89 [2022-04-28 03:32:01,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:32:01,310 INFO L495 AbstractCegarLoop]: Abstraction has 94 states and 96 transitions. [2022-04-28 03:32:01,310 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 2.9310344827586206) internal successors, (85), 28 states have internal predecessors, (85), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:01,310 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 94 states and 96 transitions. [2022-04-28 03:32:01,422 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 96 edges. 96 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:01,422 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 96 transitions. [2022-04-28 03:32:01,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-04-28 03:32:01,423 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:32:01,423 INFO L195 NwaCegarLoop]: trace histogram [27, 27, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:32:01,438 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Ended with exit code 0 [2022-04-28 03:32:01,638 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-04-28 03:32:01,638 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:32:01,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:32:01,638 INFO L85 PathProgramCache]: Analyzing trace with hash -787247859, now seen corresponding path program 26 times [2022-04-28 03:32:01,639 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:01,639 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [347646534] [2022-04-28 03:32:04,088 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:32:04,326 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:04,675 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:04,676 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:32:04,679 INFO L85 PathProgramCache]: Analyzing trace with hash 302367919, now seen corresponding path program 1 times [2022-04-28 03:32:04,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:32:04,679 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730749651] [2022-04-28 03:32:04,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:04,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:32:04,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:04,735 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:32:04,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:04,738 INFO L290 TraceCheckUtils]: 0: Hoare triple {13162#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13155#true} is VALID [2022-04-28 03:32:04,738 INFO L290 TraceCheckUtils]: 1: Hoare triple {13155#true} assume true; {13155#true} is VALID [2022-04-28 03:32:04,738 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13155#true} {13155#true} #41#return; {13155#true} is VALID [2022-04-28 03:32:04,739 INFO L272 TraceCheckUtils]: 0: Hoare triple {13155#true} call ULTIMATE.init(); {13162#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:32:04,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {13162#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13155#true} is VALID [2022-04-28 03:32:04,739 INFO L290 TraceCheckUtils]: 2: Hoare triple {13155#true} assume true; {13155#true} is VALID [2022-04-28 03:32:04,739 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13155#true} {13155#true} #41#return; {13155#true} is VALID [2022-04-28 03:32:04,739 INFO L272 TraceCheckUtils]: 4: Hoare triple {13155#true} call #t~ret7 := main(); {13155#true} is VALID [2022-04-28 03:32:04,739 INFO L290 TraceCheckUtils]: 5: Hoare triple {13155#true} ~x~0 := 0;~y~0 := 0; {13160#(= main_~x~0 0)} is VALID [2022-04-28 03:32:04,740 INFO L290 TraceCheckUtils]: 6: Hoare triple {13160#(= main_~x~0 0)} [149] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_766 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_766 v_main_~x~0_765)) (.cse3 (= |v_main_#t~post5_179| |v_main_#t~post5_178|)) (.cse4 (= v_main_~y~0_791 v_main_~y~0_790))) (or (and (<= (div (+ (* v_main_~x~0_765 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_766 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_766 v_main_~y~0_791) (+ v_main_~x~0_765 v_main_~y~0_790)) (< v_main_~x~0_766 v_main_~x~0_765) .cse0 .cse1) (and .cse2 .cse3 .cse4 (or (not .cse0) (not .cse1)) (= |v_main_#t~post6_358| |v_main_#t~post6_360|)) (and (= |v_main_#t~post6_360| |v_main_#t~post6_358|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_791, main_#t~post5=|v_main_#t~post5_179|, main_~x~0=v_main_~x~0_766, main_#t~post6=|v_main_#t~post6_360|} OutVars{main_#t~post5=|v_main_#t~post5_178|, main_~y~0=v_main_~y~0_790, main_~x~0=v_main_~x~0_765, main_#t~post6=|v_main_#t~post6_358|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13160#(= main_~x~0 0)} is VALID [2022-04-28 03:32:04,740 INFO L290 TraceCheckUtils]: 7: Hoare triple {13160#(= main_~x~0 0)} [150] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13160#(= main_~x~0 0)} is VALID [2022-04-28 03:32:04,741 INFO L290 TraceCheckUtils]: 8: Hoare triple {13160#(= main_~x~0 0)} [151] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_184| |v_main_#t~post4_183|)) (.cse2 (= v_main_~y~0_793 v_main_~y~0_792)) (.cse3 (= v_main_~x~0_768 v_main_~x~0_767)) (.cse1 (mod v_main_~x~0_768 4294967296))) (or (and (= |v_main_#t~post6_359| |v_main_#t~post6_363|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and (= |v_main_#t~post6_363| |v_main_#t~post6_359|) .cse0 .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_768 v_main_~x~0_767) (<= (div (+ 500000 (* v_main_~x~0_767 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_768 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_768 v_main_~y~0_792) (+ v_main_~x~0_767 v_main_~y~0_793))))) InVars {main_#t~post4=|v_main_#t~post4_184|, main_~y~0=v_main_~y~0_793, main_~x~0=v_main_~x~0_768, main_#t~post6=|v_main_#t~post6_363|} OutVars{main_#t~post4=|v_main_#t~post4_183|, main_~y~0=v_main_~y~0_792, main_~x~0=v_main_~x~0_767, main_#t~post6=|v_main_#t~post6_359|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13161#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:32:04,742 INFO L290 TraceCheckUtils]: 9: Hoare triple {13161#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [148] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13156#false} is VALID [2022-04-28 03:32:04,742 INFO L272 TraceCheckUtils]: 10: Hoare triple {13156#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13156#false} is VALID [2022-04-28 03:32:04,742 INFO L290 TraceCheckUtils]: 11: Hoare triple {13156#false} ~cond := #in~cond; {13156#false} is VALID [2022-04-28 03:32:04,742 INFO L290 TraceCheckUtils]: 12: Hoare triple {13156#false} assume 0 == ~cond; {13156#false} is VALID [2022-04-28 03:32:04,742 INFO L290 TraceCheckUtils]: 13: Hoare triple {13156#false} assume !false; {13156#false} is VALID [2022-04-28 03:32:04,742 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:04,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:32:04,742 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730749651] [2022-04-28 03:32:04,742 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730749651] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:32:04,742 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1353591713] [2022-04-28 03:32:04,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:04,743 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:04,743 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:32:04,744 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:32:04,744 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-04-28 03:32:04,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:04,770 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:32:04,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:04,780 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:32:04,917 INFO L272 TraceCheckUtils]: 0: Hoare triple {13155#true} call ULTIMATE.init(); {13155#true} is VALID [2022-04-28 03:32:04,917 INFO L290 TraceCheckUtils]: 1: Hoare triple {13155#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13155#true} is VALID [2022-04-28 03:32:04,917 INFO L290 TraceCheckUtils]: 2: Hoare triple {13155#true} assume true; {13155#true} is VALID [2022-04-28 03:32:04,917 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13155#true} {13155#true} #41#return; {13155#true} is VALID [2022-04-28 03:32:04,918 INFO L272 TraceCheckUtils]: 4: Hoare triple {13155#true} call #t~ret7 := main(); {13155#true} is VALID [2022-04-28 03:32:04,918 INFO L290 TraceCheckUtils]: 5: Hoare triple {13155#true} ~x~0 := 0;~y~0 := 0; {13181#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:04,918 INFO L290 TraceCheckUtils]: 6: Hoare triple {13181#(and (= main_~x~0 0) (= main_~y~0 0))} [149] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_766 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_766 v_main_~x~0_765)) (.cse3 (= |v_main_#t~post5_179| |v_main_#t~post5_178|)) (.cse4 (= v_main_~y~0_791 v_main_~y~0_790))) (or (and (<= (div (+ (* v_main_~x~0_765 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_766 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_766 v_main_~y~0_791) (+ v_main_~x~0_765 v_main_~y~0_790)) (< v_main_~x~0_766 v_main_~x~0_765) .cse0 .cse1) (and .cse2 .cse3 .cse4 (or (not .cse0) (not .cse1)) (= |v_main_#t~post6_358| |v_main_#t~post6_360|)) (and (= |v_main_#t~post6_360| |v_main_#t~post6_358|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_791, main_#t~post5=|v_main_#t~post5_179|, main_~x~0=v_main_~x~0_766, main_#t~post6=|v_main_#t~post6_360|} OutVars{main_#t~post5=|v_main_#t~post5_178|, main_~y~0=v_main_~y~0_790, main_~x~0=v_main_~x~0_765, main_#t~post6=|v_main_#t~post6_358|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13181#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:04,919 INFO L290 TraceCheckUtils]: 7: Hoare triple {13181#(and (= main_~x~0 0) (= main_~y~0 0))} [150] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13181#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:04,919 INFO L290 TraceCheckUtils]: 8: Hoare triple {13181#(and (= main_~x~0 0) (= main_~y~0 0))} [151] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_184| |v_main_#t~post4_183|)) (.cse2 (= v_main_~y~0_793 v_main_~y~0_792)) (.cse3 (= v_main_~x~0_768 v_main_~x~0_767)) (.cse1 (mod v_main_~x~0_768 4294967296))) (or (and (= |v_main_#t~post6_359| |v_main_#t~post6_363|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and (= |v_main_#t~post6_363| |v_main_#t~post6_359|) .cse0 .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_768 v_main_~x~0_767) (<= (div (+ 500000 (* v_main_~x~0_767 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_768 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_768 v_main_~y~0_792) (+ v_main_~x~0_767 v_main_~y~0_793))))) InVars {main_#t~post4=|v_main_#t~post4_184|, main_~y~0=v_main_~y~0_793, main_~x~0=v_main_~x~0_768, main_#t~post6=|v_main_#t~post6_363|} OutVars{main_#t~post4=|v_main_#t~post4_183|, main_~y~0=v_main_~y~0_792, main_~x~0=v_main_~x~0_767, main_#t~post6=|v_main_#t~post6_359|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13191#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:32:04,921 INFO L290 TraceCheckUtils]: 9: Hoare triple {13191#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [148] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13156#false} is VALID [2022-04-28 03:32:04,922 INFO L272 TraceCheckUtils]: 10: Hoare triple {13156#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13156#false} is VALID [2022-04-28 03:32:04,923 INFO L290 TraceCheckUtils]: 11: Hoare triple {13156#false} ~cond := #in~cond; {13156#false} is VALID [2022-04-28 03:32:04,923 INFO L290 TraceCheckUtils]: 12: Hoare triple {13156#false} assume 0 == ~cond; {13156#false} is VALID [2022-04-28 03:32:04,923 INFO L290 TraceCheckUtils]: 13: Hoare triple {13156#false} assume !false; {13156#false} is VALID [2022-04-28 03:32:04,923 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:04,923 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:32:06,572 INFO L290 TraceCheckUtils]: 13: Hoare triple {13156#false} assume !false; {13156#false} is VALID [2022-04-28 03:32:06,573 INFO L290 TraceCheckUtils]: 12: Hoare triple {13210#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {13156#false} is VALID [2022-04-28 03:32:06,573 INFO L290 TraceCheckUtils]: 11: Hoare triple {13214#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {13210#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:32:06,574 INFO L272 TraceCheckUtils]: 10: Hoare triple {13218#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13214#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:32:06,574 INFO L290 TraceCheckUtils]: 9: Hoare triple {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [148] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13218#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:32:06,576 INFO L290 TraceCheckUtils]: 8: Hoare triple {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [151] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_184| |v_main_#t~post4_183|)) (.cse2 (= v_main_~y~0_793 v_main_~y~0_792)) (.cse3 (= v_main_~x~0_768 v_main_~x~0_767)) (.cse1 (mod v_main_~x~0_768 4294967296))) (or (and (= |v_main_#t~post6_359| |v_main_#t~post6_363|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and (= |v_main_#t~post6_363| |v_main_#t~post6_359|) .cse0 .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_768 v_main_~x~0_767) (<= (div (+ 500000 (* v_main_~x~0_767 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_768 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_768 v_main_~y~0_792) (+ v_main_~x~0_767 v_main_~y~0_793))))) InVars {main_#t~post4=|v_main_#t~post4_184|, main_~y~0=v_main_~y~0_793, main_~x~0=v_main_~x~0_768, main_#t~post6=|v_main_#t~post6_363|} OutVars{main_#t~post4=|v_main_#t~post4_183|, main_~y~0=v_main_~y~0_792, main_~x~0=v_main_~x~0_767, main_#t~post6=|v_main_#t~post6_359|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:06,576 INFO L290 TraceCheckUtils]: 7: Hoare triple {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [150] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:06,860 INFO L290 TraceCheckUtils]: 6: Hoare triple {13232#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_803_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_803_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_803_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [149] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_766 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_766 v_main_~x~0_765)) (.cse3 (= |v_main_#t~post5_179| |v_main_#t~post5_178|)) (.cse4 (= v_main_~y~0_791 v_main_~y~0_790))) (or (and (<= (div (+ (* v_main_~x~0_765 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_766 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_766 v_main_~y~0_791) (+ v_main_~x~0_765 v_main_~y~0_790)) (< v_main_~x~0_766 v_main_~x~0_765) .cse0 .cse1) (and .cse2 .cse3 .cse4 (or (not .cse0) (not .cse1)) (= |v_main_#t~post6_358| |v_main_#t~post6_360|)) (and (= |v_main_#t~post6_360| |v_main_#t~post6_358|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_791, main_#t~post5=|v_main_#t~post5_179|, main_~x~0=v_main_~x~0_766, main_#t~post6=|v_main_#t~post6_360|} OutVars{main_#t~post5=|v_main_#t~post5_178|, main_~y~0=v_main_~y~0_790, main_~x~0=v_main_~x~0_765, main_#t~post6=|v_main_#t~post6_358|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13222#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:06,861 INFO L290 TraceCheckUtils]: 5: Hoare triple {13155#true} ~x~0 := 0;~y~0 := 0; {13232#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_803_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_803_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_803_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:32:06,861 INFO L272 TraceCheckUtils]: 4: Hoare triple {13155#true} call #t~ret7 := main(); {13155#true} is VALID [2022-04-28 03:32:06,861 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13155#true} {13155#true} #41#return; {13155#true} is VALID [2022-04-28 03:32:06,861 INFO L290 TraceCheckUtils]: 2: Hoare triple {13155#true} assume true; {13155#true} is VALID [2022-04-28 03:32:06,861 INFO L290 TraceCheckUtils]: 1: Hoare triple {13155#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13155#true} is VALID [2022-04-28 03:32:06,861 INFO L272 TraceCheckUtils]: 0: Hoare triple {13155#true} call ULTIMATE.init(); {13155#true} is VALID [2022-04-28 03:32:06,861 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:06,861 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1353591713] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:32:06,862 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:32:06,862 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:32:08,224 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:32:08,224 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [347646534] [2022-04-28 03:32:08,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [347646534] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:32:08,224 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:32:08,224 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [30] imperfect sequences [] total 30 [2022-04-28 03:32:08,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835764657] [2022-04-28 03:32:08,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:32:08,224 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 92 [2022-04-28 03:32:08,225 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:32:08,225 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:08,286 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 92 edges. 92 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:08,286 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-28 03:32:08,286 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:08,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-28 03:32:08,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=164, Invalid=1242, Unknown=0, NotChecked=0, Total=1406 [2022-04-28 03:32:08,287 INFO L87 Difference]: Start difference. First operand 94 states and 96 transitions. Second operand has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:11,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:11,302 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2022-04-28 03:32:11,302 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-28 03:32:11,302 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 92 [2022-04-28 03:32:11,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:32:11,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:11,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 106 transitions. [2022-04-28 03:32:11,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:11,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 106 transitions. [2022-04-28 03:32:11,304 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 106 transitions. [2022-04-28 03:32:11,361 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:11,362 INFO L225 Difference]: With dead ends: 106 [2022-04-28 03:32:11,362 INFO L226 Difference]: Without dead ends: 98 [2022-04-28 03:32:11,363 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 28 SyntacticMatches, 56 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 876 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=353, Invalid=3807, Unknown=0, NotChecked=0, Total=4160 [2022-04-28 03:32:11,363 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 64 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 2377 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 149 SdHoareTripleChecker+Invalid, 2406 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 2377 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:32:11,363 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [64 Valid, 149 Invalid, 2406 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 2377 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-28 03:32:11,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-28 03:32:11,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 97. [2022-04-28 03:32:11,444 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:32:11,444 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:11,444 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:11,444 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:11,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:11,445 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2022-04-28 03:32:11,445 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2022-04-28 03:32:11,445 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:11,446 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:11,446 INFO L74 IsIncluded]: Start isIncluded. First operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-28 03:32:11,446 INFO L87 Difference]: Start difference. First operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-28 03:32:11,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:11,447 INFO L93 Difference]: Finished difference Result 98 states and 100 transitions. [2022-04-28 03:32:11,447 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 100 transitions. [2022-04-28 03:32:11,447 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:11,447 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:11,447 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:32:11,447 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:32:11,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 92 states have internal predecessors, (95), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:11,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 99 transitions. [2022-04-28 03:32:11,448 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 99 transitions. Word has length 92 [2022-04-28 03:32:11,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:32:11,448 INFO L495 AbstractCegarLoop]: Abstraction has 97 states and 99 transitions. [2022-04-28 03:32:11,448 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 2.933333333333333) internal successors, (88), 29 states have internal predecessors, (88), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:11,448 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 97 states and 99 transitions. [2022-04-28 03:32:11,601 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 99 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:11,601 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 99 transitions. [2022-04-28 03:32:11,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-04-28 03:32:11,601 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:32:11,601 INFO L195 NwaCegarLoop]: trace histogram [28, 28, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:32:11,620 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Ended with exit code 0 [2022-04-28 03:32:11,802 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-28 03:32:11,802 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:32:11,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:32:11,802 INFO L85 PathProgramCache]: Analyzing trace with hash -1921670587, now seen corresponding path program 27 times [2022-04-28 03:32:11,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:11,802 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [564999824] [2022-04-28 03:32:14,214 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:15,386 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:15,387 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:32:15,390 INFO L85 PathProgramCache]: Analyzing trace with hash -1943067217, now seen corresponding path program 1 times [2022-04-28 03:32:15,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:32:15,390 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616481735] [2022-04-28 03:32:15,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:15,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:32:15,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:15,444 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:32:15,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:15,446 INFO L290 TraceCheckUtils]: 0: Hoare triple {13942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13935#true} is VALID [2022-04-28 03:32:15,447 INFO L290 TraceCheckUtils]: 1: Hoare triple {13935#true} assume true; {13935#true} is VALID [2022-04-28 03:32:15,447 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13935#true} {13935#true} #41#return; {13935#true} is VALID [2022-04-28 03:32:15,447 INFO L272 TraceCheckUtils]: 0: Hoare triple {13935#true} call ULTIMATE.init(); {13942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:32:15,447 INFO L290 TraceCheckUtils]: 1: Hoare triple {13942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13935#true} is VALID [2022-04-28 03:32:15,447 INFO L290 TraceCheckUtils]: 2: Hoare triple {13935#true} assume true; {13935#true} is VALID [2022-04-28 03:32:15,447 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13935#true} {13935#true} #41#return; {13935#true} is VALID [2022-04-28 03:32:15,447 INFO L272 TraceCheckUtils]: 4: Hoare triple {13935#true} call #t~ret7 := main(); {13935#true} is VALID [2022-04-28 03:32:15,448 INFO L290 TraceCheckUtils]: 5: Hoare triple {13935#true} ~x~0 := 0;~y~0 := 0; {13940#(= main_~x~0 0)} is VALID [2022-04-28 03:32:15,448 INFO L290 TraceCheckUtils]: 6: Hoare triple {13940#(= main_~x~0 0)} [153] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_809 4294967296))) (let ((.cse2 (= |v_main_#t~post6_374| |v_main_#t~post6_372|)) (.cse3 (= v_main_~x~0_809 v_main_~x~0_808)) (.cse4 (= |v_main_#t~post5_186| |v_main_#t~post5_185|)) (.cse5 (= v_main_~y~0_835 v_main_~y~0_834)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_809 v_main_~y~0_835) (+ v_main_~x~0_808 v_main_~y~0_834)) .cse0 .cse1 (<= (div (+ (* v_main_~x~0_808 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_809 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_809 v_main_~x~0_808)) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse1) (not .cse0)))))) InVars {main_~y~0=v_main_~y~0_835, main_#t~post5=|v_main_#t~post5_186|, main_~x~0=v_main_~x~0_809, main_#t~post6=|v_main_#t~post6_374|} OutVars{main_#t~post5=|v_main_#t~post5_185|, main_~y~0=v_main_~y~0_834, main_~x~0=v_main_~x~0_808, main_#t~post6=|v_main_#t~post6_372|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13940#(= main_~x~0 0)} is VALID [2022-04-28 03:32:15,448 INFO L290 TraceCheckUtils]: 7: Hoare triple {13940#(= main_~x~0 0)} [154] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13940#(= main_~x~0 0)} is VALID [2022-04-28 03:32:15,449 INFO L290 TraceCheckUtils]: 8: Hoare triple {13940#(= main_~x~0 0)} [155] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_811 4294967296)) (.cse1 (= |v_main_#t~post4_191| |v_main_#t~post4_190|)) (.cse2 (= v_main_~y~0_837 v_main_~y~0_836)) (.cse3 (= |v_main_#t~post6_377| |v_main_#t~post6_373|)) (.cse4 (= v_main_~x~0_811 v_main_~x~0_810))) (or (and (< v_main_~y~0_837 v_main_~y~0_836) (= (+ v_main_~x~0_811 v_main_~y~0_836) (+ v_main_~x~0_810 v_main_~y~0_837)) (<= (div (+ (* v_main_~x~0_811 (- 1)) (* (- 1) v_main_~y~0_836) v_main_~y~0_837 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_811 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_191|, main_~y~0=v_main_~y~0_837, main_~x~0=v_main_~x~0_811, main_#t~post6=|v_main_#t~post6_377|} OutVars{main_#t~post4=|v_main_#t~post4_190|, main_~y~0=v_main_~y~0_836, main_~x~0=v_main_~x~0_810, main_#t~post6=|v_main_#t~post6_373|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13941#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:32:15,450 INFO L290 TraceCheckUtils]: 9: Hoare triple {13941#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [152] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13936#false} is VALID [2022-04-28 03:32:15,450 INFO L272 TraceCheckUtils]: 10: Hoare triple {13936#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13936#false} is VALID [2022-04-28 03:32:15,450 INFO L290 TraceCheckUtils]: 11: Hoare triple {13936#false} ~cond := #in~cond; {13936#false} is VALID [2022-04-28 03:32:15,450 INFO L290 TraceCheckUtils]: 12: Hoare triple {13936#false} assume 0 == ~cond; {13936#false} is VALID [2022-04-28 03:32:15,450 INFO L290 TraceCheckUtils]: 13: Hoare triple {13936#false} assume !false; {13936#false} is VALID [2022-04-28 03:32:15,450 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:15,450 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:32:15,450 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616481735] [2022-04-28 03:32:15,451 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [616481735] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:32:15,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1853516559] [2022-04-28 03:32:15,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:15,451 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:15,451 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:32:15,464 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:32:15,466 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-04-28 03:32:15,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:15,499 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:32:15,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:15,507 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:32:15,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {13935#true} call ULTIMATE.init(); {13935#true} is VALID [2022-04-28 03:32:15,752 INFO L290 TraceCheckUtils]: 1: Hoare triple {13935#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13935#true} is VALID [2022-04-28 03:32:15,752 INFO L290 TraceCheckUtils]: 2: Hoare triple {13935#true} assume true; {13935#true} is VALID [2022-04-28 03:32:15,752 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13935#true} {13935#true} #41#return; {13935#true} is VALID [2022-04-28 03:32:15,752 INFO L272 TraceCheckUtils]: 4: Hoare triple {13935#true} call #t~ret7 := main(); {13935#true} is VALID [2022-04-28 03:32:15,753 INFO L290 TraceCheckUtils]: 5: Hoare triple {13935#true} ~x~0 := 0;~y~0 := 0; {13961#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:15,753 INFO L290 TraceCheckUtils]: 6: Hoare triple {13961#(and (= main_~x~0 0) (= main_~y~0 0))} [153] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_809 4294967296))) (let ((.cse2 (= |v_main_#t~post6_374| |v_main_#t~post6_372|)) (.cse3 (= v_main_~x~0_809 v_main_~x~0_808)) (.cse4 (= |v_main_#t~post5_186| |v_main_#t~post5_185|)) (.cse5 (= v_main_~y~0_835 v_main_~y~0_834)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_809 v_main_~y~0_835) (+ v_main_~x~0_808 v_main_~y~0_834)) .cse0 .cse1 (<= (div (+ (* v_main_~x~0_808 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_809 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_809 v_main_~x~0_808)) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse1) (not .cse0)))))) InVars {main_~y~0=v_main_~y~0_835, main_#t~post5=|v_main_#t~post5_186|, main_~x~0=v_main_~x~0_809, main_#t~post6=|v_main_#t~post6_374|} OutVars{main_#t~post5=|v_main_#t~post5_185|, main_~y~0=v_main_~y~0_834, main_~x~0=v_main_~x~0_808, main_#t~post6=|v_main_#t~post6_372|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {13961#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:15,754 INFO L290 TraceCheckUtils]: 7: Hoare triple {13961#(and (= main_~x~0 0) (= main_~y~0 0))} [154] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13961#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:15,754 INFO L290 TraceCheckUtils]: 8: Hoare triple {13961#(and (= main_~x~0 0) (= main_~y~0 0))} [155] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_811 4294967296)) (.cse1 (= |v_main_#t~post4_191| |v_main_#t~post4_190|)) (.cse2 (= v_main_~y~0_837 v_main_~y~0_836)) (.cse3 (= |v_main_#t~post6_377| |v_main_#t~post6_373|)) (.cse4 (= v_main_~x~0_811 v_main_~x~0_810))) (or (and (< v_main_~y~0_837 v_main_~y~0_836) (= (+ v_main_~x~0_811 v_main_~y~0_836) (+ v_main_~x~0_810 v_main_~y~0_837)) (<= (div (+ (* v_main_~x~0_811 (- 1)) (* (- 1) v_main_~y~0_836) v_main_~y~0_837 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_811 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_191|, main_~y~0=v_main_~y~0_837, main_~x~0=v_main_~x~0_811, main_#t~post6=|v_main_#t~post6_377|} OutVars{main_#t~post4=|v_main_#t~post4_190|, main_~y~0=v_main_~y~0_836, main_~x~0=v_main_~x~0_810, main_#t~post6=|v_main_#t~post6_373|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {13971#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:32:15,755 INFO L290 TraceCheckUtils]: 9: Hoare triple {13971#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [152] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13936#false} is VALID [2022-04-28 03:32:15,755 INFO L272 TraceCheckUtils]: 10: Hoare triple {13936#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13936#false} is VALID [2022-04-28 03:32:15,755 INFO L290 TraceCheckUtils]: 11: Hoare triple {13936#false} ~cond := #in~cond; {13936#false} is VALID [2022-04-28 03:32:15,755 INFO L290 TraceCheckUtils]: 12: Hoare triple {13936#false} assume 0 == ~cond; {13936#false} is VALID [2022-04-28 03:32:15,755 INFO L290 TraceCheckUtils]: 13: Hoare triple {13936#false} assume !false; {13936#false} is VALID [2022-04-28 03:32:15,756 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:15,756 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:32:16,729 INFO L290 TraceCheckUtils]: 13: Hoare triple {13936#false} assume !false; {13936#false} is VALID [2022-04-28 03:32:16,729 INFO L290 TraceCheckUtils]: 12: Hoare triple {13990#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {13936#false} is VALID [2022-04-28 03:32:16,729 INFO L290 TraceCheckUtils]: 11: Hoare triple {13994#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {13990#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:32:16,730 INFO L272 TraceCheckUtils]: 10: Hoare triple {13998#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {13994#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:32:16,730 INFO L290 TraceCheckUtils]: 9: Hoare triple {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [152] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {13998#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:32:16,733 INFO L290 TraceCheckUtils]: 8: Hoare triple {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [155] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_811 4294967296)) (.cse1 (= |v_main_#t~post4_191| |v_main_#t~post4_190|)) (.cse2 (= v_main_~y~0_837 v_main_~y~0_836)) (.cse3 (= |v_main_#t~post6_377| |v_main_#t~post6_373|)) (.cse4 (= v_main_~x~0_811 v_main_~x~0_810))) (or (and (< v_main_~y~0_837 v_main_~y~0_836) (= (+ v_main_~x~0_811 v_main_~y~0_836) (+ v_main_~x~0_810 v_main_~y~0_837)) (<= (div (+ (* v_main_~x~0_811 (- 1)) (* (- 1) v_main_~y~0_836) v_main_~y~0_837 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_811 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_191|, main_~y~0=v_main_~y~0_837, main_~x~0=v_main_~x~0_811, main_#t~post6=|v_main_#t~post6_377|} OutVars{main_#t~post4=|v_main_#t~post4_190|, main_~y~0=v_main_~y~0_836, main_~x~0=v_main_~x~0_810, main_#t~post6=|v_main_#t~post6_373|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:16,734 INFO L290 TraceCheckUtils]: 7: Hoare triple {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [154] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:16,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {14012#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_847_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_847_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_847_32) main_~y~0))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [153] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_809 4294967296))) (let ((.cse2 (= |v_main_#t~post6_374| |v_main_#t~post6_372|)) (.cse3 (= v_main_~x~0_809 v_main_~x~0_808)) (.cse4 (= |v_main_#t~post5_186| |v_main_#t~post5_185|)) (.cse5 (= v_main_~y~0_835 v_main_~y~0_834)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (= (+ v_main_~x~0_809 v_main_~y~0_835) (+ v_main_~x~0_808 v_main_~y~0_834)) .cse0 .cse1 (<= (div (+ (* v_main_~x~0_808 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_809 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_809 v_main_~x~0_808)) (and .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5 (or (not .cse1) (not .cse0)))))) InVars {main_~y~0=v_main_~y~0_835, main_#t~post5=|v_main_#t~post5_186|, main_~x~0=v_main_~x~0_809, main_#t~post6=|v_main_#t~post6_374|} OutVars{main_#t~post5=|v_main_#t~post5_185|, main_~y~0=v_main_~y~0_834, main_~x~0=v_main_~x~0_808, main_#t~post6=|v_main_#t~post6_372|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {14002#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:16,745 INFO L290 TraceCheckUtils]: 5: Hoare triple {13935#true} ~x~0 := 0;~y~0 := 0; {14012#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_847_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_847_32) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_847_32) main_~y~0))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:32:16,745 INFO L272 TraceCheckUtils]: 4: Hoare triple {13935#true} call #t~ret7 := main(); {13935#true} is VALID [2022-04-28 03:32:16,745 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13935#true} {13935#true} #41#return; {13935#true} is VALID [2022-04-28 03:32:16,745 INFO L290 TraceCheckUtils]: 2: Hoare triple {13935#true} assume true; {13935#true} is VALID [2022-04-28 03:32:16,745 INFO L290 TraceCheckUtils]: 1: Hoare triple {13935#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {13935#true} is VALID [2022-04-28 03:32:16,745 INFO L272 TraceCheckUtils]: 0: Hoare triple {13935#true} call ULTIMATE.init(); {13935#true} is VALID [2022-04-28 03:32:16,745 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:16,746 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1853516559] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:32:16,746 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:32:16,746 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:32:18,114 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:32:18,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [564999824] [2022-04-28 03:32:18,114 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [564999824] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:32:18,114 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:32:18,114 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [31] imperfect sequences [] total 31 [2022-04-28 03:32:18,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1461923574] [2022-04-28 03:32:18,114 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:32:18,115 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 95 [2022-04-28 03:32:18,115 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:32:18,115 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:18,161 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:18,162 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-28 03:32:18,162 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:18,162 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-28 03:32:18,162 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=1313, Unknown=0, NotChecked=0, Total=1482 [2022-04-28 03:32:18,162 INFO L87 Difference]: Start difference. First operand 97 states and 99 transitions. Second operand has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:21,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:21,342 INFO L93 Difference]: Finished difference Result 109 states and 113 transitions. [2022-04-28 03:32:21,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-28 03:32:21,343 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 95 [2022-04-28 03:32:21,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:32:21,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:21,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 109 transitions. [2022-04-28 03:32:21,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:21,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 109 transitions. [2022-04-28 03:32:21,344 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 109 transitions. [2022-04-28 03:32:21,439 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:21,440 INFO L225 Difference]: With dead ends: 109 [2022-04-28 03:32:21,440 INFO L226 Difference]: Without dead ends: 101 [2022-04-28 03:32:21,441 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 28 SyntacticMatches, 58 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 922 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=365, Invalid=4057, Unknown=0, NotChecked=0, Total=4422 [2022-04-28 03:32:21,441 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 66 mSDsluCounter, 142 mSDsCounter, 0 mSdLazyCounter, 2549 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 154 SdHoareTripleChecker+Invalid, 2579 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 2549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:32:21,442 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 154 Invalid, 2579 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 2549 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-28 03:32:21,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-04-28 03:32:21,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 100. [2022-04-28 03:32:21,524 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:32:21,524 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:21,524 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:21,524 INFO L87 Difference]: Start difference. First operand 101 states. Second operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:21,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:21,525 INFO L93 Difference]: Finished difference Result 101 states and 103 transitions. [2022-04-28 03:32:21,525 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 103 transitions. [2022-04-28 03:32:21,525 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:21,525 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:21,525 INFO L74 IsIncluded]: Start isIncluded. First operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 101 states. [2022-04-28 03:32:21,526 INFO L87 Difference]: Start difference. First operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 101 states. [2022-04-28 03:32:21,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:21,526 INFO L93 Difference]: Finished difference Result 101 states and 103 transitions. [2022-04-28 03:32:21,526 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 103 transitions. [2022-04-28 03:32:21,527 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:21,527 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:21,527 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:32:21,527 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:32:21,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 95 states have internal predecessors, (98), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:21,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 102 transitions. [2022-04-28 03:32:21,528 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 102 transitions. Word has length 95 [2022-04-28 03:32:21,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:32:21,528 INFO L495 AbstractCegarLoop]: Abstraction has 100 states and 102 transitions. [2022-04-28 03:32:21,528 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 2.935483870967742) internal successors, (91), 30 states have internal predecessors, (91), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:21,528 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 100 states and 102 transitions. [2022-04-28 03:32:21,658 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:21,658 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 102 transitions. [2022-04-28 03:32:21,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2022-04-28 03:32:21,658 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:32:21,658 INFO L195 NwaCegarLoop]: trace histogram [29, 29, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:32:21,677 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Ended with exit code 0 [2022-04-28 03:32:21,871 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,28 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:21,871 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:32:21,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:32:21,872 INFO L85 PathProgramCache]: Analyzing trace with hash -411508211, now seen corresponding path program 28 times [2022-04-28 03:32:21,872 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:21,872 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1830877245] [2022-04-28 03:32:25,198 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:32:25,445 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:25,798 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:25,799 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:32:25,801 INFO L85 PathProgramCache]: Analyzing trace with hash 106464943, now seen corresponding path program 1 times [2022-04-28 03:32:25,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:32:25,801 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020167448] [2022-04-28 03:32:25,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:25,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:32:25,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:25,868 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:32:25,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:25,871 INFO L290 TraceCheckUtils]: 0: Hoare triple {14743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {14736#true} is VALID [2022-04-28 03:32:25,871 INFO L290 TraceCheckUtils]: 1: Hoare triple {14736#true} assume true; {14736#true} is VALID [2022-04-28 03:32:25,871 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14736#true} {14736#true} #41#return; {14736#true} is VALID [2022-04-28 03:32:25,871 INFO L272 TraceCheckUtils]: 0: Hoare triple {14736#true} call ULTIMATE.init(); {14743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:32:25,871 INFO L290 TraceCheckUtils]: 1: Hoare triple {14743#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {14736#true} is VALID [2022-04-28 03:32:25,872 INFO L290 TraceCheckUtils]: 2: Hoare triple {14736#true} assume true; {14736#true} is VALID [2022-04-28 03:32:25,872 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14736#true} {14736#true} #41#return; {14736#true} is VALID [2022-04-28 03:32:25,872 INFO L272 TraceCheckUtils]: 4: Hoare triple {14736#true} call #t~ret7 := main(); {14736#true} is VALID [2022-04-28 03:32:25,872 INFO L290 TraceCheckUtils]: 5: Hoare triple {14736#true} ~x~0 := 0;~y~0 := 0; {14741#(= main_~x~0 0)} is VALID [2022-04-28 03:32:25,872 INFO L290 TraceCheckUtils]: 6: Hoare triple {14741#(= main_~x~0 0)} [157] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_853 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post5_193| |v_main_#t~post5_192|)) (.cse3 (= |v_main_#t~post6_388| |v_main_#t~post6_386|)) (.cse4 (= v_main_~x~0_853 v_main_~x~0_852))) (or (and .cse0 (<= (div (+ (* (- 1) v_main_~y~0_880) v_main_~y~0_879 (* v_main_~x~0_853 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_853 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_853 v_main_~y~0_880) (+ v_main_~x~0_852 v_main_~y~0_879)) (< v_main_~y~0_879 v_main_~y~0_880) .cse1) (and .cse2 (= v_main_~y~0_879 v_main_~y~0_880) (or (not .cse1) (not .cse0)) .cse3 .cse4) (and .cse2 .cse3 .cse4 (= v_main_~y~0_880 v_main_~y~0_879))))) InVars {main_~y~0=v_main_~y~0_880, main_#t~post5=|v_main_#t~post5_193|, main_~x~0=v_main_~x~0_853, main_#t~post6=|v_main_#t~post6_388|} OutVars{main_#t~post5=|v_main_#t~post5_192|, main_~y~0=v_main_~y~0_879, main_~x~0=v_main_~x~0_852, main_#t~post6=|v_main_#t~post6_386|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {14741#(= main_~x~0 0)} is VALID [2022-04-28 03:32:25,873 INFO L290 TraceCheckUtils]: 7: Hoare triple {14741#(= main_~x~0 0)} [158] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14741#(= main_~x~0 0)} is VALID [2022-04-28 03:32:25,873 INFO L290 TraceCheckUtils]: 8: Hoare triple {14741#(= main_~x~0 0)} [159] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_391| |v_main_#t~post6_387|)) (.cse1 (= v_main_~x~0_855 v_main_~x~0_854)) (.cse2 (= |v_main_#t~post4_198| |v_main_#t~post4_197|)) (.cse3 (= v_main_~y~0_882 v_main_~y~0_881)) (.cse4 (mod v_main_~x~0_855 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (<= (div (+ (* v_main_~x~0_854 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_855 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_855 v_main_~x~0_854) (< .cse4 500000) (= (+ v_main_~x~0_854 v_main_~y~0_882) (+ v_main_~x~0_855 v_main_~y~0_881))))) InVars {main_#t~post4=|v_main_#t~post4_198|, main_~y~0=v_main_~y~0_882, main_~x~0=v_main_~x~0_855, main_#t~post6=|v_main_#t~post6_391|} OutVars{main_#t~post4=|v_main_#t~post4_197|, main_~y~0=v_main_~y~0_881, main_~x~0=v_main_~x~0_854, main_#t~post6=|v_main_#t~post6_387|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {14742#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:32:25,874 INFO L290 TraceCheckUtils]: 9: Hoare triple {14742#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [156] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {14737#false} is VALID [2022-04-28 03:32:25,874 INFO L272 TraceCheckUtils]: 10: Hoare triple {14737#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {14737#false} is VALID [2022-04-28 03:32:25,874 INFO L290 TraceCheckUtils]: 11: Hoare triple {14737#false} ~cond := #in~cond; {14737#false} is VALID [2022-04-28 03:32:25,874 INFO L290 TraceCheckUtils]: 12: Hoare triple {14737#false} assume 0 == ~cond; {14737#false} is VALID [2022-04-28 03:32:25,874 INFO L290 TraceCheckUtils]: 13: Hoare triple {14737#false} assume !false; {14737#false} is VALID [2022-04-28 03:32:25,874 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:25,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:32:25,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1020167448] [2022-04-28 03:32:25,875 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1020167448] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:32:25,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1880265426] [2022-04-28 03:32:25,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:25,875 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:25,875 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:32:25,876 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:32:25,877 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-04-28 03:32:25,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:25,901 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:32:25,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:25,907 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:32:26,026 INFO L272 TraceCheckUtils]: 0: Hoare triple {14736#true} call ULTIMATE.init(); {14736#true} is VALID [2022-04-28 03:32:26,026 INFO L290 TraceCheckUtils]: 1: Hoare triple {14736#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {14736#true} is VALID [2022-04-28 03:32:26,027 INFO L290 TraceCheckUtils]: 2: Hoare triple {14736#true} assume true; {14736#true} is VALID [2022-04-28 03:32:26,027 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14736#true} {14736#true} #41#return; {14736#true} is VALID [2022-04-28 03:32:26,027 INFO L272 TraceCheckUtils]: 4: Hoare triple {14736#true} call #t~ret7 := main(); {14736#true} is VALID [2022-04-28 03:32:26,028 INFO L290 TraceCheckUtils]: 5: Hoare triple {14736#true} ~x~0 := 0;~y~0 := 0; {14762#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:26,028 INFO L290 TraceCheckUtils]: 6: Hoare triple {14762#(and (= main_~x~0 0) (= main_~y~0 0))} [157] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_853 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post5_193| |v_main_#t~post5_192|)) (.cse3 (= |v_main_#t~post6_388| |v_main_#t~post6_386|)) (.cse4 (= v_main_~x~0_853 v_main_~x~0_852))) (or (and .cse0 (<= (div (+ (* (- 1) v_main_~y~0_880) v_main_~y~0_879 (* v_main_~x~0_853 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_853 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_853 v_main_~y~0_880) (+ v_main_~x~0_852 v_main_~y~0_879)) (< v_main_~y~0_879 v_main_~y~0_880) .cse1) (and .cse2 (= v_main_~y~0_879 v_main_~y~0_880) (or (not .cse1) (not .cse0)) .cse3 .cse4) (and .cse2 .cse3 .cse4 (= v_main_~y~0_880 v_main_~y~0_879))))) InVars {main_~y~0=v_main_~y~0_880, main_#t~post5=|v_main_#t~post5_193|, main_~x~0=v_main_~x~0_853, main_#t~post6=|v_main_#t~post6_388|} OutVars{main_#t~post5=|v_main_#t~post5_192|, main_~y~0=v_main_~y~0_879, main_~x~0=v_main_~x~0_852, main_#t~post6=|v_main_#t~post6_386|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {14762#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:26,028 INFO L290 TraceCheckUtils]: 7: Hoare triple {14762#(and (= main_~x~0 0) (= main_~y~0 0))} [158] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14762#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:26,029 INFO L290 TraceCheckUtils]: 8: Hoare triple {14762#(and (= main_~x~0 0) (= main_~y~0 0))} [159] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_391| |v_main_#t~post6_387|)) (.cse1 (= v_main_~x~0_855 v_main_~x~0_854)) (.cse2 (= |v_main_#t~post4_198| |v_main_#t~post4_197|)) (.cse3 (= v_main_~y~0_882 v_main_~y~0_881)) (.cse4 (mod v_main_~x~0_855 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (<= (div (+ (* v_main_~x~0_854 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_855 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_855 v_main_~x~0_854) (< .cse4 500000) (= (+ v_main_~x~0_854 v_main_~y~0_882) (+ v_main_~x~0_855 v_main_~y~0_881))))) InVars {main_#t~post4=|v_main_#t~post4_198|, main_~y~0=v_main_~y~0_882, main_~x~0=v_main_~x~0_855, main_#t~post6=|v_main_#t~post6_391|} OutVars{main_#t~post4=|v_main_#t~post4_197|, main_~y~0=v_main_~y~0_881, main_~x~0=v_main_~x~0_854, main_#t~post6=|v_main_#t~post6_387|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {14772#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:32:26,030 INFO L290 TraceCheckUtils]: 9: Hoare triple {14772#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [156] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {14737#false} is VALID [2022-04-28 03:32:26,030 INFO L272 TraceCheckUtils]: 10: Hoare triple {14737#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {14737#false} is VALID [2022-04-28 03:32:26,030 INFO L290 TraceCheckUtils]: 11: Hoare triple {14737#false} ~cond := #in~cond; {14737#false} is VALID [2022-04-28 03:32:26,030 INFO L290 TraceCheckUtils]: 12: Hoare triple {14737#false} assume 0 == ~cond; {14737#false} is VALID [2022-04-28 03:32:26,030 INFO L290 TraceCheckUtils]: 13: Hoare triple {14737#false} assume !false; {14737#false} is VALID [2022-04-28 03:32:26,030 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:26,030 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:32:26,876 INFO L290 TraceCheckUtils]: 13: Hoare triple {14737#false} assume !false; {14737#false} is VALID [2022-04-28 03:32:26,877 INFO L290 TraceCheckUtils]: 12: Hoare triple {14791#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {14737#false} is VALID [2022-04-28 03:32:26,877 INFO L290 TraceCheckUtils]: 11: Hoare triple {14795#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {14791#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:32:26,877 INFO L272 TraceCheckUtils]: 10: Hoare triple {14799#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {14795#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:32:26,878 INFO L290 TraceCheckUtils]: 9: Hoare triple {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [156] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {14799#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:32:26,939 INFO L290 TraceCheckUtils]: 8: Hoare triple {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [159] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_391| |v_main_#t~post6_387|)) (.cse1 (= v_main_~x~0_855 v_main_~x~0_854)) (.cse2 (= |v_main_#t~post4_198| |v_main_#t~post4_197|)) (.cse3 (= v_main_~y~0_882 v_main_~y~0_881)) (.cse4 (mod v_main_~x~0_855 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (<= (div (+ (* v_main_~x~0_854 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_855 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_855 v_main_~x~0_854) (< .cse4 500000) (= (+ v_main_~x~0_854 v_main_~y~0_882) (+ v_main_~x~0_855 v_main_~y~0_881))))) InVars {main_#t~post4=|v_main_#t~post4_198|, main_~y~0=v_main_~y~0_882, main_~x~0=v_main_~x~0_855, main_#t~post6=|v_main_#t~post6_391|} OutVars{main_#t~post4=|v_main_#t~post4_197|, main_~y~0=v_main_~y~0_881, main_~x~0=v_main_~x~0_854, main_#t~post6=|v_main_#t~post6_387|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:26,940 INFO L290 TraceCheckUtils]: 7: Hoare triple {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [158] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:26,964 INFO L290 TraceCheckUtils]: 6: Hoare triple {14813#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_892_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_892_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_892_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [157] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_853 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post5_193| |v_main_#t~post5_192|)) (.cse3 (= |v_main_#t~post6_388| |v_main_#t~post6_386|)) (.cse4 (= v_main_~x~0_853 v_main_~x~0_852))) (or (and .cse0 (<= (div (+ (* (- 1) v_main_~y~0_880) v_main_~y~0_879 (* v_main_~x~0_853 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_853 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_853 v_main_~y~0_880) (+ v_main_~x~0_852 v_main_~y~0_879)) (< v_main_~y~0_879 v_main_~y~0_880) .cse1) (and .cse2 (= v_main_~y~0_879 v_main_~y~0_880) (or (not .cse1) (not .cse0)) .cse3 .cse4) (and .cse2 .cse3 .cse4 (= v_main_~y~0_880 v_main_~y~0_879))))) InVars {main_~y~0=v_main_~y~0_880, main_#t~post5=|v_main_#t~post5_193|, main_~x~0=v_main_~x~0_853, main_#t~post6=|v_main_#t~post6_388|} OutVars{main_#t~post5=|v_main_#t~post5_192|, main_~y~0=v_main_~y~0_879, main_~x~0=v_main_~x~0_852, main_#t~post6=|v_main_#t~post6_386|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {14803#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:26,964 INFO L290 TraceCheckUtils]: 5: Hoare triple {14736#true} ~x~0 := 0;~y~0 := 0; {14813#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_892_32 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_892_32) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_892_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:32:26,965 INFO L272 TraceCheckUtils]: 4: Hoare triple {14736#true} call #t~ret7 := main(); {14736#true} is VALID [2022-04-28 03:32:26,965 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14736#true} {14736#true} #41#return; {14736#true} is VALID [2022-04-28 03:32:26,965 INFO L290 TraceCheckUtils]: 2: Hoare triple {14736#true} assume true; {14736#true} is VALID [2022-04-28 03:32:26,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {14736#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {14736#true} is VALID [2022-04-28 03:32:26,965 INFO L272 TraceCheckUtils]: 0: Hoare triple {14736#true} call ULTIMATE.init(); {14736#true} is VALID [2022-04-28 03:32:26,965 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:26,965 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1880265426] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:32:26,965 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:32:26,965 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:32:28,153 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:32:28,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1830877245] [2022-04-28 03:32:28,153 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1830877245] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:32:28,153 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:32:28,153 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [32] imperfect sequences [] total 32 [2022-04-28 03:32:28,153 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922156381] [2022-04-28 03:32:28,153 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:32:28,154 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 98 [2022-04-28 03:32:28,154 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:32:28,154 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:28,197 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:28,197 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-28 03:32:28,197 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:28,197 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-28 03:32:28,198 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1386, Unknown=0, NotChecked=0, Total=1560 [2022-04-28 03:32:28,198 INFO L87 Difference]: Start difference. First operand 100 states and 102 transitions. Second operand has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:31,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:31,156 INFO L93 Difference]: Finished difference Result 112 states and 116 transitions. [2022-04-28 03:32:31,156 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-04-28 03:32:31,156 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 98 [2022-04-28 03:32:31,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:32:31,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:31,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 112 transitions. [2022-04-28 03:32:31,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:31,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 112 transitions. [2022-04-28 03:32:31,158 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 32 states and 112 transitions. [2022-04-28 03:32:31,212 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:31,213 INFO L225 Difference]: With dead ends: 112 [2022-04-28 03:32:31,213 INFO L226 Difference]: Without dead ends: 104 [2022-04-28 03:32:31,215 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 28 SyntacticMatches, 60 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 969 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=377, Invalid=4315, Unknown=0, NotChecked=0, Total=4692 [2022-04-28 03:32:31,216 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 68 mSDsluCounter, 147 mSDsCounter, 0 mSdLazyCounter, 2727 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 159 SdHoareTripleChecker+Invalid, 2758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 2727 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:32:31,216 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [68 Valid, 159 Invalid, 2758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 2727 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-28 03:32:31,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2022-04-28 03:32:31,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 103. [2022-04-28 03:32:31,329 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:32:31,329 INFO L82 GeneralOperation]: Start isEquivalent. First operand 104 states. Second operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:31,329 INFO L74 IsIncluded]: Start isIncluded. First operand 104 states. Second operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:31,330 INFO L87 Difference]: Start difference. First operand 104 states. Second operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:31,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:31,331 INFO L93 Difference]: Finished difference Result 104 states and 106 transitions. [2022-04-28 03:32:31,331 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2022-04-28 03:32:31,331 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:31,331 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:31,331 INFO L74 IsIncluded]: Start isIncluded. First operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 104 states. [2022-04-28 03:32:31,331 INFO L87 Difference]: Start difference. First operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 104 states. [2022-04-28 03:32:31,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:31,332 INFO L93 Difference]: Finished difference Result 104 states and 106 transitions. [2022-04-28 03:32:31,332 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2022-04-28 03:32:31,332 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:31,332 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:31,332 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:32:31,332 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:32:31,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 98 states have (on average 1.030612244897959) internal successors, (101), 98 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:31,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 105 transitions. [2022-04-28 03:32:31,333 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 105 transitions. Word has length 98 [2022-04-28 03:32:31,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:32:31,333 INFO L495 AbstractCegarLoop]: Abstraction has 103 states and 105 transitions. [2022-04-28 03:32:31,334 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 2.9375) internal successors, (94), 31 states have internal predecessors, (94), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:31,334 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 103 states and 105 transitions. [2022-04-28 03:32:31,452 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:31,452 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 105 transitions. [2022-04-28 03:32:31,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2022-04-28 03:32:31,453 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:32:31,453 INFO L195 NwaCegarLoop]: trace histogram [30, 30, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:32:31,470 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Ended with exit code 0 [2022-04-28 03:32:31,667 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,29 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:31,667 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:32:31,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:32:31,667 INFO L85 PathProgramCache]: Analyzing trace with hash -946590395, now seen corresponding path program 29 times [2022-04-28 03:32:31,667 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:31,667 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [325383134] [2022-04-28 03:32:33,274 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:33,700 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:33,701 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:32:33,703 INFO L85 PathProgramCache]: Analyzing trace with hash -2138970193, now seen corresponding path program 1 times [2022-04-28 03:32:33,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:32:33,703 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11846704] [2022-04-28 03:32:33,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:33,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:32:33,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:33,774 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:32:33,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:33,777 INFO L290 TraceCheckUtils]: 0: Hoare triple {15565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {15558#true} is VALID [2022-04-28 03:32:33,777 INFO L290 TraceCheckUtils]: 1: Hoare triple {15558#true} assume true; {15558#true} is VALID [2022-04-28 03:32:33,777 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15558#true} {15558#true} #41#return; {15558#true} is VALID [2022-04-28 03:32:33,778 INFO L272 TraceCheckUtils]: 0: Hoare triple {15558#true} call ULTIMATE.init(); {15565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:32:33,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {15565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {15558#true} is VALID [2022-04-28 03:32:33,778 INFO L290 TraceCheckUtils]: 2: Hoare triple {15558#true} assume true; {15558#true} is VALID [2022-04-28 03:32:33,778 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15558#true} {15558#true} #41#return; {15558#true} is VALID [2022-04-28 03:32:33,778 INFO L272 TraceCheckUtils]: 4: Hoare triple {15558#true} call #t~ret7 := main(); {15558#true} is VALID [2022-04-28 03:32:33,778 INFO L290 TraceCheckUtils]: 5: Hoare triple {15558#true} ~x~0 := 0;~y~0 := 0; {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:33,779 INFO L290 TraceCheckUtils]: 6: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [161] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_898 4294967296))) (let ((.cse0 (= v_main_~x~0_898 v_main_~x~0_897)) (.cse1 (= v_main_~y~0_926 v_main_~y~0_925)) (.cse2 (= |v_main_#t~post6_402| |v_main_#t~post6_400|)) (.cse3 (= |v_main_#t~post5_200| |v_main_#t~post5_199|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (= (+ v_main_~x~0_897 v_main_~y~0_925) (+ v_main_~x~0_898 v_main_~y~0_926)) .cse4 .cse5 (<= (div (+ v_main_~y~0_925 (* v_main_~x~0_898 (- 1)) 1000000 (* (- 1) v_main_~y~0_926)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_898 (- 4294967295)) 4294967296))) (< v_main_~y~0_925 v_main_~y~0_926))))) InVars {main_~y~0=v_main_~y~0_926, main_#t~post5=|v_main_#t~post5_200|, main_~x~0=v_main_~x~0_898, main_#t~post6=|v_main_#t~post6_402|} OutVars{main_#t~post5=|v_main_#t~post5_199|, main_~y~0=v_main_~y~0_925, main_~x~0=v_main_~x~0_897, main_#t~post6=|v_main_#t~post6_400|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:33,779 INFO L290 TraceCheckUtils]: 7: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [162] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:33,780 INFO L290 TraceCheckUtils]: 8: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [163] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_900 v_main_~x~0_899)) (.cse2 (= |v_main_#t~post4_205| |v_main_#t~post4_204|)) (.cse0 (mod v_main_~x~0_900 4294967296)) (.cse3 (= v_main_~y~0_928 v_main_~y~0_927)) (.cse4 (= |v_main_#t~post6_405| |v_main_#t~post6_401|))) (or (and (= (+ v_main_~x~0_900 v_main_~y~0_927) (+ v_main_~x~0_899 v_main_~y~0_928)) (<= (div (+ 500000 (* v_main_~x~0_899 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_900 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_900 v_main_~x~0_899)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_205|, main_~y~0=v_main_~y~0_928, main_~x~0=v_main_~x~0_900, main_#t~post6=|v_main_#t~post6_405|} OutVars{main_#t~post4=|v_main_#t~post4_204|, main_~y~0=v_main_~y~0_927, main_~x~0=v_main_~x~0_899, main_#t~post6=|v_main_#t~post6_401|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {15564#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:32:33,781 INFO L290 TraceCheckUtils]: 9: Hoare triple {15564#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [160] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {15559#false} is VALID [2022-04-28 03:32:33,781 INFO L272 TraceCheckUtils]: 10: Hoare triple {15559#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {15559#false} is VALID [2022-04-28 03:32:33,781 INFO L290 TraceCheckUtils]: 11: Hoare triple {15559#false} ~cond := #in~cond; {15559#false} is VALID [2022-04-28 03:32:33,781 INFO L290 TraceCheckUtils]: 12: Hoare triple {15559#false} assume 0 == ~cond; {15559#false} is VALID [2022-04-28 03:32:33,781 INFO L290 TraceCheckUtils]: 13: Hoare triple {15559#false} assume !false; {15559#false} is VALID [2022-04-28 03:32:33,781 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:33,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:32:33,781 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [11846704] [2022-04-28 03:32:33,781 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [11846704] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:32:33,781 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [172300250] [2022-04-28 03:32:33,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:33,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:33,782 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:32:33,782 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:32:33,783 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-04-28 03:32:33,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:33,809 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:32:33,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:33,815 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:32:33,979 INFO L272 TraceCheckUtils]: 0: Hoare triple {15558#true} call ULTIMATE.init(); {15558#true} is VALID [2022-04-28 03:32:33,980 INFO L290 TraceCheckUtils]: 1: Hoare triple {15558#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {15558#true} is VALID [2022-04-28 03:32:33,980 INFO L290 TraceCheckUtils]: 2: Hoare triple {15558#true} assume true; {15558#true} is VALID [2022-04-28 03:32:33,980 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15558#true} {15558#true} #41#return; {15558#true} is VALID [2022-04-28 03:32:33,980 INFO L272 TraceCheckUtils]: 4: Hoare triple {15558#true} call #t~ret7 := main(); {15558#true} is VALID [2022-04-28 03:32:33,980 INFO L290 TraceCheckUtils]: 5: Hoare triple {15558#true} ~x~0 := 0;~y~0 := 0; {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:33,981 INFO L290 TraceCheckUtils]: 6: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [161] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_898 4294967296))) (let ((.cse0 (= v_main_~x~0_898 v_main_~x~0_897)) (.cse1 (= v_main_~y~0_926 v_main_~y~0_925)) (.cse2 (= |v_main_#t~post6_402| |v_main_#t~post6_400|)) (.cse3 (= |v_main_#t~post5_200| |v_main_#t~post5_199|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (= (+ v_main_~x~0_897 v_main_~y~0_925) (+ v_main_~x~0_898 v_main_~y~0_926)) .cse4 .cse5 (<= (div (+ v_main_~y~0_925 (* v_main_~x~0_898 (- 1)) 1000000 (* (- 1) v_main_~y~0_926)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_898 (- 4294967295)) 4294967296))) (< v_main_~y~0_925 v_main_~y~0_926))))) InVars {main_~y~0=v_main_~y~0_926, main_#t~post5=|v_main_#t~post5_200|, main_~x~0=v_main_~x~0_898, main_#t~post6=|v_main_#t~post6_402|} OutVars{main_#t~post5=|v_main_#t~post5_199|, main_~y~0=v_main_~y~0_925, main_~x~0=v_main_~x~0_897, main_#t~post6=|v_main_#t~post6_400|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:33,981 INFO L290 TraceCheckUtils]: 7: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [162] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15563#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:33,982 INFO L290 TraceCheckUtils]: 8: Hoare triple {15563#(and (= main_~x~0 0) (= main_~y~0 0))} [163] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_900 v_main_~x~0_899)) (.cse2 (= |v_main_#t~post4_205| |v_main_#t~post4_204|)) (.cse0 (mod v_main_~x~0_900 4294967296)) (.cse3 (= v_main_~y~0_928 v_main_~y~0_927)) (.cse4 (= |v_main_#t~post6_405| |v_main_#t~post6_401|))) (or (and (= (+ v_main_~x~0_900 v_main_~y~0_927) (+ v_main_~x~0_899 v_main_~y~0_928)) (<= (div (+ 500000 (* v_main_~x~0_899 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_900 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_900 v_main_~x~0_899)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_205|, main_~y~0=v_main_~y~0_928, main_~x~0=v_main_~x~0_900, main_#t~post6=|v_main_#t~post6_405|} OutVars{main_#t~post4=|v_main_#t~post4_204|, main_~y~0=v_main_~y~0_927, main_~x~0=v_main_~x~0_899, main_#t~post6=|v_main_#t~post6_401|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {15593#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:32:33,983 INFO L290 TraceCheckUtils]: 9: Hoare triple {15593#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [160] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {15559#false} is VALID [2022-04-28 03:32:33,983 INFO L272 TraceCheckUtils]: 10: Hoare triple {15559#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {15559#false} is VALID [2022-04-28 03:32:33,983 INFO L290 TraceCheckUtils]: 11: Hoare triple {15559#false} ~cond := #in~cond; {15559#false} is VALID [2022-04-28 03:32:33,983 INFO L290 TraceCheckUtils]: 12: Hoare triple {15559#false} assume 0 == ~cond; {15559#false} is VALID [2022-04-28 03:32:33,983 INFO L290 TraceCheckUtils]: 13: Hoare triple {15559#false} assume !false; {15559#false} is VALID [2022-04-28 03:32:33,984 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:33,984 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:32:34,884 INFO L290 TraceCheckUtils]: 13: Hoare triple {15559#false} assume !false; {15559#false} is VALID [2022-04-28 03:32:34,884 INFO L290 TraceCheckUtils]: 12: Hoare triple {15612#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {15559#false} is VALID [2022-04-28 03:32:34,885 INFO L290 TraceCheckUtils]: 11: Hoare triple {15616#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {15612#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:32:34,885 INFO L272 TraceCheckUtils]: 10: Hoare triple {15620#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {15616#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:32:34,886 INFO L290 TraceCheckUtils]: 9: Hoare triple {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [160] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {15620#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:32:35,287 INFO L290 TraceCheckUtils]: 8: Hoare triple {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [163] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_900 v_main_~x~0_899)) (.cse2 (= |v_main_#t~post4_205| |v_main_#t~post4_204|)) (.cse0 (mod v_main_~x~0_900 4294967296)) (.cse3 (= v_main_~y~0_928 v_main_~y~0_927)) (.cse4 (= |v_main_#t~post6_405| |v_main_#t~post6_401|))) (or (and (= (+ v_main_~x~0_900 v_main_~y~0_927) (+ v_main_~x~0_899 v_main_~y~0_928)) (<= (div (+ 500000 (* v_main_~x~0_899 (- 1))) (- 4294967296)) (+ (div (+ v_main_~x~0_900 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_900 v_main_~x~0_899)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_205|, main_~y~0=v_main_~y~0_928, main_~x~0=v_main_~x~0_900, main_#t~post6=|v_main_#t~post6_405|} OutVars{main_#t~post4=|v_main_#t~post4_204|, main_~y~0=v_main_~y~0_927, main_~x~0=v_main_~x~0_899, main_#t~post6=|v_main_#t~post6_401|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:35,287 INFO L290 TraceCheckUtils]: 7: Hoare triple {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [162] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:35,335 INFO L290 TraceCheckUtils]: 6: Hoare triple {15634#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_938_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_938_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_938_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [161] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_898 4294967296))) (let ((.cse0 (= v_main_~x~0_898 v_main_~x~0_897)) (.cse1 (= v_main_~y~0_926 v_main_~y~0_925)) (.cse2 (= |v_main_#t~post6_402| |v_main_#t~post6_400|)) (.cse3 (= |v_main_#t~post5_200| |v_main_#t~post5_199|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (= (+ v_main_~x~0_897 v_main_~y~0_925) (+ v_main_~x~0_898 v_main_~y~0_926)) .cse4 .cse5 (<= (div (+ v_main_~y~0_925 (* v_main_~x~0_898 (- 1)) 1000000 (* (- 1) v_main_~y~0_926)) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_898 (- 4294967295)) 4294967296))) (< v_main_~y~0_925 v_main_~y~0_926))))) InVars {main_~y~0=v_main_~y~0_926, main_#t~post5=|v_main_#t~post5_200|, main_~x~0=v_main_~x~0_898, main_#t~post6=|v_main_#t~post6_402|} OutVars{main_#t~post5=|v_main_#t~post5_199|, main_~y~0=v_main_~y~0_925, main_~x~0=v_main_~x~0_897, main_#t~post6=|v_main_#t~post6_400|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {15624#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:35,336 INFO L290 TraceCheckUtils]: 5: Hoare triple {15558#true} ~x~0 := 0;~y~0 := 0; {15634#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_938_32 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_938_32) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_938_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:32:35,336 INFO L272 TraceCheckUtils]: 4: Hoare triple {15558#true} call #t~ret7 := main(); {15558#true} is VALID [2022-04-28 03:32:35,336 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15558#true} {15558#true} #41#return; {15558#true} is VALID [2022-04-28 03:32:35,337 INFO L290 TraceCheckUtils]: 2: Hoare triple {15558#true} assume true; {15558#true} is VALID [2022-04-28 03:32:35,337 INFO L290 TraceCheckUtils]: 1: Hoare triple {15558#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {15558#true} is VALID [2022-04-28 03:32:35,337 INFO L272 TraceCheckUtils]: 0: Hoare triple {15558#true} call ULTIMATE.init(); {15558#true} is VALID [2022-04-28 03:32:35,337 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:35,337 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [172300250] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:32:35,337 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:32:35,337 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-28 03:32:37,928 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:32:37,928 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [325383134] [2022-04-28 03:32:37,928 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [325383134] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:32:37,928 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:32:37,928 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [62] imperfect sequences [] total 62 [2022-04-28 03:32:37,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036965991] [2022-04-28 03:32:37,928 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:32:37,929 INFO L78 Accepts]: Start accepts. Automaton has has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 101 [2022-04-28 03:32:37,929 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:32:37,929 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:37,986 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:37,986 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 62 states [2022-04-28 03:32:37,986 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:37,987 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2022-04-28 03:32:37,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=405, Invalid=4287, Unknown=0, NotChecked=0, Total=4692 [2022-04-28 03:32:37,988 INFO L87 Difference]: Start difference. First operand 103 states and 105 transitions. Second operand has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:44,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:44,223 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2022-04-28 03:32:44,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2022-04-28 03:32:44,223 INFO L78 Accepts]: Start accepts. Automaton has has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 101 [2022-04-28 03:32:44,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:32:44,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:44,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 114 transitions. [2022-04-28 03:32:44,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:44,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 114 transitions. [2022-04-28 03:32:44,232 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 62 states and 114 transitions. [2022-04-28 03:32:44,291 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:44,292 INFO L225 Difference]: With dead ends: 114 [2022-04-28 03:32:44,293 INFO L226 Difference]: Without dead ends: 106 [2022-04-28 03:32:44,298 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 30 SyntacticMatches, 32 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3471 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=906, Invalid=15350, Unknown=0, NotChecked=0, Total=16256 [2022-04-28 03:32:44,299 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 39 mSDsluCounter, 297 mSDsCounter, 0 mSdLazyCounter, 5665 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 309 SdHoareTripleChecker+Invalid, 5726 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 5665 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:32:44,299 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 309 Invalid, 5726 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 5665 Invalid, 0 Unknown, 0 Unchecked, 3.0s Time] [2022-04-28 03:32:44,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-04-28 03:32:44,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2022-04-28 03:32:44,397 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:32:44,398 INFO L82 GeneralOperation]: Start isEquivalent. First operand 106 states. Second operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:44,398 INFO L74 IsIncluded]: Start isIncluded. First operand 106 states. Second operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:44,398 INFO L87 Difference]: Start difference. First operand 106 states. Second operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:44,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:44,399 INFO L93 Difference]: Finished difference Result 106 states and 108 transitions. [2022-04-28 03:32:44,399 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2022-04-28 03:32:44,406 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:44,406 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:44,406 INFO L74 IsIncluded]: Start isIncluded. First operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-28 03:32:44,406 INFO L87 Difference]: Start difference. First operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-28 03:32:44,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:44,407 INFO L93 Difference]: Finished difference Result 106 states and 108 transitions. [2022-04-28 03:32:44,407 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2022-04-28 03:32:44,423 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:44,423 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:44,423 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:32:44,423 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:32:44,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 101 states have (on average 1.0297029702970297) internal successors, (104), 101 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:44,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 108 transitions. [2022-04-28 03:32:44,425 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 108 transitions. Word has length 101 [2022-04-28 03:32:44,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:32:44,425 INFO L495 AbstractCegarLoop]: Abstraction has 106 states and 108 transitions. [2022-04-28 03:32:44,425 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 62 states, 62 states have (on average 1.564516129032258) internal successors, (97), 61 states have internal predecessors, (97), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:44,425 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 106 states and 108 transitions. [2022-04-28 03:32:44,540 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:44,541 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2022-04-28 03:32:44,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-04-28 03:32:44,541 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:32:44,541 INFO L195 NwaCegarLoop]: trace histogram [31, 31, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:32:44,560 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2022-04-28 03:32:44,758 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,30 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:44,758 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:32:44,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:32:44,758 INFO L85 PathProgramCache]: Analyzing trace with hash 1338668813, now seen corresponding path program 30 times [2022-04-28 03:32:44,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:44,758 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1500601058] [2022-04-28 03:32:46,430 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:47,156 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:47,157 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:32:47,159 INFO L85 PathProgramCache]: Analyzing trace with hash -89438033, now seen corresponding path program 1 times [2022-04-28 03:32:47,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:32:47,159 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1688888555] [2022-04-28 03:32:47,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:47,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:32:47,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:47,219 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:32:47,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:47,221 INFO L290 TraceCheckUtils]: 0: Hoare triple {16490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {16483#true} is VALID [2022-04-28 03:32:47,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {16483#true} assume true; {16483#true} is VALID [2022-04-28 03:32:47,222 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16483#true} {16483#true} #41#return; {16483#true} is VALID [2022-04-28 03:32:47,222 INFO L272 TraceCheckUtils]: 0: Hoare triple {16483#true} call ULTIMATE.init(); {16490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:32:47,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {16490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {16483#true} is VALID [2022-04-28 03:32:47,222 INFO L290 TraceCheckUtils]: 2: Hoare triple {16483#true} assume true; {16483#true} is VALID [2022-04-28 03:32:47,222 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16483#true} {16483#true} #41#return; {16483#true} is VALID [2022-04-28 03:32:47,222 INFO L272 TraceCheckUtils]: 4: Hoare triple {16483#true} call #t~ret7 := main(); {16483#true} is VALID [2022-04-28 03:32:47,223 INFO L290 TraceCheckUtils]: 5: Hoare triple {16483#true} ~x~0 := 0;~y~0 := 0; {16488#(= main_~x~0 0)} is VALID [2022-04-28 03:32:47,223 INFO L290 TraceCheckUtils]: 6: Hoare triple {16488#(= main_~x~0 0)} [165] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_944 4294967296))) (let ((.cse0 (= v_main_~x~0_944 v_main_~x~0_943)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse1 (= v_main_~y~0_973 v_main_~y~0_972)) (.cse2 (= |v_main_#t~post5_207| |v_main_#t~post5_206|))) (or (and (= |v_main_#t~post6_416| |v_main_#t~post6_414|) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_943 v_main_~y~0_972) (+ v_main_~x~0_944 v_main_~y~0_973)) (<= (div (+ v_main_~y~0_972 (* (- 1) v_main_~y~0_973) (* v_main_~x~0_944 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_944 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~y~0_972 v_main_~y~0_973) .cse4) (and .cse0 (or (not .cse4) (not .cse3)) .cse1 (= |v_main_#t~post6_414| |v_main_#t~post6_416|) .cse2)))) InVars {main_~y~0=v_main_~y~0_973, main_#t~post5=|v_main_#t~post5_207|, main_~x~0=v_main_~x~0_944, main_#t~post6=|v_main_#t~post6_416|} OutVars{main_#t~post5=|v_main_#t~post5_206|, main_~y~0=v_main_~y~0_972, main_~x~0=v_main_~x~0_943, main_#t~post6=|v_main_#t~post6_414|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {16488#(= main_~x~0 0)} is VALID [2022-04-28 03:32:47,224 INFO L290 TraceCheckUtils]: 7: Hoare triple {16488#(= main_~x~0 0)} [166] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16488#(= main_~x~0 0)} is VALID [2022-04-28 03:32:47,225 INFO L290 TraceCheckUtils]: 8: Hoare triple {16488#(= main_~x~0 0)} [167] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_975 v_main_~y~0_974)) (.cse1 (= |v_main_#t~post4_212| |v_main_#t~post4_211|)) (.cse3 (= v_main_~x~0_946 v_main_~x~0_945)) (.cse2 (mod v_main_~x~0_946 4294967296))) (or (and .cse0 (= |v_main_#t~post6_415| |v_main_#t~post6_419|) .cse1 (<= 500000 .cse2) .cse3) (and .cse0 .cse1 .cse3 (= |v_main_#t~post6_419| |v_main_#t~post6_415|)) (and (= (+ v_main_~x~0_946 v_main_~y~0_974) (+ v_main_~x~0_945 v_main_~y~0_975)) (< v_main_~x~0_946 v_main_~x~0_945) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_945 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_946 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_212|, main_~y~0=v_main_~y~0_975, main_~x~0=v_main_~x~0_946, main_#t~post6=|v_main_#t~post6_419|} OutVars{main_#t~post4=|v_main_#t~post4_211|, main_~y~0=v_main_~y~0_974, main_~x~0=v_main_~x~0_945, main_#t~post6=|v_main_#t~post6_415|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {16489#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:32:47,225 INFO L290 TraceCheckUtils]: 9: Hoare triple {16489#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [164] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {16484#false} is VALID [2022-04-28 03:32:47,225 INFO L272 TraceCheckUtils]: 10: Hoare triple {16484#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {16484#false} is VALID [2022-04-28 03:32:47,225 INFO L290 TraceCheckUtils]: 11: Hoare triple {16484#false} ~cond := #in~cond; {16484#false} is VALID [2022-04-28 03:32:47,225 INFO L290 TraceCheckUtils]: 12: Hoare triple {16484#false} assume 0 == ~cond; {16484#false} is VALID [2022-04-28 03:32:47,225 INFO L290 TraceCheckUtils]: 13: Hoare triple {16484#false} assume !false; {16484#false} is VALID [2022-04-28 03:32:47,226 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:47,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:32:47,226 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1688888555] [2022-04-28 03:32:47,226 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1688888555] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:32:47,226 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [683877318] [2022-04-28 03:32:47,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:47,226 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:47,226 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:32:47,227 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:32:47,266 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-04-28 03:32:47,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:47,272 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:32:47,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:47,280 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:32:47,455 INFO L272 TraceCheckUtils]: 0: Hoare triple {16483#true} call ULTIMATE.init(); {16483#true} is VALID [2022-04-28 03:32:47,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {16483#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {16483#true} is VALID [2022-04-28 03:32:47,456 INFO L290 TraceCheckUtils]: 2: Hoare triple {16483#true} assume true; {16483#true} is VALID [2022-04-28 03:32:47,456 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16483#true} {16483#true} #41#return; {16483#true} is VALID [2022-04-28 03:32:47,456 INFO L272 TraceCheckUtils]: 4: Hoare triple {16483#true} call #t~ret7 := main(); {16483#true} is VALID [2022-04-28 03:32:47,456 INFO L290 TraceCheckUtils]: 5: Hoare triple {16483#true} ~x~0 := 0;~y~0 := 0; {16509#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:47,457 INFO L290 TraceCheckUtils]: 6: Hoare triple {16509#(and (= main_~x~0 0) (= main_~y~0 0))} [165] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_944 4294967296))) (let ((.cse0 (= v_main_~x~0_944 v_main_~x~0_943)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse1 (= v_main_~y~0_973 v_main_~y~0_972)) (.cse2 (= |v_main_#t~post5_207| |v_main_#t~post5_206|))) (or (and (= |v_main_#t~post6_416| |v_main_#t~post6_414|) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_943 v_main_~y~0_972) (+ v_main_~x~0_944 v_main_~y~0_973)) (<= (div (+ v_main_~y~0_972 (* (- 1) v_main_~y~0_973) (* v_main_~x~0_944 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_944 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~y~0_972 v_main_~y~0_973) .cse4) (and .cse0 (or (not .cse4) (not .cse3)) .cse1 (= |v_main_#t~post6_414| |v_main_#t~post6_416|) .cse2)))) InVars {main_~y~0=v_main_~y~0_973, main_#t~post5=|v_main_#t~post5_207|, main_~x~0=v_main_~x~0_944, main_#t~post6=|v_main_#t~post6_416|} OutVars{main_#t~post5=|v_main_#t~post5_206|, main_~y~0=v_main_~y~0_972, main_~x~0=v_main_~x~0_943, main_#t~post6=|v_main_#t~post6_414|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {16509#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:47,457 INFO L290 TraceCheckUtils]: 7: Hoare triple {16509#(and (= main_~x~0 0) (= main_~y~0 0))} [166] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16509#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:32:47,458 INFO L290 TraceCheckUtils]: 8: Hoare triple {16509#(and (= main_~x~0 0) (= main_~y~0 0))} [167] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_975 v_main_~y~0_974)) (.cse1 (= |v_main_#t~post4_212| |v_main_#t~post4_211|)) (.cse3 (= v_main_~x~0_946 v_main_~x~0_945)) (.cse2 (mod v_main_~x~0_946 4294967296))) (or (and .cse0 (= |v_main_#t~post6_415| |v_main_#t~post6_419|) .cse1 (<= 500000 .cse2) .cse3) (and .cse0 .cse1 .cse3 (= |v_main_#t~post6_419| |v_main_#t~post6_415|)) (and (= (+ v_main_~x~0_946 v_main_~y~0_974) (+ v_main_~x~0_945 v_main_~y~0_975)) (< v_main_~x~0_946 v_main_~x~0_945) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_945 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_946 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_212|, main_~y~0=v_main_~y~0_975, main_~x~0=v_main_~x~0_946, main_#t~post6=|v_main_#t~post6_419|} OutVars{main_#t~post4=|v_main_#t~post4_211|, main_~y~0=v_main_~y~0_974, main_~x~0=v_main_~x~0_945, main_#t~post6=|v_main_#t~post6_415|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {16519#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:32:47,459 INFO L290 TraceCheckUtils]: 9: Hoare triple {16519#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [164] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {16484#false} is VALID [2022-04-28 03:32:47,459 INFO L272 TraceCheckUtils]: 10: Hoare triple {16484#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {16484#false} is VALID [2022-04-28 03:32:47,459 INFO L290 TraceCheckUtils]: 11: Hoare triple {16484#false} ~cond := #in~cond; {16484#false} is VALID [2022-04-28 03:32:47,459 INFO L290 TraceCheckUtils]: 12: Hoare triple {16484#false} assume 0 == ~cond; {16484#false} is VALID [2022-04-28 03:32:47,459 INFO L290 TraceCheckUtils]: 13: Hoare triple {16484#false} assume !false; {16484#false} is VALID [2022-04-28 03:32:47,459 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:47,459 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:32:48,437 INFO L290 TraceCheckUtils]: 13: Hoare triple {16484#false} assume !false; {16484#false} is VALID [2022-04-28 03:32:48,437 INFO L290 TraceCheckUtils]: 12: Hoare triple {16538#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {16484#false} is VALID [2022-04-28 03:32:48,438 INFO L290 TraceCheckUtils]: 11: Hoare triple {16542#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {16538#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:32:48,438 INFO L272 TraceCheckUtils]: 10: Hoare triple {16546#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {16542#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:32:48,438 INFO L290 TraceCheckUtils]: 9: Hoare triple {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [164] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {16546#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:32:48,450 INFO L290 TraceCheckUtils]: 8: Hoare triple {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [167] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_975 v_main_~y~0_974)) (.cse1 (= |v_main_#t~post4_212| |v_main_#t~post4_211|)) (.cse3 (= v_main_~x~0_946 v_main_~x~0_945)) (.cse2 (mod v_main_~x~0_946 4294967296))) (or (and .cse0 (= |v_main_#t~post6_415| |v_main_#t~post6_419|) .cse1 (<= 500000 .cse2) .cse3) (and .cse0 .cse1 .cse3 (= |v_main_#t~post6_419| |v_main_#t~post6_415|)) (and (= (+ v_main_~x~0_946 v_main_~y~0_974) (+ v_main_~x~0_945 v_main_~y~0_975)) (< v_main_~x~0_946 v_main_~x~0_945) (< .cse2 500000) (<= (div (+ (* v_main_~x~0_945 (- 1)) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_946 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_212|, main_~y~0=v_main_~y~0_975, main_~x~0=v_main_~x~0_946, main_#t~post6=|v_main_#t~post6_419|} OutVars{main_#t~post4=|v_main_#t~post4_211|, main_~y~0=v_main_~y~0_974, main_~x~0=v_main_~x~0_945, main_#t~post6=|v_main_#t~post6_415|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:48,451 INFO L290 TraceCheckUtils]: 7: Hoare triple {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [166] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:48,504 INFO L290 TraceCheckUtils]: 6: Hoare triple {16560#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_985_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_985_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_985_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [165] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_944 4294967296))) (let ((.cse0 (= v_main_~x~0_944 v_main_~x~0_943)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse1 (= v_main_~y~0_973 v_main_~y~0_972)) (.cse2 (= |v_main_#t~post5_207| |v_main_#t~post5_206|))) (or (and (= |v_main_#t~post6_416| |v_main_#t~post6_414|) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_943 v_main_~y~0_972) (+ v_main_~x~0_944 v_main_~y~0_973)) (<= (div (+ v_main_~y~0_972 (* (- 1) v_main_~y~0_973) (* v_main_~x~0_944 (- 1)) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_944 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~y~0_972 v_main_~y~0_973) .cse4) (and .cse0 (or (not .cse4) (not .cse3)) .cse1 (= |v_main_#t~post6_414| |v_main_#t~post6_416|) .cse2)))) InVars {main_~y~0=v_main_~y~0_973, main_#t~post5=|v_main_#t~post5_207|, main_~x~0=v_main_~x~0_944, main_#t~post6=|v_main_#t~post6_416|} OutVars{main_#t~post5=|v_main_#t~post5_206|, main_~y~0=v_main_~y~0_972, main_~x~0=v_main_~x~0_943, main_#t~post6=|v_main_#t~post6_414|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {16550#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:32:48,504 INFO L290 TraceCheckUtils]: 5: Hoare triple {16483#true} ~x~0 := 0;~y~0 := 0; {16560#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_985_32 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_985_32)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_985_32) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:32:48,504 INFO L272 TraceCheckUtils]: 4: Hoare triple {16483#true} call #t~ret7 := main(); {16483#true} is VALID [2022-04-28 03:32:48,504 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16483#true} {16483#true} #41#return; {16483#true} is VALID [2022-04-28 03:32:48,505 INFO L290 TraceCheckUtils]: 2: Hoare triple {16483#true} assume true; {16483#true} is VALID [2022-04-28 03:32:48,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {16483#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {16483#true} is VALID [2022-04-28 03:32:48,505 INFO L272 TraceCheckUtils]: 0: Hoare triple {16483#true} call ULTIMATE.init(); {16483#true} is VALID [2022-04-28 03:32:48,505 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:48,505 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [683877318] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:32:48,505 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:32:48,505 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:32:50,098 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:32:50,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1500601058] [2022-04-28 03:32:50,098 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1500601058] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:32:50,098 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:32:50,098 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [34] imperfect sequences [] total 34 [2022-04-28 03:32:50,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1710628218] [2022-04-28 03:32:50,098 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:32:50,098 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 104 [2022-04-28 03:32:50,099 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:32:50,099 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:50,156 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:50,156 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-28 03:32:50,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:50,157 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-28 03:32:50,157 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=1538, Unknown=0, NotChecked=0, Total=1722 [2022-04-28 03:32:50,157 INFO L87 Difference]: Start difference. First operand 106 states and 108 transitions. Second operand has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:54,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:54,563 INFO L93 Difference]: Finished difference Result 118 states and 122 transitions. [2022-04-28 03:32:54,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-28 03:32:54,563 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 104 [2022-04-28 03:32:54,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:32:54,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:54,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 118 transitions. [2022-04-28 03:32:54,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:54,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 118 transitions. [2022-04-28 03:32:54,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 118 transitions. [2022-04-28 03:32:54,655 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 118 edges. 118 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:54,656 INFO L225 Difference]: With dead ends: 118 [2022-04-28 03:32:54,656 INFO L226 Difference]: Without dead ends: 110 [2022-04-28 03:32:54,657 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 29 SyntacticMatches, 63 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1066 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=401, Invalid=4855, Unknown=0, NotChecked=0, Total=5256 [2022-04-28 03:32:54,657 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 72 mSDsluCounter, 157 mSDsCounter, 0 mSdLazyCounter, 3101 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 72 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 3134 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 3101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:32:54,657 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [72 Valid, 169 Invalid, 3134 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 3101 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-28 03:32:54,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2022-04-28 03:32:54,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 109. [2022-04-28 03:32:54,801 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:32:54,801 INFO L82 GeneralOperation]: Start isEquivalent. First operand 110 states. Second operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:54,801 INFO L74 IsIncluded]: Start isIncluded. First operand 110 states. Second operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:54,801 INFO L87 Difference]: Start difference. First operand 110 states. Second operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:54,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:54,802 INFO L93 Difference]: Finished difference Result 110 states and 112 transitions. [2022-04-28 03:32:54,802 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 112 transitions. [2022-04-28 03:32:54,803 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:54,803 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:54,803 INFO L74 IsIncluded]: Start isIncluded. First operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 110 states. [2022-04-28 03:32:54,803 INFO L87 Difference]: Start difference. First operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 110 states. [2022-04-28 03:32:54,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:32:54,804 INFO L93 Difference]: Finished difference Result 110 states and 112 transitions. [2022-04-28 03:32:54,804 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 112 transitions. [2022-04-28 03:32:54,804 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:32:54,804 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:32:54,804 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:32:54,804 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:32:54,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 104 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:54,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 111 transitions. [2022-04-28 03:32:54,805 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 111 transitions. Word has length 104 [2022-04-28 03:32:54,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:32:54,805 INFO L495 AbstractCegarLoop]: Abstraction has 109 states and 111 transitions. [2022-04-28 03:32:54,805 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 2.9411764705882355) internal successors, (100), 33 states have internal predecessors, (100), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:32:54,805 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 109 states and 111 transitions. [2022-04-28 03:32:54,946 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:32:54,946 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 111 transitions. [2022-04-28 03:32:54,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-04-28 03:32:54,947 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:32:54,947 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:32:54,963 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2022-04-28 03:32:55,147 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2022-04-28 03:32:55,148 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:32:55,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:32:55,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1969125445, now seen corresponding path program 31 times [2022-04-28 03:32:55,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:32:55,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1456929798] [2022-04-28 03:32:56,166 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:59,821 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:32:59,822 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:32:59,824 INFO L85 PathProgramCache]: Analyzing trace with hash 1960094127, now seen corresponding path program 1 times [2022-04-28 03:32:59,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:32:59,824 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073830187] [2022-04-28 03:32:59,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:59,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:32:59,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:59,875 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:32:59,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:59,878 INFO L290 TraceCheckUtils]: 0: Hoare triple {17354#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {17347#true} is VALID [2022-04-28 03:32:59,878 INFO L290 TraceCheckUtils]: 1: Hoare triple {17347#true} assume true; {17347#true} is VALID [2022-04-28 03:32:59,878 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17347#true} {17347#true} #41#return; {17347#true} is VALID [2022-04-28 03:32:59,879 INFO L272 TraceCheckUtils]: 0: Hoare triple {17347#true} call ULTIMATE.init(); {17354#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:32:59,879 INFO L290 TraceCheckUtils]: 1: Hoare triple {17354#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {17347#true} is VALID [2022-04-28 03:32:59,879 INFO L290 TraceCheckUtils]: 2: Hoare triple {17347#true} assume true; {17347#true} is VALID [2022-04-28 03:32:59,879 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17347#true} {17347#true} #41#return; {17347#true} is VALID [2022-04-28 03:32:59,879 INFO L272 TraceCheckUtils]: 4: Hoare triple {17347#true} call #t~ret7 := main(); {17347#true} is VALID [2022-04-28 03:32:59,879 INFO L290 TraceCheckUtils]: 5: Hoare triple {17347#true} ~x~0 := 0;~y~0 := 0; {17352#(= main_~x~0 0)} is VALID [2022-04-28 03:32:59,880 INFO L290 TraceCheckUtils]: 6: Hoare triple {17352#(= main_~x~0 0)} [169] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_991 4294967296))) (let ((.cse0 (= |v_main_#t~post5_214| |v_main_#t~post5_213|)) (.cse1 (= v_main_~y~0_1021 v_main_~y~0_1020)) (.cse2 (= v_main_~x~0_991 v_main_~x~0_990)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post6_430| |v_main_#t~post6_428|) .cse2) (and (= |v_main_#t~post6_428| |v_main_#t~post6_430|) .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4))) (and (<= (div (+ 1000000 v_main_~y~0_1020 (* v_main_~x~0_991 (- 1)) (* (- 1) v_main_~y~0_1021)) (- 4294967296)) (+ (div (+ v_main_~x~0_991 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_991 v_main_~y~0_1021) (+ v_main_~x~0_990 v_main_~y~0_1020)) (< v_main_~y~0_1020 v_main_~y~0_1021) .cse4 .cse3)))) InVars {main_~y~0=v_main_~y~0_1021, main_#t~post5=|v_main_#t~post5_214|, main_~x~0=v_main_~x~0_991, main_#t~post6=|v_main_#t~post6_430|} OutVars{main_#t~post5=|v_main_#t~post5_213|, main_~y~0=v_main_~y~0_1020, main_~x~0=v_main_~x~0_990, main_#t~post6=|v_main_#t~post6_428|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {17352#(= main_~x~0 0)} is VALID [2022-04-28 03:32:59,880 INFO L290 TraceCheckUtils]: 7: Hoare triple {17352#(= main_~x~0 0)} [170] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17352#(= main_~x~0 0)} is VALID [2022-04-28 03:32:59,881 INFO L290 TraceCheckUtils]: 8: Hoare triple {17352#(= main_~x~0 0)} [171] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_993 4294967296)) (.cse1 (= |v_main_#t~post4_219| |v_main_#t~post4_218|)) (.cse2 (= v_main_~x~0_993 v_main_~x~0_992)) (.cse3 (= v_main_~y~0_1023 v_main_~y~0_1022))) (or (and (<= (div (+ (* v_main_~x~0_993 (- 1)) v_main_~y~0_1023 500000 (* (- 1) v_main_~y~0_1022)) (- 4294967296)) (+ (div (+ v_main_~x~0_993 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1023 v_main_~y~0_1022) (< .cse0 500000) (= (+ v_main_~x~0_992 v_main_~y~0_1023) (+ v_main_~x~0_993 v_main_~y~0_1022))) (and (= |v_main_#t~post6_429| |v_main_#t~post6_433|) .cse1 .cse2 (<= 500000 .cse0) .cse3) (and (= |v_main_#t~post6_433| |v_main_#t~post6_429|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_219|, main_~y~0=v_main_~y~0_1023, main_~x~0=v_main_~x~0_993, main_#t~post6=|v_main_#t~post6_433|} OutVars{main_#t~post4=|v_main_#t~post4_218|, main_~y~0=v_main_~y~0_1022, main_~x~0=v_main_~x~0_992, main_#t~post6=|v_main_#t~post6_429|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {17353#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:32:59,882 INFO L290 TraceCheckUtils]: 9: Hoare triple {17353#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [168] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {17348#false} is VALID [2022-04-28 03:32:59,882 INFO L272 TraceCheckUtils]: 10: Hoare triple {17348#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {17348#false} is VALID [2022-04-28 03:32:59,882 INFO L290 TraceCheckUtils]: 11: Hoare triple {17348#false} ~cond := #in~cond; {17348#false} is VALID [2022-04-28 03:32:59,882 INFO L290 TraceCheckUtils]: 12: Hoare triple {17348#false} assume 0 == ~cond; {17348#false} is VALID [2022-04-28 03:32:59,882 INFO L290 TraceCheckUtils]: 13: Hoare triple {17348#false} assume !false; {17348#false} is VALID [2022-04-28 03:32:59,882 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:32:59,882 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:32:59,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073830187] [2022-04-28 03:32:59,882 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1073830187] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:32:59,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [790930153] [2022-04-28 03:32:59,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:32:59,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:32:59,883 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:32:59,884 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:32:59,919 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2022-04-28 03:32:59,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:59,944 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:32:59,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:32:59,952 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:33:00,115 INFO L272 TraceCheckUtils]: 0: Hoare triple {17347#true} call ULTIMATE.init(); {17347#true} is VALID [2022-04-28 03:33:00,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {17347#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {17347#true} is VALID [2022-04-28 03:33:00,116 INFO L290 TraceCheckUtils]: 2: Hoare triple {17347#true} assume true; {17347#true} is VALID [2022-04-28 03:33:00,116 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17347#true} {17347#true} #41#return; {17347#true} is VALID [2022-04-28 03:33:00,116 INFO L272 TraceCheckUtils]: 4: Hoare triple {17347#true} call #t~ret7 := main(); {17347#true} is VALID [2022-04-28 03:33:00,116 INFO L290 TraceCheckUtils]: 5: Hoare triple {17347#true} ~x~0 := 0;~y~0 := 0; {17373#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:00,117 INFO L290 TraceCheckUtils]: 6: Hoare triple {17373#(and (= main_~x~0 0) (= main_~y~0 0))} [169] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_991 4294967296))) (let ((.cse0 (= |v_main_#t~post5_214| |v_main_#t~post5_213|)) (.cse1 (= v_main_~y~0_1021 v_main_~y~0_1020)) (.cse2 (= v_main_~x~0_991 v_main_~x~0_990)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post6_430| |v_main_#t~post6_428|) .cse2) (and (= |v_main_#t~post6_428| |v_main_#t~post6_430|) .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4))) (and (<= (div (+ 1000000 v_main_~y~0_1020 (* v_main_~x~0_991 (- 1)) (* (- 1) v_main_~y~0_1021)) (- 4294967296)) (+ (div (+ v_main_~x~0_991 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_991 v_main_~y~0_1021) (+ v_main_~x~0_990 v_main_~y~0_1020)) (< v_main_~y~0_1020 v_main_~y~0_1021) .cse4 .cse3)))) InVars {main_~y~0=v_main_~y~0_1021, main_#t~post5=|v_main_#t~post5_214|, main_~x~0=v_main_~x~0_991, main_#t~post6=|v_main_#t~post6_430|} OutVars{main_#t~post5=|v_main_#t~post5_213|, main_~y~0=v_main_~y~0_1020, main_~x~0=v_main_~x~0_990, main_#t~post6=|v_main_#t~post6_428|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {17373#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:00,117 INFO L290 TraceCheckUtils]: 7: Hoare triple {17373#(and (= main_~x~0 0) (= main_~y~0 0))} [170] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17373#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:00,118 INFO L290 TraceCheckUtils]: 8: Hoare triple {17373#(and (= main_~x~0 0) (= main_~y~0 0))} [171] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_993 4294967296)) (.cse1 (= |v_main_#t~post4_219| |v_main_#t~post4_218|)) (.cse2 (= v_main_~x~0_993 v_main_~x~0_992)) (.cse3 (= v_main_~y~0_1023 v_main_~y~0_1022))) (or (and (<= (div (+ (* v_main_~x~0_993 (- 1)) v_main_~y~0_1023 500000 (* (- 1) v_main_~y~0_1022)) (- 4294967296)) (+ (div (+ v_main_~x~0_993 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1023 v_main_~y~0_1022) (< .cse0 500000) (= (+ v_main_~x~0_992 v_main_~y~0_1023) (+ v_main_~x~0_993 v_main_~y~0_1022))) (and (= |v_main_#t~post6_429| |v_main_#t~post6_433|) .cse1 .cse2 (<= 500000 .cse0) .cse3) (and (= |v_main_#t~post6_433| |v_main_#t~post6_429|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_219|, main_~y~0=v_main_~y~0_1023, main_~x~0=v_main_~x~0_993, main_#t~post6=|v_main_#t~post6_433|} OutVars{main_#t~post4=|v_main_#t~post4_218|, main_~y~0=v_main_~y~0_1022, main_~x~0=v_main_~x~0_992, main_#t~post6=|v_main_#t~post6_429|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {17383#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:33:00,119 INFO L290 TraceCheckUtils]: 9: Hoare triple {17383#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [168] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {17348#false} is VALID [2022-04-28 03:33:00,119 INFO L272 TraceCheckUtils]: 10: Hoare triple {17348#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {17348#false} is VALID [2022-04-28 03:33:00,119 INFO L290 TraceCheckUtils]: 11: Hoare triple {17348#false} ~cond := #in~cond; {17348#false} is VALID [2022-04-28 03:33:00,119 INFO L290 TraceCheckUtils]: 12: Hoare triple {17348#false} assume 0 == ~cond; {17348#false} is VALID [2022-04-28 03:33:00,119 INFO L290 TraceCheckUtils]: 13: Hoare triple {17348#false} assume !false; {17348#false} is VALID [2022-04-28 03:33:00,119 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:00,119 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:33:01,573 INFO L290 TraceCheckUtils]: 13: Hoare triple {17348#false} assume !false; {17348#false} is VALID [2022-04-28 03:33:01,574 INFO L290 TraceCheckUtils]: 12: Hoare triple {17402#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {17348#false} is VALID [2022-04-28 03:33:01,574 INFO L290 TraceCheckUtils]: 11: Hoare triple {17406#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {17402#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:33:01,574 INFO L272 TraceCheckUtils]: 10: Hoare triple {17410#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {17406#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:33:01,575 INFO L290 TraceCheckUtils]: 9: Hoare triple {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [168] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {17410#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:33:01,591 INFO L290 TraceCheckUtils]: 8: Hoare triple {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [171] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_993 4294967296)) (.cse1 (= |v_main_#t~post4_219| |v_main_#t~post4_218|)) (.cse2 (= v_main_~x~0_993 v_main_~x~0_992)) (.cse3 (= v_main_~y~0_1023 v_main_~y~0_1022))) (or (and (<= (div (+ (* v_main_~x~0_993 (- 1)) v_main_~y~0_1023 500000 (* (- 1) v_main_~y~0_1022)) (- 4294967296)) (+ (div (+ v_main_~x~0_993 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1023 v_main_~y~0_1022) (< .cse0 500000) (= (+ v_main_~x~0_992 v_main_~y~0_1023) (+ v_main_~x~0_993 v_main_~y~0_1022))) (and (= |v_main_#t~post6_429| |v_main_#t~post6_433|) .cse1 .cse2 (<= 500000 .cse0) .cse3) (and (= |v_main_#t~post6_433| |v_main_#t~post6_429|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_219|, main_~y~0=v_main_~y~0_1023, main_~x~0=v_main_~x~0_993, main_#t~post6=|v_main_#t~post6_433|} OutVars{main_#t~post4=|v_main_#t~post4_218|, main_~y~0=v_main_~y~0_1022, main_~x~0=v_main_~x~0_992, main_#t~post6=|v_main_#t~post6_429|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:01,591 INFO L290 TraceCheckUtils]: 7: Hoare triple {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [170] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:01,609 INFO L290 TraceCheckUtils]: 6: Hoare triple {17424#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1033_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1033_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* aux_div_v_main_~y~0_1033_33 4294967296)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [169] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_991 4294967296))) (let ((.cse0 (= |v_main_#t~post5_214| |v_main_#t~post5_213|)) (.cse1 (= v_main_~y~0_1021 v_main_~y~0_1020)) (.cse2 (= v_main_~x~0_991 v_main_~x~0_990)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 .cse1 (= |v_main_#t~post6_430| |v_main_#t~post6_428|) .cse2) (and (= |v_main_#t~post6_428| |v_main_#t~post6_430|) .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4))) (and (<= (div (+ 1000000 v_main_~y~0_1020 (* v_main_~x~0_991 (- 1)) (* (- 1) v_main_~y~0_1021)) (- 4294967296)) (+ (div (+ v_main_~x~0_991 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_991 v_main_~y~0_1021) (+ v_main_~x~0_990 v_main_~y~0_1020)) (< v_main_~y~0_1020 v_main_~y~0_1021) .cse4 .cse3)))) InVars {main_~y~0=v_main_~y~0_1021, main_#t~post5=|v_main_#t~post5_214|, main_~x~0=v_main_~x~0_991, main_#t~post6=|v_main_#t~post6_430|} OutVars{main_#t~post5=|v_main_#t~post5_213|, main_~y~0=v_main_~y~0_1020, main_~x~0=v_main_~x~0_990, main_#t~post6=|v_main_#t~post6_428|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {17414#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:01,610 INFO L290 TraceCheckUtils]: 5: Hoare triple {17347#true} ~x~0 := 0;~y~0 := 0; {17424#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1033_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1033_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* aux_div_v_main_~y~0_1033_33 4294967296)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:33:01,610 INFO L272 TraceCheckUtils]: 4: Hoare triple {17347#true} call #t~ret7 := main(); {17347#true} is VALID [2022-04-28 03:33:01,610 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17347#true} {17347#true} #41#return; {17347#true} is VALID [2022-04-28 03:33:01,610 INFO L290 TraceCheckUtils]: 2: Hoare triple {17347#true} assume true; {17347#true} is VALID [2022-04-28 03:33:01,610 INFO L290 TraceCheckUtils]: 1: Hoare triple {17347#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {17347#true} is VALID [2022-04-28 03:33:01,610 INFO L272 TraceCheckUtils]: 0: Hoare triple {17347#true} call ULTIMATE.init(); {17347#true} is VALID [2022-04-28 03:33:01,610 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:01,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [790930153] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:33:01,610 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:33:01,611 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:33:03,434 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:33:03,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1456929798] [2022-04-28 03:33:03,434 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1456929798] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:33:03,434 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:33:03,434 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [35] imperfect sequences [] total 35 [2022-04-28 03:33:03,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948535123] [2022-04-28 03:33:03,434 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:33:03,435 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 107 [2022-04-28 03:33:03,435 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:33:03,435 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:03,511 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:03,511 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-28 03:33:03,511 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:03,511 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-28 03:33:03,512 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=1617, Unknown=0, NotChecked=0, Total=1806 [2022-04-28 03:33:03,512 INFO L87 Difference]: Start difference. First operand 109 states and 111 transitions. Second operand has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:07,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:07,694 INFO L93 Difference]: Finished difference Result 121 states and 125 transitions. [2022-04-28 03:33:07,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2022-04-28 03:33:07,694 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 107 [2022-04-28 03:33:07,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:33:07,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:07,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 121 transitions. [2022-04-28 03:33:07,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:07,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 121 transitions. [2022-04-28 03:33:07,705 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 35 states and 121 transitions. [2022-04-28 03:33:07,804 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 121 edges. 121 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:07,805 INFO L225 Difference]: With dead ends: 121 [2022-04-28 03:33:07,805 INFO L226 Difference]: Without dead ends: 113 [2022-04-28 03:33:07,805 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 29 SyntacticMatches, 65 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1116 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=413, Invalid=5137, Unknown=0, NotChecked=0, Total=5550 [2022-04-28 03:33:07,806 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 74 mSDsluCounter, 162 mSDsCounter, 0 mSdLazyCounter, 3297 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 74 SdHoareTripleChecker+Valid, 174 SdHoareTripleChecker+Invalid, 3331 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 3297 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:33:07,806 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [74 Valid, 174 Invalid, 3331 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 3297 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time] [2022-04-28 03:33:07,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-04-28 03:33:07,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 112. [2022-04-28 03:33:07,953 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:33:07,953 INFO L82 GeneralOperation]: Start isEquivalent. First operand 113 states. Second operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:07,953 INFO L74 IsIncluded]: Start isIncluded. First operand 113 states. Second operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:07,953 INFO L87 Difference]: Start difference. First operand 113 states. Second operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:07,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:07,954 INFO L93 Difference]: Finished difference Result 113 states and 115 transitions. [2022-04-28 03:33:07,954 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 115 transitions. [2022-04-28 03:33:07,955 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:07,955 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:07,955 INFO L74 IsIncluded]: Start isIncluded. First operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 113 states. [2022-04-28 03:33:07,955 INFO L87 Difference]: Start difference. First operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 113 states. [2022-04-28 03:33:07,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:07,956 INFO L93 Difference]: Finished difference Result 113 states and 115 transitions. [2022-04-28 03:33:07,956 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 115 transitions. [2022-04-28 03:33:07,956 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:07,956 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:07,956 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:33:07,956 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:33:07,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 107 states have (on average 1.02803738317757) internal successors, (110), 107 states have internal predecessors, (110), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:07,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 114 transitions. [2022-04-28 03:33:07,957 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 114 transitions. Word has length 107 [2022-04-28 03:33:07,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:33:07,957 INFO L495 AbstractCegarLoop]: Abstraction has 112 states and 114 transitions. [2022-04-28 03:33:07,957 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 2.942857142857143) internal successors, (103), 34 states have internal predecessors, (103), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:07,957 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 112 states and 114 transitions. [2022-04-28 03:33:08,101 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:08,101 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 114 transitions. [2022-04-28 03:33:08,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2022-04-28 03:33:08,101 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:33:08,101 INFO L195 NwaCegarLoop]: trace histogram [33, 33, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:33:08,119 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Forceful destruction successful, exit code 0 [2022-04-28 03:33:08,302 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,32 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:33:08,302 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:33:08,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:33:08,302 INFO L85 PathProgramCache]: Analyzing trace with hash 2010663949, now seen corresponding path program 32 times [2022-04-28 03:33:08,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:08,302 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [53278196] [2022-04-28 03:33:09,891 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:33:10,143 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:10,771 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:10,772 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:33:10,776 INFO L85 PathProgramCache]: Analyzing trace with hash -285341009, now seen corresponding path program 1 times [2022-04-28 03:33:10,776 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:33:10,776 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249685288] [2022-04-28 03:33:10,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:10,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:33:10,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:10,854 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:33:10,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:10,857 INFO L290 TraceCheckUtils]: 0: Hoare triple {18239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {18232#true} is VALID [2022-04-28 03:33:10,857 INFO L290 TraceCheckUtils]: 1: Hoare triple {18232#true} assume true; {18232#true} is VALID [2022-04-28 03:33:10,857 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18232#true} {18232#true} #41#return; {18232#true} is VALID [2022-04-28 03:33:10,857 INFO L272 TraceCheckUtils]: 0: Hoare triple {18232#true} call ULTIMATE.init(); {18239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:33:10,857 INFO L290 TraceCheckUtils]: 1: Hoare triple {18239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {18232#true} is VALID [2022-04-28 03:33:10,857 INFO L290 TraceCheckUtils]: 2: Hoare triple {18232#true} assume true; {18232#true} is VALID [2022-04-28 03:33:10,857 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18232#true} {18232#true} #41#return; {18232#true} is VALID [2022-04-28 03:33:10,858 INFO L272 TraceCheckUtils]: 4: Hoare triple {18232#true} call #t~ret7 := main(); {18232#true} is VALID [2022-04-28 03:33:10,858 INFO L290 TraceCheckUtils]: 5: Hoare triple {18232#true} ~x~0 := 0;~y~0 := 0; {18237#(= main_~x~0 0)} is VALID [2022-04-28 03:33:10,858 INFO L290 TraceCheckUtils]: 6: Hoare triple {18237#(= main_~x~0 0)} [173] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1039 4294967296))) (let ((.cse0 (= |v_main_#t~post5_221| |v_main_#t~post5_220|)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000)) (.cse1 (= |v_main_#t~post6_444| |v_main_#t~post6_442|)) (.cse2 (= v_main_~x~0_1039 v_main_~x~0_1038))) (or (and (= v_main_~y~0_1070 v_main_~y~0_1069) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_1038 v_main_~y~0_1069) (+ v_main_~x~0_1039 v_main_~y~0_1070)) (< v_main_~x~0_1039 v_main_~x~0_1038) .cse3 .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1038) 1000000) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_1039 (- 4294967295)) 4294967296)))) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= v_main_~y~0_1069 v_main_~y~0_1070))))) InVars {main_~y~0=v_main_~y~0_1070, main_#t~post5=|v_main_#t~post5_221|, main_~x~0=v_main_~x~0_1039, main_#t~post6=|v_main_#t~post6_444|} OutVars{main_#t~post5=|v_main_#t~post5_220|, main_~y~0=v_main_~y~0_1069, main_~x~0=v_main_~x~0_1038, main_#t~post6=|v_main_#t~post6_442|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {18237#(= main_~x~0 0)} is VALID [2022-04-28 03:33:10,859 INFO L290 TraceCheckUtils]: 7: Hoare triple {18237#(= main_~x~0 0)} [174] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18237#(= main_~x~0 0)} is VALID [2022-04-28 03:33:10,860 INFO L290 TraceCheckUtils]: 8: Hoare triple {18237#(= main_~x~0 0)} [175] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_1041 4294967296)) (.cse0 (= v_main_~y~0_1072 v_main_~y~0_1071)) (.cse1 (= |v_main_#t~post4_226| |v_main_#t~post4_225|)) (.cse2 (= |v_main_#t~post6_447| |v_main_#t~post6_443|)) (.cse3 (= v_main_~x~0_1041 v_main_~x~0_1040))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1071) (* (- 1) v_main_~x~0_1041) v_main_~y~0_1072 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1041 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1072 v_main_~y~0_1071) (= (+ v_main_~x~0_1040 v_main_~y~0_1072) (+ v_main_~x~0_1041 v_main_~y~0_1071))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_226|, main_~y~0=v_main_~y~0_1072, main_~x~0=v_main_~x~0_1041, main_#t~post6=|v_main_#t~post6_447|} OutVars{main_#t~post4=|v_main_#t~post4_225|, main_~y~0=v_main_~y~0_1071, main_~x~0=v_main_~x~0_1040, main_#t~post6=|v_main_#t~post6_443|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {18238#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:33:10,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {18238#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [172] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {18233#false} is VALID [2022-04-28 03:33:10,860 INFO L272 TraceCheckUtils]: 10: Hoare triple {18233#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {18233#false} is VALID [2022-04-28 03:33:10,860 INFO L290 TraceCheckUtils]: 11: Hoare triple {18233#false} ~cond := #in~cond; {18233#false} is VALID [2022-04-28 03:33:10,860 INFO L290 TraceCheckUtils]: 12: Hoare triple {18233#false} assume 0 == ~cond; {18233#false} is VALID [2022-04-28 03:33:10,861 INFO L290 TraceCheckUtils]: 13: Hoare triple {18233#false} assume !false; {18233#false} is VALID [2022-04-28 03:33:10,861 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:10,861 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:33:10,861 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249685288] [2022-04-28 03:33:10,861 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1249685288] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:33:10,861 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1991763530] [2022-04-28 03:33:10,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:10,861 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:33:10,861 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:33:10,865 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:33:10,866 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-04-28 03:33:10,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:10,890 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:33:10,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:10,897 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:33:11,076 INFO L272 TraceCheckUtils]: 0: Hoare triple {18232#true} call ULTIMATE.init(); {18232#true} is VALID [2022-04-28 03:33:11,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {18232#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {18232#true} is VALID [2022-04-28 03:33:11,076 INFO L290 TraceCheckUtils]: 2: Hoare triple {18232#true} assume true; {18232#true} is VALID [2022-04-28 03:33:11,076 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18232#true} {18232#true} #41#return; {18232#true} is VALID [2022-04-28 03:33:11,076 INFO L272 TraceCheckUtils]: 4: Hoare triple {18232#true} call #t~ret7 := main(); {18232#true} is VALID [2022-04-28 03:33:11,077 INFO L290 TraceCheckUtils]: 5: Hoare triple {18232#true} ~x~0 := 0;~y~0 := 0; {18258#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:11,077 INFO L290 TraceCheckUtils]: 6: Hoare triple {18258#(and (= main_~x~0 0) (= main_~y~0 0))} [173] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1039 4294967296))) (let ((.cse0 (= |v_main_#t~post5_221| |v_main_#t~post5_220|)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000)) (.cse1 (= |v_main_#t~post6_444| |v_main_#t~post6_442|)) (.cse2 (= v_main_~x~0_1039 v_main_~x~0_1038))) (or (and (= v_main_~y~0_1070 v_main_~y~0_1069) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_1038 v_main_~y~0_1069) (+ v_main_~x~0_1039 v_main_~y~0_1070)) (< v_main_~x~0_1039 v_main_~x~0_1038) .cse3 .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1038) 1000000) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_1039 (- 4294967295)) 4294967296)))) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= v_main_~y~0_1069 v_main_~y~0_1070))))) InVars {main_~y~0=v_main_~y~0_1070, main_#t~post5=|v_main_#t~post5_221|, main_~x~0=v_main_~x~0_1039, main_#t~post6=|v_main_#t~post6_444|} OutVars{main_#t~post5=|v_main_#t~post5_220|, main_~y~0=v_main_~y~0_1069, main_~x~0=v_main_~x~0_1038, main_#t~post6=|v_main_#t~post6_442|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {18258#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:11,078 INFO L290 TraceCheckUtils]: 7: Hoare triple {18258#(and (= main_~x~0 0) (= main_~y~0 0))} [174] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18258#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:11,079 INFO L290 TraceCheckUtils]: 8: Hoare triple {18258#(and (= main_~x~0 0) (= main_~y~0 0))} [175] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_1041 4294967296)) (.cse0 (= v_main_~y~0_1072 v_main_~y~0_1071)) (.cse1 (= |v_main_#t~post4_226| |v_main_#t~post4_225|)) (.cse2 (= |v_main_#t~post6_447| |v_main_#t~post6_443|)) (.cse3 (= v_main_~x~0_1041 v_main_~x~0_1040))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1071) (* (- 1) v_main_~x~0_1041) v_main_~y~0_1072 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1041 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1072 v_main_~y~0_1071) (= (+ v_main_~x~0_1040 v_main_~y~0_1072) (+ v_main_~x~0_1041 v_main_~y~0_1071))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_226|, main_~y~0=v_main_~y~0_1072, main_~x~0=v_main_~x~0_1041, main_#t~post6=|v_main_#t~post6_447|} OutVars{main_#t~post4=|v_main_#t~post4_225|, main_~y~0=v_main_~y~0_1071, main_~x~0=v_main_~x~0_1040, main_#t~post6=|v_main_#t~post6_443|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {18268#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:33:11,080 INFO L290 TraceCheckUtils]: 9: Hoare triple {18268#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [172] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {18233#false} is VALID [2022-04-28 03:33:11,080 INFO L272 TraceCheckUtils]: 10: Hoare triple {18233#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {18233#false} is VALID [2022-04-28 03:33:11,080 INFO L290 TraceCheckUtils]: 11: Hoare triple {18233#false} ~cond := #in~cond; {18233#false} is VALID [2022-04-28 03:33:11,080 INFO L290 TraceCheckUtils]: 12: Hoare triple {18233#false} assume 0 == ~cond; {18233#false} is VALID [2022-04-28 03:33:11,080 INFO L290 TraceCheckUtils]: 13: Hoare triple {18233#false} assume !false; {18233#false} is VALID [2022-04-28 03:33:11,080 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:11,080 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:33:11,947 INFO L290 TraceCheckUtils]: 13: Hoare triple {18233#false} assume !false; {18233#false} is VALID [2022-04-28 03:33:11,948 INFO L290 TraceCheckUtils]: 12: Hoare triple {18287#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {18233#false} is VALID [2022-04-28 03:33:11,948 INFO L290 TraceCheckUtils]: 11: Hoare triple {18291#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {18287#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:33:11,948 INFO L272 TraceCheckUtils]: 10: Hoare triple {18295#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {18291#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:33:11,950 INFO L290 TraceCheckUtils]: 9: Hoare triple {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [172] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {18295#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:33:11,952 INFO L290 TraceCheckUtils]: 8: Hoare triple {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [175] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_1041 4294967296)) (.cse0 (= v_main_~y~0_1072 v_main_~y~0_1071)) (.cse1 (= |v_main_#t~post4_226| |v_main_#t~post4_225|)) (.cse2 (= |v_main_#t~post6_447| |v_main_#t~post6_443|)) (.cse3 (= v_main_~x~0_1041 v_main_~x~0_1040))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1071) (* (- 1) v_main_~x~0_1041) v_main_~y~0_1072 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1041 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1072 v_main_~y~0_1071) (= (+ v_main_~x~0_1040 v_main_~y~0_1072) (+ v_main_~x~0_1041 v_main_~y~0_1071))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_226|, main_~y~0=v_main_~y~0_1072, main_~x~0=v_main_~x~0_1041, main_#t~post6=|v_main_#t~post6_447|} OutVars{main_#t~post4=|v_main_#t~post4_225|, main_~y~0=v_main_~y~0_1071, main_~x~0=v_main_~x~0_1040, main_#t~post6=|v_main_#t~post6_443|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:11,953 INFO L290 TraceCheckUtils]: 7: Hoare triple {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [174] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:11,999 INFO L290 TraceCheckUtils]: 6: Hoare triple {18309#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1082_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1082_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1082_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [173] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1039 4294967296))) (let ((.cse0 (= |v_main_#t~post5_221| |v_main_#t~post5_220|)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000)) (.cse1 (= |v_main_#t~post6_444| |v_main_#t~post6_442|)) (.cse2 (= v_main_~x~0_1039 v_main_~x~0_1038))) (or (and (= v_main_~y~0_1070 v_main_~y~0_1069) .cse0 .cse1 .cse2) (and (= (+ v_main_~x~0_1038 v_main_~y~0_1069) (+ v_main_~x~0_1039 v_main_~y~0_1070)) (< v_main_~x~0_1039 v_main_~x~0_1038) .cse3 .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1038) 1000000) (- 4294967296)) (+ 1 (div (+ v_main_~x~0_1039 (- 4294967295)) 4294967296)))) (and .cse0 (or (not .cse3) (not .cse4)) .cse1 .cse2 (= v_main_~y~0_1069 v_main_~y~0_1070))))) InVars {main_~y~0=v_main_~y~0_1070, main_#t~post5=|v_main_#t~post5_221|, main_~x~0=v_main_~x~0_1039, main_#t~post6=|v_main_#t~post6_444|} OutVars{main_#t~post5=|v_main_#t~post5_220|, main_~y~0=v_main_~y~0_1069, main_~x~0=v_main_~x~0_1038, main_#t~post6=|v_main_#t~post6_442|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {18299#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:12,000 INFO L290 TraceCheckUtils]: 5: Hoare triple {18232#true} ~x~0 := 0;~y~0 := 0; {18309#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1082_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1082_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1082_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:33:12,000 INFO L272 TraceCheckUtils]: 4: Hoare triple {18232#true} call #t~ret7 := main(); {18232#true} is VALID [2022-04-28 03:33:12,000 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18232#true} {18232#true} #41#return; {18232#true} is VALID [2022-04-28 03:33:12,000 INFO L290 TraceCheckUtils]: 2: Hoare triple {18232#true} assume true; {18232#true} is VALID [2022-04-28 03:33:12,000 INFO L290 TraceCheckUtils]: 1: Hoare triple {18232#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {18232#true} is VALID [2022-04-28 03:33:12,000 INFO L272 TraceCheckUtils]: 0: Hoare triple {18232#true} call ULTIMATE.init(); {18232#true} is VALID [2022-04-28 03:33:12,000 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:12,001 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1991763530] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:33:12,001 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:33:12,001 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:33:13,599 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:33:13,616 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [53278196] [2022-04-28 03:33:13,616 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [53278196] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:33:13,616 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:33:13,616 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [36] imperfect sequences [] total 36 [2022-04-28 03:33:13,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392431746] [2022-04-28 03:33:13,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:33:13,616 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 110 [2022-04-28 03:33:13,617 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:33:13,617 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:13,670 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:13,670 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-28 03:33:13,670 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:13,671 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-28 03:33:13,671 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1698, Unknown=0, NotChecked=0, Total=1892 [2022-04-28 03:33:13,671 INFO L87 Difference]: Start difference. First operand 112 states and 114 transitions. Second operand has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:18,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:18,223 INFO L93 Difference]: Finished difference Result 124 states and 128 transitions. [2022-04-28 03:33:18,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-04-28 03:33:18,224 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 110 [2022-04-28 03:33:18,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:33:18,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:18,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 124 transitions. [2022-04-28 03:33:18,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:18,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 124 transitions. [2022-04-28 03:33:18,225 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 36 states and 124 transitions. [2022-04-28 03:33:18,320 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 124 edges. 124 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:18,321 INFO L225 Difference]: With dead ends: 124 [2022-04-28 03:33:18,321 INFO L226 Difference]: Without dead ends: 116 [2022-04-28 03:33:18,321 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 29 SyntacticMatches, 67 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1167 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=425, Invalid=5427, Unknown=0, NotChecked=0, Total=5852 [2022-04-28 03:33:18,322 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 76 mSDsluCounter, 167 mSDsCounter, 0 mSdLazyCounter, 3499 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 179 SdHoareTripleChecker+Invalid, 3534 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 3499 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:33:18,322 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [76 Valid, 179 Invalid, 3534 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 3499 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-28 03:33:18,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-04-28 03:33:18,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 115. [2022-04-28 03:33:18,476 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:33:18,476 INFO L82 GeneralOperation]: Start isEquivalent. First operand 116 states. Second operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:18,476 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:18,476 INFO L87 Difference]: Start difference. First operand 116 states. Second operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:18,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:18,477 INFO L93 Difference]: Finished difference Result 116 states and 118 transitions. [2022-04-28 03:33:18,477 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 118 transitions. [2022-04-28 03:33:18,477 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:18,477 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:18,477 INFO L74 IsIncluded]: Start isIncluded. First operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 116 states. [2022-04-28 03:33:18,478 INFO L87 Difference]: Start difference. First operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 116 states. [2022-04-28 03:33:18,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:18,478 INFO L93 Difference]: Finished difference Result 116 states and 118 transitions. [2022-04-28 03:33:18,478 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 118 transitions. [2022-04-28 03:33:18,479 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:18,479 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:18,479 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:33:18,479 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:33:18,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 110 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:18,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 117 transitions. [2022-04-28 03:33:18,480 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 117 transitions. Word has length 110 [2022-04-28 03:33:18,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:33:18,480 INFO L495 AbstractCegarLoop]: Abstraction has 115 states and 117 transitions. [2022-04-28 03:33:18,480 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 2.9444444444444446) internal successors, (106), 35 states have internal predecessors, (106), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:18,480 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 115 states and 117 transitions. [2022-04-28 03:33:18,634 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 117 edges. 117 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:18,634 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 117 transitions. [2022-04-28 03:33:18,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2022-04-28 03:33:18,635 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:33:18,635 INFO L195 NwaCegarLoop]: trace histogram [34, 34, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:33:18,652 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2022-04-28 03:33:18,835 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,33 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:33:18,835 INFO L420 AbstractCegarLoop]: === Iteration 36 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:33:18,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:33:18,835 INFO L85 PathProgramCache]: Analyzing trace with hash -1761311931, now seen corresponding path program 33 times [2022-04-28 03:33:18,835 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:18,836 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [611620225] [2022-04-28 03:33:19,607 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:20,123 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:20,124 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:33:20,127 INFO L85 PathProgramCache]: Analyzing trace with hash 1764191151, now seen corresponding path program 1 times [2022-04-28 03:33:20,127 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:33:20,127 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1001429514] [2022-04-28 03:33:20,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:20,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:33:20,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:20,180 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:33:20,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:20,183 INFO L290 TraceCheckUtils]: 0: Hoare triple {19145#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {19138#true} is VALID [2022-04-28 03:33:20,183 INFO L290 TraceCheckUtils]: 1: Hoare triple {19138#true} assume true; {19138#true} is VALID [2022-04-28 03:33:20,183 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19138#true} {19138#true} #41#return; {19138#true} is VALID [2022-04-28 03:33:20,183 INFO L272 TraceCheckUtils]: 0: Hoare triple {19138#true} call ULTIMATE.init(); {19145#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:33:20,183 INFO L290 TraceCheckUtils]: 1: Hoare triple {19145#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {19138#true} is VALID [2022-04-28 03:33:20,184 INFO L290 TraceCheckUtils]: 2: Hoare triple {19138#true} assume true; {19138#true} is VALID [2022-04-28 03:33:20,184 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19138#true} {19138#true} #41#return; {19138#true} is VALID [2022-04-28 03:33:20,184 INFO L272 TraceCheckUtils]: 4: Hoare triple {19138#true} call #t~ret7 := main(); {19138#true} is VALID [2022-04-28 03:33:20,184 INFO L290 TraceCheckUtils]: 5: Hoare triple {19138#true} ~x~0 := 0;~y~0 := 0; {19143#(= main_~x~0 0)} is VALID [2022-04-28 03:33:20,185 INFO L290 TraceCheckUtils]: 6: Hoare triple {19143#(= main_~x~0 0)} [177] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1088 4294967296))) (let ((.cse0 (= |v_main_#t~post6_458| |v_main_#t~post6_456|)) (.cse1 (= v_main_~x~0_1088 v_main_~x~0_1087)) (.cse2 (= v_main_~y~0_1120 v_main_~y~0_1119)) (.cse3 (= |v_main_#t~post5_228| |v_main_#t~post5_227|)) (.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and .cse5 (= (+ v_main_~x~0_1088 v_main_~y~0_1120) (+ v_main_~x~0_1087 v_main_~y~0_1119)) (< v_main_~x~0_1088 v_main_~x~0_1087) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1087)) (- 4294967296)) (+ (div (+ v_main_~x~0_1088 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_1120, main_#t~post5=|v_main_#t~post5_228|, main_~x~0=v_main_~x~0_1088, main_#t~post6=|v_main_#t~post6_458|} OutVars{main_#t~post5=|v_main_#t~post5_227|, main_~y~0=v_main_~y~0_1119, main_~x~0=v_main_~x~0_1087, main_#t~post6=|v_main_#t~post6_456|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {19143#(= main_~x~0 0)} is VALID [2022-04-28 03:33:20,185 INFO L290 TraceCheckUtils]: 7: Hoare triple {19143#(= main_~x~0 0)} [178] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19143#(= main_~x~0 0)} is VALID [2022-04-28 03:33:20,186 INFO L290 TraceCheckUtils]: 8: Hoare triple {19143#(= main_~x~0 0)} [179] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1090 4294967296)) (.cse1 (= v_main_~y~0_1122 v_main_~y~0_1121)) (.cse2 (= |v_main_#t~post4_233| |v_main_#t~post4_232|)) (.cse3 (= v_main_~x~0_1090 v_main_~x~0_1089))) (or (and (= (+ v_main_~x~0_1090 v_main_~y~0_1121) (+ v_main_~x~0_1089 v_main_~y~0_1122)) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1089)) (- 4294967296)) (+ (div (+ v_main_~x~0_1090 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1090 v_main_~x~0_1089) (< .cse0 500000)) (and .cse1 .cse2 (<= 500000 .cse0) (= |v_main_#t~post6_457| |v_main_#t~post6_461|) .cse3) (and (= |v_main_#t~post6_461| |v_main_#t~post6_457|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_233|, main_~y~0=v_main_~y~0_1122, main_~x~0=v_main_~x~0_1090, main_#t~post6=|v_main_#t~post6_461|} OutVars{main_#t~post4=|v_main_#t~post4_232|, main_~y~0=v_main_~y~0_1121, main_~x~0=v_main_~x~0_1089, main_#t~post6=|v_main_#t~post6_457|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {19144#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:33:20,186 INFO L290 TraceCheckUtils]: 9: Hoare triple {19144#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [176] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {19139#false} is VALID [2022-04-28 03:33:20,186 INFO L272 TraceCheckUtils]: 10: Hoare triple {19139#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {19139#false} is VALID [2022-04-28 03:33:20,186 INFO L290 TraceCheckUtils]: 11: Hoare triple {19139#false} ~cond := #in~cond; {19139#false} is VALID [2022-04-28 03:33:20,186 INFO L290 TraceCheckUtils]: 12: Hoare triple {19139#false} assume 0 == ~cond; {19139#false} is VALID [2022-04-28 03:33:20,187 INFO L290 TraceCheckUtils]: 13: Hoare triple {19139#false} assume !false; {19139#false} is VALID [2022-04-28 03:33:20,187 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:20,187 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:33:20,187 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1001429514] [2022-04-28 03:33:20,187 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1001429514] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:33:20,187 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1470903984] [2022-04-28 03:33:20,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:20,187 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:33:20,187 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:33:20,188 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:33:20,189 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2022-04-28 03:33:20,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:20,214 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:33:20,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:20,221 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:33:20,352 INFO L272 TraceCheckUtils]: 0: Hoare triple {19138#true} call ULTIMATE.init(); {19138#true} is VALID [2022-04-28 03:33:20,352 INFO L290 TraceCheckUtils]: 1: Hoare triple {19138#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {19138#true} is VALID [2022-04-28 03:33:20,352 INFO L290 TraceCheckUtils]: 2: Hoare triple {19138#true} assume true; {19138#true} is VALID [2022-04-28 03:33:20,352 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19138#true} {19138#true} #41#return; {19138#true} is VALID [2022-04-28 03:33:20,352 INFO L272 TraceCheckUtils]: 4: Hoare triple {19138#true} call #t~ret7 := main(); {19138#true} is VALID [2022-04-28 03:33:20,353 INFO L290 TraceCheckUtils]: 5: Hoare triple {19138#true} ~x~0 := 0;~y~0 := 0; {19164#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:20,353 INFO L290 TraceCheckUtils]: 6: Hoare triple {19164#(and (= main_~x~0 0) (= main_~y~0 0))} [177] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1088 4294967296))) (let ((.cse0 (= |v_main_#t~post6_458| |v_main_#t~post6_456|)) (.cse1 (= v_main_~x~0_1088 v_main_~x~0_1087)) (.cse2 (= v_main_~y~0_1120 v_main_~y~0_1119)) (.cse3 (= |v_main_#t~post5_228| |v_main_#t~post5_227|)) (.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and .cse5 (= (+ v_main_~x~0_1088 v_main_~y~0_1120) (+ v_main_~x~0_1087 v_main_~y~0_1119)) (< v_main_~x~0_1088 v_main_~x~0_1087) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1087)) (- 4294967296)) (+ (div (+ v_main_~x~0_1088 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_1120, main_#t~post5=|v_main_#t~post5_228|, main_~x~0=v_main_~x~0_1088, main_#t~post6=|v_main_#t~post6_458|} OutVars{main_#t~post5=|v_main_#t~post5_227|, main_~y~0=v_main_~y~0_1119, main_~x~0=v_main_~x~0_1087, main_#t~post6=|v_main_#t~post6_456|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {19164#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:20,354 INFO L290 TraceCheckUtils]: 7: Hoare triple {19164#(and (= main_~x~0 0) (= main_~y~0 0))} [178] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19164#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:20,354 INFO L290 TraceCheckUtils]: 8: Hoare triple {19164#(and (= main_~x~0 0) (= main_~y~0 0))} [179] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1090 4294967296)) (.cse1 (= v_main_~y~0_1122 v_main_~y~0_1121)) (.cse2 (= |v_main_#t~post4_233| |v_main_#t~post4_232|)) (.cse3 (= v_main_~x~0_1090 v_main_~x~0_1089))) (or (and (= (+ v_main_~x~0_1090 v_main_~y~0_1121) (+ v_main_~x~0_1089 v_main_~y~0_1122)) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1089)) (- 4294967296)) (+ (div (+ v_main_~x~0_1090 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1090 v_main_~x~0_1089) (< .cse0 500000)) (and .cse1 .cse2 (<= 500000 .cse0) (= |v_main_#t~post6_457| |v_main_#t~post6_461|) .cse3) (and (= |v_main_#t~post6_461| |v_main_#t~post6_457|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_233|, main_~y~0=v_main_~y~0_1122, main_~x~0=v_main_~x~0_1090, main_#t~post6=|v_main_#t~post6_461|} OutVars{main_#t~post4=|v_main_#t~post4_232|, main_~y~0=v_main_~y~0_1121, main_~x~0=v_main_~x~0_1089, main_#t~post6=|v_main_#t~post6_457|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {19174#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:33:20,355 INFO L290 TraceCheckUtils]: 9: Hoare triple {19174#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [176] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {19139#false} is VALID [2022-04-28 03:33:20,355 INFO L272 TraceCheckUtils]: 10: Hoare triple {19139#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {19139#false} is VALID [2022-04-28 03:33:20,355 INFO L290 TraceCheckUtils]: 11: Hoare triple {19139#false} ~cond := #in~cond; {19139#false} is VALID [2022-04-28 03:33:20,355 INFO L290 TraceCheckUtils]: 12: Hoare triple {19139#false} assume 0 == ~cond; {19139#false} is VALID [2022-04-28 03:33:20,355 INFO L290 TraceCheckUtils]: 13: Hoare triple {19139#false} assume !false; {19139#false} is VALID [2022-04-28 03:33:20,355 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:20,355 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:33:21,123 INFO L290 TraceCheckUtils]: 13: Hoare triple {19139#false} assume !false; {19139#false} is VALID [2022-04-28 03:33:21,123 INFO L290 TraceCheckUtils]: 12: Hoare triple {19193#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {19139#false} is VALID [2022-04-28 03:33:21,124 INFO L290 TraceCheckUtils]: 11: Hoare triple {19197#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {19193#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:33:21,124 INFO L272 TraceCheckUtils]: 10: Hoare triple {19201#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {19197#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:33:21,124 INFO L290 TraceCheckUtils]: 9: Hoare triple {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [176] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {19201#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:33:21,126 INFO L290 TraceCheckUtils]: 8: Hoare triple {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [179] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1090 4294967296)) (.cse1 (= v_main_~y~0_1122 v_main_~y~0_1121)) (.cse2 (= |v_main_#t~post4_233| |v_main_#t~post4_232|)) (.cse3 (= v_main_~x~0_1090 v_main_~x~0_1089))) (or (and (= (+ v_main_~x~0_1090 v_main_~y~0_1121) (+ v_main_~x~0_1089 v_main_~y~0_1122)) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1089)) (- 4294967296)) (+ (div (+ v_main_~x~0_1090 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1090 v_main_~x~0_1089) (< .cse0 500000)) (and .cse1 .cse2 (<= 500000 .cse0) (= |v_main_#t~post6_457| |v_main_#t~post6_461|) .cse3) (and (= |v_main_#t~post6_461| |v_main_#t~post6_457|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_233|, main_~y~0=v_main_~y~0_1122, main_~x~0=v_main_~x~0_1090, main_#t~post6=|v_main_#t~post6_461|} OutVars{main_#t~post4=|v_main_#t~post4_232|, main_~y~0=v_main_~y~0_1121, main_~x~0=v_main_~x~0_1089, main_#t~post6=|v_main_#t~post6_457|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:21,126 INFO L290 TraceCheckUtils]: 7: Hoare triple {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [178] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:21,149 INFO L290 TraceCheckUtils]: 6: Hoare triple {19215#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1132_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1132_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1132_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [177] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1088 4294967296))) (let ((.cse0 (= |v_main_#t~post6_458| |v_main_#t~post6_456|)) (.cse1 (= v_main_~x~0_1088 v_main_~x~0_1087)) (.cse2 (= v_main_~y~0_1120 v_main_~y~0_1119)) (.cse3 (= |v_main_#t~post5_228| |v_main_#t~post5_227|)) (.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (or (not .cse4) (not .cse5)) .cse3) (and .cse5 (= (+ v_main_~x~0_1088 v_main_~y~0_1120) (+ v_main_~x~0_1087 v_main_~y~0_1119)) (< v_main_~x~0_1088 v_main_~x~0_1087) .cse4 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1087)) (- 4294967296)) (+ (div (+ v_main_~x~0_1088 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_1120, main_#t~post5=|v_main_#t~post5_228|, main_~x~0=v_main_~x~0_1088, main_#t~post6=|v_main_#t~post6_458|} OutVars{main_#t~post5=|v_main_#t~post5_227|, main_~y~0=v_main_~y~0_1119, main_~x~0=v_main_~x~0_1087, main_#t~post6=|v_main_#t~post6_456|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {19205#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:21,150 INFO L290 TraceCheckUtils]: 5: Hoare triple {19138#true} ~x~0 := 0;~y~0 := 0; {19215#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1132_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1132_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1132_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:33:21,150 INFO L272 TraceCheckUtils]: 4: Hoare triple {19138#true} call #t~ret7 := main(); {19138#true} is VALID [2022-04-28 03:33:21,150 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19138#true} {19138#true} #41#return; {19138#true} is VALID [2022-04-28 03:33:21,150 INFO L290 TraceCheckUtils]: 2: Hoare triple {19138#true} assume true; {19138#true} is VALID [2022-04-28 03:33:21,150 INFO L290 TraceCheckUtils]: 1: Hoare triple {19138#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {19138#true} is VALID [2022-04-28 03:33:21,151 INFO L272 TraceCheckUtils]: 0: Hoare triple {19138#true} call ULTIMATE.init(); {19138#true} is VALID [2022-04-28 03:33:21,151 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:21,151 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1470903984] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:33:21,151 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:33:21,151 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:33:22,611 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:33:22,611 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [611620225] [2022-04-28 03:33:22,612 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [611620225] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:33:22,612 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:33:22,612 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [37] imperfect sequences [] total 37 [2022-04-28 03:33:22,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2003329075] [2022-04-28 03:33:22,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:33:22,612 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 113 [2022-04-28 03:33:22,612 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:33:22,612 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:22,669 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:22,669 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-28 03:33:22,670 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:22,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-28 03:33:22,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=1781, Unknown=0, NotChecked=0, Total=1980 [2022-04-28 03:33:22,670 INFO L87 Difference]: Start difference. First operand 115 states and 117 transitions. Second operand has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:26,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:26,846 INFO L93 Difference]: Finished difference Result 127 states and 131 transitions. [2022-04-28 03:33:26,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-04-28 03:33:26,846 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 113 [2022-04-28 03:33:26,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:33:26,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:26,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 127 transitions. [2022-04-28 03:33:26,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:26,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 127 transitions. [2022-04-28 03:33:26,848 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 127 transitions. [2022-04-28 03:33:26,910 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:26,911 INFO L225 Difference]: With dead ends: 127 [2022-04-28 03:33:26,912 INFO L226 Difference]: Without dead ends: 119 [2022-04-28 03:33:26,912 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 29 SyntacticMatches, 69 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1219 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=437, Invalid=5725, Unknown=0, NotChecked=0, Total=6162 [2022-04-28 03:33:26,912 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 78 mSDsluCounter, 172 mSDsCounter, 0 mSdLazyCounter, 3707 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 78 SdHoareTripleChecker+Valid, 184 SdHoareTripleChecker+Invalid, 3743 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 3707 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:33:26,912 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [78 Valid, 184 Invalid, 3743 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 3707 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-28 03:33:26,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2022-04-28 03:33:27,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 118. [2022-04-28 03:33:27,013 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:33:27,014 INFO L82 GeneralOperation]: Start isEquivalent. First operand 119 states. Second operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:27,014 INFO L74 IsIncluded]: Start isIncluded. First operand 119 states. Second operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:27,014 INFO L87 Difference]: Start difference. First operand 119 states. Second operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:27,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:27,015 INFO L93 Difference]: Finished difference Result 119 states and 121 transitions. [2022-04-28 03:33:27,015 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 121 transitions. [2022-04-28 03:33:27,015 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:27,015 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:27,015 INFO L74 IsIncluded]: Start isIncluded. First operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 119 states. [2022-04-28 03:33:27,016 INFO L87 Difference]: Start difference. First operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 119 states. [2022-04-28 03:33:27,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:27,017 INFO L93 Difference]: Finished difference Result 119 states and 121 transitions. [2022-04-28 03:33:27,017 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 121 transitions. [2022-04-28 03:33:27,017 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:27,017 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:27,017 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:33:27,017 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:33:27,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 113 states have (on average 1.0265486725663717) internal successors, (116), 113 states have internal predecessors, (116), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:27,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 120 transitions. [2022-04-28 03:33:27,018 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 120 transitions. Word has length 113 [2022-04-28 03:33:27,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:33:27,018 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 120 transitions. [2022-04-28 03:33:27,018 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 2.945945945945946) internal successors, (109), 36 states have internal predecessors, (109), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:27,018 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 118 states and 120 transitions. [2022-04-28 03:33:27,144 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 120 edges. 120 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:27,144 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 120 transitions. [2022-04-28 03:33:27,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2022-04-28 03:33:27,145 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:33:27,145 INFO L195 NwaCegarLoop]: trace histogram [35, 35, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:33:27,161 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Forceful destruction successful, exit code 0 [2022-04-28 03:33:27,361 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2022-04-28 03:33:27,361 INFO L420 AbstractCegarLoop]: === Iteration 37 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:33:27,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:33:27,361 INFO L85 PathProgramCache]: Analyzing trace with hash 829579533, now seen corresponding path program 34 times [2022-04-28 03:33:27,362 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:27,362 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [42301390] [2022-04-28 03:33:30,462 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:33:30,752 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:33,048 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:33,049 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:33:33,051 INFO L85 PathProgramCache]: Analyzing trace with hash -481243985, now seen corresponding path program 1 times [2022-04-28 03:33:33,051 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:33:33,051 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791235646] [2022-04-28 03:33:33,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:33,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:33:33,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:33,099 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:33:33,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:33,102 INFO L290 TraceCheckUtils]: 0: Hoare triple {20072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {20065#true} is VALID [2022-04-28 03:33:33,102 INFO L290 TraceCheckUtils]: 1: Hoare triple {20065#true} assume true; {20065#true} is VALID [2022-04-28 03:33:33,102 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20065#true} {20065#true} #41#return; {20065#true} is VALID [2022-04-28 03:33:33,103 INFO L272 TraceCheckUtils]: 0: Hoare triple {20065#true} call ULTIMATE.init(); {20072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:33:33,103 INFO L290 TraceCheckUtils]: 1: Hoare triple {20072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {20065#true} is VALID [2022-04-28 03:33:33,103 INFO L290 TraceCheckUtils]: 2: Hoare triple {20065#true} assume true; {20065#true} is VALID [2022-04-28 03:33:33,103 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20065#true} {20065#true} #41#return; {20065#true} is VALID [2022-04-28 03:33:33,103 INFO L272 TraceCheckUtils]: 4: Hoare triple {20065#true} call #t~ret7 := main(); {20065#true} is VALID [2022-04-28 03:33:33,103 INFO L290 TraceCheckUtils]: 5: Hoare triple {20065#true} ~x~0 := 0;~y~0 := 0; {20070#(= main_~x~0 0)} is VALID [2022-04-28 03:33:33,104 INFO L290 TraceCheckUtils]: 6: Hoare triple {20070#(= main_~x~0 0)} [181] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1138 4294967296))) (let ((.cse0 (= v_main_~x~0_1138 v_main_~x~0_1137)) (.cse1 (= |v_main_#t~post5_235| |v_main_#t~post5_234|)) (.cse2 (= |v_main_#t~post6_472| |v_main_#t~post6_470|)) (.cse3 (= v_main_~y~0_1171 v_main_~y~0_1170)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_1170 v_main_~y~0_1171) (<= (div (+ (* (- 1) v_main_~y~0_1171) (* (- 1) v_main_~x~0_1138) 1000000 v_main_~y~0_1170) (- 4294967296)) (+ (div (+ v_main_~x~0_1138 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1137 v_main_~y~0_1170) (+ v_main_~x~0_1138 v_main_~y~0_1171)) .cse5)))) InVars {main_~y~0=v_main_~y~0_1171, main_#t~post5=|v_main_#t~post5_235|, main_~x~0=v_main_~x~0_1138, main_#t~post6=|v_main_#t~post6_472|} OutVars{main_#t~post5=|v_main_#t~post5_234|, main_~y~0=v_main_~y~0_1170, main_~x~0=v_main_~x~0_1137, main_#t~post6=|v_main_#t~post6_470|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {20070#(= main_~x~0 0)} is VALID [2022-04-28 03:33:33,104 INFO L290 TraceCheckUtils]: 7: Hoare triple {20070#(= main_~x~0 0)} [182] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20070#(= main_~x~0 0)} is VALID [2022-04-28 03:33:33,105 INFO L290 TraceCheckUtils]: 8: Hoare triple {20070#(= main_~x~0 0)} [183] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_1173 v_main_~y~0_1172)) (.cse2 (= |v_main_#t~post6_475| |v_main_#t~post6_471|)) (.cse0 (mod v_main_~x~0_1140 4294967296))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_1172) v_main_~y~0_1173 (* (- 1) v_main_~x~0_1140) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1140 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1139 v_main_~y~0_1173) (+ v_main_~x~0_1140 v_main_~y~0_1172)) (< v_main_~y~0_1173 v_main_~y~0_1172) (< .cse0 500000)) (and (= v_main_~x~0_1140 v_main_~x~0_1139) .cse1 (= |v_main_#t~post4_240| |v_main_#t~post4_239|) .cse2) (and (= v_main_~x~0_1139 v_main_~x~0_1140) .cse1 .cse2 (= |v_main_#t~post4_239| |v_main_#t~post4_240|) (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_240|, main_~y~0=v_main_~y~0_1173, main_~x~0=v_main_~x~0_1140, main_#t~post6=|v_main_#t~post6_475|} OutVars{main_#t~post4=|v_main_#t~post4_239|, main_~y~0=v_main_~y~0_1172, main_~x~0=v_main_~x~0_1139, main_#t~post6=|v_main_#t~post6_471|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {20071#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:33:33,105 INFO L290 TraceCheckUtils]: 9: Hoare triple {20071#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [180] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {20066#false} is VALID [2022-04-28 03:33:33,105 INFO L272 TraceCheckUtils]: 10: Hoare triple {20066#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {20066#false} is VALID [2022-04-28 03:33:33,105 INFO L290 TraceCheckUtils]: 11: Hoare triple {20066#false} ~cond := #in~cond; {20066#false} is VALID [2022-04-28 03:33:33,106 INFO L290 TraceCheckUtils]: 12: Hoare triple {20066#false} assume 0 == ~cond; {20066#false} is VALID [2022-04-28 03:33:33,106 INFO L290 TraceCheckUtils]: 13: Hoare triple {20066#false} assume !false; {20066#false} is VALID [2022-04-28 03:33:33,106 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:33,106 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:33:33,106 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791235646] [2022-04-28 03:33:33,106 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1791235646] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:33:33,106 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [526116632] [2022-04-28 03:33:33,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:33,106 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:33:33,106 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:33:33,107 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:33:33,109 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2022-04-28 03:33:33,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:33,135 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:33:33,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:33,143 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:33:33,295 INFO L272 TraceCheckUtils]: 0: Hoare triple {20065#true} call ULTIMATE.init(); {20065#true} is VALID [2022-04-28 03:33:33,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {20065#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {20065#true} is VALID [2022-04-28 03:33:33,296 INFO L290 TraceCheckUtils]: 2: Hoare triple {20065#true} assume true; {20065#true} is VALID [2022-04-28 03:33:33,296 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20065#true} {20065#true} #41#return; {20065#true} is VALID [2022-04-28 03:33:33,296 INFO L272 TraceCheckUtils]: 4: Hoare triple {20065#true} call #t~ret7 := main(); {20065#true} is VALID [2022-04-28 03:33:33,296 INFO L290 TraceCheckUtils]: 5: Hoare triple {20065#true} ~x~0 := 0;~y~0 := 0; {20091#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:33,297 INFO L290 TraceCheckUtils]: 6: Hoare triple {20091#(and (= main_~x~0 0) (= main_~y~0 0))} [181] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1138 4294967296))) (let ((.cse0 (= v_main_~x~0_1138 v_main_~x~0_1137)) (.cse1 (= |v_main_#t~post5_235| |v_main_#t~post5_234|)) (.cse2 (= |v_main_#t~post6_472| |v_main_#t~post6_470|)) (.cse3 (= v_main_~y~0_1171 v_main_~y~0_1170)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_1170 v_main_~y~0_1171) (<= (div (+ (* (- 1) v_main_~y~0_1171) (* (- 1) v_main_~x~0_1138) 1000000 v_main_~y~0_1170) (- 4294967296)) (+ (div (+ v_main_~x~0_1138 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1137 v_main_~y~0_1170) (+ v_main_~x~0_1138 v_main_~y~0_1171)) .cse5)))) InVars {main_~y~0=v_main_~y~0_1171, main_#t~post5=|v_main_#t~post5_235|, main_~x~0=v_main_~x~0_1138, main_#t~post6=|v_main_#t~post6_472|} OutVars{main_#t~post5=|v_main_#t~post5_234|, main_~y~0=v_main_~y~0_1170, main_~x~0=v_main_~x~0_1137, main_#t~post6=|v_main_#t~post6_470|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {20091#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:33,297 INFO L290 TraceCheckUtils]: 7: Hoare triple {20091#(and (= main_~x~0 0) (= main_~y~0 0))} [182] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20091#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:33,298 INFO L290 TraceCheckUtils]: 8: Hoare triple {20091#(and (= main_~x~0 0) (= main_~y~0 0))} [183] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_1173 v_main_~y~0_1172)) (.cse2 (= |v_main_#t~post6_475| |v_main_#t~post6_471|)) (.cse0 (mod v_main_~x~0_1140 4294967296))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_1172) v_main_~y~0_1173 (* (- 1) v_main_~x~0_1140) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1140 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1139 v_main_~y~0_1173) (+ v_main_~x~0_1140 v_main_~y~0_1172)) (< v_main_~y~0_1173 v_main_~y~0_1172) (< .cse0 500000)) (and (= v_main_~x~0_1140 v_main_~x~0_1139) .cse1 (= |v_main_#t~post4_240| |v_main_#t~post4_239|) .cse2) (and (= v_main_~x~0_1139 v_main_~x~0_1140) .cse1 .cse2 (= |v_main_#t~post4_239| |v_main_#t~post4_240|) (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_240|, main_~y~0=v_main_~y~0_1173, main_~x~0=v_main_~x~0_1140, main_#t~post6=|v_main_#t~post6_475|} OutVars{main_#t~post4=|v_main_#t~post4_239|, main_~y~0=v_main_~y~0_1172, main_~x~0=v_main_~x~0_1139, main_#t~post6=|v_main_#t~post6_471|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {20101#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:33:33,299 INFO L290 TraceCheckUtils]: 9: Hoare triple {20101#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [180] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {20066#false} is VALID [2022-04-28 03:33:33,299 INFO L272 TraceCheckUtils]: 10: Hoare triple {20066#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {20066#false} is VALID [2022-04-28 03:33:33,299 INFO L290 TraceCheckUtils]: 11: Hoare triple {20066#false} ~cond := #in~cond; {20066#false} is VALID [2022-04-28 03:33:33,299 INFO L290 TraceCheckUtils]: 12: Hoare triple {20066#false} assume 0 == ~cond; {20066#false} is VALID [2022-04-28 03:33:33,299 INFO L290 TraceCheckUtils]: 13: Hoare triple {20066#false} assume !false; {20066#false} is VALID [2022-04-28 03:33:33,299 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:33,299 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:33:34,284 INFO L290 TraceCheckUtils]: 13: Hoare triple {20066#false} assume !false; {20066#false} is VALID [2022-04-28 03:33:34,284 INFO L290 TraceCheckUtils]: 12: Hoare triple {20120#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {20066#false} is VALID [2022-04-28 03:33:34,285 INFO L290 TraceCheckUtils]: 11: Hoare triple {20124#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {20120#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:33:34,285 INFO L272 TraceCheckUtils]: 10: Hoare triple {20128#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {20124#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:33:34,286 INFO L290 TraceCheckUtils]: 9: Hoare triple {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [180] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {20128#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:33:34,288 INFO L290 TraceCheckUtils]: 8: Hoare triple {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [183] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_1173 v_main_~y~0_1172)) (.cse2 (= |v_main_#t~post6_475| |v_main_#t~post6_471|)) (.cse0 (mod v_main_~x~0_1140 4294967296))) (or (and (<= (div (+ (* (- 1) v_main_~y~0_1172) v_main_~y~0_1173 (* (- 1) v_main_~x~0_1140) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1140 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1139 v_main_~y~0_1173) (+ v_main_~x~0_1140 v_main_~y~0_1172)) (< v_main_~y~0_1173 v_main_~y~0_1172) (< .cse0 500000)) (and (= v_main_~x~0_1140 v_main_~x~0_1139) .cse1 (= |v_main_#t~post4_240| |v_main_#t~post4_239|) .cse2) (and (= v_main_~x~0_1139 v_main_~x~0_1140) .cse1 .cse2 (= |v_main_#t~post4_239| |v_main_#t~post4_240|) (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_240|, main_~y~0=v_main_~y~0_1173, main_~x~0=v_main_~x~0_1140, main_#t~post6=|v_main_#t~post6_475|} OutVars{main_#t~post4=|v_main_#t~post4_239|, main_~y~0=v_main_~y~0_1172, main_~x~0=v_main_~x~0_1139, main_#t~post6=|v_main_#t~post6_471|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:34,289 INFO L290 TraceCheckUtils]: 7: Hoare triple {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [182] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:34,429 INFO L290 TraceCheckUtils]: 6: Hoare triple {20142#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1183_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1183_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1183_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [181] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1138 4294967296))) (let ((.cse0 (= v_main_~x~0_1138 v_main_~x~0_1137)) (.cse1 (= |v_main_#t~post5_235| |v_main_#t~post5_234|)) (.cse2 (= |v_main_#t~post6_472| |v_main_#t~post6_470|)) (.cse3 (= v_main_~y~0_1171 v_main_~y~0_1170)) (.cse4 (< .cse6 1000000)) (.cse5 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 (or (not .cse4) (not .cse5)) .cse1 .cse2 .cse3) (and .cse4 (< v_main_~y~0_1170 v_main_~y~0_1171) (<= (div (+ (* (- 1) v_main_~y~0_1171) (* (- 1) v_main_~x~0_1138) 1000000 v_main_~y~0_1170) (- 4294967296)) (+ (div (+ v_main_~x~0_1138 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1137 v_main_~y~0_1170) (+ v_main_~x~0_1138 v_main_~y~0_1171)) .cse5)))) InVars {main_~y~0=v_main_~y~0_1171, main_#t~post5=|v_main_#t~post5_235|, main_~x~0=v_main_~x~0_1138, main_#t~post6=|v_main_#t~post6_472|} OutVars{main_#t~post5=|v_main_#t~post5_234|, main_~y~0=v_main_~y~0_1170, main_~x~0=v_main_~x~0_1137, main_#t~post6=|v_main_#t~post6_470|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {20132#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:34,430 INFO L290 TraceCheckUtils]: 5: Hoare triple {20065#true} ~x~0 := 0;~y~0 := 0; {20142#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1183_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1183_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1183_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:33:34,430 INFO L272 TraceCheckUtils]: 4: Hoare triple {20065#true} call #t~ret7 := main(); {20065#true} is VALID [2022-04-28 03:33:34,430 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20065#true} {20065#true} #41#return; {20065#true} is VALID [2022-04-28 03:33:34,430 INFO L290 TraceCheckUtils]: 2: Hoare triple {20065#true} assume true; {20065#true} is VALID [2022-04-28 03:33:34,430 INFO L290 TraceCheckUtils]: 1: Hoare triple {20065#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {20065#true} is VALID [2022-04-28 03:33:34,430 INFO L272 TraceCheckUtils]: 0: Hoare triple {20065#true} call ULTIMATE.init(); {20065#true} is VALID [2022-04-28 03:33:34,430 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:34,430 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [526116632] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:33:34,430 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:33:34,431 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:33:36,066 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:33:36,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [42301390] [2022-04-28 03:33:36,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [42301390] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:33:36,066 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:33:36,066 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [38] imperfect sequences [] total 38 [2022-04-28 03:33:36,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430203524] [2022-04-28 03:33:36,067 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:33:36,067 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 116 [2022-04-28 03:33:36,067 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:33:36,067 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:36,117 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 116 edges. 116 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:36,117 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-28 03:33:36,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:36,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-28 03:33:36,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=204, Invalid=1866, Unknown=0, NotChecked=0, Total=2070 [2022-04-28 03:33:36,118 INFO L87 Difference]: Start difference. First operand 118 states and 120 transitions. Second operand has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:40,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:40,230 INFO L93 Difference]: Finished difference Result 130 states and 134 transitions. [2022-04-28 03:33:40,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-28 03:33:40,230 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 116 [2022-04-28 03:33:40,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:33:40,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:40,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 130 transitions. [2022-04-28 03:33:40,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:40,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 130 transitions. [2022-04-28 03:33:40,232 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 130 transitions. [2022-04-28 03:33:40,331 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:40,333 INFO L225 Difference]: With dead ends: 130 [2022-04-28 03:33:40,333 INFO L226 Difference]: Without dead ends: 122 [2022-04-28 03:33:40,333 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 29 SyntacticMatches, 71 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1272 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=449, Invalid=6031, Unknown=0, NotChecked=0, Total=6480 [2022-04-28 03:33:40,333 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 80 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 3921 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 3958 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 3921 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:33:40,334 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [80 Valid, 189 Invalid, 3958 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 3921 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-28 03:33:40,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2022-04-28 03:33:40,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 121. [2022-04-28 03:33:40,508 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:33:40,508 INFO L82 GeneralOperation]: Start isEquivalent. First operand 122 states. Second operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:40,508 INFO L74 IsIncluded]: Start isIncluded. First operand 122 states. Second operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:40,508 INFO L87 Difference]: Start difference. First operand 122 states. Second operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:40,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:40,509 INFO L93 Difference]: Finished difference Result 122 states and 124 transitions. [2022-04-28 03:33:40,509 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 124 transitions. [2022-04-28 03:33:40,510 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:40,510 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:40,510 INFO L74 IsIncluded]: Start isIncluded. First operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 122 states. [2022-04-28 03:33:40,510 INFO L87 Difference]: Start difference. First operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 122 states. [2022-04-28 03:33:40,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:40,511 INFO L93 Difference]: Finished difference Result 122 states and 124 transitions. [2022-04-28 03:33:40,511 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 124 transitions. [2022-04-28 03:33:40,511 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:40,511 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:40,511 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:33:40,511 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:33:40,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 116 states have internal predecessors, (119), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:40,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 123 transitions. [2022-04-28 03:33:40,512 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 123 transitions. Word has length 116 [2022-04-28 03:33:40,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:33:40,513 INFO L495 AbstractCegarLoop]: Abstraction has 121 states and 123 transitions. [2022-04-28 03:33:40,513 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 2.9473684210526314) internal successors, (112), 37 states have internal predecessors, (112), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:40,513 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 121 states and 123 transitions. [2022-04-28 03:33:40,681 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 123 edges. 123 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:40,681 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 123 transitions. [2022-04-28 03:33:40,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2022-04-28 03:33:40,681 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:33:40,682 INFO L195 NwaCegarLoop]: trace histogram [36, 36, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:33:40,700 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Forceful destruction successful, exit code 0 [2022-04-28 03:33:40,882 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2022-04-28 03:33:40,882 INFO L420 AbstractCegarLoop]: === Iteration 38 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:33:40,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:33:40,882 INFO L85 PathProgramCache]: Analyzing trace with hash 1219907141, now seen corresponding path program 35 times [2022-04-28 03:33:40,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:40,883 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [596456304] [2022-04-28 03:33:41,927 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:42,348 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:42,349 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:33:42,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1568288175, now seen corresponding path program 1 times [2022-04-28 03:33:42,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:33:42,353 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887189573] [2022-04-28 03:33:42,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:42,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:33:42,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:42,443 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:33:42,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:42,445 INFO L290 TraceCheckUtils]: 0: Hoare triple {21020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21013#true} is VALID [2022-04-28 03:33:42,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {21013#true} assume true; {21013#true} is VALID [2022-04-28 03:33:42,445 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21013#true} {21013#true} #41#return; {21013#true} is VALID [2022-04-28 03:33:42,446 INFO L272 TraceCheckUtils]: 0: Hoare triple {21013#true} call ULTIMATE.init(); {21020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:33:42,446 INFO L290 TraceCheckUtils]: 1: Hoare triple {21020#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21013#true} is VALID [2022-04-28 03:33:42,446 INFO L290 TraceCheckUtils]: 2: Hoare triple {21013#true} assume true; {21013#true} is VALID [2022-04-28 03:33:42,446 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21013#true} {21013#true} #41#return; {21013#true} is VALID [2022-04-28 03:33:42,446 INFO L272 TraceCheckUtils]: 4: Hoare triple {21013#true} call #t~ret7 := main(); {21013#true} is VALID [2022-04-28 03:33:42,446 INFO L290 TraceCheckUtils]: 5: Hoare triple {21013#true} ~x~0 := 0;~y~0 := 0; {21018#(= main_~x~0 0)} is VALID [2022-04-28 03:33:42,447 INFO L290 TraceCheckUtils]: 6: Hoare triple {21018#(= main_~x~0 0)} [185] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1189 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_1223 v_main_~y~0_1222)) (.cse3 (= |v_main_#t~post6_486| |v_main_#t~post6_484|)) (.cse4 (= v_main_~x~0_1189 v_main_~x~0_1188)) (.cse5 (= |v_main_#t~post5_242| |v_main_#t~post5_241|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1223) (* (- 1) v_main_~x~0_1189) 1000000 v_main_~y~0_1222) (- 4294967296)) (+ (div (+ v_main_~x~0_1189 (- 4294967295)) 4294967296) 1)) .cse1 (= (+ v_main_~x~0_1188 v_main_~y~0_1222) (+ v_main_~x~0_1189 v_main_~y~0_1223)) .cse2 (< v_main_~y~0_1222 v_main_~y~0_1223)) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1223, main_#t~post5=|v_main_#t~post5_242|, main_~x~0=v_main_~x~0_1189, main_#t~post6=|v_main_#t~post6_486|} OutVars{main_#t~post5=|v_main_#t~post5_241|, main_~y~0=v_main_~y~0_1222, main_~x~0=v_main_~x~0_1188, main_#t~post6=|v_main_#t~post6_484|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21018#(= main_~x~0 0)} is VALID [2022-04-28 03:33:42,447 INFO L290 TraceCheckUtils]: 7: Hoare triple {21018#(= main_~x~0 0)} [186] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21018#(= main_~x~0 0)} is VALID [2022-04-28 03:33:42,448 INFO L290 TraceCheckUtils]: 8: Hoare triple {21018#(= main_~x~0 0)} [187] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1225 v_main_~y~0_1224)) (.cse2 (= |v_main_#t~post4_247| |v_main_#t~post4_246|)) (.cse3 (= |v_main_#t~post6_489| |v_main_#t~post6_485|)) (.cse4 (= v_main_~x~0_1191 v_main_~x~0_1190)) (.cse1 (mod v_main_~x~0_1191 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< v_main_~x~0_1191 v_main_~x~0_1190) (< .cse1 500000) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1190)) (- 4294967296)) (+ (div (+ v_main_~x~0_1191 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1191 v_main_~y~0_1224) (+ v_main_~x~0_1190 v_main_~y~0_1225))))) InVars {main_#t~post4=|v_main_#t~post4_247|, main_~y~0=v_main_~y~0_1225, main_~x~0=v_main_~x~0_1191, main_#t~post6=|v_main_#t~post6_489|} OutVars{main_#t~post4=|v_main_#t~post4_246|, main_~y~0=v_main_~y~0_1224, main_~x~0=v_main_~x~0_1190, main_#t~post6=|v_main_#t~post6_485|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {21019#(<= (* 4294967296 (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296))) main_~x~0)} is VALID [2022-04-28 03:33:42,450 INFO L290 TraceCheckUtils]: 9: Hoare triple {21019#(<= (* 4294967296 (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296))) main_~x~0)} [184] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21014#false} is VALID [2022-04-28 03:33:42,450 INFO L272 TraceCheckUtils]: 10: Hoare triple {21014#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21014#false} is VALID [2022-04-28 03:33:42,450 INFO L290 TraceCheckUtils]: 11: Hoare triple {21014#false} ~cond := #in~cond; {21014#false} is VALID [2022-04-28 03:33:42,450 INFO L290 TraceCheckUtils]: 12: Hoare triple {21014#false} assume 0 == ~cond; {21014#false} is VALID [2022-04-28 03:33:42,450 INFO L290 TraceCheckUtils]: 13: Hoare triple {21014#false} assume !false; {21014#false} is VALID [2022-04-28 03:33:42,450 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:42,450 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:33:42,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887189573] [2022-04-28 03:33:42,451 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [887189573] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:33:42,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [533331418] [2022-04-28 03:33:42,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:42,451 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:33:42,451 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:33:42,468 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:33:42,469 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-04-28 03:33:42,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:42,508 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:33:42,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:42,515 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:33:42,698 INFO L272 TraceCheckUtils]: 0: Hoare triple {21013#true} call ULTIMATE.init(); {21013#true} is VALID [2022-04-28 03:33:42,699 INFO L290 TraceCheckUtils]: 1: Hoare triple {21013#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21013#true} is VALID [2022-04-28 03:33:42,699 INFO L290 TraceCheckUtils]: 2: Hoare triple {21013#true} assume true; {21013#true} is VALID [2022-04-28 03:33:42,699 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21013#true} {21013#true} #41#return; {21013#true} is VALID [2022-04-28 03:33:42,699 INFO L272 TraceCheckUtils]: 4: Hoare triple {21013#true} call #t~ret7 := main(); {21013#true} is VALID [2022-04-28 03:33:42,699 INFO L290 TraceCheckUtils]: 5: Hoare triple {21013#true} ~x~0 := 0;~y~0 := 0; {21039#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:42,700 INFO L290 TraceCheckUtils]: 6: Hoare triple {21039#(and (= main_~x~0 0) (= main_~y~0 0))} [185] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1189 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_1223 v_main_~y~0_1222)) (.cse3 (= |v_main_#t~post6_486| |v_main_#t~post6_484|)) (.cse4 (= v_main_~x~0_1189 v_main_~x~0_1188)) (.cse5 (= |v_main_#t~post5_242| |v_main_#t~post5_241|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1223) (* (- 1) v_main_~x~0_1189) 1000000 v_main_~y~0_1222) (- 4294967296)) (+ (div (+ v_main_~x~0_1189 (- 4294967295)) 4294967296) 1)) .cse1 (= (+ v_main_~x~0_1188 v_main_~y~0_1222) (+ v_main_~x~0_1189 v_main_~y~0_1223)) .cse2 (< v_main_~y~0_1222 v_main_~y~0_1223)) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1223, main_#t~post5=|v_main_#t~post5_242|, main_~x~0=v_main_~x~0_1189, main_#t~post6=|v_main_#t~post6_486|} OutVars{main_#t~post5=|v_main_#t~post5_241|, main_~y~0=v_main_~y~0_1222, main_~x~0=v_main_~x~0_1188, main_#t~post6=|v_main_#t~post6_484|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21039#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:42,700 INFO L290 TraceCheckUtils]: 7: Hoare triple {21039#(and (= main_~x~0 0) (= main_~y~0 0))} [186] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21039#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:42,701 INFO L290 TraceCheckUtils]: 8: Hoare triple {21039#(and (= main_~x~0 0) (= main_~y~0 0))} [187] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1225 v_main_~y~0_1224)) (.cse2 (= |v_main_#t~post4_247| |v_main_#t~post4_246|)) (.cse3 (= |v_main_#t~post6_489| |v_main_#t~post6_485|)) (.cse4 (= v_main_~x~0_1191 v_main_~x~0_1190)) (.cse1 (mod v_main_~x~0_1191 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< v_main_~x~0_1191 v_main_~x~0_1190) (< .cse1 500000) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1190)) (- 4294967296)) (+ (div (+ v_main_~x~0_1191 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1191 v_main_~y~0_1224) (+ v_main_~x~0_1190 v_main_~y~0_1225))))) InVars {main_#t~post4=|v_main_#t~post4_247|, main_~y~0=v_main_~y~0_1225, main_~x~0=v_main_~x~0_1191, main_#t~post6=|v_main_#t~post6_489|} OutVars{main_#t~post4=|v_main_#t~post4_246|, main_~y~0=v_main_~y~0_1224, main_~x~0=v_main_~x~0_1190, main_#t~post6=|v_main_#t~post6_485|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {21049#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:33:42,701 INFO L290 TraceCheckUtils]: 9: Hoare triple {21049#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [184] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21014#false} is VALID [2022-04-28 03:33:42,701 INFO L272 TraceCheckUtils]: 10: Hoare triple {21014#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21014#false} is VALID [2022-04-28 03:33:42,702 INFO L290 TraceCheckUtils]: 11: Hoare triple {21014#false} ~cond := #in~cond; {21014#false} is VALID [2022-04-28 03:33:42,702 INFO L290 TraceCheckUtils]: 12: Hoare triple {21014#false} assume 0 == ~cond; {21014#false} is VALID [2022-04-28 03:33:42,702 INFO L290 TraceCheckUtils]: 13: Hoare triple {21014#false} assume !false; {21014#false} is VALID [2022-04-28 03:33:42,702 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:42,702 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:33:43,542 INFO L290 TraceCheckUtils]: 13: Hoare triple {21014#false} assume !false; {21014#false} is VALID [2022-04-28 03:33:43,543 INFO L290 TraceCheckUtils]: 12: Hoare triple {21068#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {21014#false} is VALID [2022-04-28 03:33:43,543 INFO L290 TraceCheckUtils]: 11: Hoare triple {21072#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {21068#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:33:43,543 INFO L272 TraceCheckUtils]: 10: Hoare triple {21076#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21072#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:33:43,543 INFO L290 TraceCheckUtils]: 9: Hoare triple {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [184] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21076#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:33:43,547 INFO L290 TraceCheckUtils]: 8: Hoare triple {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [187] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1225 v_main_~y~0_1224)) (.cse2 (= |v_main_#t~post4_247| |v_main_#t~post4_246|)) (.cse3 (= |v_main_#t~post6_489| |v_main_#t~post6_485|)) (.cse4 (= v_main_~x~0_1191 v_main_~x~0_1190)) (.cse1 (mod v_main_~x~0_1191 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< v_main_~x~0_1191 v_main_~x~0_1190) (< .cse1 500000) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1190)) (- 4294967296)) (+ (div (+ v_main_~x~0_1191 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1191 v_main_~y~0_1224) (+ v_main_~x~0_1190 v_main_~y~0_1225))))) InVars {main_#t~post4=|v_main_#t~post4_247|, main_~y~0=v_main_~y~0_1225, main_~x~0=v_main_~x~0_1191, main_#t~post6=|v_main_#t~post6_489|} OutVars{main_#t~post4=|v_main_#t~post4_246|, main_~y~0=v_main_~y~0_1224, main_~x~0=v_main_~x~0_1190, main_#t~post6=|v_main_#t~post6_485|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:43,547 INFO L290 TraceCheckUtils]: 7: Hoare triple {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [186] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:43,561 INFO L290 TraceCheckUtils]: 6: Hoare triple {21090#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1235_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1235_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1235_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [185] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1189 4294967296))) (let ((.cse1 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000)) (.cse0 (= v_main_~y~0_1223 v_main_~y~0_1222)) (.cse3 (= |v_main_#t~post6_486| |v_main_#t~post6_484|)) (.cse4 (= v_main_~x~0_1189 v_main_~x~0_1188)) (.cse5 (= |v_main_#t~post5_242| |v_main_#t~post5_241|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1223) (* (- 1) v_main_~x~0_1189) 1000000 v_main_~y~0_1222) (- 4294967296)) (+ (div (+ v_main_~x~0_1189 (- 4294967295)) 4294967296) 1)) .cse1 (= (+ v_main_~x~0_1188 v_main_~y~0_1222) (+ v_main_~x~0_1189 v_main_~y~0_1223)) .cse2 (< v_main_~y~0_1222 v_main_~y~0_1223)) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1223, main_#t~post5=|v_main_#t~post5_242|, main_~x~0=v_main_~x~0_1189, main_#t~post6=|v_main_#t~post6_486|} OutVars{main_#t~post5=|v_main_#t~post5_241|, main_~y~0=v_main_~y~0_1222, main_~x~0=v_main_~x~0_1188, main_#t~post6=|v_main_#t~post6_484|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21080#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:43,562 INFO L290 TraceCheckUtils]: 5: Hoare triple {21013#true} ~x~0 := 0;~y~0 := 0; {21090#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1235_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1235_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1235_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:33:43,562 INFO L272 TraceCheckUtils]: 4: Hoare triple {21013#true} call #t~ret7 := main(); {21013#true} is VALID [2022-04-28 03:33:43,562 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21013#true} {21013#true} #41#return; {21013#true} is VALID [2022-04-28 03:33:43,562 INFO L290 TraceCheckUtils]: 2: Hoare triple {21013#true} assume true; {21013#true} is VALID [2022-04-28 03:33:43,562 INFO L290 TraceCheckUtils]: 1: Hoare triple {21013#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21013#true} is VALID [2022-04-28 03:33:43,562 INFO L272 TraceCheckUtils]: 0: Hoare triple {21013#true} call ULTIMATE.init(); {21013#true} is VALID [2022-04-28 03:33:43,562 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:43,562 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [533331418] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:33:43,562 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:33:43,562 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:33:45,074 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:33:45,074 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [596456304] [2022-04-28 03:33:45,074 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [596456304] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:33:45,074 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:33:45,074 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [39] imperfect sequences [] total 39 [2022-04-28 03:33:45,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209329373] [2022-04-28 03:33:45,074 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:33:45,075 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 119 [2022-04-28 03:33:45,075 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:33:45,075 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:45,184 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:45,184 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-04-28 03:33:45,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:45,185 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-04-28 03:33:45,185 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=1953, Unknown=0, NotChecked=0, Total=2162 [2022-04-28 03:33:45,185 INFO L87 Difference]: Start difference. First operand 121 states and 123 transitions. Second operand has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:49,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:49,692 INFO L93 Difference]: Finished difference Result 133 states and 137 transitions. [2022-04-28 03:33:49,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-04-28 03:33:49,693 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 119 [2022-04-28 03:33:49,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:33:49,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:49,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 133 transitions. [2022-04-28 03:33:49,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:49,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 133 transitions. [2022-04-28 03:33:49,694 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 39 states and 133 transitions. [2022-04-28 03:33:49,778 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 133 edges. 133 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:49,779 INFO L225 Difference]: With dead ends: 133 [2022-04-28 03:33:49,779 INFO L226 Difference]: Without dead ends: 125 [2022-04-28 03:33:49,780 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 29 SyntacticMatches, 73 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1326 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=461, Invalid=6345, Unknown=0, NotChecked=0, Total=6806 [2022-04-28 03:33:49,780 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 82 mSDsluCounter, 182 mSDsCounter, 0 mSdLazyCounter, 4141 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 4179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 4141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:33:49,780 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [82 Valid, 194 Invalid, 4179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 4141 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-28 03:33:49,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2022-04-28 03:33:49,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 124. [2022-04-28 03:33:49,959 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:33:49,959 INFO L82 GeneralOperation]: Start isEquivalent. First operand 125 states. Second operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:49,960 INFO L74 IsIncluded]: Start isIncluded. First operand 125 states. Second operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:49,960 INFO L87 Difference]: Start difference. First operand 125 states. Second operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:49,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:49,961 INFO L93 Difference]: Finished difference Result 125 states and 127 transitions. [2022-04-28 03:33:49,961 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 127 transitions. [2022-04-28 03:33:49,961 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:49,961 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:49,961 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 125 states. [2022-04-28 03:33:49,961 INFO L87 Difference]: Start difference. First operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 125 states. [2022-04-28 03:33:49,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:33:49,962 INFO L93 Difference]: Finished difference Result 125 states and 127 transitions. [2022-04-28 03:33:49,962 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 127 transitions. [2022-04-28 03:33:49,962 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:33:49,962 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:33:49,962 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:33:49,962 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:33:49,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 119 states have (on average 1.0252100840336134) internal successors, (122), 119 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:49,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 126 transitions. [2022-04-28 03:33:49,964 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 126 transitions. Word has length 119 [2022-04-28 03:33:49,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:33:49,964 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 126 transitions. [2022-04-28 03:33:49,964 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 39 states have (on average 2.948717948717949) internal successors, (115), 38 states have internal predecessors, (115), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:33:49,964 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 124 states and 126 transitions. [2022-04-28 03:33:50,129 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:33:50,129 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 126 transitions. [2022-04-28 03:33:50,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2022-04-28 03:33:50,130 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:33:50,130 INFO L195 NwaCegarLoop]: trace histogram [37, 37, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:33:50,146 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Forceful destruction successful, exit code 0 [2022-04-28 03:33:50,330 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 36 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2022-04-28 03:33:50,330 INFO L420 AbstractCegarLoop]: === Iteration 39 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:33:50,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:33:50,331 INFO L85 PathProgramCache]: Analyzing trace with hash -1301760499, now seen corresponding path program 36 times [2022-04-28 03:33:50,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:33:50,331 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1941070260] [2022-04-28 03:33:54,617 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:33:54,856 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:55,381 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:33:55,382 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:33:55,384 INFO L85 PathProgramCache]: Analyzing trace with hash -677146961, now seen corresponding path program 1 times [2022-04-28 03:33:55,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:33:55,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497717070] [2022-04-28 03:33:55,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:55,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:33:55,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:55,447 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:33:55,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:55,450 INFO L290 TraceCheckUtils]: 0: Hoare triple {21989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21982#true} is VALID [2022-04-28 03:33:55,450 INFO L290 TraceCheckUtils]: 1: Hoare triple {21982#true} assume true; {21982#true} is VALID [2022-04-28 03:33:55,450 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21982#true} {21982#true} #41#return; {21982#true} is VALID [2022-04-28 03:33:55,450 INFO L272 TraceCheckUtils]: 0: Hoare triple {21982#true} call ULTIMATE.init(); {21989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:33:55,450 INFO L290 TraceCheckUtils]: 1: Hoare triple {21989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21982#true} is VALID [2022-04-28 03:33:55,450 INFO L290 TraceCheckUtils]: 2: Hoare triple {21982#true} assume true; {21982#true} is VALID [2022-04-28 03:33:55,451 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21982#true} {21982#true} #41#return; {21982#true} is VALID [2022-04-28 03:33:55,451 INFO L272 TraceCheckUtils]: 4: Hoare triple {21982#true} call #t~ret7 := main(); {21982#true} is VALID [2022-04-28 03:33:55,451 INFO L290 TraceCheckUtils]: 5: Hoare triple {21982#true} ~x~0 := 0;~y~0 := 0; {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:55,452 INFO L290 TraceCheckUtils]: 6: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [189] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1241 4294967296))) (let ((.cse0 (= |v_main_#t~post6_500| |v_main_#t~post6_498|)) (.cse3 (= v_main_~x~0_1241 v_main_~x~0_1240)) (.cse4 (= v_main_~y~0_1276 v_main_~y~0_1275)) (.cse5 (= |v_main_#t~post5_249| |v_main_#t~post5_248|)) (.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and .cse0 .cse3 .cse4 .cse5) (and .cse2 (<= (div (+ (* (- 1) v_main_~x~0_1241) 1000000 (* (- 1) v_main_~y~0_1276) v_main_~y~0_1275) (- 4294967296)) (+ (div (+ v_main_~x~0_1241 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~y~0_1275 v_main_~y~0_1276) (= (+ v_main_~x~0_1241 v_main_~y~0_1276) (+ v_main_~x~0_1240 v_main_~y~0_1275)))))) InVars {main_~y~0=v_main_~y~0_1276, main_#t~post5=|v_main_#t~post5_249|, main_~x~0=v_main_~x~0_1241, main_#t~post6=|v_main_#t~post6_500|} OutVars{main_#t~post5=|v_main_#t~post5_248|, main_~y~0=v_main_~y~0_1275, main_~x~0=v_main_~x~0_1240, main_#t~post6=|v_main_#t~post6_498|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:55,452 INFO L290 TraceCheckUtils]: 7: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [190] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:55,453 INFO L290 TraceCheckUtils]: 8: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [191] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_254| |v_main_#t~post4_253|)) (.cse1 (= v_main_~y~0_1278 v_main_~y~0_1277)) (.cse2 (= |v_main_#t~post6_503| |v_main_#t~post6_499|)) (.cse3 (= v_main_~x~0_1243 v_main_~x~0_1242)) (.cse4 (mod v_main_~x~0_1243 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~x~0_1242) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1243 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1243 v_main_~x~0_1242) (= (+ v_main_~x~0_1243 v_main_~y~0_1277) (+ v_main_~x~0_1242 v_main_~y~0_1278))))) InVars {main_#t~post4=|v_main_#t~post4_254|, main_~y~0=v_main_~y~0_1278, main_~x~0=v_main_~x~0_1243, main_#t~post6=|v_main_#t~post6_503|} OutVars{main_#t~post4=|v_main_#t~post4_253|, main_~y~0=v_main_~y~0_1277, main_~x~0=v_main_~x~0_1242, main_#t~post6=|v_main_#t~post6_499|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {21988#(<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) (div main_~x~0 4294967296))} is VALID [2022-04-28 03:33:55,454 INFO L290 TraceCheckUtils]: 9: Hoare triple {21988#(<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) (div main_~x~0 4294967296))} [188] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21983#false} is VALID [2022-04-28 03:33:55,454 INFO L272 TraceCheckUtils]: 10: Hoare triple {21983#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21983#false} is VALID [2022-04-28 03:33:55,454 INFO L290 TraceCheckUtils]: 11: Hoare triple {21983#false} ~cond := #in~cond; {21983#false} is VALID [2022-04-28 03:33:55,454 INFO L290 TraceCheckUtils]: 12: Hoare triple {21983#false} assume 0 == ~cond; {21983#false} is VALID [2022-04-28 03:33:55,454 INFO L290 TraceCheckUtils]: 13: Hoare triple {21983#false} assume !false; {21983#false} is VALID [2022-04-28 03:33:55,454 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:55,454 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:33:55,454 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497717070] [2022-04-28 03:33:55,454 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1497717070] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:33:55,454 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [328494775] [2022-04-28 03:33:55,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:33:55,454 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:33:55,455 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:33:55,468 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:33:55,495 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2022-04-28 03:33:55,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:55,521 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:33:55,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:33:55,528 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:33:55,696 INFO L272 TraceCheckUtils]: 0: Hoare triple {21982#true} call ULTIMATE.init(); {21982#true} is VALID [2022-04-28 03:33:55,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {21982#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21982#true} is VALID [2022-04-28 03:33:55,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {21982#true} assume true; {21982#true} is VALID [2022-04-28 03:33:55,696 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21982#true} {21982#true} #41#return; {21982#true} is VALID [2022-04-28 03:33:55,696 INFO L272 TraceCheckUtils]: 4: Hoare triple {21982#true} call #t~ret7 := main(); {21982#true} is VALID [2022-04-28 03:33:55,696 INFO L290 TraceCheckUtils]: 5: Hoare triple {21982#true} ~x~0 := 0;~y~0 := 0; {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:55,697 INFO L290 TraceCheckUtils]: 6: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [189] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1241 4294967296))) (let ((.cse0 (= |v_main_#t~post6_500| |v_main_#t~post6_498|)) (.cse3 (= v_main_~x~0_1241 v_main_~x~0_1240)) (.cse4 (= v_main_~y~0_1276 v_main_~y~0_1275)) (.cse5 (= |v_main_#t~post5_249| |v_main_#t~post5_248|)) (.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and .cse0 .cse3 .cse4 .cse5) (and .cse2 (<= (div (+ (* (- 1) v_main_~x~0_1241) 1000000 (* (- 1) v_main_~y~0_1276) v_main_~y~0_1275) (- 4294967296)) (+ (div (+ v_main_~x~0_1241 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~y~0_1275 v_main_~y~0_1276) (= (+ v_main_~x~0_1241 v_main_~y~0_1276) (+ v_main_~x~0_1240 v_main_~y~0_1275)))))) InVars {main_~y~0=v_main_~y~0_1276, main_#t~post5=|v_main_#t~post5_249|, main_~x~0=v_main_~x~0_1241, main_#t~post6=|v_main_#t~post6_500|} OutVars{main_#t~post5=|v_main_#t~post5_248|, main_~y~0=v_main_~y~0_1275, main_~x~0=v_main_~x~0_1240, main_#t~post6=|v_main_#t~post6_498|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:55,697 INFO L290 TraceCheckUtils]: 7: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [190] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21987#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:33:55,698 INFO L290 TraceCheckUtils]: 8: Hoare triple {21987#(and (= main_~x~0 0) (= main_~y~0 0))} [191] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_254| |v_main_#t~post4_253|)) (.cse1 (= v_main_~y~0_1278 v_main_~y~0_1277)) (.cse2 (= |v_main_#t~post6_503| |v_main_#t~post6_499|)) (.cse3 (= v_main_~x~0_1243 v_main_~x~0_1242)) (.cse4 (mod v_main_~x~0_1243 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~x~0_1242) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1243 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1243 v_main_~x~0_1242) (= (+ v_main_~x~0_1243 v_main_~y~0_1277) (+ v_main_~x~0_1242 v_main_~y~0_1278))))) InVars {main_#t~post4=|v_main_#t~post4_254|, main_~y~0=v_main_~y~0_1278, main_~x~0=v_main_~x~0_1243, main_#t~post6=|v_main_#t~post6_503|} OutVars{main_#t~post4=|v_main_#t~post4_253|, main_~y~0=v_main_~y~0_1277, main_~x~0=v_main_~x~0_1242, main_#t~post6=|v_main_#t~post6_499|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {22017#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:33:55,699 INFO L290 TraceCheckUtils]: 9: Hoare triple {22017#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [188] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {21983#false} is VALID [2022-04-28 03:33:55,699 INFO L272 TraceCheckUtils]: 10: Hoare triple {21983#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {21983#false} is VALID [2022-04-28 03:33:55,699 INFO L290 TraceCheckUtils]: 11: Hoare triple {21983#false} ~cond := #in~cond; {21983#false} is VALID [2022-04-28 03:33:55,699 INFO L290 TraceCheckUtils]: 12: Hoare triple {21983#false} assume 0 == ~cond; {21983#false} is VALID [2022-04-28 03:33:55,699 INFO L290 TraceCheckUtils]: 13: Hoare triple {21983#false} assume !false; {21983#false} is VALID [2022-04-28 03:33:55,699 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:55,699 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:33:56,588 INFO L290 TraceCheckUtils]: 13: Hoare triple {21983#false} assume !false; {21983#false} is VALID [2022-04-28 03:33:56,589 INFO L290 TraceCheckUtils]: 12: Hoare triple {22036#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {21983#false} is VALID [2022-04-28 03:33:56,589 INFO L290 TraceCheckUtils]: 11: Hoare triple {22040#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {22036#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:33:56,589 INFO L272 TraceCheckUtils]: 10: Hoare triple {22044#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {22040#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:33:56,590 INFO L290 TraceCheckUtils]: 9: Hoare triple {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [188] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {22044#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:33:56,594 INFO L290 TraceCheckUtils]: 8: Hoare triple {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [191] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_254| |v_main_#t~post4_253|)) (.cse1 (= v_main_~y~0_1278 v_main_~y~0_1277)) (.cse2 (= |v_main_#t~post6_503| |v_main_#t~post6_499|)) (.cse3 (= v_main_~x~0_1243 v_main_~x~0_1242)) (.cse4 (mod v_main_~x~0_1243 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~x~0_1242) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1243 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1243 v_main_~x~0_1242) (= (+ v_main_~x~0_1243 v_main_~y~0_1277) (+ v_main_~x~0_1242 v_main_~y~0_1278))))) InVars {main_#t~post4=|v_main_#t~post4_254|, main_~y~0=v_main_~y~0_1278, main_~x~0=v_main_~x~0_1243, main_#t~post6=|v_main_#t~post6_503|} OutVars{main_#t~post4=|v_main_#t~post4_253|, main_~y~0=v_main_~y~0_1277, main_~x~0=v_main_~x~0_1242, main_#t~post6=|v_main_#t~post6_499|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:56,595 INFO L290 TraceCheckUtils]: 7: Hoare triple {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [190] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:57,357 INFO L290 TraceCheckUtils]: 6: Hoare triple {22058#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_1288_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1288_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1288_33 4294967296) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [189] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1241 4294967296))) (let ((.cse0 (= |v_main_#t~post6_500| |v_main_#t~post6_498|)) (.cse3 (= v_main_~x~0_1241 v_main_~x~0_1240)) (.cse4 (= v_main_~y~0_1276 v_main_~y~0_1275)) (.cse5 (= |v_main_#t~post5_249| |v_main_#t~post5_248|)) (.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and .cse0 .cse3 .cse4 .cse5) (and .cse2 (<= (div (+ (* (- 1) v_main_~x~0_1241) 1000000 (* (- 1) v_main_~y~0_1276) v_main_~y~0_1275) (- 4294967296)) (+ (div (+ v_main_~x~0_1241 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~y~0_1275 v_main_~y~0_1276) (= (+ v_main_~x~0_1241 v_main_~y~0_1276) (+ v_main_~x~0_1240 v_main_~y~0_1275)))))) InVars {main_~y~0=v_main_~y~0_1276, main_#t~post5=|v_main_#t~post5_249|, main_~x~0=v_main_~x~0_1241, main_#t~post6=|v_main_#t~post6_500|} OutVars{main_#t~post5=|v_main_#t~post5_248|, main_~y~0=v_main_~y~0_1275, main_~x~0=v_main_~x~0_1240, main_#t~post6=|v_main_#t~post6_498|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {22048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:33:57,358 INFO L290 TraceCheckUtils]: 5: Hoare triple {21982#true} ~x~0 := 0;~y~0 := 0; {22058#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_1288_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1288_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1288_33 4294967296) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:33:57,358 INFO L272 TraceCheckUtils]: 4: Hoare triple {21982#true} call #t~ret7 := main(); {21982#true} is VALID [2022-04-28 03:33:57,358 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21982#true} {21982#true} #41#return; {21982#true} is VALID [2022-04-28 03:33:57,358 INFO L290 TraceCheckUtils]: 2: Hoare triple {21982#true} assume true; {21982#true} is VALID [2022-04-28 03:33:57,358 INFO L290 TraceCheckUtils]: 1: Hoare triple {21982#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {21982#true} is VALID [2022-04-28 03:33:57,358 INFO L272 TraceCheckUtils]: 0: Hoare triple {21982#true} call ULTIMATE.init(); {21982#true} is VALID [2022-04-28 03:33:57,358 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:33:57,359 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [328494775] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:33:57,359 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:33:57,359 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-28 03:34:00,997 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:00,997 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1941070260] [2022-04-28 03:34:00,998 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1941070260] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:00,998 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:00,998 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [76] imperfect sequences [] total 76 [2022-04-28 03:34:00,998 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1569638036] [2022-04-28 03:34:00,998 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:00,998 INFO L78 Accepts]: Start accepts. Automaton has has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 122 [2022-04-28 03:34:00,998 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:00,998 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:01,080 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 122 edges. 122 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:01,080 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 76 states [2022-04-28 03:34:01,081 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:01,081 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2022-04-28 03:34:01,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=6310, Unknown=0, NotChecked=0, Total=6806 [2022-04-28 03:34:01,081 INFO L87 Difference]: Start difference. First operand 124 states and 126 transitions. Second operand has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:10,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:10,066 INFO L93 Difference]: Finished difference Result 135 states and 139 transitions. [2022-04-28 03:34:10,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2022-04-28 03:34:10,066 INFO L78 Accepts]: Start accepts. Automaton has has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 122 [2022-04-28 03:34:10,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:10,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:10,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 135 transitions. [2022-04-28 03:34:10,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:10,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 135 transitions. [2022-04-28 03:34:10,068 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 135 transitions. [2022-04-28 03:34:10,139 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:10,140 INFO L225 Difference]: With dead ends: 135 [2022-04-28 03:34:10,140 INFO L226 Difference]: Without dead ends: 127 [2022-04-28 03:34:10,141 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 30 SyntacticMatches, 39 SemanticMatches, 154 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5186 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=1116, Invalid=23064, Unknown=0, NotChecked=0, Total=24180 [2022-04-28 03:34:10,141 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 46 mSDsluCounter, 367 mSDsCounter, 0 mSdLazyCounter, 8542 mSolverCounterSat, 75 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 379 SdHoareTripleChecker+Invalid, 8617 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 75 IncrementalHoareTripleChecker+Valid, 8542 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:10,144 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 379 Invalid, 8617 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [75 Valid, 8542 Invalid, 0 Unknown, 0 Unchecked, 4.4s Time] [2022-04-28 03:34:10,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2022-04-28 03:34:10,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-04-28 03:34:10,258 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:10,258 INFO L82 GeneralOperation]: Start isEquivalent. First operand 127 states. Second operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:10,258 INFO L74 IsIncluded]: Start isIncluded. First operand 127 states. Second operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:10,259 INFO L87 Difference]: Start difference. First operand 127 states. Second operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:10,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:10,260 INFO L93 Difference]: Finished difference Result 127 states and 129 transitions. [2022-04-28 03:34:10,260 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2022-04-28 03:34:10,260 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:10,260 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:10,260 INFO L74 IsIncluded]: Start isIncluded. First operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 127 states. [2022-04-28 03:34:10,260 INFO L87 Difference]: Start difference. First operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 127 states. [2022-04-28 03:34:10,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:10,261 INFO L93 Difference]: Finished difference Result 127 states and 129 transitions. [2022-04-28 03:34:10,261 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2022-04-28 03:34:10,261 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:10,261 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:10,261 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:10,261 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:10,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 122 states have (on average 1.0245901639344261) internal successors, (125), 122 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:10,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 129 transitions. [2022-04-28 03:34:10,263 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 129 transitions. Word has length 122 [2022-04-28 03:34:10,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:10,263 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 129 transitions. [2022-04-28 03:34:10,264 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 76 states, 76 states have (on average 1.5526315789473684) internal successors, (118), 75 states have internal predecessors, (118), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:10,264 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 127 states and 129 transitions. [2022-04-28 03:34:10,434 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 129 edges. 129 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:10,434 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2022-04-28 03:34:10,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2022-04-28 03:34:10,434 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:10,434 INFO L195 NwaCegarLoop]: trace histogram [38, 38, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:10,454 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:10,634 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 37 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2022-04-28 03:34:10,635 INFO L420 AbstractCegarLoop]: === Iteration 40 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:10,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:10,635 INFO L85 PathProgramCache]: Analyzing trace with hash -1029449403, now seen corresponding path program 37 times [2022-04-28 03:34:10,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:10,635 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1218272934] [2022-04-28 03:34:11,225 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:34:11,680 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:34:11,681 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:34:11,683 INFO L85 PathProgramCache]: Analyzing trace with hash 1372385199, now seen corresponding path program 1 times [2022-04-28 03:34:11,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:11,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110591181] [2022-04-28 03:34:11,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:11,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:11,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:11,739 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:11,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:11,742 INFO L290 TraceCheckUtils]: 0: Hoare triple {23082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23075#true} is VALID [2022-04-28 03:34:11,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {23075#true} assume true; {23075#true} is VALID [2022-04-28 03:34:11,742 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23075#true} {23075#true} #41#return; {23075#true} is VALID [2022-04-28 03:34:11,742 INFO L272 TraceCheckUtils]: 0: Hoare triple {23075#true} call ULTIMATE.init(); {23082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:11,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {23082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23075#true} is VALID [2022-04-28 03:34:11,743 INFO L290 TraceCheckUtils]: 2: Hoare triple {23075#true} assume true; {23075#true} is VALID [2022-04-28 03:34:11,743 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23075#true} {23075#true} #41#return; {23075#true} is VALID [2022-04-28 03:34:11,743 INFO L272 TraceCheckUtils]: 4: Hoare triple {23075#true} call #t~ret7 := main(); {23075#true} is VALID [2022-04-28 03:34:11,743 INFO L290 TraceCheckUtils]: 5: Hoare triple {23075#true} ~x~0 := 0;~y~0 := 0; {23080#(= main_~x~0 0)} is VALID [2022-04-28 03:34:11,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {23080#(= main_~x~0 0)} [193] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1294 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_514| |v_main_#t~post6_512|)) (.cse3 (= v_main_~x~0_1294 v_main_~x~0_1293)) (.cse4 (= |v_main_#t~post5_256| |v_main_#t~post5_255|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_1293) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1294 (- 4294967295)) 4294967296) 1)) .cse0 (< v_main_~x~0_1294 v_main_~x~0_1293) (= (+ v_main_~x~0_1294 v_main_~y~0_1330) (+ v_main_~x~0_1293 v_main_~y~0_1329)) .cse1) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 (= v_main_~y~0_1329 v_main_~y~0_1330)) (and .cse2 .cse3 .cse4 (= v_main_~y~0_1330 v_main_~y~0_1329))))) InVars {main_~y~0=v_main_~y~0_1330, main_#t~post5=|v_main_#t~post5_256|, main_~x~0=v_main_~x~0_1294, main_#t~post6=|v_main_#t~post6_514|} OutVars{main_#t~post5=|v_main_#t~post5_255|, main_~y~0=v_main_~y~0_1329, main_~x~0=v_main_~x~0_1293, main_#t~post6=|v_main_#t~post6_512|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {23080#(= main_~x~0 0)} is VALID [2022-04-28 03:34:11,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {23080#(= main_~x~0 0)} [194] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23080#(= main_~x~0 0)} is VALID [2022-04-28 03:34:11,745 INFO L290 TraceCheckUtils]: 8: Hoare triple {23080#(= main_~x~0 0)} [195] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_1296 4294967296)) (.cse0 (= v_main_~y~0_1332 v_main_~y~0_1331)) (.cse2 (= |v_main_#t~post4_261| |v_main_#t~post4_260|)) (.cse3 (= v_main_~x~0_1296 v_main_~x~0_1295))) (or (and .cse0 (= |v_main_#t~post6_513| |v_main_#t~post6_517|) (<= 500000 .cse1) .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_1296 v_main_~x~0_1295) (= (+ v_main_~x~0_1295 v_main_~y~0_1332) (+ v_main_~x~0_1296 v_main_~y~0_1331)) (<= (div (+ (* (- 1) v_main_~x~0_1295) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1296 (- 4294967295)) 4294967296) 1))) (and .cse0 (= |v_main_#t~post6_517| |v_main_#t~post6_513|) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_261|, main_~y~0=v_main_~y~0_1332, main_~x~0=v_main_~x~0_1296, main_#t~post6=|v_main_#t~post6_517|} OutVars{main_#t~post4=|v_main_#t~post4_260|, main_~y~0=v_main_~y~0_1331, main_~x~0=v_main_~x~0_1295, main_#t~post6=|v_main_#t~post6_513|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {23081#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:34:11,745 INFO L290 TraceCheckUtils]: 9: Hoare triple {23081#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [192] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {23076#false} is VALID [2022-04-28 03:34:11,745 INFO L272 TraceCheckUtils]: 10: Hoare triple {23076#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {23076#false} is VALID [2022-04-28 03:34:11,745 INFO L290 TraceCheckUtils]: 11: Hoare triple {23076#false} ~cond := #in~cond; {23076#false} is VALID [2022-04-28 03:34:11,745 INFO L290 TraceCheckUtils]: 12: Hoare triple {23076#false} assume 0 == ~cond; {23076#false} is VALID [2022-04-28 03:34:11,746 INFO L290 TraceCheckUtils]: 13: Hoare triple {23076#false} assume !false; {23076#false} is VALID [2022-04-28 03:34:11,746 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:11,746 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:11,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110591181] [2022-04-28 03:34:11,746 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1110591181] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:11,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1521151753] [2022-04-28 03:34:11,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:11,746 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:11,746 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:11,747 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:11,748 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2022-04-28 03:34:11,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:11,782 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:34:11,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:11,790 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:11,964 INFO L272 TraceCheckUtils]: 0: Hoare triple {23075#true} call ULTIMATE.init(); {23075#true} is VALID [2022-04-28 03:34:11,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {23075#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23075#true} is VALID [2022-04-28 03:34:11,964 INFO L290 TraceCheckUtils]: 2: Hoare triple {23075#true} assume true; {23075#true} is VALID [2022-04-28 03:34:11,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23075#true} {23075#true} #41#return; {23075#true} is VALID [2022-04-28 03:34:11,964 INFO L272 TraceCheckUtils]: 4: Hoare triple {23075#true} call #t~ret7 := main(); {23075#true} is VALID [2022-04-28 03:34:11,964 INFO L290 TraceCheckUtils]: 5: Hoare triple {23075#true} ~x~0 := 0;~y~0 := 0; {23101#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:11,965 INFO L290 TraceCheckUtils]: 6: Hoare triple {23101#(and (= main_~x~0 0) (= main_~y~0 0))} [193] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1294 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_514| |v_main_#t~post6_512|)) (.cse3 (= v_main_~x~0_1294 v_main_~x~0_1293)) (.cse4 (= |v_main_#t~post5_256| |v_main_#t~post5_255|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_1293) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1294 (- 4294967295)) 4294967296) 1)) .cse0 (< v_main_~x~0_1294 v_main_~x~0_1293) (= (+ v_main_~x~0_1294 v_main_~y~0_1330) (+ v_main_~x~0_1293 v_main_~y~0_1329)) .cse1) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 (= v_main_~y~0_1329 v_main_~y~0_1330)) (and .cse2 .cse3 .cse4 (= v_main_~y~0_1330 v_main_~y~0_1329))))) InVars {main_~y~0=v_main_~y~0_1330, main_#t~post5=|v_main_#t~post5_256|, main_~x~0=v_main_~x~0_1294, main_#t~post6=|v_main_#t~post6_514|} OutVars{main_#t~post5=|v_main_#t~post5_255|, main_~y~0=v_main_~y~0_1329, main_~x~0=v_main_~x~0_1293, main_#t~post6=|v_main_#t~post6_512|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {23101#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:11,965 INFO L290 TraceCheckUtils]: 7: Hoare triple {23101#(and (= main_~x~0 0) (= main_~y~0 0))} [194] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23101#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:11,966 INFO L290 TraceCheckUtils]: 8: Hoare triple {23101#(and (= main_~x~0 0) (= main_~y~0 0))} [195] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_1296 4294967296)) (.cse0 (= v_main_~y~0_1332 v_main_~y~0_1331)) (.cse2 (= |v_main_#t~post4_261| |v_main_#t~post4_260|)) (.cse3 (= v_main_~x~0_1296 v_main_~x~0_1295))) (or (and .cse0 (= |v_main_#t~post6_513| |v_main_#t~post6_517|) (<= 500000 .cse1) .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_1296 v_main_~x~0_1295) (= (+ v_main_~x~0_1295 v_main_~y~0_1332) (+ v_main_~x~0_1296 v_main_~y~0_1331)) (<= (div (+ (* (- 1) v_main_~x~0_1295) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1296 (- 4294967295)) 4294967296) 1))) (and .cse0 (= |v_main_#t~post6_517| |v_main_#t~post6_513|) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_261|, main_~y~0=v_main_~y~0_1332, main_~x~0=v_main_~x~0_1296, main_#t~post6=|v_main_#t~post6_517|} OutVars{main_#t~post4=|v_main_#t~post4_260|, main_~y~0=v_main_~y~0_1331, main_~x~0=v_main_~x~0_1295, main_#t~post6=|v_main_#t~post6_513|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {23111#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:34:11,967 INFO L290 TraceCheckUtils]: 9: Hoare triple {23111#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [192] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {23076#false} is VALID [2022-04-28 03:34:11,967 INFO L272 TraceCheckUtils]: 10: Hoare triple {23076#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {23076#false} is VALID [2022-04-28 03:34:11,967 INFO L290 TraceCheckUtils]: 11: Hoare triple {23076#false} ~cond := #in~cond; {23076#false} is VALID [2022-04-28 03:34:11,967 INFO L290 TraceCheckUtils]: 12: Hoare triple {23076#false} assume 0 == ~cond; {23076#false} is VALID [2022-04-28 03:34:11,967 INFO L290 TraceCheckUtils]: 13: Hoare triple {23076#false} assume !false; {23076#false} is VALID [2022-04-28 03:34:11,967 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:11,967 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:12,856 INFO L290 TraceCheckUtils]: 13: Hoare triple {23076#false} assume !false; {23076#false} is VALID [2022-04-28 03:34:12,856 INFO L290 TraceCheckUtils]: 12: Hoare triple {23130#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {23076#false} is VALID [2022-04-28 03:34:12,856 INFO L290 TraceCheckUtils]: 11: Hoare triple {23134#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {23130#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:34:12,857 INFO L272 TraceCheckUtils]: 10: Hoare triple {23138#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {23134#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:34:12,857 INFO L290 TraceCheckUtils]: 9: Hoare triple {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [192] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {23138#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:34:12,861 INFO L290 TraceCheckUtils]: 8: Hoare triple {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [195] L9-2-->L9-3_primed: Formula: (let ((.cse1 (mod v_main_~x~0_1296 4294967296)) (.cse0 (= v_main_~y~0_1332 v_main_~y~0_1331)) (.cse2 (= |v_main_#t~post4_261| |v_main_#t~post4_260|)) (.cse3 (= v_main_~x~0_1296 v_main_~x~0_1295))) (or (and .cse0 (= |v_main_#t~post6_513| |v_main_#t~post6_517|) (<= 500000 .cse1) .cse2 .cse3) (and (< .cse1 500000) (< v_main_~x~0_1296 v_main_~x~0_1295) (= (+ v_main_~x~0_1295 v_main_~y~0_1332) (+ v_main_~x~0_1296 v_main_~y~0_1331)) (<= (div (+ (* (- 1) v_main_~x~0_1295) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1296 (- 4294967295)) 4294967296) 1))) (and .cse0 (= |v_main_#t~post6_517| |v_main_#t~post6_513|) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_261|, main_~y~0=v_main_~y~0_1332, main_~x~0=v_main_~x~0_1296, main_#t~post6=|v_main_#t~post6_517|} OutVars{main_#t~post4=|v_main_#t~post4_260|, main_~y~0=v_main_~y~0_1331, main_~x~0=v_main_~x~0_1295, main_#t~post6=|v_main_#t~post6_513|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:12,862 INFO L290 TraceCheckUtils]: 7: Hoare triple {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [194] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:12,869 INFO L290 TraceCheckUtils]: 6: Hoare triple {23152#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1342_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1342_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1342_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [193] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1294 4294967296))) (let ((.cse0 (<= 500000 .cse5)) (.cse1 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_514| |v_main_#t~post6_512|)) (.cse3 (= v_main_~x~0_1294 v_main_~x~0_1293)) (.cse4 (= |v_main_#t~post5_256| |v_main_#t~post5_255|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_1293) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1294 (- 4294967295)) 4294967296) 1)) .cse0 (< v_main_~x~0_1294 v_main_~x~0_1293) (= (+ v_main_~x~0_1294 v_main_~y~0_1330) (+ v_main_~x~0_1293 v_main_~y~0_1329)) .cse1) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 (= v_main_~y~0_1329 v_main_~y~0_1330)) (and .cse2 .cse3 .cse4 (= v_main_~y~0_1330 v_main_~y~0_1329))))) InVars {main_~y~0=v_main_~y~0_1330, main_#t~post5=|v_main_#t~post5_256|, main_~x~0=v_main_~x~0_1294, main_#t~post6=|v_main_#t~post6_514|} OutVars{main_#t~post5=|v_main_#t~post5_255|, main_~y~0=v_main_~y~0_1329, main_~x~0=v_main_~x~0_1293, main_#t~post6=|v_main_#t~post6_512|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {23142#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:12,869 INFO L290 TraceCheckUtils]: 5: Hoare triple {23075#true} ~x~0 := 0;~y~0 := 0; {23152#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1342_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1342_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1342_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:34:12,869 INFO L272 TraceCheckUtils]: 4: Hoare triple {23075#true} call #t~ret7 := main(); {23075#true} is VALID [2022-04-28 03:34:12,870 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23075#true} {23075#true} #41#return; {23075#true} is VALID [2022-04-28 03:34:12,870 INFO L290 TraceCheckUtils]: 2: Hoare triple {23075#true} assume true; {23075#true} is VALID [2022-04-28 03:34:12,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {23075#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {23075#true} is VALID [2022-04-28 03:34:12,870 INFO L272 TraceCheckUtils]: 0: Hoare triple {23075#true} call ULTIMATE.init(); {23075#true} is VALID [2022-04-28 03:34:12,870 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:12,870 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1521151753] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:12,870 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:12,870 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:34:14,649 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:14,650 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1218272934] [2022-04-28 03:34:14,650 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1218272934] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:14,650 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:14,650 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [41] imperfect sequences [] total 41 [2022-04-28 03:34:14,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1703243476] [2022-04-28 03:34:14,650 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:14,650 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 125 [2022-04-28 03:34:14,652 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:14,652 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:14,705 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:14,705 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-04-28 03:34:14,705 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:14,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-04-28 03:34:14,706 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=2133, Unknown=0, NotChecked=0, Total=2352 [2022-04-28 03:34:14,706 INFO L87 Difference]: Start difference. First operand 127 states and 129 transitions. Second operand has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:19,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:19,295 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2022-04-28 03:34:19,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2022-04-28 03:34:19,295 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 125 [2022-04-28 03:34:19,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:19,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:19,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 139 transitions. [2022-04-28 03:34:19,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:19,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 139 transitions. [2022-04-28 03:34:19,297 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 41 states and 139 transitions. [2022-04-28 03:34:19,363 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:19,365 INFO L225 Difference]: With dead ends: 139 [2022-04-28 03:34:19,365 INFO L226 Difference]: Without dead ends: 131 [2022-04-28 03:34:19,365 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 28 SyntacticMatches, 78 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1437 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=485, Invalid=6997, Unknown=0, NotChecked=0, Total=7482 [2022-04-28 03:34:19,367 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 86 mSDsluCounter, 192 mSDsCounter, 0 mSdLazyCounter, 4599 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 86 SdHoareTripleChecker+Valid, 204 SdHoareTripleChecker+Invalid, 4639 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 4599 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:19,367 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [86 Valid, 204 Invalid, 4639 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 4599 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2022-04-28 03:34:19,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2022-04-28 03:34:19,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 130. [2022-04-28 03:34:19,490 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:19,491 INFO L82 GeneralOperation]: Start isEquivalent. First operand 131 states. Second operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:19,491 INFO L74 IsIncluded]: Start isIncluded. First operand 131 states. Second operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:19,491 INFO L87 Difference]: Start difference. First operand 131 states. Second operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:19,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:19,492 INFO L93 Difference]: Finished difference Result 131 states and 133 transitions. [2022-04-28 03:34:19,492 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2022-04-28 03:34:19,492 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:19,492 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:19,492 INFO L74 IsIncluded]: Start isIncluded. First operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 131 states. [2022-04-28 03:34:19,493 INFO L87 Difference]: Start difference. First operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 131 states. [2022-04-28 03:34:19,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:19,494 INFO L93 Difference]: Finished difference Result 131 states and 133 transitions. [2022-04-28 03:34:19,494 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2022-04-28 03:34:19,494 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:19,494 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:19,494 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:19,494 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:19,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 130 states, 125 states have (on average 1.024) internal successors, (128), 125 states have internal predecessors, (128), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:19,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2022-04-28 03:34:19,495 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 125 [2022-04-28 03:34:19,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:19,495 INFO L495 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2022-04-28 03:34:19,496 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 2.951219512195122) internal successors, (121), 40 states have internal predecessors, (121), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:19,496 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 130 states and 132 transitions. [2022-04-28 03:34:19,673 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 132 edges. 132 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:19,674 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2022-04-28 03:34:19,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2022-04-28 03:34:19,674 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:19,674 INFO L195 NwaCegarLoop]: trace histogram [39, 39, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:19,693 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:19,887 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 38 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2022-04-28 03:34:19,888 INFO L420 AbstractCegarLoop]: === Iteration 41 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:19,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:19,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1802810611, now seen corresponding path program 38 times [2022-04-28 03:34:19,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:19,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1043039942] [2022-04-28 03:34:21,167 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:34:21,852 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:34:21,854 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:34:21,856 INFO L85 PathProgramCache]: Analyzing trace with hash -873049937, now seen corresponding path program 1 times [2022-04-28 03:34:21,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:21,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861046098] [2022-04-28 03:34:21,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:21,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:21,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:21,901 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:21,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:21,904 INFO L290 TraceCheckUtils]: 0: Hoare triple {24093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {24086#true} is VALID [2022-04-28 03:34:21,904 INFO L290 TraceCheckUtils]: 1: Hoare triple {24086#true} assume true; {24086#true} is VALID [2022-04-28 03:34:21,904 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24086#true} {24086#true} #41#return; {24086#true} is VALID [2022-04-28 03:34:21,904 INFO L272 TraceCheckUtils]: 0: Hoare triple {24086#true} call ULTIMATE.init(); {24093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:21,904 INFO L290 TraceCheckUtils]: 1: Hoare triple {24093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {24086#true} is VALID [2022-04-28 03:34:21,904 INFO L290 TraceCheckUtils]: 2: Hoare triple {24086#true} assume true; {24086#true} is VALID [2022-04-28 03:34:21,904 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24086#true} {24086#true} #41#return; {24086#true} is VALID [2022-04-28 03:34:21,904 INFO L272 TraceCheckUtils]: 4: Hoare triple {24086#true} call #t~ret7 := main(); {24086#true} is VALID [2022-04-28 03:34:21,905 INFO L290 TraceCheckUtils]: 5: Hoare triple {24086#true} ~x~0 := 0;~y~0 := 0; {24091#(= main_~x~0 0)} is VALID [2022-04-28 03:34:21,905 INFO L290 TraceCheckUtils]: 6: Hoare triple {24091#(= main_~x~0 0)} [197] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1348 4294967296))) (let ((.cse0 (<= 500000 .cse6)) (.cse1 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_1348 v_main_~x~0_1347)) (.cse3 (= |v_main_#t~post6_528| |v_main_#t~post6_526|)) (.cse4 (= |v_main_#t~post5_263| |v_main_#t~post5_262|)) (.cse5 (= v_main_~y~0_1385 v_main_~y~0_1384))) (or (and (= (+ v_main_~x~0_1347 v_main_~y~0_1384) (+ v_main_~x~0_1348 v_main_~y~0_1385)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1347)) (- 4294967296)) (+ (div (+ v_main_~x~0_1348 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_1348 v_main_~x~0_1347)) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1385, main_#t~post5=|v_main_#t~post5_263|, main_~x~0=v_main_~x~0_1348, main_#t~post6=|v_main_#t~post6_528|} OutVars{main_#t~post5=|v_main_#t~post5_262|, main_~y~0=v_main_~y~0_1384, main_~x~0=v_main_~x~0_1347, main_#t~post6=|v_main_#t~post6_526|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {24091#(= main_~x~0 0)} is VALID [2022-04-28 03:34:21,906 INFO L290 TraceCheckUtils]: 7: Hoare triple {24091#(= main_~x~0 0)} [198] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24091#(= main_~x~0 0)} is VALID [2022-04-28 03:34:21,907 INFO L290 TraceCheckUtils]: 8: Hoare triple {24091#(= main_~x~0 0)} [199] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_1350 v_main_~x~0_1349)) (.cse1 (= |v_main_#t~post4_268| |v_main_#t~post4_267|)) (.cse2 (= v_main_~y~0_1387 v_main_~y~0_1386)) (.cse3 (mod v_main_~x~0_1350 4294967296))) (or (and .cse0 (= |v_main_#t~post6_531| |v_main_#t~post6_527|) .cse1 .cse2) (and (<= 500000 .cse3) .cse0 .cse1 .cse2 (= |v_main_#t~post6_527| |v_main_#t~post6_531|)) (and (<= (div (+ (* (- 1) v_main_~x~0_1349) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1350 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (< v_main_~x~0_1350 v_main_~x~0_1349) (= (+ v_main_~x~0_1350 v_main_~y~0_1386) (+ v_main_~x~0_1349 v_main_~y~0_1387))))) InVars {main_#t~post4=|v_main_#t~post4_268|, main_~y~0=v_main_~y~0_1387, main_~x~0=v_main_~x~0_1350, main_#t~post6=|v_main_#t~post6_531|} OutVars{main_#t~post4=|v_main_#t~post4_267|, main_~y~0=v_main_~y~0_1386, main_~x~0=v_main_~x~0_1349, main_#t~post6=|v_main_#t~post6_527|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {24092#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:34:21,907 INFO L290 TraceCheckUtils]: 9: Hoare triple {24092#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [196] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {24087#false} is VALID [2022-04-28 03:34:21,907 INFO L272 TraceCheckUtils]: 10: Hoare triple {24087#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {24087#false} is VALID [2022-04-28 03:34:21,907 INFO L290 TraceCheckUtils]: 11: Hoare triple {24087#false} ~cond := #in~cond; {24087#false} is VALID [2022-04-28 03:34:21,907 INFO L290 TraceCheckUtils]: 12: Hoare triple {24087#false} assume 0 == ~cond; {24087#false} is VALID [2022-04-28 03:34:21,907 INFO L290 TraceCheckUtils]: 13: Hoare triple {24087#false} assume !false; {24087#false} is VALID [2022-04-28 03:34:21,908 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:21,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:21,908 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861046098] [2022-04-28 03:34:21,908 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1861046098] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:21,908 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1727692583] [2022-04-28 03:34:21,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:21,908 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:21,908 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:21,909 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:21,920 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-04-28 03:34:21,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:21,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:34:21,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:21,953 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:22,130 INFO L272 TraceCheckUtils]: 0: Hoare triple {24086#true} call ULTIMATE.init(); {24086#true} is VALID [2022-04-28 03:34:22,130 INFO L290 TraceCheckUtils]: 1: Hoare triple {24086#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {24086#true} is VALID [2022-04-28 03:34:22,131 INFO L290 TraceCheckUtils]: 2: Hoare triple {24086#true} assume true; {24086#true} is VALID [2022-04-28 03:34:22,131 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24086#true} {24086#true} #41#return; {24086#true} is VALID [2022-04-28 03:34:22,131 INFO L272 TraceCheckUtils]: 4: Hoare triple {24086#true} call #t~ret7 := main(); {24086#true} is VALID [2022-04-28 03:34:22,131 INFO L290 TraceCheckUtils]: 5: Hoare triple {24086#true} ~x~0 := 0;~y~0 := 0; {24112#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:22,132 INFO L290 TraceCheckUtils]: 6: Hoare triple {24112#(and (= main_~x~0 0) (= main_~y~0 0))} [197] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1348 4294967296))) (let ((.cse0 (<= 500000 .cse6)) (.cse1 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_1348 v_main_~x~0_1347)) (.cse3 (= |v_main_#t~post6_528| |v_main_#t~post6_526|)) (.cse4 (= |v_main_#t~post5_263| |v_main_#t~post5_262|)) (.cse5 (= v_main_~y~0_1385 v_main_~y~0_1384))) (or (and (= (+ v_main_~x~0_1347 v_main_~y~0_1384) (+ v_main_~x~0_1348 v_main_~y~0_1385)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1347)) (- 4294967296)) (+ (div (+ v_main_~x~0_1348 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_1348 v_main_~x~0_1347)) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1385, main_#t~post5=|v_main_#t~post5_263|, main_~x~0=v_main_~x~0_1348, main_#t~post6=|v_main_#t~post6_528|} OutVars{main_#t~post5=|v_main_#t~post5_262|, main_~y~0=v_main_~y~0_1384, main_~x~0=v_main_~x~0_1347, main_#t~post6=|v_main_#t~post6_526|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {24112#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:22,132 INFO L290 TraceCheckUtils]: 7: Hoare triple {24112#(and (= main_~x~0 0) (= main_~y~0 0))} [198] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24112#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:22,133 INFO L290 TraceCheckUtils]: 8: Hoare triple {24112#(and (= main_~x~0 0) (= main_~y~0 0))} [199] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_1350 v_main_~x~0_1349)) (.cse1 (= |v_main_#t~post4_268| |v_main_#t~post4_267|)) (.cse2 (= v_main_~y~0_1387 v_main_~y~0_1386)) (.cse3 (mod v_main_~x~0_1350 4294967296))) (or (and .cse0 (= |v_main_#t~post6_531| |v_main_#t~post6_527|) .cse1 .cse2) (and (<= 500000 .cse3) .cse0 .cse1 .cse2 (= |v_main_#t~post6_527| |v_main_#t~post6_531|)) (and (<= (div (+ (* (- 1) v_main_~x~0_1349) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1350 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (< v_main_~x~0_1350 v_main_~x~0_1349) (= (+ v_main_~x~0_1350 v_main_~y~0_1386) (+ v_main_~x~0_1349 v_main_~y~0_1387))))) InVars {main_#t~post4=|v_main_#t~post4_268|, main_~y~0=v_main_~y~0_1387, main_~x~0=v_main_~x~0_1350, main_#t~post6=|v_main_#t~post6_531|} OutVars{main_#t~post4=|v_main_#t~post4_267|, main_~y~0=v_main_~y~0_1386, main_~x~0=v_main_~x~0_1349, main_#t~post6=|v_main_#t~post6_527|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {24122#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:34:22,134 INFO L290 TraceCheckUtils]: 9: Hoare triple {24122#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [196] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {24087#false} is VALID [2022-04-28 03:34:22,134 INFO L272 TraceCheckUtils]: 10: Hoare triple {24087#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {24087#false} is VALID [2022-04-28 03:34:22,134 INFO L290 TraceCheckUtils]: 11: Hoare triple {24087#false} ~cond := #in~cond; {24087#false} is VALID [2022-04-28 03:34:22,134 INFO L290 TraceCheckUtils]: 12: Hoare triple {24087#false} assume 0 == ~cond; {24087#false} is VALID [2022-04-28 03:34:22,134 INFO L290 TraceCheckUtils]: 13: Hoare triple {24087#false} assume !false; {24087#false} is VALID [2022-04-28 03:34:22,134 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:22,134 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:22,994 INFO L290 TraceCheckUtils]: 13: Hoare triple {24087#false} assume !false; {24087#false} is VALID [2022-04-28 03:34:22,995 INFO L290 TraceCheckUtils]: 12: Hoare triple {24141#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {24087#false} is VALID [2022-04-28 03:34:22,995 INFO L290 TraceCheckUtils]: 11: Hoare triple {24145#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {24141#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:34:22,996 INFO L272 TraceCheckUtils]: 10: Hoare triple {24149#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {24145#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:34:22,996 INFO L290 TraceCheckUtils]: 9: Hoare triple {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [196] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {24149#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:34:22,998 INFO L290 TraceCheckUtils]: 8: Hoare triple {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [199] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_1350 v_main_~x~0_1349)) (.cse1 (= |v_main_#t~post4_268| |v_main_#t~post4_267|)) (.cse2 (= v_main_~y~0_1387 v_main_~y~0_1386)) (.cse3 (mod v_main_~x~0_1350 4294967296))) (or (and .cse0 (= |v_main_#t~post6_531| |v_main_#t~post6_527|) .cse1 .cse2) (and (<= 500000 .cse3) .cse0 .cse1 .cse2 (= |v_main_#t~post6_527| |v_main_#t~post6_531|)) (and (<= (div (+ (* (- 1) v_main_~x~0_1349) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1350 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (< v_main_~x~0_1350 v_main_~x~0_1349) (= (+ v_main_~x~0_1350 v_main_~y~0_1386) (+ v_main_~x~0_1349 v_main_~y~0_1387))))) InVars {main_#t~post4=|v_main_#t~post4_268|, main_~y~0=v_main_~y~0_1387, main_~x~0=v_main_~x~0_1350, main_#t~post6=|v_main_#t~post6_531|} OutVars{main_#t~post4=|v_main_#t~post4_267|, main_~y~0=v_main_~y~0_1386, main_~x~0=v_main_~x~0_1349, main_#t~post6=|v_main_#t~post6_527|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:22,998 INFO L290 TraceCheckUtils]: 7: Hoare triple {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [198] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:23,626 INFO L290 TraceCheckUtils]: 6: Hoare triple {24163#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1397_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1397_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1397_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [197] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1348 4294967296))) (let ((.cse0 (<= 500000 .cse6)) (.cse1 (< .cse6 1000000)) (.cse2 (= v_main_~x~0_1348 v_main_~x~0_1347)) (.cse3 (= |v_main_#t~post6_528| |v_main_#t~post6_526|)) (.cse4 (= |v_main_#t~post5_263| |v_main_#t~post5_262|)) (.cse5 (= v_main_~y~0_1385 v_main_~y~0_1384))) (or (and (= (+ v_main_~x~0_1347 v_main_~y~0_1384) (+ v_main_~x~0_1348 v_main_~y~0_1385)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1347)) (- 4294967296)) (+ (div (+ v_main_~x~0_1348 (- 4294967295)) 4294967296) 1)) .cse1 (< v_main_~x~0_1348 v_main_~x~0_1347)) (and .cse2 .cse3 (or (not .cse0) (not .cse1)) .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1385, main_#t~post5=|v_main_#t~post5_263|, main_~x~0=v_main_~x~0_1348, main_#t~post6=|v_main_#t~post6_528|} OutVars{main_#t~post5=|v_main_#t~post5_262|, main_~y~0=v_main_~y~0_1384, main_~x~0=v_main_~x~0_1347, main_#t~post6=|v_main_#t~post6_526|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {24153#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:23,632 INFO L290 TraceCheckUtils]: 5: Hoare triple {24086#true} ~x~0 := 0;~y~0 := 0; {24163#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1397_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1397_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1397_33 4294967296) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:34:23,632 INFO L272 TraceCheckUtils]: 4: Hoare triple {24086#true} call #t~ret7 := main(); {24086#true} is VALID [2022-04-28 03:34:23,632 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24086#true} {24086#true} #41#return; {24086#true} is VALID [2022-04-28 03:34:23,632 INFO L290 TraceCheckUtils]: 2: Hoare triple {24086#true} assume true; {24086#true} is VALID [2022-04-28 03:34:23,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {24086#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {24086#true} is VALID [2022-04-28 03:34:23,632 INFO L272 TraceCheckUtils]: 0: Hoare triple {24086#true} call ULTIMATE.init(); {24086#true} is VALID [2022-04-28 03:34:23,633 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:23,633 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1727692583] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:23,633 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:23,633 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:34:26,038 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:26,038 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1043039942] [2022-04-28 03:34:26,038 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1043039942] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:26,039 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:26,039 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [42] imperfect sequences [] total 42 [2022-04-28 03:34:26,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861321565] [2022-04-28 03:34:26,039 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:26,039 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 128 [2022-04-28 03:34:26,039 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:26,039 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:26,125 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 128 edges. 128 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:26,125 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-28 03:34:26,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:26,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-28 03:34:26,125 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=224, Invalid=2226, Unknown=0, NotChecked=0, Total=2450 [2022-04-28 03:34:26,126 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:32,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:32,340 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2022-04-28 03:34:32,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2022-04-28 03:34:32,340 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 128 [2022-04-28 03:34:32,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:32,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:32,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 142 transitions. [2022-04-28 03:34:32,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:32,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 142 transitions. [2022-04-28 03:34:32,342 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 42 states and 142 transitions. [2022-04-28 03:34:32,420 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:32,421 INFO L225 Difference]: With dead ends: 142 [2022-04-28 03:34:32,421 INFO L226 Difference]: Without dead ends: 134 [2022-04-28 03:34:32,422 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 28 SyntacticMatches, 80 SemanticMatches, 87 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1494 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=497, Invalid=7335, Unknown=0, NotChecked=0, Total=7832 [2022-04-28 03:34:32,422 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 88 mSDsluCounter, 197 mSDsCounter, 0 mSdLazyCounter, 4837 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 88 SdHoareTripleChecker+Valid, 209 SdHoareTripleChecker+Invalid, 4878 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 4837 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:32,422 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [88 Valid, 209 Invalid, 4878 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 4837 Invalid, 0 Unknown, 0 Unchecked, 3.1s Time] [2022-04-28 03:34:32,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2022-04-28 03:34:32,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 133. [2022-04-28 03:34:32,612 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:32,612 INFO L82 GeneralOperation]: Start isEquivalent. First operand 134 states. Second operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:32,612 INFO L74 IsIncluded]: Start isIncluded. First operand 134 states. Second operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:32,613 INFO L87 Difference]: Start difference. First operand 134 states. Second operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:32,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:32,614 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2022-04-28 03:34:32,614 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2022-04-28 03:34:32,614 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:32,614 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:32,614 INFO L74 IsIncluded]: Start isIncluded. First operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 134 states. [2022-04-28 03:34:32,614 INFO L87 Difference]: Start difference. First operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 134 states. [2022-04-28 03:34:32,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:32,616 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2022-04-28 03:34:32,616 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2022-04-28 03:34:32,616 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:32,616 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:32,616 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:32,616 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:32,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 133 states, 128 states have (on average 1.0234375) internal successors, (131), 128 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:32,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 135 transitions. [2022-04-28 03:34:32,617 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 135 transitions. Word has length 128 [2022-04-28 03:34:32,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:32,617 INFO L495 AbstractCegarLoop]: Abstraction has 133 states and 135 transitions. [2022-04-28 03:34:32,617 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 2.9523809523809526) internal successors, (124), 41 states have internal predecessors, (124), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:32,618 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 133 states and 135 transitions. [2022-04-28 03:34:32,802 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:32,802 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 135 transitions. [2022-04-28 03:34:32,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2022-04-28 03:34:32,803 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:32,803 INFO L195 NwaCegarLoop]: trace histogram [40, 40, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:32,819 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Ended with exit code 0 [2022-04-28 03:34:33,003 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable40 [2022-04-28 03:34:33,003 INFO L420 AbstractCegarLoop]: === Iteration 42 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:33,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:33,004 INFO L85 PathProgramCache]: Analyzing trace with hash 1492984901, now seen corresponding path program 39 times [2022-04-28 03:34:33,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:33,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [847360306] [2022-04-28 03:34:33,712 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:34:34,237 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:34:34,239 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:34:34,241 INFO L85 PathProgramCache]: Analyzing trace with hash 1176482223, now seen corresponding path program 1 times [2022-04-28 03:34:34,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:34,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833914024] [2022-04-28 03:34:34,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:34,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:34,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:34,291 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:34,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:34,293 INFO L290 TraceCheckUtils]: 0: Hoare triple {25125#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {25118#true} is VALID [2022-04-28 03:34:34,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {25118#true} assume true; {25118#true} is VALID [2022-04-28 03:34:34,294 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25118#true} {25118#true} #41#return; {25118#true} is VALID [2022-04-28 03:34:34,294 INFO L272 TraceCheckUtils]: 0: Hoare triple {25118#true} call ULTIMATE.init(); {25125#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:34,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {25125#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {25118#true} is VALID [2022-04-28 03:34:34,294 INFO L290 TraceCheckUtils]: 2: Hoare triple {25118#true} assume true; {25118#true} is VALID [2022-04-28 03:34:34,294 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25118#true} {25118#true} #41#return; {25118#true} is VALID [2022-04-28 03:34:34,294 INFO L272 TraceCheckUtils]: 4: Hoare triple {25118#true} call #t~ret7 := main(); {25118#true} is VALID [2022-04-28 03:34:34,295 INFO L290 TraceCheckUtils]: 5: Hoare triple {25118#true} ~x~0 := 0;~y~0 := 0; {25123#(= main_~x~0 0)} is VALID [2022-04-28 03:34:34,295 INFO L290 TraceCheckUtils]: 6: Hoare triple {25123#(= main_~x~0 0)} [201] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1403 4294967296))) (let ((.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6)) (.cse2 (= v_main_~y~0_1441 v_main_~y~0_1440)) (.cse3 (= |v_main_#t~post6_542| |v_main_#t~post6_540|)) (.cse4 (= |v_main_#t~post5_270| |v_main_#t~post5_269|)) (.cse5 (= v_main_~x~0_1403 v_main_~x~0_1402))) (or (and (<= (div (+ 1000000 v_main_~y~0_1440 (* (- 1) v_main_~x~0_1403) (* (- 1) v_main_~y~0_1441)) (- 4294967296)) (+ (div (+ v_main_~x~0_1403 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1403 v_main_~y~0_1441) (+ v_main_~x~0_1402 v_main_~y~0_1440)) .cse0 (< v_main_~y~0_1440 v_main_~y~0_1441) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1441, main_#t~post5=|v_main_#t~post5_270|, main_~x~0=v_main_~x~0_1403, main_#t~post6=|v_main_#t~post6_542|} OutVars{main_#t~post5=|v_main_#t~post5_269|, main_~y~0=v_main_~y~0_1440, main_~x~0=v_main_~x~0_1402, main_#t~post6=|v_main_#t~post6_540|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {25123#(= main_~x~0 0)} is VALID [2022-04-28 03:34:34,296 INFO L290 TraceCheckUtils]: 7: Hoare triple {25123#(= main_~x~0 0)} [202] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25123#(= main_~x~0 0)} is VALID [2022-04-28 03:34:34,297 INFO L290 TraceCheckUtils]: 8: Hoare triple {25123#(= main_~x~0 0)} [203] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1405 4294967296)) (.cse1 (= v_main_~y~0_1443 v_main_~y~0_1442)) (.cse2 (= |v_main_#t~post4_275| |v_main_#t~post4_274|)) (.cse3 (= v_main_~x~0_1405 v_main_~x~0_1404)) (.cse4 (= |v_main_#t~post6_545| |v_main_#t~post6_541|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_1405 v_main_~y~0_1442) (+ v_main_~x~0_1404 v_main_~y~0_1443)) (<= (div (+ (* (- 1) v_main_~y~0_1442) v_main_~y~0_1443 500000 (* (- 1) v_main_~x~0_1405)) (- 4294967296)) (+ (div (+ v_main_~x~0_1405 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1443 v_main_~y~0_1442)) (and .cse1 .cse2 .cse3 .cse4) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_275|, main_~y~0=v_main_~y~0_1443, main_~x~0=v_main_~x~0_1405, main_#t~post6=|v_main_#t~post6_545|} OutVars{main_#t~post4=|v_main_#t~post4_274|, main_~y~0=v_main_~y~0_1442, main_~x~0=v_main_~x~0_1404, main_#t~post6=|v_main_#t~post6_541|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {25124#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:34:34,297 INFO L290 TraceCheckUtils]: 9: Hoare triple {25124#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [200] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {25119#false} is VALID [2022-04-28 03:34:34,297 INFO L272 TraceCheckUtils]: 10: Hoare triple {25119#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {25119#false} is VALID [2022-04-28 03:34:34,297 INFO L290 TraceCheckUtils]: 11: Hoare triple {25119#false} ~cond := #in~cond; {25119#false} is VALID [2022-04-28 03:34:34,297 INFO L290 TraceCheckUtils]: 12: Hoare triple {25119#false} assume 0 == ~cond; {25119#false} is VALID [2022-04-28 03:34:34,297 INFO L290 TraceCheckUtils]: 13: Hoare triple {25119#false} assume !false; {25119#false} is VALID [2022-04-28 03:34:34,297 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:34,298 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:34,298 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [833914024] [2022-04-28 03:34:34,298 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [833914024] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:34,298 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [457296892] [2022-04-28 03:34:34,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:34,298 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:34,298 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:34,299 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:34,300 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-04-28 03:34:34,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:34,326 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:34:34,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:34,335 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:34,508 INFO L272 TraceCheckUtils]: 0: Hoare triple {25118#true} call ULTIMATE.init(); {25118#true} is VALID [2022-04-28 03:34:34,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {25118#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {25118#true} is VALID [2022-04-28 03:34:34,509 INFO L290 TraceCheckUtils]: 2: Hoare triple {25118#true} assume true; {25118#true} is VALID [2022-04-28 03:34:34,509 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25118#true} {25118#true} #41#return; {25118#true} is VALID [2022-04-28 03:34:34,509 INFO L272 TraceCheckUtils]: 4: Hoare triple {25118#true} call #t~ret7 := main(); {25118#true} is VALID [2022-04-28 03:34:34,509 INFO L290 TraceCheckUtils]: 5: Hoare triple {25118#true} ~x~0 := 0;~y~0 := 0; {25144#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:34,510 INFO L290 TraceCheckUtils]: 6: Hoare triple {25144#(and (= main_~x~0 0) (= main_~y~0 0))} [201] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1403 4294967296))) (let ((.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6)) (.cse2 (= v_main_~y~0_1441 v_main_~y~0_1440)) (.cse3 (= |v_main_#t~post6_542| |v_main_#t~post6_540|)) (.cse4 (= |v_main_#t~post5_270| |v_main_#t~post5_269|)) (.cse5 (= v_main_~x~0_1403 v_main_~x~0_1402))) (or (and (<= (div (+ 1000000 v_main_~y~0_1440 (* (- 1) v_main_~x~0_1403) (* (- 1) v_main_~y~0_1441)) (- 4294967296)) (+ (div (+ v_main_~x~0_1403 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1403 v_main_~y~0_1441) (+ v_main_~x~0_1402 v_main_~y~0_1440)) .cse0 (< v_main_~y~0_1440 v_main_~y~0_1441) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1441, main_#t~post5=|v_main_#t~post5_270|, main_~x~0=v_main_~x~0_1403, main_#t~post6=|v_main_#t~post6_542|} OutVars{main_#t~post5=|v_main_#t~post5_269|, main_~y~0=v_main_~y~0_1440, main_~x~0=v_main_~x~0_1402, main_#t~post6=|v_main_#t~post6_540|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {25144#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:34,510 INFO L290 TraceCheckUtils]: 7: Hoare triple {25144#(and (= main_~x~0 0) (= main_~y~0 0))} [202] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25144#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:34,511 INFO L290 TraceCheckUtils]: 8: Hoare triple {25144#(and (= main_~x~0 0) (= main_~y~0 0))} [203] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1405 4294967296)) (.cse1 (= v_main_~y~0_1443 v_main_~y~0_1442)) (.cse2 (= |v_main_#t~post4_275| |v_main_#t~post4_274|)) (.cse3 (= v_main_~x~0_1405 v_main_~x~0_1404)) (.cse4 (= |v_main_#t~post6_545| |v_main_#t~post6_541|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_1405 v_main_~y~0_1442) (+ v_main_~x~0_1404 v_main_~y~0_1443)) (<= (div (+ (* (- 1) v_main_~y~0_1442) v_main_~y~0_1443 500000 (* (- 1) v_main_~x~0_1405)) (- 4294967296)) (+ (div (+ v_main_~x~0_1405 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1443 v_main_~y~0_1442)) (and .cse1 .cse2 .cse3 .cse4) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_275|, main_~y~0=v_main_~y~0_1443, main_~x~0=v_main_~x~0_1405, main_#t~post6=|v_main_#t~post6_545|} OutVars{main_#t~post4=|v_main_#t~post4_274|, main_~y~0=v_main_~y~0_1442, main_~x~0=v_main_~x~0_1404, main_#t~post6=|v_main_#t~post6_541|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {25154#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:34:34,512 INFO L290 TraceCheckUtils]: 9: Hoare triple {25154#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [200] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {25119#false} is VALID [2022-04-28 03:34:34,512 INFO L272 TraceCheckUtils]: 10: Hoare triple {25119#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {25119#false} is VALID [2022-04-28 03:34:34,512 INFO L290 TraceCheckUtils]: 11: Hoare triple {25119#false} ~cond := #in~cond; {25119#false} is VALID [2022-04-28 03:34:34,512 INFO L290 TraceCheckUtils]: 12: Hoare triple {25119#false} assume 0 == ~cond; {25119#false} is VALID [2022-04-28 03:34:34,512 INFO L290 TraceCheckUtils]: 13: Hoare triple {25119#false} assume !false; {25119#false} is VALID [2022-04-28 03:34:34,513 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:34,513 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:36,957 INFO L290 TraceCheckUtils]: 13: Hoare triple {25119#false} assume !false; {25119#false} is VALID [2022-04-28 03:34:36,957 INFO L290 TraceCheckUtils]: 12: Hoare triple {25173#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {25119#false} is VALID [2022-04-28 03:34:36,957 INFO L290 TraceCheckUtils]: 11: Hoare triple {25177#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {25173#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:34:36,958 INFO L272 TraceCheckUtils]: 10: Hoare triple {25181#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {25177#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:34:36,958 INFO L290 TraceCheckUtils]: 9: Hoare triple {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [200] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {25181#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:34:36,960 INFO L290 TraceCheckUtils]: 8: Hoare triple {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [203] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1405 4294967296)) (.cse1 (= v_main_~y~0_1443 v_main_~y~0_1442)) (.cse2 (= |v_main_#t~post4_275| |v_main_#t~post4_274|)) (.cse3 (= v_main_~x~0_1405 v_main_~x~0_1404)) (.cse4 (= |v_main_#t~post6_545| |v_main_#t~post6_541|))) (or (and (< .cse0 500000) (= (+ v_main_~x~0_1405 v_main_~y~0_1442) (+ v_main_~x~0_1404 v_main_~y~0_1443)) (<= (div (+ (* (- 1) v_main_~y~0_1442) v_main_~y~0_1443 500000 (* (- 1) v_main_~x~0_1405)) (- 4294967296)) (+ (div (+ v_main_~x~0_1405 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1443 v_main_~y~0_1442)) (and .cse1 .cse2 .cse3 .cse4) (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_275|, main_~y~0=v_main_~y~0_1443, main_~x~0=v_main_~x~0_1405, main_#t~post6=|v_main_#t~post6_545|} OutVars{main_#t~post4=|v_main_#t~post4_274|, main_~y~0=v_main_~y~0_1442, main_~x~0=v_main_~x~0_1404, main_#t~post6=|v_main_#t~post6_541|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:36,960 INFO L290 TraceCheckUtils]: 7: Hoare triple {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [202] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:38,635 INFO L290 TraceCheckUtils]: 6: Hoare triple {25195#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_1453_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1453_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1453_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [201] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1403 4294967296))) (let ((.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6)) (.cse2 (= v_main_~y~0_1441 v_main_~y~0_1440)) (.cse3 (= |v_main_#t~post6_542| |v_main_#t~post6_540|)) (.cse4 (= |v_main_#t~post5_270| |v_main_#t~post5_269|)) (.cse5 (= v_main_~x~0_1403 v_main_~x~0_1402))) (or (and (<= (div (+ 1000000 v_main_~y~0_1440 (* (- 1) v_main_~x~0_1403) (* (- 1) v_main_~y~0_1441)) (- 4294967296)) (+ (div (+ v_main_~x~0_1403 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1403 v_main_~y~0_1441) (+ v_main_~x~0_1402 v_main_~y~0_1440)) .cse0 (< v_main_~y~0_1440 v_main_~y~0_1441) .cse1) (and .cse2 (or (not .cse1) (not .cse0)) .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1441, main_#t~post5=|v_main_#t~post5_270|, main_~x~0=v_main_~x~0_1403, main_#t~post6=|v_main_#t~post6_542|} OutVars{main_#t~post5=|v_main_#t~post5_269|, main_~y~0=v_main_~y~0_1440, main_~x~0=v_main_~x~0_1402, main_#t~post6=|v_main_#t~post6_540|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {25185#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:38,636 INFO L290 TraceCheckUtils]: 5: Hoare triple {25118#true} ~x~0 := 0;~y~0 := 0; {25195#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_1453_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1453_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1453_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:34:38,636 INFO L272 TraceCheckUtils]: 4: Hoare triple {25118#true} call #t~ret7 := main(); {25118#true} is VALID [2022-04-28 03:34:38,636 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25118#true} {25118#true} #41#return; {25118#true} is VALID [2022-04-28 03:34:38,636 INFO L290 TraceCheckUtils]: 2: Hoare triple {25118#true} assume true; {25118#true} is VALID [2022-04-28 03:34:38,636 INFO L290 TraceCheckUtils]: 1: Hoare triple {25118#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {25118#true} is VALID [2022-04-28 03:34:38,637 INFO L272 TraceCheckUtils]: 0: Hoare triple {25118#true} call ULTIMATE.init(); {25118#true} is VALID [2022-04-28 03:34:38,637 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:38,637 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [457296892] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:38,637 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:38,637 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:34:41,228 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:41,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [847360306] [2022-04-28 03:34:41,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [847360306] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:41,228 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:41,228 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [43] imperfect sequences [] total 43 [2022-04-28 03:34:41,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048814998] [2022-04-28 03:34:41,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:41,228 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 131 [2022-04-28 03:34:41,229 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:41,229 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:41,315 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 131 edges. 131 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:41,316 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-04-28 03:34:41,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:41,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-04-28 03:34:41,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=229, Invalid=2321, Unknown=0, NotChecked=0, Total=2550 [2022-04-28 03:34:41,316 INFO L87 Difference]: Start difference. First operand 133 states and 135 transitions. Second operand has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:48,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:48,155 INFO L93 Difference]: Finished difference Result 145 states and 149 transitions. [2022-04-28 03:34:48,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-04-28 03:34:48,155 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 131 [2022-04-28 03:34:48,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:48,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:48,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 145 transitions. [2022-04-28 03:34:48,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:48,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 145 transitions. [2022-04-28 03:34:48,157 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 145 transitions. [2022-04-28 03:34:48,267 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 145 edges. 145 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:48,268 INFO L225 Difference]: With dead ends: 145 [2022-04-28 03:34:48,268 INFO L226 Difference]: Without dead ends: 137 [2022-04-28 03:34:48,268 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 28 SyntacticMatches, 82 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1552 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=509, Invalid=7681, Unknown=0, NotChecked=0, Total=8190 [2022-04-28 03:34:48,269 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 90 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 5081 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 90 SdHoareTripleChecker+Valid, 214 SdHoareTripleChecker+Invalid, 5123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 5081 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:48,269 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [90 Valid, 214 Invalid, 5123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 5081 Invalid, 0 Unknown, 0 Unchecked, 3.4s Time] [2022-04-28 03:34:48,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2022-04-28 03:34:48,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 136. [2022-04-28 03:34:48,461 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:48,461 INFO L82 GeneralOperation]: Start isEquivalent. First operand 137 states. Second operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:48,461 INFO L74 IsIncluded]: Start isIncluded. First operand 137 states. Second operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:48,461 INFO L87 Difference]: Start difference. First operand 137 states. Second operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:48,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:48,462 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2022-04-28 03:34:48,462 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 139 transitions. [2022-04-28 03:34:48,462 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:48,462 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:48,463 INFO L74 IsIncluded]: Start isIncluded. First operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 137 states. [2022-04-28 03:34:48,463 INFO L87 Difference]: Start difference. First operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 137 states. [2022-04-28 03:34:48,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:48,464 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2022-04-28 03:34:48,464 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 139 transitions. [2022-04-28 03:34:48,464 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:48,464 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:48,464 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:48,464 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:48,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 131 states have (on average 1.0229007633587786) internal successors, (134), 131 states have internal predecessors, (134), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:48,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2022-04-28 03:34:48,465 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 131 [2022-04-28 03:34:48,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:48,466 INFO L495 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2022-04-28 03:34:48,466 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 43 states have (on average 2.953488372093023) internal successors, (127), 42 states have internal predecessors, (127), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:48,466 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 136 states and 138 transitions. [2022-04-28 03:34:48,648 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 138 edges. 138 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:48,649 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2022-04-28 03:34:48,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2022-04-28 03:34:48,649 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:48,649 INFO L195 NwaCegarLoop]: trace histogram [41, 41, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:48,667 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:48,849 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2022-04-28 03:34:48,850 INFO L420 AbstractCegarLoop]: === Iteration 43 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:48,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:48,850 INFO L85 PathProgramCache]: Analyzing trace with hash -710270963, now seen corresponding path program 40 times [2022-04-28 03:34:48,850 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:48,850 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [41396099] [2022-04-28 03:34:49,857 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:34:50,375 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:34:50,377 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:34:50,379 INFO L85 PathProgramCache]: Analyzing trace with hash -1068952913, now seen corresponding path program 1 times [2022-04-28 03:34:50,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:50,379 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210295213] [2022-04-28 03:34:50,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:50,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:50,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:50,415 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:50,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:50,417 INFO L290 TraceCheckUtils]: 0: Hoare triple {26178#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {26171#true} is VALID [2022-04-28 03:34:50,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {26171#true} assume true; {26171#true} is VALID [2022-04-28 03:34:50,418 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26171#true} {26171#true} #41#return; {26171#true} is VALID [2022-04-28 03:34:50,418 INFO L272 TraceCheckUtils]: 0: Hoare triple {26171#true} call ULTIMATE.init(); {26178#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:50,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {26178#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {26171#true} is VALID [2022-04-28 03:34:50,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {26171#true} assume true; {26171#true} is VALID [2022-04-28 03:34:50,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26171#true} {26171#true} #41#return; {26171#true} is VALID [2022-04-28 03:34:50,418 INFO L272 TraceCheckUtils]: 4: Hoare triple {26171#true} call #t~ret7 := main(); {26171#true} is VALID [2022-04-28 03:34:50,419 INFO L290 TraceCheckUtils]: 5: Hoare triple {26171#true} ~x~0 := 0;~y~0 := 0; {26176#(= main_~x~0 0)} is VALID [2022-04-28 03:34:50,419 INFO L290 TraceCheckUtils]: 6: Hoare triple {26176#(= main_~x~0 0)} [205] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1459 4294967296))) (let ((.cse0 (= |v_main_#t~post6_556| |v_main_#t~post6_554|)) (.cse1 (= v_main_~y~0_1498 v_main_~y~0_1497)) (.cse4 (= |v_main_#t~post5_277| |v_main_#t~post5_276|)) (.cse5 (= v_main_~x~0_1459 v_main_~x~0_1458)) (.cse3 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and .cse0 .cse1 .cse4 .cse5) (and (= (+ v_main_~x~0_1459 v_main_~y~0_1498) (+ v_main_~x~0_1458 v_main_~y~0_1497)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1458)) (- 4294967296)) (+ (div (+ v_main_~x~0_1459 (- 4294967295)) 4294967296) 1)) .cse3 .cse2 (< v_main_~x~0_1459 v_main_~x~0_1458))))) InVars {main_~y~0=v_main_~y~0_1498, main_#t~post5=|v_main_#t~post5_277|, main_~x~0=v_main_~x~0_1459, main_#t~post6=|v_main_#t~post6_556|} OutVars{main_#t~post5=|v_main_#t~post5_276|, main_~y~0=v_main_~y~0_1497, main_~x~0=v_main_~x~0_1458, main_#t~post6=|v_main_#t~post6_554|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {26176#(= main_~x~0 0)} is VALID [2022-04-28 03:34:50,420 INFO L290 TraceCheckUtils]: 7: Hoare triple {26176#(= main_~x~0 0)} [206] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26176#(= main_~x~0 0)} is VALID [2022-04-28 03:34:50,421 INFO L290 TraceCheckUtils]: 8: Hoare triple {26176#(= main_~x~0 0)} [207] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1500 v_main_~y~0_1499)) (.cse1 (= |v_main_#t~post4_282| |v_main_#t~post4_281|)) (.cse2 (= v_main_~x~0_1461 v_main_~x~0_1460)) (.cse3 (mod v_main_~x~0_1461 4294967296))) (or (and (= |v_main_#t~post6_559| |v_main_#t~post6_555|) .cse0 .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_555| |v_main_#t~post6_559|) .cse1 (<= 500000 .cse3) .cse2) (and (= (+ v_main_~x~0_1460 v_main_~y~0_1500) (+ v_main_~x~0_1461 v_main_~y~0_1499)) (< v_main_~x~0_1461 v_main_~x~0_1460) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1460)) (- 4294967296)) (+ (div (+ v_main_~x~0_1461 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)))) InVars {main_#t~post4=|v_main_#t~post4_282|, main_~y~0=v_main_~y~0_1500, main_~x~0=v_main_~x~0_1461, main_#t~post6=|v_main_#t~post6_559|} OutVars{main_#t~post4=|v_main_#t~post4_281|, main_~y~0=v_main_~y~0_1499, main_~x~0=v_main_~x~0_1460, main_#t~post6=|v_main_#t~post6_555|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {26177#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:34:50,421 INFO L290 TraceCheckUtils]: 9: Hoare triple {26177#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [204] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {26172#false} is VALID [2022-04-28 03:34:50,421 INFO L272 TraceCheckUtils]: 10: Hoare triple {26172#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {26172#false} is VALID [2022-04-28 03:34:50,421 INFO L290 TraceCheckUtils]: 11: Hoare triple {26172#false} ~cond := #in~cond; {26172#false} is VALID [2022-04-28 03:34:50,421 INFO L290 TraceCheckUtils]: 12: Hoare triple {26172#false} assume 0 == ~cond; {26172#false} is VALID [2022-04-28 03:34:50,421 INFO L290 TraceCheckUtils]: 13: Hoare triple {26172#false} assume !false; {26172#false} is VALID [2022-04-28 03:34:50,421 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:50,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:50,422 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210295213] [2022-04-28 03:34:50,422 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1210295213] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:50,422 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [513252524] [2022-04-28 03:34:50,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:50,422 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:50,422 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:50,423 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:50,424 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2022-04-28 03:34:50,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:50,462 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:34:50,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:50,471 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:50,643 INFO L272 TraceCheckUtils]: 0: Hoare triple {26171#true} call ULTIMATE.init(); {26171#true} is VALID [2022-04-28 03:34:50,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {26171#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {26171#true} is VALID [2022-04-28 03:34:50,644 INFO L290 TraceCheckUtils]: 2: Hoare triple {26171#true} assume true; {26171#true} is VALID [2022-04-28 03:34:50,644 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26171#true} {26171#true} #41#return; {26171#true} is VALID [2022-04-28 03:34:50,644 INFO L272 TraceCheckUtils]: 4: Hoare triple {26171#true} call #t~ret7 := main(); {26171#true} is VALID [2022-04-28 03:34:50,644 INFO L290 TraceCheckUtils]: 5: Hoare triple {26171#true} ~x~0 := 0;~y~0 := 0; {26197#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:50,645 INFO L290 TraceCheckUtils]: 6: Hoare triple {26197#(and (= main_~x~0 0) (= main_~y~0 0))} [205] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1459 4294967296))) (let ((.cse0 (= |v_main_#t~post6_556| |v_main_#t~post6_554|)) (.cse1 (= v_main_~y~0_1498 v_main_~y~0_1497)) (.cse4 (= |v_main_#t~post5_277| |v_main_#t~post5_276|)) (.cse5 (= v_main_~x~0_1459 v_main_~x~0_1458)) (.cse3 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and .cse0 .cse1 .cse4 .cse5) (and (= (+ v_main_~x~0_1459 v_main_~y~0_1498) (+ v_main_~x~0_1458 v_main_~y~0_1497)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1458)) (- 4294967296)) (+ (div (+ v_main_~x~0_1459 (- 4294967295)) 4294967296) 1)) .cse3 .cse2 (< v_main_~x~0_1459 v_main_~x~0_1458))))) InVars {main_~y~0=v_main_~y~0_1498, main_#t~post5=|v_main_#t~post5_277|, main_~x~0=v_main_~x~0_1459, main_#t~post6=|v_main_#t~post6_556|} OutVars{main_#t~post5=|v_main_#t~post5_276|, main_~y~0=v_main_~y~0_1497, main_~x~0=v_main_~x~0_1458, main_#t~post6=|v_main_#t~post6_554|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {26197#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:50,645 INFO L290 TraceCheckUtils]: 7: Hoare triple {26197#(and (= main_~x~0 0) (= main_~y~0 0))} [206] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26197#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:34:50,646 INFO L290 TraceCheckUtils]: 8: Hoare triple {26197#(and (= main_~x~0 0) (= main_~y~0 0))} [207] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1500 v_main_~y~0_1499)) (.cse1 (= |v_main_#t~post4_282| |v_main_#t~post4_281|)) (.cse2 (= v_main_~x~0_1461 v_main_~x~0_1460)) (.cse3 (mod v_main_~x~0_1461 4294967296))) (or (and (= |v_main_#t~post6_559| |v_main_#t~post6_555|) .cse0 .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_555| |v_main_#t~post6_559|) .cse1 (<= 500000 .cse3) .cse2) (and (= (+ v_main_~x~0_1460 v_main_~y~0_1500) (+ v_main_~x~0_1461 v_main_~y~0_1499)) (< v_main_~x~0_1461 v_main_~x~0_1460) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1460)) (- 4294967296)) (+ (div (+ v_main_~x~0_1461 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)))) InVars {main_#t~post4=|v_main_#t~post4_282|, main_~y~0=v_main_~y~0_1500, main_~x~0=v_main_~x~0_1461, main_#t~post6=|v_main_#t~post6_559|} OutVars{main_#t~post4=|v_main_#t~post4_281|, main_~y~0=v_main_~y~0_1499, main_~x~0=v_main_~x~0_1460, main_#t~post6=|v_main_#t~post6_555|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {26207#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:34:50,647 INFO L290 TraceCheckUtils]: 9: Hoare triple {26207#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [204] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {26172#false} is VALID [2022-04-28 03:34:50,647 INFO L272 TraceCheckUtils]: 10: Hoare triple {26172#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {26172#false} is VALID [2022-04-28 03:34:50,647 INFO L290 TraceCheckUtils]: 11: Hoare triple {26172#false} ~cond := #in~cond; {26172#false} is VALID [2022-04-28 03:34:50,647 INFO L290 TraceCheckUtils]: 12: Hoare triple {26172#false} assume 0 == ~cond; {26172#false} is VALID [2022-04-28 03:34:50,647 INFO L290 TraceCheckUtils]: 13: Hoare triple {26172#false} assume !false; {26172#false} is VALID [2022-04-28 03:34:50,647 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:50,647 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:51,470 INFO L290 TraceCheckUtils]: 13: Hoare triple {26172#false} assume !false; {26172#false} is VALID [2022-04-28 03:34:51,470 INFO L290 TraceCheckUtils]: 12: Hoare triple {26226#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {26172#false} is VALID [2022-04-28 03:34:51,471 INFO L290 TraceCheckUtils]: 11: Hoare triple {26230#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {26226#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:34:51,471 INFO L272 TraceCheckUtils]: 10: Hoare triple {26234#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {26230#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:34:51,472 INFO L290 TraceCheckUtils]: 9: Hoare triple {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [204] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {26234#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:34:51,473 INFO L290 TraceCheckUtils]: 8: Hoare triple {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [207] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1500 v_main_~y~0_1499)) (.cse1 (= |v_main_#t~post4_282| |v_main_#t~post4_281|)) (.cse2 (= v_main_~x~0_1461 v_main_~x~0_1460)) (.cse3 (mod v_main_~x~0_1461 4294967296))) (or (and (= |v_main_#t~post6_559| |v_main_#t~post6_555|) .cse0 .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_555| |v_main_#t~post6_559|) .cse1 (<= 500000 .cse3) .cse2) (and (= (+ v_main_~x~0_1460 v_main_~y~0_1500) (+ v_main_~x~0_1461 v_main_~y~0_1499)) (< v_main_~x~0_1461 v_main_~x~0_1460) (<= (div (+ 500000 (* (- 1) v_main_~x~0_1460)) (- 4294967296)) (+ (div (+ v_main_~x~0_1461 (- 4294967295)) 4294967296) 1)) (< .cse3 500000)))) InVars {main_#t~post4=|v_main_#t~post4_282|, main_~y~0=v_main_~y~0_1500, main_~x~0=v_main_~x~0_1461, main_#t~post6=|v_main_#t~post6_559|} OutVars{main_#t~post4=|v_main_#t~post4_281|, main_~y~0=v_main_~y~0_1499, main_~x~0=v_main_~x~0_1460, main_#t~post6=|v_main_#t~post6_555|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:51,474 INFO L290 TraceCheckUtils]: 7: Hoare triple {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [206] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:51,492 INFO L290 TraceCheckUtils]: 6: Hoare triple {26248#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_1510_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1510_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1510_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [205] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1459 4294967296))) (let ((.cse0 (= |v_main_#t~post6_556| |v_main_#t~post6_554|)) (.cse1 (= v_main_~y~0_1498 v_main_~y~0_1497)) (.cse4 (= |v_main_#t~post5_277| |v_main_#t~post5_276|)) (.cse5 (= v_main_~x~0_1459 v_main_~x~0_1458)) (.cse3 (<= 500000 .cse6)) (.cse2 (< .cse6 1000000))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and .cse0 .cse1 .cse4 .cse5) (and (= (+ v_main_~x~0_1459 v_main_~y~0_1498) (+ v_main_~x~0_1458 v_main_~y~0_1497)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1458)) (- 4294967296)) (+ (div (+ v_main_~x~0_1459 (- 4294967295)) 4294967296) 1)) .cse3 .cse2 (< v_main_~x~0_1459 v_main_~x~0_1458))))) InVars {main_~y~0=v_main_~y~0_1498, main_#t~post5=|v_main_#t~post5_277|, main_~x~0=v_main_~x~0_1459, main_#t~post6=|v_main_#t~post6_556|} OutVars{main_#t~post5=|v_main_#t~post5_276|, main_~y~0=v_main_~y~0_1497, main_~x~0=v_main_~x~0_1458, main_#t~post6=|v_main_#t~post6_554|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {26238#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:34:51,493 INFO L290 TraceCheckUtils]: 5: Hoare triple {26171#true} ~x~0 := 0;~y~0 := 0; {26248#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_1510_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1510_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1510_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:34:51,493 INFO L272 TraceCheckUtils]: 4: Hoare triple {26171#true} call #t~ret7 := main(); {26171#true} is VALID [2022-04-28 03:34:51,493 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26171#true} {26171#true} #41#return; {26171#true} is VALID [2022-04-28 03:34:51,493 INFO L290 TraceCheckUtils]: 2: Hoare triple {26171#true} assume true; {26171#true} is VALID [2022-04-28 03:34:51,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {26171#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {26171#true} is VALID [2022-04-28 03:34:51,493 INFO L272 TraceCheckUtils]: 0: Hoare triple {26171#true} call ULTIMATE.init(); {26171#true} is VALID [2022-04-28 03:34:51,493 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:51,493 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [513252524] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:51,493 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:51,494 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:34:53,877 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:53,877 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [41396099] [2022-04-28 03:34:53,877 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [41396099] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:53,877 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:53,877 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [44] imperfect sequences [] total 44 [2022-04-28 03:34:53,877 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [822275583] [2022-04-28 03:34:53,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:53,878 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 134 [2022-04-28 03:34:53,878 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:53,878 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:34:53,969 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:53,969 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 44 states [2022-04-28 03:34:53,969 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:53,969 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-04-28 03:34:53,970 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=2418, Unknown=0, NotChecked=0, Total=2652 [2022-04-28 03:34:53,970 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:00,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:00,855 INFO L93 Difference]: Finished difference Result 148 states and 152 transitions. [2022-04-28 03:35:00,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2022-04-28 03:35:00,856 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 134 [2022-04-28 03:35:00,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:00,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:00,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 148 transitions. [2022-04-28 03:35:00,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:00,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 148 transitions. [2022-04-28 03:35:00,858 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 44 states and 148 transitions. [2022-04-28 03:35:00,942 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 148 edges. 148 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:00,953 INFO L225 Difference]: With dead ends: 148 [2022-04-28 03:35:00,953 INFO L226 Difference]: Without dead ends: 140 [2022-04-28 03:35:00,954 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 29 SyntacticMatches, 83 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1611 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=521, Invalid=8035, Unknown=0, NotChecked=0, Total=8556 [2022-04-28 03:35:00,958 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 92 mSDsluCounter, 207 mSDsCounter, 0 mSdLazyCounter, 5331 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 92 SdHoareTripleChecker+Valid, 219 SdHoareTripleChecker+Invalid, 5374 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 5331 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:00,959 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [92 Valid, 219 Invalid, 5374 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 5331 Invalid, 0 Unknown, 0 Unchecked, 3.4s Time] [2022-04-28 03:35:00,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2022-04-28 03:35:01,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 139. [2022-04-28 03:35:01,181 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:01,181 INFO L82 GeneralOperation]: Start isEquivalent. First operand 140 states. Second operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:01,181 INFO L74 IsIncluded]: Start isIncluded. First operand 140 states. Second operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:01,181 INFO L87 Difference]: Start difference. First operand 140 states. Second operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:01,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:01,183 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2022-04-28 03:35:01,183 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 142 transitions. [2022-04-28 03:35:01,183 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:01,183 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:01,183 INFO L74 IsIncluded]: Start isIncluded. First operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 140 states. [2022-04-28 03:35:01,184 INFO L87 Difference]: Start difference. First operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 140 states. [2022-04-28 03:35:01,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:01,185 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2022-04-28 03:35:01,185 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 142 transitions. [2022-04-28 03:35:01,185 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:01,185 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:01,185 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:01,185 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:01,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 134 states have (on average 1.0223880597014925) internal successors, (137), 134 states have internal predecessors, (137), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:01,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 141 transitions. [2022-04-28 03:35:01,187 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 141 transitions. Word has length 134 [2022-04-28 03:35:01,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:01,187 INFO L495 AbstractCegarLoop]: Abstraction has 139 states and 141 transitions. [2022-04-28 03:35:01,187 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 44 states, 44 states have (on average 2.9545454545454546) internal successors, (130), 43 states have internal predecessors, (130), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:01,187 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 139 states and 141 transitions. [2022-04-28 03:35:01,392 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 141 edges. 141 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:01,392 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 141 transitions. [2022-04-28 03:35:01,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2022-04-28 03:35:01,393 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:01,393 INFO L195 NwaCegarLoop]: trace histogram [42, 42, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:01,425 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Forceful destruction successful, exit code 0 [2022-04-28 03:35:01,593 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42 [2022-04-28 03:35:01,593 INFO L420 AbstractCegarLoop]: === Iteration 44 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:01,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:01,594 INFO L85 PathProgramCache]: Analyzing trace with hash 2079469381, now seen corresponding path program 41 times [2022-04-28 03:35:01,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:01,594 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [921236349] [2022-04-28 03:35:02,559 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:35:05,345 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:35:05,507 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:35:05,508 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:35:05,510 INFO L85 PathProgramCache]: Analyzing trace with hash 980579247, now seen corresponding path program 1 times [2022-04-28 03:35:05,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:05,510 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439799281] [2022-04-28 03:35:05,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:05,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:05,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:05,569 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:05,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:05,572 INFO L290 TraceCheckUtils]: 0: Hoare triple {27252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {27245#true} is VALID [2022-04-28 03:35:05,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {27245#true} assume true; {27245#true} is VALID [2022-04-28 03:35:05,573 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27245#true} {27245#true} #41#return; {27245#true} is VALID [2022-04-28 03:35:05,573 INFO L272 TraceCheckUtils]: 0: Hoare triple {27245#true} call ULTIMATE.init(); {27252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:05,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {27252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {27245#true} is VALID [2022-04-28 03:35:05,573 INFO L290 TraceCheckUtils]: 2: Hoare triple {27245#true} assume true; {27245#true} is VALID [2022-04-28 03:35:05,573 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27245#true} {27245#true} #41#return; {27245#true} is VALID [2022-04-28 03:35:05,573 INFO L272 TraceCheckUtils]: 4: Hoare triple {27245#true} call #t~ret7 := main(); {27245#true} is VALID [2022-04-28 03:35:05,574 INFO L290 TraceCheckUtils]: 5: Hoare triple {27245#true} ~x~0 := 0;~y~0 := 0; {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:05,574 INFO L290 TraceCheckUtils]: 6: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [209] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1516 4294967296))) (let ((.cse0 (= |v_main_#t~post6_570| |v_main_#t~post6_568|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse1 (= v_main_~x~0_1516 v_main_~x~0_1515)) (.cse2 (= v_main_~y~0_1556 v_main_~y~0_1555)) (.cse3 (= |v_main_#t~post5_284| |v_main_#t~post5_283|))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1516) (* (- 1) v_main_~y~0_1556) 1000000 v_main_~y~0_1555) (- 4294967296)) (+ (div (+ v_main_~x~0_1516 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1555 v_main_~y~0_1556) (= (+ v_main_~x~0_1515 v_main_~y~0_1555) (+ v_main_~x~0_1516 v_main_~y~0_1556)) .cse5) (and .cse0 (or (not .cse5) (not .cse4)) .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1556, main_#t~post5=|v_main_#t~post5_284|, main_~x~0=v_main_~x~0_1516, main_#t~post6=|v_main_#t~post6_570|} OutVars{main_#t~post5=|v_main_#t~post5_283|, main_~y~0=v_main_~y~0_1555, main_~x~0=v_main_~x~0_1515, main_#t~post6=|v_main_#t~post6_568|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:05,575 INFO L290 TraceCheckUtils]: 7: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [210] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:05,576 INFO L290 TraceCheckUtils]: 8: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [211] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_289| |v_main_#t~post4_288|)) (.cse2 (= |v_main_#t~post6_573| |v_main_#t~post6_569|)) (.cse3 (= v_main_~x~0_1518 v_main_~x~0_1517)) (.cse4 (= v_main_~y~0_1558 v_main_~y~0_1557)) (.cse1 (mod v_main_~x~0_1518 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~x~0_1517) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1518 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1518 v_main_~y~0_1557) (+ v_main_~x~0_1517 v_main_~y~0_1558)) (< v_main_~x~0_1518 v_main_~x~0_1517)))) InVars {main_#t~post4=|v_main_#t~post4_289|, main_~y~0=v_main_~y~0_1558, main_~x~0=v_main_~x~0_1518, main_#t~post6=|v_main_#t~post6_573|} OutVars{main_#t~post4=|v_main_#t~post4_288|, main_~y~0=v_main_~y~0_1557, main_~x~0=v_main_~x~0_1517, main_#t~post6=|v_main_#t~post6_569|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {27251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:35:05,576 INFO L290 TraceCheckUtils]: 9: Hoare triple {27251#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [208] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {27246#false} is VALID [2022-04-28 03:35:05,576 INFO L272 TraceCheckUtils]: 10: Hoare triple {27246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {27246#false} is VALID [2022-04-28 03:35:05,576 INFO L290 TraceCheckUtils]: 11: Hoare triple {27246#false} ~cond := #in~cond; {27246#false} is VALID [2022-04-28 03:35:05,576 INFO L290 TraceCheckUtils]: 12: Hoare triple {27246#false} assume 0 == ~cond; {27246#false} is VALID [2022-04-28 03:35:05,576 INFO L290 TraceCheckUtils]: 13: Hoare triple {27246#false} assume !false; {27246#false} is VALID [2022-04-28 03:35:05,576 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:05,577 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:05,577 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439799281] [2022-04-28 03:35:05,577 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1439799281] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:05,577 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1495474757] [2022-04-28 03:35:05,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:05,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:05,577 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:05,578 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:05,582 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2022-04-28 03:35:05,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:05,608 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:35:05,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:05,615 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:05,772 INFO L272 TraceCheckUtils]: 0: Hoare triple {27245#true} call ULTIMATE.init(); {27245#true} is VALID [2022-04-28 03:35:05,772 INFO L290 TraceCheckUtils]: 1: Hoare triple {27245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {27245#true} is VALID [2022-04-28 03:35:05,772 INFO L290 TraceCheckUtils]: 2: Hoare triple {27245#true} assume true; {27245#true} is VALID [2022-04-28 03:35:05,773 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27245#true} {27245#true} #41#return; {27245#true} is VALID [2022-04-28 03:35:05,773 INFO L272 TraceCheckUtils]: 4: Hoare triple {27245#true} call #t~ret7 := main(); {27245#true} is VALID [2022-04-28 03:35:05,773 INFO L290 TraceCheckUtils]: 5: Hoare triple {27245#true} ~x~0 := 0;~y~0 := 0; {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:05,774 INFO L290 TraceCheckUtils]: 6: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [209] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1516 4294967296))) (let ((.cse0 (= |v_main_#t~post6_570| |v_main_#t~post6_568|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse1 (= v_main_~x~0_1516 v_main_~x~0_1515)) (.cse2 (= v_main_~y~0_1556 v_main_~y~0_1555)) (.cse3 (= |v_main_#t~post5_284| |v_main_#t~post5_283|))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1516) (* (- 1) v_main_~y~0_1556) 1000000 v_main_~y~0_1555) (- 4294967296)) (+ (div (+ v_main_~x~0_1516 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1555 v_main_~y~0_1556) (= (+ v_main_~x~0_1515 v_main_~y~0_1555) (+ v_main_~x~0_1516 v_main_~y~0_1556)) .cse5) (and .cse0 (or (not .cse5) (not .cse4)) .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1556, main_#t~post5=|v_main_#t~post5_284|, main_~x~0=v_main_~x~0_1516, main_#t~post6=|v_main_#t~post6_570|} OutVars{main_#t~post5=|v_main_#t~post5_283|, main_~y~0=v_main_~y~0_1555, main_~x~0=v_main_~x~0_1515, main_#t~post6=|v_main_#t~post6_568|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:05,774 INFO L290 TraceCheckUtils]: 7: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [210] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27250#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:05,775 INFO L290 TraceCheckUtils]: 8: Hoare triple {27250#(and (= main_~x~0 0) (= main_~y~0 0))} [211] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_289| |v_main_#t~post4_288|)) (.cse2 (= |v_main_#t~post6_573| |v_main_#t~post6_569|)) (.cse3 (= v_main_~x~0_1518 v_main_~x~0_1517)) (.cse4 (= v_main_~y~0_1558 v_main_~y~0_1557)) (.cse1 (mod v_main_~x~0_1518 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~x~0_1517) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1518 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1518 v_main_~y~0_1557) (+ v_main_~x~0_1517 v_main_~y~0_1558)) (< v_main_~x~0_1518 v_main_~x~0_1517)))) InVars {main_#t~post4=|v_main_#t~post4_289|, main_~y~0=v_main_~y~0_1558, main_~x~0=v_main_~x~0_1518, main_#t~post6=|v_main_#t~post6_573|} OutVars{main_#t~post4=|v_main_#t~post4_288|, main_~y~0=v_main_~y~0_1557, main_~x~0=v_main_~x~0_1517, main_#t~post6=|v_main_#t~post6_569|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {27280#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:35:05,776 INFO L290 TraceCheckUtils]: 9: Hoare triple {27280#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [208] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {27246#false} is VALID [2022-04-28 03:35:05,776 INFO L272 TraceCheckUtils]: 10: Hoare triple {27246#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {27246#false} is VALID [2022-04-28 03:35:05,776 INFO L290 TraceCheckUtils]: 11: Hoare triple {27246#false} ~cond := #in~cond; {27246#false} is VALID [2022-04-28 03:35:05,776 INFO L290 TraceCheckUtils]: 12: Hoare triple {27246#false} assume 0 == ~cond; {27246#false} is VALID [2022-04-28 03:35:05,776 INFO L290 TraceCheckUtils]: 13: Hoare triple {27246#false} assume !false; {27246#false} is VALID [2022-04-28 03:35:05,776 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:05,776 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:35:06,712 INFO L290 TraceCheckUtils]: 13: Hoare triple {27246#false} assume !false; {27246#false} is VALID [2022-04-28 03:35:06,713 INFO L290 TraceCheckUtils]: 12: Hoare triple {27299#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {27246#false} is VALID [2022-04-28 03:35:06,713 INFO L290 TraceCheckUtils]: 11: Hoare triple {27303#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {27299#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:35:06,714 INFO L272 TraceCheckUtils]: 10: Hoare triple {27307#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {27303#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:35:06,714 INFO L290 TraceCheckUtils]: 9: Hoare triple {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [208] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {27307#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:35:06,716 INFO L290 TraceCheckUtils]: 8: Hoare triple {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [211] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_289| |v_main_#t~post4_288|)) (.cse2 (= |v_main_#t~post6_573| |v_main_#t~post6_569|)) (.cse3 (= v_main_~x~0_1518 v_main_~x~0_1517)) (.cse4 (= v_main_~y~0_1558 v_main_~y~0_1557)) (.cse1 (mod v_main_~x~0_1518 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 .cse4) (and .cse0 .cse2 .cse3 .cse4) (and (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~x~0_1517) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1518 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1518 v_main_~y~0_1557) (+ v_main_~x~0_1517 v_main_~y~0_1558)) (< v_main_~x~0_1518 v_main_~x~0_1517)))) InVars {main_#t~post4=|v_main_#t~post4_289|, main_~y~0=v_main_~y~0_1558, main_~x~0=v_main_~x~0_1518, main_#t~post6=|v_main_#t~post6_573|} OutVars{main_#t~post4=|v_main_#t~post4_288|, main_~y~0=v_main_~y~0_1557, main_~x~0=v_main_~x~0_1517, main_#t~post6=|v_main_#t~post6_569|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:06,716 INFO L290 TraceCheckUtils]: 7: Hoare triple {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [210] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:06,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {27321#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1568_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1568_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1568_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [209] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1516 4294967296))) (let ((.cse0 (= |v_main_#t~post6_570| |v_main_#t~post6_568|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse1 (= v_main_~x~0_1516 v_main_~x~0_1515)) (.cse2 (= v_main_~y~0_1556 v_main_~y~0_1555)) (.cse3 (= |v_main_#t~post5_284| |v_main_#t~post5_283|))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1516) (* (- 1) v_main_~y~0_1556) 1000000 v_main_~y~0_1555) (- 4294967296)) (+ (div (+ v_main_~x~0_1516 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1555 v_main_~y~0_1556) (= (+ v_main_~x~0_1515 v_main_~y~0_1555) (+ v_main_~x~0_1516 v_main_~y~0_1556)) .cse5) (and .cse0 (or (not .cse5) (not .cse4)) .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1556, main_#t~post5=|v_main_#t~post5_284|, main_~x~0=v_main_~x~0_1516, main_#t~post6=|v_main_#t~post6_570|} OutVars{main_#t~post5=|v_main_#t~post5_283|, main_~y~0=v_main_~y~0_1555, main_~x~0=v_main_~x~0_1515, main_#t~post6=|v_main_#t~post6_568|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {27311#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:06,755 INFO L290 TraceCheckUtils]: 5: Hoare triple {27245#true} ~x~0 := 0;~y~0 := 0; {27321#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1568_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1568_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1568_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:35:06,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {27245#true} call #t~ret7 := main(); {27245#true} is VALID [2022-04-28 03:35:06,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27245#true} {27245#true} #41#return; {27245#true} is VALID [2022-04-28 03:35:06,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {27245#true} assume true; {27245#true} is VALID [2022-04-28 03:35:06,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {27245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {27245#true} is VALID [2022-04-28 03:35:06,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {27245#true} call ULTIMATE.init(); {27245#true} is VALID [2022-04-28 03:35:06,756 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:06,756 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1495474757] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:35:06,756 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:35:06,756 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-28 03:35:11,221 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:35:11,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [921236349] [2022-04-28 03:35:11,221 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [921236349] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:35:11,221 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:35:11,222 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [86] imperfect sequences [] total 86 [2022-04-28 03:35:11,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [886424487] [2022-04-28 03:35:11,222 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:35:11,222 INFO L78 Accepts]: Start accepts. Automaton has has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 137 [2022-04-28 03:35:11,223 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:35:11,223 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:11,283 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 137 edges. 137 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:11,283 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 86 states [2022-04-28 03:35:11,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:11,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2022-04-28 03:35:11,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=7995, Unknown=0, NotChecked=0, Total=8556 [2022-04-28 03:35:11,284 INFO L87 Difference]: Start difference. First operand 139 states and 141 transitions. Second operand has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:25,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:25,657 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2022-04-28 03:35:25,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2022-04-28 03:35:25,658 INFO L78 Accepts]: Start accepts. Automaton has has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 137 [2022-04-28 03:35:25,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:25,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:25,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 150 transitions. [2022-04-28 03:35:25,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:25,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 150 transitions. [2022-04-28 03:35:25,660 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 86 states and 150 transitions. [2022-04-28 03:35:25,741 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:25,742 INFO L225 Difference]: With dead ends: 150 [2022-04-28 03:35:25,742 INFO L226 Difference]: Without dead ends: 142 [2022-04-28 03:35:25,744 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 248 GetRequests, 30 SyntacticMatches, 44 SemanticMatches, 174 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6621 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=1266, Invalid=29534, Unknown=0, NotChecked=0, Total=30800 [2022-04-28 03:35:25,744 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 51 mSDsluCounter, 417 mSDsCounter, 0 mSdLazyCounter, 10957 mSolverCounterSat, 85 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 429 SdHoareTripleChecker+Invalid, 11042 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 85 IncrementalHoareTripleChecker+Valid, 10957 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.9s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:25,744 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [51 Valid, 429 Invalid, 11042 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [85 Valid, 10957 Invalid, 0 Unknown, 0 Unchecked, 6.9s Time] [2022-04-28 03:35:25,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2022-04-28 03:35:25,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2022-04-28 03:35:25,870 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:25,870 INFO L82 GeneralOperation]: Start isEquivalent. First operand 142 states. Second operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:25,870 INFO L74 IsIncluded]: Start isIncluded. First operand 142 states. Second operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:25,870 INFO L87 Difference]: Start difference. First operand 142 states. Second operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:25,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:25,871 INFO L93 Difference]: Finished difference Result 142 states and 144 transitions. [2022-04-28 03:35:25,871 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2022-04-28 03:35:25,872 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:25,872 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:25,872 INFO L74 IsIncluded]: Start isIncluded. First operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 142 states. [2022-04-28 03:35:25,872 INFO L87 Difference]: Start difference. First operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 142 states. [2022-04-28 03:35:25,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:25,873 INFO L93 Difference]: Finished difference Result 142 states and 144 transitions. [2022-04-28 03:35:25,873 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2022-04-28 03:35:25,873 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:25,873 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:25,873 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:25,873 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:25,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 142 states, 137 states have (on average 1.0218978102189782) internal successors, (140), 137 states have internal predecessors, (140), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:25,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 144 transitions. [2022-04-28 03:35:25,875 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 144 transitions. Word has length 137 [2022-04-28 03:35:25,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:25,875 INFO L495 AbstractCegarLoop]: Abstraction has 142 states and 144 transitions. [2022-04-28 03:35:25,875 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 86 states, 86 states have (on average 1.5465116279069768) internal successors, (133), 85 states have internal predecessors, (133), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:25,875 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 142 states and 144 transitions. [2022-04-28 03:35:26,037 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 144 edges. 144 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:26,037 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 144 transitions. [2022-04-28 03:35:26,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2022-04-28 03:35:26,037 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:26,038 INFO L195 NwaCegarLoop]: trace histogram [43, 43, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:26,054 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Forceful destruction successful, exit code 0 [2022-04-28 03:35:26,254 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43,42 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:26,254 INFO L420 AbstractCegarLoop]: === Iteration 45 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:26,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:26,255 INFO L85 PathProgramCache]: Analyzing trace with hash -678087411, now seen corresponding path program 42 times [2022-04-28 03:35:26,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:26,255 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1090702627] [2022-04-28 03:35:27,078 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:35:29,456 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:35:29,458 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:35:29,460 INFO L85 PathProgramCache]: Analyzing trace with hash -1264855889, now seen corresponding path program 1 times [2022-04-28 03:35:29,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:29,460 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272509014] [2022-04-28 03:35:29,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:29,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:29,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:29,521 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:29,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:29,524 INFO L290 TraceCheckUtils]: 0: Hoare triple {28465#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {28458#true} is VALID [2022-04-28 03:35:29,524 INFO L290 TraceCheckUtils]: 1: Hoare triple {28458#true} assume true; {28458#true} is VALID [2022-04-28 03:35:29,524 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28458#true} {28458#true} #41#return; {28458#true} is VALID [2022-04-28 03:35:29,524 INFO L272 TraceCheckUtils]: 0: Hoare triple {28458#true} call ULTIMATE.init(); {28465#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:29,525 INFO L290 TraceCheckUtils]: 1: Hoare triple {28465#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {28458#true} is VALID [2022-04-28 03:35:29,525 INFO L290 TraceCheckUtils]: 2: Hoare triple {28458#true} assume true; {28458#true} is VALID [2022-04-28 03:35:29,525 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28458#true} {28458#true} #41#return; {28458#true} is VALID [2022-04-28 03:35:29,525 INFO L272 TraceCheckUtils]: 4: Hoare triple {28458#true} call #t~ret7 := main(); {28458#true} is VALID [2022-04-28 03:35:29,525 INFO L290 TraceCheckUtils]: 5: Hoare triple {28458#true} ~x~0 := 0;~y~0 := 0; {28463#(= main_~x~0 0)} is VALID [2022-04-28 03:35:29,526 INFO L290 TraceCheckUtils]: 6: Hoare triple {28463#(= main_~x~0 0)} [213] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1574 4294967296))) (let ((.cse0 (= |v_main_#t~post6_584| |v_main_#t~post6_582|)) (.cse1 (= v_main_~y~0_1615 v_main_~y~0_1614)) (.cse2 (= v_main_~x~0_1574 v_main_~x~0_1573)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post5_291| |v_main_#t~post5_290|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1573) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1574 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1574 v_main_~x~0_1573) .cse3 (= (+ v_main_~x~0_1574 v_main_~y~0_1615) (+ v_main_~x~0_1573 v_main_~y~0_1614)) .cse4) (and (= |v_main_#t~post5_290| |v_main_#t~post5_291|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_1615, main_#t~post5=|v_main_#t~post5_291|, main_~x~0=v_main_~x~0_1574, main_#t~post6=|v_main_#t~post6_584|} OutVars{main_#t~post5=|v_main_#t~post5_290|, main_~y~0=v_main_~y~0_1614, main_~x~0=v_main_~x~0_1573, main_#t~post6=|v_main_#t~post6_582|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {28463#(= main_~x~0 0)} is VALID [2022-04-28 03:35:29,526 INFO L290 TraceCheckUtils]: 7: Hoare triple {28463#(= main_~x~0 0)} [214] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28463#(= main_~x~0 0)} is VALID [2022-04-28 03:35:29,527 INFO L290 TraceCheckUtils]: 8: Hoare triple {28463#(= main_~x~0 0)} [215] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1617 v_main_~y~0_1616)) (.cse1 (= |v_main_#t~post6_587| |v_main_#t~post6_583|)) (.cse2 (= v_main_~x~0_1576 v_main_~x~0_1575)) (.cse3 (= |v_main_#t~post4_296| |v_main_#t~post4_295|)) (.cse4 (mod v_main_~x~0_1576 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_1576 v_main_~y~0_1616) (+ v_main_~x~0_1575 v_main_~y~0_1617)) (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1616) v_main_~y~0_1617 500000 (* (- 1) v_main_~x~0_1576)) (- 4294967296)) (+ (div (+ v_main_~x~0_1576 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1617 v_main_~y~0_1616)))) InVars {main_#t~post4=|v_main_#t~post4_296|, main_~y~0=v_main_~y~0_1617, main_~x~0=v_main_~x~0_1576, main_#t~post6=|v_main_#t~post6_587|} OutVars{main_#t~post4=|v_main_#t~post4_295|, main_~y~0=v_main_~y~0_1616, main_~x~0=v_main_~x~0_1575, main_#t~post6=|v_main_#t~post6_583|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {28464#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:35:29,527 INFO L290 TraceCheckUtils]: 9: Hoare triple {28464#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [212] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {28459#false} is VALID [2022-04-28 03:35:29,528 INFO L272 TraceCheckUtils]: 10: Hoare triple {28459#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {28459#false} is VALID [2022-04-28 03:35:29,528 INFO L290 TraceCheckUtils]: 11: Hoare triple {28459#false} ~cond := #in~cond; {28459#false} is VALID [2022-04-28 03:35:29,528 INFO L290 TraceCheckUtils]: 12: Hoare triple {28459#false} assume 0 == ~cond; {28459#false} is VALID [2022-04-28 03:35:29,528 INFO L290 TraceCheckUtils]: 13: Hoare triple {28459#false} assume !false; {28459#false} is VALID [2022-04-28 03:35:29,528 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:29,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:29,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272509014] [2022-04-28 03:35:29,528 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1272509014] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:29,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1401436566] [2022-04-28 03:35:29,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:29,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:29,528 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:29,544 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:29,576 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2022-04-28 03:35:29,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:29,601 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:35:29,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:29,609 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:29,786 INFO L272 TraceCheckUtils]: 0: Hoare triple {28458#true} call ULTIMATE.init(); {28458#true} is VALID [2022-04-28 03:35:29,786 INFO L290 TraceCheckUtils]: 1: Hoare triple {28458#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {28458#true} is VALID [2022-04-28 03:35:29,786 INFO L290 TraceCheckUtils]: 2: Hoare triple {28458#true} assume true; {28458#true} is VALID [2022-04-28 03:35:29,786 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28458#true} {28458#true} #41#return; {28458#true} is VALID [2022-04-28 03:35:29,786 INFO L272 TraceCheckUtils]: 4: Hoare triple {28458#true} call #t~ret7 := main(); {28458#true} is VALID [2022-04-28 03:35:29,786 INFO L290 TraceCheckUtils]: 5: Hoare triple {28458#true} ~x~0 := 0;~y~0 := 0; {28484#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:29,787 INFO L290 TraceCheckUtils]: 6: Hoare triple {28484#(and (= main_~x~0 0) (= main_~y~0 0))} [213] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1574 4294967296))) (let ((.cse0 (= |v_main_#t~post6_584| |v_main_#t~post6_582|)) (.cse1 (= v_main_~y~0_1615 v_main_~y~0_1614)) (.cse2 (= v_main_~x~0_1574 v_main_~x~0_1573)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post5_291| |v_main_#t~post5_290|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1573) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1574 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1574 v_main_~x~0_1573) .cse3 (= (+ v_main_~x~0_1574 v_main_~y~0_1615) (+ v_main_~x~0_1573 v_main_~y~0_1614)) .cse4) (and (= |v_main_#t~post5_290| |v_main_#t~post5_291|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_1615, main_#t~post5=|v_main_#t~post5_291|, main_~x~0=v_main_~x~0_1574, main_#t~post6=|v_main_#t~post6_584|} OutVars{main_#t~post5=|v_main_#t~post5_290|, main_~y~0=v_main_~y~0_1614, main_~x~0=v_main_~x~0_1573, main_#t~post6=|v_main_#t~post6_582|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {28484#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:29,787 INFO L290 TraceCheckUtils]: 7: Hoare triple {28484#(and (= main_~x~0 0) (= main_~y~0 0))} [214] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28484#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:29,788 INFO L290 TraceCheckUtils]: 8: Hoare triple {28484#(and (= main_~x~0 0) (= main_~y~0 0))} [215] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1617 v_main_~y~0_1616)) (.cse1 (= |v_main_#t~post6_587| |v_main_#t~post6_583|)) (.cse2 (= v_main_~x~0_1576 v_main_~x~0_1575)) (.cse3 (= |v_main_#t~post4_296| |v_main_#t~post4_295|)) (.cse4 (mod v_main_~x~0_1576 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_1576 v_main_~y~0_1616) (+ v_main_~x~0_1575 v_main_~y~0_1617)) (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1616) v_main_~y~0_1617 500000 (* (- 1) v_main_~x~0_1576)) (- 4294967296)) (+ (div (+ v_main_~x~0_1576 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1617 v_main_~y~0_1616)))) InVars {main_#t~post4=|v_main_#t~post4_296|, main_~y~0=v_main_~y~0_1617, main_~x~0=v_main_~x~0_1576, main_#t~post6=|v_main_#t~post6_587|} OutVars{main_#t~post4=|v_main_#t~post4_295|, main_~y~0=v_main_~y~0_1616, main_~x~0=v_main_~x~0_1575, main_#t~post6=|v_main_#t~post6_583|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {28494#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:35:29,789 INFO L290 TraceCheckUtils]: 9: Hoare triple {28494#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [212] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {28459#false} is VALID [2022-04-28 03:35:29,789 INFO L272 TraceCheckUtils]: 10: Hoare triple {28459#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {28459#false} is VALID [2022-04-28 03:35:29,789 INFO L290 TraceCheckUtils]: 11: Hoare triple {28459#false} ~cond := #in~cond; {28459#false} is VALID [2022-04-28 03:35:29,789 INFO L290 TraceCheckUtils]: 12: Hoare triple {28459#false} assume 0 == ~cond; {28459#false} is VALID [2022-04-28 03:35:29,789 INFO L290 TraceCheckUtils]: 13: Hoare triple {28459#false} assume !false; {28459#false} is VALID [2022-04-28 03:35:29,790 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:29,790 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:35:30,745 INFO L290 TraceCheckUtils]: 13: Hoare triple {28459#false} assume !false; {28459#false} is VALID [2022-04-28 03:35:30,746 INFO L290 TraceCheckUtils]: 12: Hoare triple {28513#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {28459#false} is VALID [2022-04-28 03:35:30,746 INFO L290 TraceCheckUtils]: 11: Hoare triple {28517#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {28513#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:35:30,746 INFO L272 TraceCheckUtils]: 10: Hoare triple {28521#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {28517#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:35:30,747 INFO L290 TraceCheckUtils]: 9: Hoare triple {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [212] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {28521#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:35:30,750 INFO L290 TraceCheckUtils]: 8: Hoare triple {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [215] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1617 v_main_~y~0_1616)) (.cse1 (= |v_main_#t~post6_587| |v_main_#t~post6_583|)) (.cse2 (= v_main_~x~0_1576 v_main_~x~0_1575)) (.cse3 (= |v_main_#t~post4_296| |v_main_#t~post4_295|)) (.cse4 (mod v_main_~x~0_1576 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3) (and (= (+ v_main_~x~0_1576 v_main_~y~0_1616) (+ v_main_~x~0_1575 v_main_~y~0_1617)) (< .cse4 500000) (<= (div (+ (* (- 1) v_main_~y~0_1616) v_main_~y~0_1617 500000 (* (- 1) v_main_~x~0_1576)) (- 4294967296)) (+ (div (+ v_main_~x~0_1576 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1617 v_main_~y~0_1616)))) InVars {main_#t~post4=|v_main_#t~post4_296|, main_~y~0=v_main_~y~0_1617, main_~x~0=v_main_~x~0_1576, main_#t~post6=|v_main_#t~post6_587|} OutVars{main_#t~post4=|v_main_#t~post4_295|, main_~y~0=v_main_~y~0_1616, main_~x~0=v_main_~x~0_1575, main_#t~post6=|v_main_#t~post6_583|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:30,751 INFO L290 TraceCheckUtils]: 7: Hoare triple {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [214] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:30,797 INFO L290 TraceCheckUtils]: 6: Hoare triple {28535#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_1627_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1627_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* aux_div_v_main_~y~0_1627_33 4294967296)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))))} [213] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1574 4294967296))) (let ((.cse0 (= |v_main_#t~post6_584| |v_main_#t~post6_582|)) (.cse1 (= v_main_~y~0_1615 v_main_~y~0_1614)) (.cse2 (= v_main_~x~0_1574 v_main_~x~0_1573)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and (= |v_main_#t~post5_291| |v_main_#t~post5_290|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1573) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1574 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1574 v_main_~x~0_1573) .cse3 (= (+ v_main_~x~0_1574 v_main_~y~0_1615) (+ v_main_~x~0_1573 v_main_~y~0_1614)) .cse4) (and (= |v_main_#t~post5_290| |v_main_#t~post5_291|) .cse0 .cse1 .cse2 (or (not .cse4) (not .cse3)))))) InVars {main_~y~0=v_main_~y~0_1615, main_#t~post5=|v_main_#t~post5_291|, main_~x~0=v_main_~x~0_1574, main_#t~post6=|v_main_#t~post6_584|} OutVars{main_#t~post5=|v_main_#t~post5_290|, main_~y~0=v_main_~y~0_1614, main_~x~0=v_main_~x~0_1573, main_#t~post6=|v_main_#t~post6_582|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {28525#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:30,798 INFO L290 TraceCheckUtils]: 5: Hoare triple {28458#true} ~x~0 := 0;~y~0 := 0; {28535#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_1627_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1627_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* aux_div_v_main_~y~0_1627_33 4294967296)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1)))))))} is VALID [2022-04-28 03:35:30,798 INFO L272 TraceCheckUtils]: 4: Hoare triple {28458#true} call #t~ret7 := main(); {28458#true} is VALID [2022-04-28 03:35:30,798 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28458#true} {28458#true} #41#return; {28458#true} is VALID [2022-04-28 03:35:30,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {28458#true} assume true; {28458#true} is VALID [2022-04-28 03:35:30,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {28458#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {28458#true} is VALID [2022-04-28 03:35:30,798 INFO L272 TraceCheckUtils]: 0: Hoare triple {28458#true} call ULTIMATE.init(); {28458#true} is VALID [2022-04-28 03:35:30,799 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:30,799 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1401436566] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:35:30,799 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:35:30,799 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:35:33,056 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:35:33,057 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1090702627] [2022-04-28 03:35:33,057 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1090702627] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:35:33,057 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:35:33,057 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [46] imperfect sequences [] total 46 [2022-04-28 03:35:33,057 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [887166650] [2022-04-28 03:35:33,057 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:35:33,074 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 140 [2022-04-28 03:35:33,074 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:35:33,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:33,155 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 140 edges. 140 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:33,155 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2022-04-28 03:35:33,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:33,155 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2022-04-28 03:35:33,156 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=244, Invalid=2618, Unknown=0, NotChecked=0, Total=2862 [2022-04-28 03:35:33,156 INFO L87 Difference]: Start difference. First operand 142 states and 144 transitions. Second operand has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:38,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:38,980 INFO L93 Difference]: Finished difference Result 154 states and 158 transitions. [2022-04-28 03:35:38,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-04-28 03:35:38,980 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 140 [2022-04-28 03:35:38,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:38,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:38,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 154 transitions. [2022-04-28 03:35:38,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:38,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 154 transitions. [2022-04-28 03:35:38,997 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 154 transitions. [2022-04-28 03:35:39,079 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:39,081 INFO L225 Difference]: With dead ends: 154 [2022-04-28 03:35:39,081 INFO L226 Difference]: Without dead ends: 146 [2022-04-28 03:35:39,081 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 29 SyntacticMatches, 87 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1732 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=545, Invalid=8767, Unknown=0, NotChecked=0, Total=9312 [2022-04-28 03:35:39,082 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 96 mSDsluCounter, 217 mSDsCounter, 0 mSdLazyCounter, 5849 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 96 SdHoareTripleChecker+Valid, 229 SdHoareTripleChecker+Invalid, 5894 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 5849 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:39,082 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [96 Valid, 229 Invalid, 5894 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 5849 Invalid, 0 Unknown, 0 Unchecked, 2.9s Time] [2022-04-28 03:35:39,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2022-04-28 03:35:39,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 145. [2022-04-28 03:35:39,210 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:39,211 INFO L82 GeneralOperation]: Start isEquivalent. First operand 146 states. Second operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:39,211 INFO L74 IsIncluded]: Start isIncluded. First operand 146 states. Second operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:39,211 INFO L87 Difference]: Start difference. First operand 146 states. Second operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:39,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:39,212 INFO L93 Difference]: Finished difference Result 146 states and 148 transitions. [2022-04-28 03:35:39,212 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 148 transitions. [2022-04-28 03:35:39,212 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:39,212 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:39,212 INFO L74 IsIncluded]: Start isIncluded. First operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 146 states. [2022-04-28 03:35:39,212 INFO L87 Difference]: Start difference. First operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 146 states. [2022-04-28 03:35:39,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:39,214 INFO L93 Difference]: Finished difference Result 146 states and 148 transitions. [2022-04-28 03:35:39,214 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 148 transitions. [2022-04-28 03:35:39,214 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:39,214 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:39,214 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:39,214 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:39,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 145 states, 140 states have (on average 1.0214285714285714) internal successors, (143), 140 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:39,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 147 transitions. [2022-04-28 03:35:39,215 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 147 transitions. Word has length 140 [2022-04-28 03:35:39,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:39,216 INFO L495 AbstractCegarLoop]: Abstraction has 145 states and 147 transitions. [2022-04-28 03:35:39,216 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 46 states have (on average 2.9565217391304346) internal successors, (136), 45 states have internal predecessors, (136), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:39,216 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 145 states and 147 transitions. [2022-04-28 03:35:39,446 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 147 edges. 147 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:39,446 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 147 transitions. [2022-04-28 03:35:39,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-04-28 03:35:39,446 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:39,446 INFO L195 NwaCegarLoop]: trace histogram [44, 44, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:39,463 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Forceful destruction successful, exit code 0 [2022-04-28 03:35:39,647 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44,43 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:39,647 INFO L420 AbstractCegarLoop]: === Iteration 46 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:39,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:39,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1213007291, now seen corresponding path program 43 times [2022-04-28 03:35:39,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:39,647 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1903987894] [2022-04-28 03:35:40,254 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:35:40,861 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:35:40,862 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:35:40,864 INFO L85 PathProgramCache]: Analyzing trace with hash 784676271, now seen corresponding path program 1 times [2022-04-28 03:35:40,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:40,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986819518] [2022-04-28 03:35:40,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:40,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:40,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:40,922 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:40,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:40,925 INFO L290 TraceCheckUtils]: 0: Hoare triple {29581#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {29574#true} is VALID [2022-04-28 03:35:40,925 INFO L290 TraceCheckUtils]: 1: Hoare triple {29574#true} assume true; {29574#true} is VALID [2022-04-28 03:35:40,925 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {29574#true} {29574#true} #41#return; {29574#true} is VALID [2022-04-28 03:35:40,926 INFO L272 TraceCheckUtils]: 0: Hoare triple {29574#true} call ULTIMATE.init(); {29581#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:40,926 INFO L290 TraceCheckUtils]: 1: Hoare triple {29581#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {29574#true} is VALID [2022-04-28 03:35:40,926 INFO L290 TraceCheckUtils]: 2: Hoare triple {29574#true} assume true; {29574#true} is VALID [2022-04-28 03:35:40,926 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29574#true} {29574#true} #41#return; {29574#true} is VALID [2022-04-28 03:35:40,926 INFO L272 TraceCheckUtils]: 4: Hoare triple {29574#true} call #t~ret7 := main(); {29574#true} is VALID [2022-04-28 03:35:40,926 INFO L290 TraceCheckUtils]: 5: Hoare triple {29574#true} ~x~0 := 0;~y~0 := 0; {29579#(= main_~x~0 0)} is VALID [2022-04-28 03:35:40,927 INFO L290 TraceCheckUtils]: 6: Hoare triple {29579#(= main_~x~0 0)} [217] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1633 4294967296))) (let ((.cse0 (= |v_main_#t~post5_298| |v_main_#t~post5_297|)) (.cse1 (= v_main_~x~0_1633 v_main_~x~0_1632)) (.cse2 (= |v_main_#t~post6_598| |v_main_#t~post6_596|)) (.cse5 (= v_main_~y~0_1675 v_main_~y~0_1674)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1632) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1633 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_1632 v_main_~y~0_1674) (+ v_main_~x~0_1633 v_main_~y~0_1675)) (< v_main_~x~0_1633 v_main_~x~0_1632))))) InVars {main_~y~0=v_main_~y~0_1675, main_#t~post5=|v_main_#t~post5_298|, main_~x~0=v_main_~x~0_1633, main_#t~post6=|v_main_#t~post6_598|} OutVars{main_#t~post5=|v_main_#t~post5_297|, main_~y~0=v_main_~y~0_1674, main_~x~0=v_main_~x~0_1632, main_#t~post6=|v_main_#t~post6_596|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {29579#(= main_~x~0 0)} is VALID [2022-04-28 03:35:40,927 INFO L290 TraceCheckUtils]: 7: Hoare triple {29579#(= main_~x~0 0)} [218] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29579#(= main_~x~0 0)} is VALID [2022-04-28 03:35:40,928 INFO L290 TraceCheckUtils]: 8: Hoare triple {29579#(= main_~x~0 0)} [219] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1635 4294967296)) (.cse1 (= |v_main_#t~post4_303| |v_main_#t~post4_302|)) (.cse2 (= v_main_~x~0_1635 v_main_~x~0_1634)) (.cse3 (= |v_main_#t~post6_601| |v_main_#t~post6_597|)) (.cse4 (= v_main_~y~0_1677 v_main_~y~0_1676))) (or (and (= (+ v_main_~x~0_1635 v_main_~y~0_1676) (+ v_main_~x~0_1634 v_main_~y~0_1677)) (<= (div (+ (* (- 1) v_main_~y~0_1676) (* (- 1) v_main_~x~0_1635) v_main_~y~0_1677 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1635 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1677 v_main_~y~0_1676) (< .cse0 500000)) (and .cse1 .cse2 .cse3 (<= 500000 .cse0) .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_303|, main_~y~0=v_main_~y~0_1677, main_~x~0=v_main_~x~0_1635, main_#t~post6=|v_main_#t~post6_601|} OutVars{main_#t~post4=|v_main_#t~post4_302|, main_~y~0=v_main_~y~0_1676, main_~x~0=v_main_~x~0_1634, main_#t~post6=|v_main_#t~post6_597|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {29580#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:35:40,928 INFO L290 TraceCheckUtils]: 9: Hoare triple {29580#(and (< 0 (+ (div main_~x~0 4294967296) 1)) (<= main_~x~0 500001))} [216] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {29575#false} is VALID [2022-04-28 03:35:40,928 INFO L272 TraceCheckUtils]: 10: Hoare triple {29575#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {29575#false} is VALID [2022-04-28 03:35:40,929 INFO L290 TraceCheckUtils]: 11: Hoare triple {29575#false} ~cond := #in~cond; {29575#false} is VALID [2022-04-28 03:35:40,929 INFO L290 TraceCheckUtils]: 12: Hoare triple {29575#false} assume 0 == ~cond; {29575#false} is VALID [2022-04-28 03:35:40,929 INFO L290 TraceCheckUtils]: 13: Hoare triple {29575#false} assume !false; {29575#false} is VALID [2022-04-28 03:35:40,929 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:40,929 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:40,929 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986819518] [2022-04-28 03:35:40,929 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1986819518] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:40,929 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1830771033] [2022-04-28 03:35:40,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:40,929 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:40,929 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:40,930 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:40,932 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2022-04-28 03:35:40,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:40,963 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:35:40,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:40,971 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:41,136 INFO L272 TraceCheckUtils]: 0: Hoare triple {29574#true} call ULTIMATE.init(); {29574#true} is VALID [2022-04-28 03:35:41,136 INFO L290 TraceCheckUtils]: 1: Hoare triple {29574#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {29574#true} is VALID [2022-04-28 03:35:41,136 INFO L290 TraceCheckUtils]: 2: Hoare triple {29574#true} assume true; {29574#true} is VALID [2022-04-28 03:35:41,136 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29574#true} {29574#true} #41#return; {29574#true} is VALID [2022-04-28 03:35:41,136 INFO L272 TraceCheckUtils]: 4: Hoare triple {29574#true} call #t~ret7 := main(); {29574#true} is VALID [2022-04-28 03:35:41,137 INFO L290 TraceCheckUtils]: 5: Hoare triple {29574#true} ~x~0 := 0;~y~0 := 0; {29600#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:41,137 INFO L290 TraceCheckUtils]: 6: Hoare triple {29600#(and (= main_~x~0 0) (= main_~y~0 0))} [217] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1633 4294967296))) (let ((.cse0 (= |v_main_#t~post5_298| |v_main_#t~post5_297|)) (.cse1 (= v_main_~x~0_1633 v_main_~x~0_1632)) (.cse2 (= |v_main_#t~post6_598| |v_main_#t~post6_596|)) (.cse5 (= v_main_~y~0_1675 v_main_~y~0_1674)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1632) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1633 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_1632 v_main_~y~0_1674) (+ v_main_~x~0_1633 v_main_~y~0_1675)) (< v_main_~x~0_1633 v_main_~x~0_1632))))) InVars {main_~y~0=v_main_~y~0_1675, main_#t~post5=|v_main_#t~post5_298|, main_~x~0=v_main_~x~0_1633, main_#t~post6=|v_main_#t~post6_598|} OutVars{main_#t~post5=|v_main_#t~post5_297|, main_~y~0=v_main_~y~0_1674, main_~x~0=v_main_~x~0_1632, main_#t~post6=|v_main_#t~post6_596|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {29600#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:41,138 INFO L290 TraceCheckUtils]: 7: Hoare triple {29600#(and (= main_~x~0 0) (= main_~y~0 0))} [218] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29600#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:41,138 INFO L290 TraceCheckUtils]: 8: Hoare triple {29600#(and (= main_~x~0 0) (= main_~y~0 0))} [219] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1635 4294967296)) (.cse1 (= |v_main_#t~post4_303| |v_main_#t~post4_302|)) (.cse2 (= v_main_~x~0_1635 v_main_~x~0_1634)) (.cse3 (= |v_main_#t~post6_601| |v_main_#t~post6_597|)) (.cse4 (= v_main_~y~0_1677 v_main_~y~0_1676))) (or (and (= (+ v_main_~x~0_1635 v_main_~y~0_1676) (+ v_main_~x~0_1634 v_main_~y~0_1677)) (<= (div (+ (* (- 1) v_main_~y~0_1676) (* (- 1) v_main_~x~0_1635) v_main_~y~0_1677 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1635 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1677 v_main_~y~0_1676) (< .cse0 500000)) (and .cse1 .cse2 .cse3 (<= 500000 .cse0) .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_303|, main_~y~0=v_main_~y~0_1677, main_~x~0=v_main_~x~0_1635, main_#t~post6=|v_main_#t~post6_601|} OutVars{main_#t~post4=|v_main_#t~post4_302|, main_~y~0=v_main_~y~0_1676, main_~x~0=v_main_~x~0_1634, main_#t~post6=|v_main_#t~post6_597|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {29610#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:35:41,139 INFO L290 TraceCheckUtils]: 9: Hoare triple {29610#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [216] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {29575#false} is VALID [2022-04-28 03:35:41,139 INFO L272 TraceCheckUtils]: 10: Hoare triple {29575#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {29575#false} is VALID [2022-04-28 03:35:41,140 INFO L290 TraceCheckUtils]: 11: Hoare triple {29575#false} ~cond := #in~cond; {29575#false} is VALID [2022-04-28 03:35:41,140 INFO L290 TraceCheckUtils]: 12: Hoare triple {29575#false} assume 0 == ~cond; {29575#false} is VALID [2022-04-28 03:35:41,140 INFO L290 TraceCheckUtils]: 13: Hoare triple {29575#false} assume !false; {29575#false} is VALID [2022-04-28 03:35:41,140 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:41,140 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:35:42,811 INFO L290 TraceCheckUtils]: 13: Hoare triple {29575#false} assume !false; {29575#false} is VALID [2022-04-28 03:35:42,811 INFO L290 TraceCheckUtils]: 12: Hoare triple {29629#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {29575#false} is VALID [2022-04-28 03:35:42,811 INFO L290 TraceCheckUtils]: 11: Hoare triple {29633#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {29629#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:35:42,812 INFO L272 TraceCheckUtils]: 10: Hoare triple {29637#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {29633#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:35:42,812 INFO L290 TraceCheckUtils]: 9: Hoare triple {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [216] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {29637#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:35:42,814 INFO L290 TraceCheckUtils]: 8: Hoare triple {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [219] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1635 4294967296)) (.cse1 (= |v_main_#t~post4_303| |v_main_#t~post4_302|)) (.cse2 (= v_main_~x~0_1635 v_main_~x~0_1634)) (.cse3 (= |v_main_#t~post6_601| |v_main_#t~post6_597|)) (.cse4 (= v_main_~y~0_1677 v_main_~y~0_1676))) (or (and (= (+ v_main_~x~0_1635 v_main_~y~0_1676) (+ v_main_~x~0_1634 v_main_~y~0_1677)) (<= (div (+ (* (- 1) v_main_~y~0_1676) (* (- 1) v_main_~x~0_1635) v_main_~y~0_1677 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1635 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_1677 v_main_~y~0_1676) (< .cse0 500000)) (and .cse1 .cse2 .cse3 (<= 500000 .cse0) .cse4) (and .cse1 .cse2 .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_303|, main_~y~0=v_main_~y~0_1677, main_~x~0=v_main_~x~0_1635, main_#t~post6=|v_main_#t~post6_601|} OutVars{main_#t~post4=|v_main_#t~post4_302|, main_~y~0=v_main_~y~0_1676, main_~x~0=v_main_~x~0_1634, main_#t~post6=|v_main_#t~post6_597|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:42,815 INFO L290 TraceCheckUtils]: 7: Hoare triple {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [218] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:42,935 INFO L290 TraceCheckUtils]: 6: Hoare triple {29651#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1687_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1687_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1687_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [217] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1633 4294967296))) (let ((.cse0 (= |v_main_#t~post5_298| |v_main_#t~post5_297|)) (.cse1 (= v_main_~x~0_1633 v_main_~x~0_1632)) (.cse2 (= |v_main_#t~post6_598| |v_main_#t~post6_596|)) (.cse5 (= v_main_~y~0_1675 v_main_~y~0_1674)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (<= (div (+ (* (- 1) v_main_~x~0_1632) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_1633 (- 4294967295)) 4294967296) 1)) .cse3 (= (+ v_main_~x~0_1632 v_main_~y~0_1674) (+ v_main_~x~0_1633 v_main_~y~0_1675)) (< v_main_~x~0_1633 v_main_~x~0_1632))))) InVars {main_~y~0=v_main_~y~0_1675, main_#t~post5=|v_main_#t~post5_298|, main_~x~0=v_main_~x~0_1633, main_#t~post6=|v_main_#t~post6_598|} OutVars{main_#t~post5=|v_main_#t~post5_297|, main_~y~0=v_main_~y~0_1674, main_~x~0=v_main_~x~0_1632, main_#t~post6=|v_main_#t~post6_596|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {29641#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:35:42,936 INFO L290 TraceCheckUtils]: 5: Hoare triple {29574#true} ~x~0 := 0;~y~0 := 0; {29651#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_1687_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1687_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1687_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:35:42,936 INFO L272 TraceCheckUtils]: 4: Hoare triple {29574#true} call #t~ret7 := main(); {29574#true} is VALID [2022-04-28 03:35:42,937 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29574#true} {29574#true} #41#return; {29574#true} is VALID [2022-04-28 03:35:42,937 INFO L290 TraceCheckUtils]: 2: Hoare triple {29574#true} assume true; {29574#true} is VALID [2022-04-28 03:35:42,937 INFO L290 TraceCheckUtils]: 1: Hoare triple {29574#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {29574#true} is VALID [2022-04-28 03:35:42,937 INFO L272 TraceCheckUtils]: 0: Hoare triple {29574#true} call ULTIMATE.init(); {29574#true} is VALID [2022-04-28 03:35:42,937 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:42,937 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1830771033] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:35:42,937 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:35:42,937 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:35:45,520 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:35:45,520 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1903987894] [2022-04-28 03:35:45,520 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1903987894] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:35:45,520 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:35:45,520 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [47] imperfect sequences [] total 47 [2022-04-28 03:35:45,521 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400645969] [2022-04-28 03:35:45,521 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:35:45,521 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 143 [2022-04-28 03:35:45,521 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:35:45,521 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:45,586 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 143 edges. 143 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:45,586 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-04-28 03:35:45,586 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:45,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-04-28 03:35:45,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=2721, Unknown=0, NotChecked=0, Total=2970 [2022-04-28 03:35:45,587 INFO L87 Difference]: Start difference. First operand 145 states and 147 transitions. Second operand has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:52,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:52,743 INFO L93 Difference]: Finished difference Result 157 states and 161 transitions. [2022-04-28 03:35:52,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2022-04-28 03:35:52,743 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 143 [2022-04-28 03:35:52,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:52,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:52,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 157 transitions. [2022-04-28 03:35:52,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:52,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 157 transitions. [2022-04-28 03:35:52,745 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 47 states and 157 transitions. [2022-04-28 03:35:52,861 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 157 edges. 157 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:52,863 INFO L225 Difference]: With dead ends: 157 [2022-04-28 03:35:52,863 INFO L226 Difference]: Without dead ends: 149 [2022-04-28 03:35:52,863 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 29 SyntacticMatches, 89 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1794 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=557, Invalid=9145, Unknown=0, NotChecked=0, Total=9702 [2022-04-28 03:35:52,863 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 98 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 6117 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 98 SdHoareTripleChecker+Valid, 234 SdHoareTripleChecker+Invalid, 6163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 6117 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.6s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:52,864 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [98 Valid, 234 Invalid, 6163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 6117 Invalid, 0 Unknown, 0 Unchecked, 3.6s Time] [2022-04-28 03:35:52,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2022-04-28 03:35:53,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 148. [2022-04-28 03:35:53,073 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:53,074 INFO L82 GeneralOperation]: Start isEquivalent. First operand 149 states. Second operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:53,074 INFO L74 IsIncluded]: Start isIncluded. First operand 149 states. Second operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:53,074 INFO L87 Difference]: Start difference. First operand 149 states. Second operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:53,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:53,075 INFO L93 Difference]: Finished difference Result 149 states and 151 transitions. [2022-04-28 03:35:53,075 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 151 transitions. [2022-04-28 03:35:53,075 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:53,075 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:53,076 INFO L74 IsIncluded]: Start isIncluded. First operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 149 states. [2022-04-28 03:35:53,076 INFO L87 Difference]: Start difference. First operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 149 states. [2022-04-28 03:35:53,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:53,077 INFO L93 Difference]: Finished difference Result 149 states and 151 transitions. [2022-04-28 03:35:53,077 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 151 transitions. [2022-04-28 03:35:53,077 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:53,077 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:53,077 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:53,077 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:53,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 143 states have (on average 1.020979020979021) internal successors, (146), 143 states have internal predecessors, (146), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:53,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 150 transitions. [2022-04-28 03:35:53,079 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 150 transitions. Word has length 143 [2022-04-28 03:35:53,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:53,079 INFO L495 AbstractCegarLoop]: Abstraction has 148 states and 150 transitions. [2022-04-28 03:35:53,079 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 47 states have (on average 2.9574468085106385) internal successors, (139), 46 states have internal predecessors, (139), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:35:53,079 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 148 states and 150 transitions. [2022-04-28 03:35:53,268 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:53,268 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 150 transitions. [2022-04-28 03:35:53,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2022-04-28 03:35:53,268 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:53,269 INFO L195 NwaCegarLoop]: trace histogram [45, 45, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:53,289 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Forceful destruction successful, exit code 0 [2022-04-28 03:35:53,490 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 44 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45 [2022-04-28 03:35:53,490 INFO L420 AbstractCegarLoop]: === Iteration 47 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:53,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:53,490 INFO L85 PathProgramCache]: Analyzing trace with hash 1612483085, now seen corresponding path program 44 times [2022-04-28 03:35:53,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:53,490 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2034592991] [2022-04-28 03:35:56,744 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:35:57,107 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:35:58,973 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:35:58,974 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:35:58,976 INFO L85 PathProgramCache]: Analyzing trace with hash -1460758865, now seen corresponding path program 1 times [2022-04-28 03:35:58,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:58,977 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031939269] [2022-04-28 03:35:58,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:58,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:58,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:59,017 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:59,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:59,020 INFO L290 TraceCheckUtils]: 0: Hoare triple {30718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {30711#true} is VALID [2022-04-28 03:35:59,020 INFO L290 TraceCheckUtils]: 1: Hoare triple {30711#true} assume true; {30711#true} is VALID [2022-04-28 03:35:59,020 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30711#true} {30711#true} #41#return; {30711#true} is VALID [2022-04-28 03:35:59,020 INFO L272 TraceCheckUtils]: 0: Hoare triple {30711#true} call ULTIMATE.init(); {30718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:59,020 INFO L290 TraceCheckUtils]: 1: Hoare triple {30718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {30711#true} is VALID [2022-04-28 03:35:59,020 INFO L290 TraceCheckUtils]: 2: Hoare triple {30711#true} assume true; {30711#true} is VALID [2022-04-28 03:35:59,020 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30711#true} {30711#true} #41#return; {30711#true} is VALID [2022-04-28 03:35:59,020 INFO L272 TraceCheckUtils]: 4: Hoare triple {30711#true} call #t~ret7 := main(); {30711#true} is VALID [2022-04-28 03:35:59,021 INFO L290 TraceCheckUtils]: 5: Hoare triple {30711#true} ~x~0 := 0;~y~0 := 0; {30716#(= main_~x~0 0)} is VALID [2022-04-28 03:35:59,021 INFO L290 TraceCheckUtils]: 6: Hoare triple {30716#(= main_~x~0 0)} [221] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1693 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_1736 v_main_~y~0_1735)) (.cse1 (= |v_main_#t~post6_612| |v_main_#t~post6_610|)) (.cse4 (= |v_main_#t~post5_305| |v_main_#t~post5_304|)) (.cse5 (= v_main_~x~0_1693 v_main_~x~0_1692))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1736) 1000000 (* (- 1) v_main_~x~0_1693) v_main_~y~0_1735) (- 4294967296)) (+ (div (+ v_main_~x~0_1693 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1693 v_main_~y~0_1736) (+ v_main_~x~0_1692 v_main_~y~0_1735)) (< v_main_~y~0_1735 v_main_~y~0_1736) .cse2 .cse3) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1736, main_#t~post5=|v_main_#t~post5_305|, main_~x~0=v_main_~x~0_1693, main_#t~post6=|v_main_#t~post6_612|} OutVars{main_#t~post5=|v_main_#t~post5_304|, main_~y~0=v_main_~y~0_1735, main_~x~0=v_main_~x~0_1692, main_#t~post6=|v_main_#t~post6_610|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {30716#(= main_~x~0 0)} is VALID [2022-04-28 03:35:59,022 INFO L290 TraceCheckUtils]: 7: Hoare triple {30716#(= main_~x~0 0)} [222] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30716#(= main_~x~0 0)} is VALID [2022-04-28 03:35:59,023 INFO L290 TraceCheckUtils]: 8: Hoare triple {30716#(= main_~x~0 0)} [223] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1695 4294967296)) (.cse1 (= v_main_~y~0_1738 v_main_~y~0_1737)) (.cse2 (= v_main_~x~0_1695 v_main_~x~0_1694))) (or (and (= (+ v_main_~x~0_1694 v_main_~y~0_1738) (+ v_main_~x~0_1695 v_main_~y~0_1737)) (<= (div (+ (* (- 1) v_main_~x~0_1695) (* (- 1) v_main_~y~0_1737) v_main_~y~0_1738 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1695 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~y~0_1738 v_main_~y~0_1737)) (and .cse1 (= |v_main_#t~post6_611| |v_main_#t~post6_615|) .cse2 (<= 500000 .cse0) (= |v_main_#t~post4_309| |v_main_#t~post4_310|)) (and .cse1 (= |v_main_#t~post6_615| |v_main_#t~post6_611|) .cse2 (= |v_main_#t~post4_310| |v_main_#t~post4_309|)))) InVars {main_#t~post4=|v_main_#t~post4_310|, main_~y~0=v_main_~y~0_1738, main_~x~0=v_main_~x~0_1695, main_#t~post6=|v_main_#t~post6_615|} OutVars{main_#t~post4=|v_main_#t~post4_309|, main_~y~0=v_main_~y~0_1737, main_~x~0=v_main_~x~0_1694, main_#t~post6=|v_main_#t~post6_611|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {30717#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:35:59,023 INFO L290 TraceCheckUtils]: 9: Hoare triple {30717#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [220] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {30712#false} is VALID [2022-04-28 03:35:59,023 INFO L272 TraceCheckUtils]: 10: Hoare triple {30712#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {30712#false} is VALID [2022-04-28 03:35:59,023 INFO L290 TraceCheckUtils]: 11: Hoare triple {30712#false} ~cond := #in~cond; {30712#false} is VALID [2022-04-28 03:35:59,023 INFO L290 TraceCheckUtils]: 12: Hoare triple {30712#false} assume 0 == ~cond; {30712#false} is VALID [2022-04-28 03:35:59,024 INFO L290 TraceCheckUtils]: 13: Hoare triple {30712#false} assume !false; {30712#false} is VALID [2022-04-28 03:35:59,024 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:59,024 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:59,024 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031939269] [2022-04-28 03:35:59,024 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031939269] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:59,024 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2097984346] [2022-04-28 03:35:59,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:59,024 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:59,024 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:59,028 INFO L229 MonitoredProcess]: Starting monitored process 45 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:59,028 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2022-04-28 03:35:59,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:59,058 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:35:59,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:59,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:59,237 INFO L272 TraceCheckUtils]: 0: Hoare triple {30711#true} call ULTIMATE.init(); {30711#true} is VALID [2022-04-28 03:35:59,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {30711#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {30711#true} is VALID [2022-04-28 03:35:59,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {30711#true} assume true; {30711#true} is VALID [2022-04-28 03:35:59,237 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30711#true} {30711#true} #41#return; {30711#true} is VALID [2022-04-28 03:35:59,237 INFO L272 TraceCheckUtils]: 4: Hoare triple {30711#true} call #t~ret7 := main(); {30711#true} is VALID [2022-04-28 03:35:59,238 INFO L290 TraceCheckUtils]: 5: Hoare triple {30711#true} ~x~0 := 0;~y~0 := 0; {30737#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:59,239 INFO L290 TraceCheckUtils]: 6: Hoare triple {30737#(and (= main_~x~0 0) (= main_~y~0 0))} [221] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1693 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_1736 v_main_~y~0_1735)) (.cse1 (= |v_main_#t~post6_612| |v_main_#t~post6_610|)) (.cse4 (= |v_main_#t~post5_305| |v_main_#t~post5_304|)) (.cse5 (= v_main_~x~0_1693 v_main_~x~0_1692))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1736) 1000000 (* (- 1) v_main_~x~0_1693) v_main_~y~0_1735) (- 4294967296)) (+ (div (+ v_main_~x~0_1693 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1693 v_main_~y~0_1736) (+ v_main_~x~0_1692 v_main_~y~0_1735)) (< v_main_~y~0_1735 v_main_~y~0_1736) .cse2 .cse3) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1736, main_#t~post5=|v_main_#t~post5_305|, main_~x~0=v_main_~x~0_1693, main_#t~post6=|v_main_#t~post6_612|} OutVars{main_#t~post5=|v_main_#t~post5_304|, main_~y~0=v_main_~y~0_1735, main_~x~0=v_main_~x~0_1692, main_#t~post6=|v_main_#t~post6_610|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {30737#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:59,239 INFO L290 TraceCheckUtils]: 7: Hoare triple {30737#(and (= main_~x~0 0) (= main_~y~0 0))} [222] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30737#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:35:59,240 INFO L290 TraceCheckUtils]: 8: Hoare triple {30737#(and (= main_~x~0 0) (= main_~y~0 0))} [223] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1695 4294967296)) (.cse1 (= v_main_~y~0_1738 v_main_~y~0_1737)) (.cse2 (= v_main_~x~0_1695 v_main_~x~0_1694))) (or (and (= (+ v_main_~x~0_1694 v_main_~y~0_1738) (+ v_main_~x~0_1695 v_main_~y~0_1737)) (<= (div (+ (* (- 1) v_main_~x~0_1695) (* (- 1) v_main_~y~0_1737) v_main_~y~0_1738 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1695 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~y~0_1738 v_main_~y~0_1737)) (and .cse1 (= |v_main_#t~post6_611| |v_main_#t~post6_615|) .cse2 (<= 500000 .cse0) (= |v_main_#t~post4_309| |v_main_#t~post4_310|)) (and .cse1 (= |v_main_#t~post6_615| |v_main_#t~post6_611|) .cse2 (= |v_main_#t~post4_310| |v_main_#t~post4_309|)))) InVars {main_#t~post4=|v_main_#t~post4_310|, main_~y~0=v_main_~y~0_1738, main_~x~0=v_main_~x~0_1695, main_#t~post6=|v_main_#t~post6_615|} OutVars{main_#t~post4=|v_main_#t~post4_309|, main_~y~0=v_main_~y~0_1737, main_~x~0=v_main_~x~0_1694, main_#t~post6=|v_main_#t~post6_611|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {30747#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:35:59,241 INFO L290 TraceCheckUtils]: 9: Hoare triple {30747#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [220] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {30712#false} is VALID [2022-04-28 03:35:59,241 INFO L272 TraceCheckUtils]: 10: Hoare triple {30712#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {30712#false} is VALID [2022-04-28 03:35:59,241 INFO L290 TraceCheckUtils]: 11: Hoare triple {30712#false} ~cond := #in~cond; {30712#false} is VALID [2022-04-28 03:35:59,241 INFO L290 TraceCheckUtils]: 12: Hoare triple {30712#false} assume 0 == ~cond; {30712#false} is VALID [2022-04-28 03:35:59,241 INFO L290 TraceCheckUtils]: 13: Hoare triple {30712#false} assume !false; {30712#false} is VALID [2022-04-28 03:35:59,241 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:35:59,241 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:36:00,488 INFO L290 TraceCheckUtils]: 13: Hoare triple {30712#false} assume !false; {30712#false} is VALID [2022-04-28 03:36:00,489 INFO L290 TraceCheckUtils]: 12: Hoare triple {30766#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {30712#false} is VALID [2022-04-28 03:36:00,489 INFO L290 TraceCheckUtils]: 11: Hoare triple {30770#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {30766#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:36:00,490 INFO L272 TraceCheckUtils]: 10: Hoare triple {30774#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {30770#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:36:00,490 INFO L290 TraceCheckUtils]: 9: Hoare triple {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [220] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {30774#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:36:00,492 INFO L290 TraceCheckUtils]: 8: Hoare triple {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [223] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_1695 4294967296)) (.cse1 (= v_main_~y~0_1738 v_main_~y~0_1737)) (.cse2 (= v_main_~x~0_1695 v_main_~x~0_1694))) (or (and (= (+ v_main_~x~0_1694 v_main_~y~0_1738) (+ v_main_~x~0_1695 v_main_~y~0_1737)) (<= (div (+ (* (- 1) v_main_~x~0_1695) (* (- 1) v_main_~y~0_1737) v_main_~y~0_1738 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1695 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~y~0_1738 v_main_~y~0_1737)) (and .cse1 (= |v_main_#t~post6_611| |v_main_#t~post6_615|) .cse2 (<= 500000 .cse0) (= |v_main_#t~post4_309| |v_main_#t~post4_310|)) (and .cse1 (= |v_main_#t~post6_615| |v_main_#t~post6_611|) .cse2 (= |v_main_#t~post4_310| |v_main_#t~post4_309|)))) InVars {main_#t~post4=|v_main_#t~post4_310|, main_~y~0=v_main_~y~0_1738, main_~x~0=v_main_~x~0_1695, main_#t~post6=|v_main_#t~post6_615|} OutVars{main_#t~post4=|v_main_#t~post4_309|, main_~y~0=v_main_~y~0_1737, main_~x~0=v_main_~x~0_1694, main_#t~post6=|v_main_#t~post6_611|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:00,493 INFO L290 TraceCheckUtils]: 7: Hoare triple {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [222] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:00,502 INFO L290 TraceCheckUtils]: 6: Hoare triple {30788#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1748_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1748_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1748_33 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [221] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1693 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6)) (.cse0 (= v_main_~y~0_1736 v_main_~y~0_1735)) (.cse1 (= |v_main_#t~post6_612| |v_main_#t~post6_610|)) (.cse4 (= |v_main_#t~post5_305| |v_main_#t~post5_304|)) (.cse5 (= v_main_~x~0_1693 v_main_~x~0_1692))) (or (and .cse0 .cse1 (or (not .cse2) (not .cse3)) .cse4 .cse5) (and (<= (div (+ (* (- 1) v_main_~y~0_1736) 1000000 (* (- 1) v_main_~x~0_1693) v_main_~y~0_1735) (- 4294967296)) (+ (div (+ v_main_~x~0_1693 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_1693 v_main_~y~0_1736) (+ v_main_~x~0_1692 v_main_~y~0_1735)) (< v_main_~y~0_1735 v_main_~y~0_1736) .cse2 .cse3) (and .cse0 .cse1 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_1736, main_#t~post5=|v_main_#t~post5_305|, main_~x~0=v_main_~x~0_1693, main_#t~post6=|v_main_#t~post6_612|} OutVars{main_#t~post5=|v_main_#t~post5_304|, main_~y~0=v_main_~y~0_1735, main_~x~0=v_main_~x~0_1692, main_#t~post6=|v_main_#t~post6_610|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {30778#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:00,503 INFO L290 TraceCheckUtils]: 5: Hoare triple {30711#true} ~x~0 := 0;~y~0 := 0; {30788#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1748_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_1748_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1748_33 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:36:00,503 INFO L272 TraceCheckUtils]: 4: Hoare triple {30711#true} call #t~ret7 := main(); {30711#true} is VALID [2022-04-28 03:36:00,503 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30711#true} {30711#true} #41#return; {30711#true} is VALID [2022-04-28 03:36:00,503 INFO L290 TraceCheckUtils]: 2: Hoare triple {30711#true} assume true; {30711#true} is VALID [2022-04-28 03:36:00,503 INFO L290 TraceCheckUtils]: 1: Hoare triple {30711#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {30711#true} is VALID [2022-04-28 03:36:00,503 INFO L272 TraceCheckUtils]: 0: Hoare triple {30711#true} call ULTIMATE.init(); {30711#true} is VALID [2022-04-28 03:36:00,503 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:00,504 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2097984346] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:36:00,504 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:36:00,504 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:36:03,612 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:36:03,612 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2034592991] [2022-04-28 03:36:03,612 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2034592991] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:36:03,612 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:36:03,612 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [48] imperfect sequences [] total 48 [2022-04-28 03:36:03,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422360303] [2022-04-28 03:36:03,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:36:03,613 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 146 [2022-04-28 03:36:03,620 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:36:03,620 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:03,718 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 146 edges. 146 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:03,718 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 48 states [2022-04-28 03:36:03,719 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:03,719 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2022-04-28 03:36:03,719 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=254, Invalid=2826, Unknown=0, NotChecked=0, Total=3080 [2022-04-28 03:36:03,719 INFO L87 Difference]: Start difference. First operand 148 states and 150 transitions. Second operand has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:10,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:10,801 INFO L93 Difference]: Finished difference Result 160 states and 164 transitions. [2022-04-28 03:36:10,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-04-28 03:36:10,801 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 146 [2022-04-28 03:36:10,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:36:10,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:10,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 160 transitions. [2022-04-28 03:36:10,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:10,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 160 transitions. [2022-04-28 03:36:10,803 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 48 states and 160 transitions. [2022-04-28 03:36:10,881 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 160 edges. 160 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:10,891 INFO L225 Difference]: With dead ends: 160 [2022-04-28 03:36:10,891 INFO L226 Difference]: Without dead ends: 152 [2022-04-28 03:36:10,891 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 29 SyntacticMatches, 91 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1857 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=569, Invalid=9531, Unknown=0, NotChecked=0, Total=10100 [2022-04-28 03:36:10,892 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 100 mSDsluCounter, 227 mSDsCounter, 0 mSdLazyCounter, 6391 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 100 SdHoareTripleChecker+Valid, 239 SdHoareTripleChecker+Invalid, 6438 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 6391 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.6s IncrementalHoareTripleChecker+Time [2022-04-28 03:36:10,892 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [100 Valid, 239 Invalid, 6438 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 6391 Invalid, 0 Unknown, 0 Unchecked, 3.6s Time] [2022-04-28 03:36:10,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-04-28 03:36:11,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 151. [2022-04-28 03:36:11,073 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:36:11,073 INFO L82 GeneralOperation]: Start isEquivalent. First operand 152 states. Second operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:11,073 INFO L74 IsIncluded]: Start isIncluded. First operand 152 states. Second operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:11,074 INFO L87 Difference]: Start difference. First operand 152 states. Second operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:11,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:11,075 INFO L93 Difference]: Finished difference Result 152 states and 154 transitions. [2022-04-28 03:36:11,075 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 154 transitions. [2022-04-28 03:36:11,075 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:11,075 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:11,075 INFO L74 IsIncluded]: Start isIncluded. First operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 152 states. [2022-04-28 03:36:11,075 INFO L87 Difference]: Start difference. First operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 152 states. [2022-04-28 03:36:11,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:11,076 INFO L93 Difference]: Finished difference Result 152 states and 154 transitions. [2022-04-28 03:36:11,076 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 154 transitions. [2022-04-28 03:36:11,077 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:11,077 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:11,077 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:36:11,077 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:36:11,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 151 states, 146 states have (on average 1.0205479452054795) internal successors, (149), 146 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:11,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 153 transitions. [2022-04-28 03:36:11,078 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 153 transitions. Word has length 146 [2022-04-28 03:36:11,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:36:11,078 INFO L495 AbstractCegarLoop]: Abstraction has 151 states and 153 transitions. [2022-04-28 03:36:11,078 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 48 states, 48 states have (on average 2.9583333333333335) internal successors, (142), 47 states have internal predecessors, (142), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:11,079 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 151 states and 153 transitions. [2022-04-28 03:36:11,283 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 153 edges. 153 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:11,283 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 153 transitions. [2022-04-28 03:36:11,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2022-04-28 03:36:11,283 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:36:11,283 INFO L195 NwaCegarLoop]: trace histogram [46, 46, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:36:11,302 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Forceful destruction successful, exit code 0 [2022-04-28 03:36:11,490 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 45 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable46 [2022-04-28 03:36:11,491 INFO L420 AbstractCegarLoop]: === Iteration 48 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:36:11,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:36:11,491 INFO L85 PathProgramCache]: Analyzing trace with hash -1267759803, now seen corresponding path program 45 times [2022-04-28 03:36:11,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:11,491 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [636884031] [2022-04-28 03:36:13,262 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:36:13,564 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:36:13,904 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:36:13,905 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:36:13,907 INFO L85 PathProgramCache]: Analyzing trace with hash 588773295, now seen corresponding path program 1 times [2022-04-28 03:36:13,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:36:13,907 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822917337] [2022-04-28 03:36:13,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:13,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:36:13,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:13,976 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:36:13,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:13,979 INFO L290 TraceCheckUtils]: 0: Hoare triple {31876#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {31869#true} is VALID [2022-04-28 03:36:13,979 INFO L290 TraceCheckUtils]: 1: Hoare triple {31869#true} assume true; {31869#true} is VALID [2022-04-28 03:36:13,979 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31869#true} {31869#true} #41#return; {31869#true} is VALID [2022-04-28 03:36:13,980 INFO L272 TraceCheckUtils]: 0: Hoare triple {31869#true} call ULTIMATE.init(); {31876#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:36:13,980 INFO L290 TraceCheckUtils]: 1: Hoare triple {31876#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {31869#true} is VALID [2022-04-28 03:36:13,980 INFO L290 TraceCheckUtils]: 2: Hoare triple {31869#true} assume true; {31869#true} is VALID [2022-04-28 03:36:13,980 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31869#true} {31869#true} #41#return; {31869#true} is VALID [2022-04-28 03:36:13,980 INFO L272 TraceCheckUtils]: 4: Hoare triple {31869#true} call #t~ret7 := main(); {31869#true} is VALID [2022-04-28 03:36:13,980 INFO L290 TraceCheckUtils]: 5: Hoare triple {31869#true} ~x~0 := 0;~y~0 := 0; {31874#(= main_~x~0 0)} is VALID [2022-04-28 03:36:13,981 INFO L290 TraceCheckUtils]: 6: Hoare triple {31874#(= main_~x~0 0)} [225] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1754 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_1754 v_main_~x~0_1753)) (.cse1 (= |v_main_#t~post6_626| |v_main_#t~post6_624|)) (.cse2 (= v_main_~y~0_1798 v_main_~y~0_1797)) (.cse3 (= |v_main_#t~post5_312| |v_main_#t~post5_311|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_1797 v_main_~y~0_1798) (<= (div (+ (* (- 1) v_main_~y~0_1798) 1000000 v_main_~y~0_1797 (* (- 1) v_main_~x~0_1754)) (- 4294967296)) (+ (div (+ v_main_~x~0_1754 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_1754 v_main_~y~0_1798) (+ v_main_~x~0_1753 v_main_~y~0_1797)) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1798, main_#t~post5=|v_main_#t~post5_312|, main_~x~0=v_main_~x~0_1754, main_#t~post6=|v_main_#t~post6_626|} OutVars{main_#t~post5=|v_main_#t~post5_311|, main_~y~0=v_main_~y~0_1797, main_~x~0=v_main_~x~0_1753, main_#t~post6=|v_main_#t~post6_624|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {31874#(= main_~x~0 0)} is VALID [2022-04-28 03:36:13,981 INFO L290 TraceCheckUtils]: 7: Hoare triple {31874#(= main_~x~0 0)} [226] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31874#(= main_~x~0 0)} is VALID [2022-04-28 03:36:13,982 INFO L290 TraceCheckUtils]: 8: Hoare triple {31874#(= main_~x~0 0)} [227] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1800 v_main_~y~0_1799)) (.cse1 (= |v_main_#t~post4_317| |v_main_#t~post4_316|)) (.cse2 (= |v_main_#t~post6_629| |v_main_#t~post6_625|)) (.cse4 (= v_main_~x~0_1756 v_main_~x~0_1755)) (.cse3 (mod v_main_~x~0_1756 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (< v_main_~y~0_1800 v_main_~y~0_1799) (<= (div (+ (* (- 1) v_main_~x~0_1756) v_main_~y~0_1800 500000 (* (- 1) v_main_~y~0_1799)) (- 4294967296)) (+ (div (+ v_main_~x~0_1756 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (= (+ v_main_~x~0_1755 v_main_~y~0_1800) (+ v_main_~x~0_1756 v_main_~y~0_1799))))) InVars {main_#t~post4=|v_main_#t~post4_317|, main_~y~0=v_main_~y~0_1800, main_~x~0=v_main_~x~0_1756, main_#t~post6=|v_main_#t~post6_629|} OutVars{main_#t~post4=|v_main_#t~post4_316|, main_~y~0=v_main_~y~0_1799, main_~x~0=v_main_~x~0_1755, main_#t~post6=|v_main_#t~post6_625|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {31875#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:36:13,983 INFO L290 TraceCheckUtils]: 9: Hoare triple {31875#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [224] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {31870#false} is VALID [2022-04-28 03:36:13,983 INFO L272 TraceCheckUtils]: 10: Hoare triple {31870#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {31870#false} is VALID [2022-04-28 03:36:13,983 INFO L290 TraceCheckUtils]: 11: Hoare triple {31870#false} ~cond := #in~cond; {31870#false} is VALID [2022-04-28 03:36:13,983 INFO L290 TraceCheckUtils]: 12: Hoare triple {31870#false} assume 0 == ~cond; {31870#false} is VALID [2022-04-28 03:36:13,983 INFO L290 TraceCheckUtils]: 13: Hoare triple {31870#false} assume !false; {31870#false} is VALID [2022-04-28 03:36:13,983 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:13,983 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:36:13,983 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822917337] [2022-04-28 03:36:13,983 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1822917337] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:36:13,983 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1528623168] [2022-04-28 03:36:13,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:13,983 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:36:13,984 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:36:13,984 INFO L229 MonitoredProcess]: Starting monitored process 46 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:36:13,987 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2022-04-28 03:36:14,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:14,020 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:36:14,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:14,028 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:36:14,159 INFO L272 TraceCheckUtils]: 0: Hoare triple {31869#true} call ULTIMATE.init(); {31869#true} is VALID [2022-04-28 03:36:14,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {31869#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {31869#true} is VALID [2022-04-28 03:36:14,159 INFO L290 TraceCheckUtils]: 2: Hoare triple {31869#true} assume true; {31869#true} is VALID [2022-04-28 03:36:14,159 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31869#true} {31869#true} #41#return; {31869#true} is VALID [2022-04-28 03:36:14,160 INFO L272 TraceCheckUtils]: 4: Hoare triple {31869#true} call #t~ret7 := main(); {31869#true} is VALID [2022-04-28 03:36:14,160 INFO L290 TraceCheckUtils]: 5: Hoare triple {31869#true} ~x~0 := 0;~y~0 := 0; {31895#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:14,160 INFO L290 TraceCheckUtils]: 6: Hoare triple {31895#(and (= main_~x~0 0) (= main_~y~0 0))} [225] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1754 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_1754 v_main_~x~0_1753)) (.cse1 (= |v_main_#t~post6_626| |v_main_#t~post6_624|)) (.cse2 (= v_main_~y~0_1798 v_main_~y~0_1797)) (.cse3 (= |v_main_#t~post5_312| |v_main_#t~post5_311|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_1797 v_main_~y~0_1798) (<= (div (+ (* (- 1) v_main_~y~0_1798) 1000000 v_main_~y~0_1797 (* (- 1) v_main_~x~0_1754)) (- 4294967296)) (+ (div (+ v_main_~x~0_1754 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_1754 v_main_~y~0_1798) (+ v_main_~x~0_1753 v_main_~y~0_1797)) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1798, main_#t~post5=|v_main_#t~post5_312|, main_~x~0=v_main_~x~0_1754, main_#t~post6=|v_main_#t~post6_626|} OutVars{main_#t~post5=|v_main_#t~post5_311|, main_~y~0=v_main_~y~0_1797, main_~x~0=v_main_~x~0_1753, main_#t~post6=|v_main_#t~post6_624|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {31895#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:14,161 INFO L290 TraceCheckUtils]: 7: Hoare triple {31895#(and (= main_~x~0 0) (= main_~y~0 0))} [226] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31895#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:14,161 INFO L290 TraceCheckUtils]: 8: Hoare triple {31895#(and (= main_~x~0 0) (= main_~y~0 0))} [227] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1800 v_main_~y~0_1799)) (.cse1 (= |v_main_#t~post4_317| |v_main_#t~post4_316|)) (.cse2 (= |v_main_#t~post6_629| |v_main_#t~post6_625|)) (.cse4 (= v_main_~x~0_1756 v_main_~x~0_1755)) (.cse3 (mod v_main_~x~0_1756 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (< v_main_~y~0_1800 v_main_~y~0_1799) (<= (div (+ (* (- 1) v_main_~x~0_1756) v_main_~y~0_1800 500000 (* (- 1) v_main_~y~0_1799)) (- 4294967296)) (+ (div (+ v_main_~x~0_1756 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (= (+ v_main_~x~0_1755 v_main_~y~0_1800) (+ v_main_~x~0_1756 v_main_~y~0_1799))))) InVars {main_#t~post4=|v_main_#t~post4_317|, main_~y~0=v_main_~y~0_1800, main_~x~0=v_main_~x~0_1756, main_#t~post6=|v_main_#t~post6_629|} OutVars{main_#t~post4=|v_main_#t~post4_316|, main_~y~0=v_main_~y~0_1799, main_~x~0=v_main_~x~0_1755, main_#t~post6=|v_main_#t~post6_625|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {31905#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:36:14,162 INFO L290 TraceCheckUtils]: 9: Hoare triple {31905#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [224] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {31870#false} is VALID [2022-04-28 03:36:14,162 INFO L272 TraceCheckUtils]: 10: Hoare triple {31870#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {31870#false} is VALID [2022-04-28 03:36:14,162 INFO L290 TraceCheckUtils]: 11: Hoare triple {31870#false} ~cond := #in~cond; {31870#false} is VALID [2022-04-28 03:36:14,162 INFO L290 TraceCheckUtils]: 12: Hoare triple {31870#false} assume 0 == ~cond; {31870#false} is VALID [2022-04-28 03:36:14,163 INFO L290 TraceCheckUtils]: 13: Hoare triple {31870#false} assume !false; {31870#false} is VALID [2022-04-28 03:36:14,163 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:14,163 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:36:15,029 INFO L290 TraceCheckUtils]: 13: Hoare triple {31870#false} assume !false; {31870#false} is VALID [2022-04-28 03:36:15,030 INFO L290 TraceCheckUtils]: 12: Hoare triple {31924#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {31870#false} is VALID [2022-04-28 03:36:15,030 INFO L290 TraceCheckUtils]: 11: Hoare triple {31928#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {31924#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:36:15,030 INFO L272 TraceCheckUtils]: 10: Hoare triple {31932#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {31928#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:36:15,031 INFO L290 TraceCheckUtils]: 9: Hoare triple {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [224] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {31932#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:36:15,033 INFO L290 TraceCheckUtils]: 8: Hoare triple {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [227] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_1800 v_main_~y~0_1799)) (.cse1 (= |v_main_#t~post4_317| |v_main_#t~post4_316|)) (.cse2 (= |v_main_#t~post6_629| |v_main_#t~post6_625|)) (.cse4 (= v_main_~x~0_1756 v_main_~x~0_1755)) (.cse3 (mod v_main_~x~0_1756 4294967296))) (or (and .cse0 .cse1 .cse2 (<= 500000 .cse3) .cse4) (and .cse0 .cse1 .cse2 .cse4) (and (< v_main_~y~0_1800 v_main_~y~0_1799) (<= (div (+ (* (- 1) v_main_~x~0_1756) v_main_~y~0_1800 500000 (* (- 1) v_main_~y~0_1799)) (- 4294967296)) (+ (div (+ v_main_~x~0_1756 (- 4294967295)) 4294967296) 1)) (< .cse3 500000) (= (+ v_main_~x~0_1755 v_main_~y~0_1800) (+ v_main_~x~0_1756 v_main_~y~0_1799))))) InVars {main_#t~post4=|v_main_#t~post4_317|, main_~y~0=v_main_~y~0_1800, main_~x~0=v_main_~x~0_1756, main_#t~post6=|v_main_#t~post6_629|} OutVars{main_#t~post4=|v_main_#t~post4_316|, main_~y~0=v_main_~y~0_1799, main_~x~0=v_main_~x~0_1755, main_#t~post6=|v_main_#t~post6_625|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:15,033 INFO L290 TraceCheckUtils]: 7: Hoare triple {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [226] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:15,059 INFO L290 TraceCheckUtils]: 6: Hoare triple {31946#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1810_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1810_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1810_33 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [225] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_1754 4294967296))) (let ((.cse5 (<= 500000 .cse6)) (.cse4 (< .cse6 1000000)) (.cse0 (= v_main_~x~0_1754 v_main_~x~0_1753)) (.cse1 (= |v_main_#t~post6_626| |v_main_#t~post6_624|)) (.cse2 (= v_main_~y~0_1798 v_main_~y~0_1797)) (.cse3 (= |v_main_#t~post5_312| |v_main_#t~post5_311|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_1797 v_main_~y~0_1798) (<= (div (+ (* (- 1) v_main_~y~0_1798) 1000000 v_main_~y~0_1797 (* (- 1) v_main_~x~0_1754)) (- 4294967296)) (+ (div (+ v_main_~x~0_1754 (- 4294967295)) 4294967296) 1)) .cse4 (= (+ v_main_~x~0_1754 v_main_~y~0_1798) (+ v_main_~x~0_1753 v_main_~y~0_1797)) .cse5) (and (or (not .cse5) (not .cse4)) .cse0 .cse1 .cse2 .cse3)))) InVars {main_~y~0=v_main_~y~0_1798, main_#t~post5=|v_main_#t~post5_312|, main_~x~0=v_main_~x~0_1754, main_#t~post6=|v_main_#t~post6_626|} OutVars{main_#t~post5=|v_main_#t~post5_311|, main_~y~0=v_main_~y~0_1797, main_~x~0=v_main_~x~0_1753, main_#t~post6=|v_main_#t~post6_624|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {31936#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:15,060 INFO L290 TraceCheckUtils]: 5: Hoare triple {31869#true} ~x~0 := 0;~y~0 := 0; {31946#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1810_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_1810_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_1810_33 4294967296) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:36:15,060 INFO L272 TraceCheckUtils]: 4: Hoare triple {31869#true} call #t~ret7 := main(); {31869#true} is VALID [2022-04-28 03:36:15,060 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31869#true} {31869#true} #41#return; {31869#true} is VALID [2022-04-28 03:36:15,060 INFO L290 TraceCheckUtils]: 2: Hoare triple {31869#true} assume true; {31869#true} is VALID [2022-04-28 03:36:15,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {31869#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {31869#true} is VALID [2022-04-28 03:36:15,060 INFO L272 TraceCheckUtils]: 0: Hoare triple {31869#true} call ULTIMATE.init(); {31869#true} is VALID [2022-04-28 03:36:15,060 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:15,060 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1528623168] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:36:15,060 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:36:15,060 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:36:18,145 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:36:18,146 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [636884031] [2022-04-28 03:36:18,146 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [636884031] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:36:18,146 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:36:18,146 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [49] imperfect sequences [] total 49 [2022-04-28 03:36:18,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853411507] [2022-04-28 03:36:18,146 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:36:18,146 INFO L78 Accepts]: Start accepts. Automaton has has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 149 [2022-04-28 03:36:18,146 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:36:18,147 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:18,246 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 149 edges. 149 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:18,246 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 49 states [2022-04-28 03:36:18,246 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:18,246 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-04-28 03:36:18,247 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=259, Invalid=2933, Unknown=0, NotChecked=0, Total=3192 [2022-04-28 03:36:18,247 INFO L87 Difference]: Start difference. First operand 151 states and 153 transitions. Second operand has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:25,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:25,290 INFO L93 Difference]: Finished difference Result 163 states and 167 transitions. [2022-04-28 03:36:25,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-04-28 03:36:25,291 INFO L78 Accepts]: Start accepts. Automaton has has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 149 [2022-04-28 03:36:25,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:36:25,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:25,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 163 transitions. [2022-04-28 03:36:25,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:25,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 163 transitions. [2022-04-28 03:36:25,296 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 49 states and 163 transitions. [2022-04-28 03:36:25,377 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:25,379 INFO L225 Difference]: With dead ends: 163 [2022-04-28 03:36:25,379 INFO L226 Difference]: Without dead ends: 155 [2022-04-28 03:36:25,380 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 29 SyntacticMatches, 93 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1921 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=581, Invalid=9925, Unknown=0, NotChecked=0, Total=10506 [2022-04-28 03:36:25,382 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 102 mSDsluCounter, 232 mSDsCounter, 0 mSdLazyCounter, 6671 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 102 SdHoareTripleChecker+Valid, 244 SdHoareTripleChecker+Invalid, 6719 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 6671 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:36:25,382 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [102 Valid, 244 Invalid, 6719 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 6671 Invalid, 0 Unknown, 0 Unchecked, 3.5s Time] [2022-04-28 03:36:25,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2022-04-28 03:36:25,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 154. [2022-04-28 03:36:25,529 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:36:25,530 INFO L82 GeneralOperation]: Start isEquivalent. First operand 155 states. Second operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:25,530 INFO L74 IsIncluded]: Start isIncluded. First operand 155 states. Second operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:25,530 INFO L87 Difference]: Start difference. First operand 155 states. Second operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:25,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:25,531 INFO L93 Difference]: Finished difference Result 155 states and 157 transitions. [2022-04-28 03:36:25,531 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 157 transitions. [2022-04-28 03:36:25,531 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:25,531 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:25,532 INFO L74 IsIncluded]: Start isIncluded. First operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 155 states. [2022-04-28 03:36:25,532 INFO L87 Difference]: Start difference. First operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 155 states. [2022-04-28 03:36:25,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:25,534 INFO L93 Difference]: Finished difference Result 155 states and 157 transitions. [2022-04-28 03:36:25,534 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 157 transitions. [2022-04-28 03:36:25,534 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:25,534 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:25,534 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:36:25,534 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:36:25,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 149 states have (on average 1.0201342281879195) internal successors, (152), 149 states have internal predecessors, (152), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:25,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 156 transitions. [2022-04-28 03:36:25,536 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 156 transitions. Word has length 149 [2022-04-28 03:36:25,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:36:25,536 INFO L495 AbstractCegarLoop]: Abstraction has 154 states and 156 transitions. [2022-04-28 03:36:25,536 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 49 states, 49 states have (on average 2.9591836734693877) internal successors, (145), 48 states have internal predecessors, (145), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:25,536 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 154 states and 156 transitions. [2022-04-28 03:36:25,726 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 156 edges. 156 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:25,726 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 156 transitions. [2022-04-28 03:36:25,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2022-04-28 03:36:25,727 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:36:25,727 INFO L195 NwaCegarLoop]: trace histogram [47, 47, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:36:25,744 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Forceful destruction successful, exit code 0 [2022-04-28 03:36:25,943 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 46 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable47 [2022-04-28 03:36:25,943 INFO L420 AbstractCegarLoop]: === Iteration 49 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:36:25,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:36:25,944 INFO L85 PathProgramCache]: Analyzing trace with hash -1726996723, now seen corresponding path program 46 times [2022-04-28 03:36:25,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:25,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1633007879] [2022-04-28 03:36:27,437 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:36:29,661 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:36:29,663 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:36:29,665 INFO L85 PathProgramCache]: Analyzing trace with hash -1656661841, now seen corresponding path program 1 times [2022-04-28 03:36:29,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:36:29,665 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [665252234] [2022-04-28 03:36:29,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:29,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:36:29,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:29,708 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:36:29,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:29,710 INFO L290 TraceCheckUtils]: 0: Hoare triple {33055#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {33048#true} is VALID [2022-04-28 03:36:29,710 INFO L290 TraceCheckUtils]: 1: Hoare triple {33048#true} assume true; {33048#true} is VALID [2022-04-28 03:36:29,710 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33048#true} {33048#true} #41#return; {33048#true} is VALID [2022-04-28 03:36:29,711 INFO L272 TraceCheckUtils]: 0: Hoare triple {33048#true} call ULTIMATE.init(); {33055#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:36:29,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {33055#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {33048#true} is VALID [2022-04-28 03:36:29,711 INFO L290 TraceCheckUtils]: 2: Hoare triple {33048#true} assume true; {33048#true} is VALID [2022-04-28 03:36:29,711 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33048#true} {33048#true} #41#return; {33048#true} is VALID [2022-04-28 03:36:29,711 INFO L272 TraceCheckUtils]: 4: Hoare triple {33048#true} call #t~ret7 := main(); {33048#true} is VALID [2022-04-28 03:36:29,711 INFO L290 TraceCheckUtils]: 5: Hoare triple {33048#true} ~x~0 := 0;~y~0 := 0; {33053#(= main_~x~0 0)} is VALID [2022-04-28 03:36:29,712 INFO L290 TraceCheckUtils]: 6: Hoare triple {33053#(= main_~x~0 0)} [229] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1816 4294967296))) (let ((.cse2 (= |v_main_#t~post5_319| |v_main_#t~post5_318|)) (.cse3 (= v_main_~x~0_1816 v_main_~x~0_1815)) (.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse4 (= v_main_~y~0_1861 v_main_~y~0_1860))) (or (and (< v_main_~y~0_1860 v_main_~y~0_1861) (<= (div (+ (* (- 1) v_main_~y~0_1861) (* (- 1) v_main_~x~0_1816) 1000000 v_main_~y~0_1860) (- 4294967296)) (+ (div (+ v_main_~x~0_1816 (- 4294967295)) 4294967296) 1)) .cse0 .cse1 (= (+ v_main_~x~0_1815 v_main_~y~0_1860) (+ v_main_~x~0_1816 v_main_~y~0_1861))) (and .cse2 .cse3 .cse4 (= |v_main_#t~post6_640| |v_main_#t~post6_638|)) (and .cse2 (= |v_main_#t~post6_638| |v_main_#t~post6_640|) .cse3 (or (not .cse0) (not .cse1)) .cse4)))) InVars {main_~y~0=v_main_~y~0_1861, main_#t~post5=|v_main_#t~post5_319|, main_~x~0=v_main_~x~0_1816, main_#t~post6=|v_main_#t~post6_640|} OutVars{main_#t~post5=|v_main_#t~post5_318|, main_~y~0=v_main_~y~0_1860, main_~x~0=v_main_~x~0_1815, main_#t~post6=|v_main_#t~post6_638|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {33053#(= main_~x~0 0)} is VALID [2022-04-28 03:36:29,712 INFO L290 TraceCheckUtils]: 7: Hoare triple {33053#(= main_~x~0 0)} [230] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33053#(= main_~x~0 0)} is VALID [2022-04-28 03:36:29,713 INFO L290 TraceCheckUtils]: 8: Hoare triple {33053#(= main_~x~0 0)} [231] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_1818 4294967296)) (.cse0 (= v_main_~y~0_1863 v_main_~y~0_1862)) (.cse1 (= v_main_~x~0_1818 v_main_~x~0_1817)) (.cse2 (= |v_main_#t~post4_324| |v_main_#t~post4_323|))) (or (and (= |v_main_#t~post6_643| |v_main_#t~post6_639|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1817) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1818 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1818 v_main_~x~0_1817) (= (+ v_main_~x~0_1817 v_main_~y~0_1863) (+ v_main_~x~0_1818 v_main_~y~0_1862)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post6_639| |v_main_#t~post6_643|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_324|, main_~y~0=v_main_~y~0_1863, main_~x~0=v_main_~x~0_1818, main_#t~post6=|v_main_#t~post6_643|} OutVars{main_#t~post4=|v_main_#t~post4_323|, main_~y~0=v_main_~y~0_1862, main_~x~0=v_main_~x~0_1817, main_#t~post6=|v_main_#t~post6_639|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {33054#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:36:29,714 INFO L290 TraceCheckUtils]: 9: Hoare triple {33054#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [228] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {33049#false} is VALID [2022-04-28 03:36:29,714 INFO L272 TraceCheckUtils]: 10: Hoare triple {33049#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {33049#false} is VALID [2022-04-28 03:36:29,714 INFO L290 TraceCheckUtils]: 11: Hoare triple {33049#false} ~cond := #in~cond; {33049#false} is VALID [2022-04-28 03:36:29,714 INFO L290 TraceCheckUtils]: 12: Hoare triple {33049#false} assume 0 == ~cond; {33049#false} is VALID [2022-04-28 03:36:29,714 INFO L290 TraceCheckUtils]: 13: Hoare triple {33049#false} assume !false; {33049#false} is VALID [2022-04-28 03:36:29,714 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:29,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:36:29,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [665252234] [2022-04-28 03:36:29,714 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [665252234] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:36:29,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1125787436] [2022-04-28 03:36:29,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:29,715 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:36:29,715 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:36:29,716 INFO L229 MonitoredProcess]: Starting monitored process 47 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:36:29,719 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2022-04-28 03:36:29,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:29,755 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:36:29,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:29,762 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:36:29,903 INFO L272 TraceCheckUtils]: 0: Hoare triple {33048#true} call ULTIMATE.init(); {33048#true} is VALID [2022-04-28 03:36:29,904 INFO L290 TraceCheckUtils]: 1: Hoare triple {33048#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {33048#true} is VALID [2022-04-28 03:36:29,904 INFO L290 TraceCheckUtils]: 2: Hoare triple {33048#true} assume true; {33048#true} is VALID [2022-04-28 03:36:29,904 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33048#true} {33048#true} #41#return; {33048#true} is VALID [2022-04-28 03:36:29,904 INFO L272 TraceCheckUtils]: 4: Hoare triple {33048#true} call #t~ret7 := main(); {33048#true} is VALID [2022-04-28 03:36:29,904 INFO L290 TraceCheckUtils]: 5: Hoare triple {33048#true} ~x~0 := 0;~y~0 := 0; {33074#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:29,905 INFO L290 TraceCheckUtils]: 6: Hoare triple {33074#(and (= main_~x~0 0) (= main_~y~0 0))} [229] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1816 4294967296))) (let ((.cse2 (= |v_main_#t~post5_319| |v_main_#t~post5_318|)) (.cse3 (= v_main_~x~0_1816 v_main_~x~0_1815)) (.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse4 (= v_main_~y~0_1861 v_main_~y~0_1860))) (or (and (< v_main_~y~0_1860 v_main_~y~0_1861) (<= (div (+ (* (- 1) v_main_~y~0_1861) (* (- 1) v_main_~x~0_1816) 1000000 v_main_~y~0_1860) (- 4294967296)) (+ (div (+ v_main_~x~0_1816 (- 4294967295)) 4294967296) 1)) .cse0 .cse1 (= (+ v_main_~x~0_1815 v_main_~y~0_1860) (+ v_main_~x~0_1816 v_main_~y~0_1861))) (and .cse2 .cse3 .cse4 (= |v_main_#t~post6_640| |v_main_#t~post6_638|)) (and .cse2 (= |v_main_#t~post6_638| |v_main_#t~post6_640|) .cse3 (or (not .cse0) (not .cse1)) .cse4)))) InVars {main_~y~0=v_main_~y~0_1861, main_#t~post5=|v_main_#t~post5_319|, main_~x~0=v_main_~x~0_1816, main_#t~post6=|v_main_#t~post6_640|} OutVars{main_#t~post5=|v_main_#t~post5_318|, main_~y~0=v_main_~y~0_1860, main_~x~0=v_main_~x~0_1815, main_#t~post6=|v_main_#t~post6_638|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {33074#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:29,905 INFO L290 TraceCheckUtils]: 7: Hoare triple {33074#(and (= main_~x~0 0) (= main_~y~0 0))} [230] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33074#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:29,906 INFO L290 TraceCheckUtils]: 8: Hoare triple {33074#(and (= main_~x~0 0) (= main_~y~0 0))} [231] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_1818 4294967296)) (.cse0 (= v_main_~y~0_1863 v_main_~y~0_1862)) (.cse1 (= v_main_~x~0_1818 v_main_~x~0_1817)) (.cse2 (= |v_main_#t~post4_324| |v_main_#t~post4_323|))) (or (and (= |v_main_#t~post6_643| |v_main_#t~post6_639|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1817) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1818 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1818 v_main_~x~0_1817) (= (+ v_main_~x~0_1817 v_main_~y~0_1863) (+ v_main_~x~0_1818 v_main_~y~0_1862)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post6_639| |v_main_#t~post6_643|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_324|, main_~y~0=v_main_~y~0_1863, main_~x~0=v_main_~x~0_1818, main_#t~post6=|v_main_#t~post6_643|} OutVars{main_#t~post4=|v_main_#t~post4_323|, main_~y~0=v_main_~y~0_1862, main_~x~0=v_main_~x~0_1817, main_#t~post6=|v_main_#t~post6_639|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {33084#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:36:29,907 INFO L290 TraceCheckUtils]: 9: Hoare triple {33084#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [228] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {33049#false} is VALID [2022-04-28 03:36:29,907 INFO L272 TraceCheckUtils]: 10: Hoare triple {33049#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {33049#false} is VALID [2022-04-28 03:36:29,907 INFO L290 TraceCheckUtils]: 11: Hoare triple {33049#false} ~cond := #in~cond; {33049#false} is VALID [2022-04-28 03:36:29,907 INFO L290 TraceCheckUtils]: 12: Hoare triple {33049#false} assume 0 == ~cond; {33049#false} is VALID [2022-04-28 03:36:29,907 INFO L290 TraceCheckUtils]: 13: Hoare triple {33049#false} assume !false; {33049#false} is VALID [2022-04-28 03:36:29,907 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:29,907 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:36:30,820 INFO L290 TraceCheckUtils]: 13: Hoare triple {33049#false} assume !false; {33049#false} is VALID [2022-04-28 03:36:30,821 INFO L290 TraceCheckUtils]: 12: Hoare triple {33103#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {33049#false} is VALID [2022-04-28 03:36:30,821 INFO L290 TraceCheckUtils]: 11: Hoare triple {33107#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {33103#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:36:30,822 INFO L272 TraceCheckUtils]: 10: Hoare triple {33111#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {33107#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:36:30,822 INFO L290 TraceCheckUtils]: 9: Hoare triple {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [228] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {33111#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:36:30,825 INFO L290 TraceCheckUtils]: 8: Hoare triple {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [231] L9-2-->L9-3_primed: Formula: (let ((.cse3 (mod v_main_~x~0_1818 4294967296)) (.cse0 (= v_main_~y~0_1863 v_main_~y~0_1862)) (.cse1 (= v_main_~x~0_1818 v_main_~x~0_1817)) (.cse2 (= |v_main_#t~post4_324| |v_main_#t~post4_323|))) (or (and (= |v_main_#t~post6_643| |v_main_#t~post6_639|) .cse0 .cse1 .cse2) (and (<= (div (+ (* (- 1) v_main_~x~0_1817) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1818 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1818 v_main_~x~0_1817) (= (+ v_main_~x~0_1817 v_main_~y~0_1863) (+ v_main_~x~0_1818 v_main_~y~0_1862)) (< .cse3 500000)) (and (<= 500000 .cse3) .cse0 .cse1 (= |v_main_#t~post6_639| |v_main_#t~post6_643|) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_324|, main_~y~0=v_main_~y~0_1863, main_~x~0=v_main_~x~0_1818, main_#t~post6=|v_main_#t~post6_643|} OutVars{main_#t~post4=|v_main_#t~post4_323|, main_~y~0=v_main_~y~0_1862, main_~x~0=v_main_~x~0_1817, main_#t~post6=|v_main_#t~post6_639|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:30,825 INFO L290 TraceCheckUtils]: 7: Hoare triple {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [230] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:30,835 INFO L290 TraceCheckUtils]: 6: Hoare triple {33125#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1873_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1873_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1873_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [229] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1816 4294967296))) (let ((.cse2 (= |v_main_#t~post5_319| |v_main_#t~post5_318|)) (.cse3 (= v_main_~x~0_1816 v_main_~x~0_1815)) (.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse4 (= v_main_~y~0_1861 v_main_~y~0_1860))) (or (and (< v_main_~y~0_1860 v_main_~y~0_1861) (<= (div (+ (* (- 1) v_main_~y~0_1861) (* (- 1) v_main_~x~0_1816) 1000000 v_main_~y~0_1860) (- 4294967296)) (+ (div (+ v_main_~x~0_1816 (- 4294967295)) 4294967296) 1)) .cse0 .cse1 (= (+ v_main_~x~0_1815 v_main_~y~0_1860) (+ v_main_~x~0_1816 v_main_~y~0_1861))) (and .cse2 .cse3 .cse4 (= |v_main_#t~post6_640| |v_main_#t~post6_638|)) (and .cse2 (= |v_main_#t~post6_638| |v_main_#t~post6_640|) .cse3 (or (not .cse0) (not .cse1)) .cse4)))) InVars {main_~y~0=v_main_~y~0_1861, main_#t~post5=|v_main_#t~post5_319|, main_~x~0=v_main_~x~0_1816, main_#t~post6=|v_main_#t~post6_640|} OutVars{main_#t~post5=|v_main_#t~post5_318|, main_~y~0=v_main_~y~0_1860, main_~x~0=v_main_~x~0_1815, main_#t~post6=|v_main_#t~post6_638|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {33115#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:36:30,836 INFO L290 TraceCheckUtils]: 5: Hoare triple {33048#true} ~x~0 := 0;~y~0 := 0; {33125#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_1873_33 Int)) (or (not (< (* aux_div_v_main_~y~0_1873_33 4294967296) main_~y~0)) (not (<= (div (+ (* aux_div_v_main_~y~0_1873_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:36:30,836 INFO L272 TraceCheckUtils]: 4: Hoare triple {33048#true} call #t~ret7 := main(); {33048#true} is VALID [2022-04-28 03:36:30,836 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33048#true} {33048#true} #41#return; {33048#true} is VALID [2022-04-28 03:36:30,836 INFO L290 TraceCheckUtils]: 2: Hoare triple {33048#true} assume true; {33048#true} is VALID [2022-04-28 03:36:30,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {33048#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {33048#true} is VALID [2022-04-28 03:36:30,837 INFO L272 TraceCheckUtils]: 0: Hoare triple {33048#true} call ULTIMATE.init(); {33048#true} is VALID [2022-04-28 03:36:30,837 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:30,837 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1125787436] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:36:30,837 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:36:30,837 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:36:34,133 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:36:34,133 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1633007879] [2022-04-28 03:36:34,133 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1633007879] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:36:34,133 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:36:34,133 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [50] imperfect sequences [] total 50 [2022-04-28 03:36:34,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1542820928] [2022-04-28 03:36:34,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:36:34,133 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 152 [2022-04-28 03:36:34,134 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:36:34,134 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:34,235 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 152 edges. 152 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:34,235 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-28 03:36:34,235 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:34,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-28 03:36:34,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=264, Invalid=3042, Unknown=0, NotChecked=0, Total=3306 [2022-04-28 03:36:34,236 INFO L87 Difference]: Start difference. First operand 154 states and 156 transitions. Second operand has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:40,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:40,900 INFO L93 Difference]: Finished difference Result 166 states and 170 transitions. [2022-04-28 03:36:40,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-04-28 03:36:40,900 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 152 [2022-04-28 03:36:40,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:36:40,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:40,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 166 transitions. [2022-04-28 03:36:40,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:40,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 166 transitions. [2022-04-28 03:36:40,902 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 50 states and 166 transitions. [2022-04-28 03:36:40,990 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:40,992 INFO L225 Difference]: With dead ends: 166 [2022-04-28 03:36:40,992 INFO L226 Difference]: Without dead ends: 158 [2022-04-28 03:36:40,992 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 28 SyntacticMatches, 96 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1986 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=593, Invalid=10327, Unknown=0, NotChecked=0, Total=10920 [2022-04-28 03:36:40,993 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 104 mSDsluCounter, 237 mSDsCounter, 0 mSdLazyCounter, 6957 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 104 SdHoareTripleChecker+Valid, 249 SdHoareTripleChecker+Invalid, 7006 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 6957 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:36:40,993 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [104 Valid, 249 Invalid, 7006 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 6957 Invalid, 0 Unknown, 0 Unchecked, 3.4s Time] [2022-04-28 03:36:40,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2022-04-28 03:36:41,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 157. [2022-04-28 03:36:41,138 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:36:41,138 INFO L82 GeneralOperation]: Start isEquivalent. First operand 158 states. Second operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:41,138 INFO L74 IsIncluded]: Start isIncluded. First operand 158 states. Second operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:41,139 INFO L87 Difference]: Start difference. First operand 158 states. Second operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:41,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:41,140 INFO L93 Difference]: Finished difference Result 158 states and 160 transitions. [2022-04-28 03:36:41,140 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 160 transitions. [2022-04-28 03:36:41,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:41,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:41,140 INFO L74 IsIncluded]: Start isIncluded. First operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 158 states. [2022-04-28 03:36:41,140 INFO L87 Difference]: Start difference. First operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 158 states. [2022-04-28 03:36:41,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:41,142 INFO L93 Difference]: Finished difference Result 158 states and 160 transitions. [2022-04-28 03:36:41,142 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 160 transitions. [2022-04-28 03:36:41,142 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:41,142 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:41,142 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:36:41,142 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:36:41,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 152 states have (on average 1.019736842105263) internal successors, (155), 152 states have internal predecessors, (155), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:41,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 159 transitions. [2022-04-28 03:36:41,143 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 159 transitions. Word has length 152 [2022-04-28 03:36:41,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:36:41,144 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 159 transitions. [2022-04-28 03:36:41,144 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 2.96) internal successors, (148), 49 states have internal predecessors, (148), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:41,144 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 157 states and 159 transitions. [2022-04-28 03:36:41,335 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 159 edges. 159 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:41,335 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 159 transitions. [2022-04-28 03:36:41,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2022-04-28 03:36:41,336 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:36:41,336 INFO L195 NwaCegarLoop]: trace histogram [48, 48, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:36:41,353 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Forceful destruction successful, exit code 0 [2022-04-28 03:36:41,551 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48,47 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:36:41,551 INFO L420 AbstractCegarLoop]: === Iteration 50 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:36:41,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:36:41,552 INFO L85 PathProgramCache]: Analyzing trace with hash 911724613, now seen corresponding path program 47 times [2022-04-28 03:36:41,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:41,552 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [367754816] [2022-04-28 03:36:42,055 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:36:43,398 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:36:43,398 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:36:43,400 INFO L85 PathProgramCache]: Analyzing trace with hash 392870319, now seen corresponding path program 1 times [2022-04-28 03:36:43,400 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:36:43,400 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [165156333] [2022-04-28 03:36:43,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:43,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:36:43,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:43,516 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:36:43,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:43,518 INFO L290 TraceCheckUtils]: 0: Hoare triple {34258#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {34248#true} is VALID [2022-04-28 03:36:43,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {34248#true} assume true; {34248#true} is VALID [2022-04-28 03:36:43,519 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {34248#true} {34248#true} #41#return; {34248#true} is VALID [2022-04-28 03:36:43,519 INFO L272 TraceCheckUtils]: 0: Hoare triple {34248#true} call ULTIMATE.init(); {34258#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:36:43,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {34258#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {34248#true} is VALID [2022-04-28 03:36:43,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {34248#true} assume true; {34248#true} is VALID [2022-04-28 03:36:43,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34248#true} {34248#true} #41#return; {34248#true} is VALID [2022-04-28 03:36:43,519 INFO L272 TraceCheckUtils]: 4: Hoare triple {34248#true} call #t~ret7 := main(); {34248#true} is VALID [2022-04-28 03:36:43,520 INFO L290 TraceCheckUtils]: 5: Hoare triple {34248#true} ~x~0 := 0;~y~0 := 0; {34253#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:43,520 INFO L290 TraceCheckUtils]: 6: Hoare triple {34253#(and (= main_~x~0 0) (= main_~y~0 0))} [233] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1879 4294967296))) (let ((.cse2 (= v_main_~x~0_1879 v_main_~x~0_1878)) (.cse3 (= |v_main_#t~post6_654| |v_main_#t~post6_652|)) (.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse4 (= |v_main_#t~post5_326| |v_main_#t~post5_325|))) (or (and (= (+ v_main_~x~0_1878 v_main_~y~0_1924) (+ v_main_~x~0_1879 v_main_~y~0_1925)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1878)) (- 4294967296)) (+ (div (+ v_main_~x~0_1879 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1879 v_main_~x~0_1878) .cse1) (and .cse2 .cse3 (= v_main_~y~0_1925 v_main_~y~0_1924) .cse4) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) (= v_main_~y~0_1924 v_main_~y~0_1925) .cse4)))) InVars {main_~y~0=v_main_~y~0_1925, main_#t~post5=|v_main_#t~post5_326|, main_~x~0=v_main_~x~0_1879, main_#t~post6=|v_main_#t~post6_654|} OutVars{main_#t~post5=|v_main_#t~post5_325|, main_~y~0=v_main_~y~0_1924, main_~x~0=v_main_~x~0_1878, main_#t~post6=|v_main_#t~post6_652|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {34253#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:43,520 INFO L290 TraceCheckUtils]: 7: Hoare triple {34253#(and (= main_~x~0 0) (= main_~y~0 0))} [234] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34253#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:36:43,521 INFO L290 TraceCheckUtils]: 8: Hoare triple {34253#(and (= main_~x~0 0) (= main_~y~0 0))} [235] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post4_331| |v_main_#t~post4_330|)) (.cse2 (= v_main_~x~0_1881 v_main_~x~0_1880)) (.cse3 (= v_main_~y~0_1927 v_main_~y~0_1926)) (.cse4 (= |v_main_#t~post6_657| |v_main_#t~post6_653|)) (.cse0 (mod v_main_~x~0_1881 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4) (and (<= (div (+ (* (- 1) v_main_~x~0_1880) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1881 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_1881 v_main_~x~0_1880) (= (+ v_main_~x~0_1881 v_main_~y~0_1926) (+ v_main_~x~0_1880 v_main_~y~0_1927))))) InVars {main_#t~post4=|v_main_#t~post4_331|, main_~y~0=v_main_~y~0_1927, main_~x~0=v_main_~x~0_1881, main_#t~post6=|v_main_#t~post6_657|} OutVars{main_#t~post4=|v_main_#t~post4_330|, main_~y~0=v_main_~y~0_1926, main_~x~0=v_main_~x~0_1880, main_#t~post6=|v_main_#t~post6_653|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {34254#(or (and (<= main_~x~0 0) (not (<= (+ (div main_~x~0 4294967296) 1) 0))) (and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0)))} is VALID [2022-04-28 03:36:43,522 INFO L290 TraceCheckUtils]: 9: Hoare triple {34254#(or (and (<= main_~x~0 0) (not (<= (+ (div main_~x~0 4294967296) 1) 0))) (and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0)))} [232] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {34255#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:36:43,522 INFO L272 TraceCheckUtils]: 10: Hoare triple {34255#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {34256#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-28 03:36:43,523 INFO L290 TraceCheckUtils]: 11: Hoare triple {34256#(not (= |__VERIFIER_assert_#in~cond| 0))} ~cond := #in~cond; {34257#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:36:43,523 INFO L290 TraceCheckUtils]: 12: Hoare triple {34257#(not (= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {34249#false} is VALID [2022-04-28 03:36:43,523 INFO L290 TraceCheckUtils]: 13: Hoare triple {34249#false} assume !false; {34249#false} is VALID [2022-04-28 03:36:43,523 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:43,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:36:43,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [165156333] [2022-04-28 03:36:43,523 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [165156333] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:36:43,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1736253810] [2022-04-28 03:36:43,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:43,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:36:43,524 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:36:43,525 INFO L229 MonitoredProcess]: Starting monitored process 48 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:36:43,546 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2022-04-28 03:36:43,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:43,558 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-28 03:36:43,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:43,564 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:36:43,680 INFO L272 TraceCheckUtils]: 0: Hoare triple {34248#true} call ULTIMATE.init(); {34248#true} is VALID [2022-04-28 03:36:43,680 INFO L290 TraceCheckUtils]: 1: Hoare triple {34248#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {34248#true} is VALID [2022-04-28 03:36:43,680 INFO L290 TraceCheckUtils]: 2: Hoare triple {34248#true} assume true; {34248#true} is VALID [2022-04-28 03:36:43,680 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34248#true} {34248#true} #41#return; {34248#true} is VALID [2022-04-28 03:36:43,680 INFO L272 TraceCheckUtils]: 4: Hoare triple {34248#true} call #t~ret7 := main(); {34248#true} is VALID [2022-04-28 03:36:43,681 INFO L290 TraceCheckUtils]: 5: Hoare triple {34248#true} ~x~0 := 0;~y~0 := 0; {34277#(= main_~x~0 0)} is VALID [2022-04-28 03:36:43,681 INFO L290 TraceCheckUtils]: 6: Hoare triple {34277#(= main_~x~0 0)} [233] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1879 4294967296))) (let ((.cse2 (= v_main_~x~0_1879 v_main_~x~0_1878)) (.cse3 (= |v_main_#t~post6_654| |v_main_#t~post6_652|)) (.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse4 (= |v_main_#t~post5_326| |v_main_#t~post5_325|))) (or (and (= (+ v_main_~x~0_1878 v_main_~y~0_1924) (+ v_main_~x~0_1879 v_main_~y~0_1925)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1878)) (- 4294967296)) (+ (div (+ v_main_~x~0_1879 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1879 v_main_~x~0_1878) .cse1) (and .cse2 .cse3 (= v_main_~y~0_1925 v_main_~y~0_1924) .cse4) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) (= v_main_~y~0_1924 v_main_~y~0_1925) .cse4)))) InVars {main_~y~0=v_main_~y~0_1925, main_#t~post5=|v_main_#t~post5_326|, main_~x~0=v_main_~x~0_1879, main_#t~post6=|v_main_#t~post6_654|} OutVars{main_#t~post5=|v_main_#t~post5_325|, main_~y~0=v_main_~y~0_1924, main_~x~0=v_main_~x~0_1878, main_#t~post6=|v_main_#t~post6_652|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {34277#(= main_~x~0 0)} is VALID [2022-04-28 03:36:43,681 INFO L290 TraceCheckUtils]: 7: Hoare triple {34277#(= main_~x~0 0)} [234] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34277#(= main_~x~0 0)} is VALID [2022-04-28 03:36:43,682 INFO L290 TraceCheckUtils]: 8: Hoare triple {34277#(= main_~x~0 0)} [235] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post4_331| |v_main_#t~post4_330|)) (.cse2 (= v_main_~x~0_1881 v_main_~x~0_1880)) (.cse3 (= v_main_~y~0_1927 v_main_~y~0_1926)) (.cse4 (= |v_main_#t~post6_657| |v_main_#t~post6_653|)) (.cse0 (mod v_main_~x~0_1881 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4) (and (<= (div (+ (* (- 1) v_main_~x~0_1880) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1881 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_1881 v_main_~x~0_1880) (= (+ v_main_~x~0_1881 v_main_~y~0_1926) (+ v_main_~x~0_1880 v_main_~y~0_1927))))) InVars {main_#t~post4=|v_main_#t~post4_331|, main_~y~0=v_main_~y~0_1927, main_~x~0=v_main_~x~0_1881, main_#t~post6=|v_main_#t~post6_657|} OutVars{main_#t~post4=|v_main_#t~post4_330|, main_~y~0=v_main_~y~0_1926, main_~x~0=v_main_~x~0_1880, main_#t~post6=|v_main_#t~post6_653|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {34287#(or (= main_~x~0 0) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:36:43,683 INFO L290 TraceCheckUtils]: 9: Hoare triple {34287#(or (= main_~x~0 0) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (< 0 main_~x~0)))} [232] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {34249#false} is VALID [2022-04-28 03:36:43,683 INFO L272 TraceCheckUtils]: 10: Hoare triple {34249#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {34249#false} is VALID [2022-04-28 03:36:43,683 INFO L290 TraceCheckUtils]: 11: Hoare triple {34249#false} ~cond := #in~cond; {34249#false} is VALID [2022-04-28 03:36:43,683 INFO L290 TraceCheckUtils]: 12: Hoare triple {34249#false} assume 0 == ~cond; {34249#false} is VALID [2022-04-28 03:36:43,683 INFO L290 TraceCheckUtils]: 13: Hoare triple {34249#false} assume !false; {34249#false} is VALID [2022-04-28 03:36:43,683 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:43,683 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:36:44,181 INFO L290 TraceCheckUtils]: 13: Hoare triple {34249#false} assume !false; {34249#false} is VALID [2022-04-28 03:36:44,181 INFO L290 TraceCheckUtils]: 12: Hoare triple {34249#false} assume 0 == ~cond; {34249#false} is VALID [2022-04-28 03:36:44,182 INFO L290 TraceCheckUtils]: 11: Hoare triple {34249#false} ~cond := #in~cond; {34249#false} is VALID [2022-04-28 03:36:44,182 INFO L272 TraceCheckUtils]: 10: Hoare triple {34249#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {34249#false} is VALID [2022-04-28 03:36:44,182 INFO L290 TraceCheckUtils]: 9: Hoare triple {34315#(< (mod main_~x~0 4294967296) 1000000)} [232] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {34249#false} is VALID [2022-04-28 03:36:44,184 INFO L290 TraceCheckUtils]: 8: Hoare triple {34315#(< (mod main_~x~0 4294967296) 1000000)} [235] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= |v_main_#t~post4_331| |v_main_#t~post4_330|)) (.cse2 (= v_main_~x~0_1881 v_main_~x~0_1880)) (.cse3 (= v_main_~y~0_1927 v_main_~y~0_1926)) (.cse4 (= |v_main_#t~post6_657| |v_main_#t~post6_653|)) (.cse0 (mod v_main_~x~0_1881 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4) (and (<= (div (+ (* (- 1) v_main_~x~0_1880) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1881 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_1881 v_main_~x~0_1880) (= (+ v_main_~x~0_1881 v_main_~y~0_1926) (+ v_main_~x~0_1880 v_main_~y~0_1927))))) InVars {main_#t~post4=|v_main_#t~post4_331|, main_~y~0=v_main_~y~0_1927, main_~x~0=v_main_~x~0_1881, main_#t~post6=|v_main_#t~post6_657|} OutVars{main_#t~post4=|v_main_#t~post4_330|, main_~y~0=v_main_~y~0_1926, main_~x~0=v_main_~x~0_1880, main_#t~post6=|v_main_#t~post6_653|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {34315#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:36:44,184 INFO L290 TraceCheckUtils]: 7: Hoare triple {34315#(< (mod main_~x~0 4294967296) 1000000)} [234] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34315#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:36:44,185 INFO L290 TraceCheckUtils]: 6: Hoare triple {34325#(< (mod main_~x~0 4294967296) 500000)} [233] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1879 4294967296))) (let ((.cse2 (= v_main_~x~0_1879 v_main_~x~0_1878)) (.cse3 (= |v_main_#t~post6_654| |v_main_#t~post6_652|)) (.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse4 (= |v_main_#t~post5_326| |v_main_#t~post5_325|))) (or (and (= (+ v_main_~x~0_1878 v_main_~y~0_1924) (+ v_main_~x~0_1879 v_main_~y~0_1925)) .cse0 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_1878)) (- 4294967296)) (+ (div (+ v_main_~x~0_1879 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_1879 v_main_~x~0_1878) .cse1) (and .cse2 .cse3 (= v_main_~y~0_1925 v_main_~y~0_1924) .cse4) (and .cse2 .cse3 (or (not .cse1) (not .cse0)) (= v_main_~y~0_1924 v_main_~y~0_1925) .cse4)))) InVars {main_~y~0=v_main_~y~0_1925, main_#t~post5=|v_main_#t~post5_326|, main_~x~0=v_main_~x~0_1879, main_#t~post6=|v_main_#t~post6_654|} OutVars{main_#t~post5=|v_main_#t~post5_325|, main_~y~0=v_main_~y~0_1924, main_~x~0=v_main_~x~0_1878, main_#t~post6=|v_main_#t~post6_652|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {34315#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:36:44,185 INFO L290 TraceCheckUtils]: 5: Hoare triple {34248#true} ~x~0 := 0;~y~0 := 0; {34325#(< (mod main_~x~0 4294967296) 500000)} is VALID [2022-04-28 03:36:44,185 INFO L272 TraceCheckUtils]: 4: Hoare triple {34248#true} call #t~ret7 := main(); {34248#true} is VALID [2022-04-28 03:36:44,185 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34248#true} {34248#true} #41#return; {34248#true} is VALID [2022-04-28 03:36:44,185 INFO L290 TraceCheckUtils]: 2: Hoare triple {34248#true} assume true; {34248#true} is VALID [2022-04-28 03:36:44,185 INFO L290 TraceCheckUtils]: 1: Hoare triple {34248#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {34248#true} is VALID [2022-04-28 03:36:44,185 INFO L272 TraceCheckUtils]: 0: Hoare triple {34248#true} call ULTIMATE.init(); {34248#true} is VALID [2022-04-28 03:36:44,185 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:36:44,186 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1736253810] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:36:44,186 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:36:44,186 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 4, 4] total 12 [2022-04-28 03:36:48,239 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:36:48,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [367754816] [2022-04-28 03:36:48,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [367754816] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:36:48,239 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:36:48,239 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [101] imperfect sequences [] total 101 [2022-04-28 03:36:48,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803716968] [2022-04-28 03:36:48,239 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:36:48,240 INFO L78 Accepts]: Start accepts. Automaton has has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 155 [2022-04-28 03:36:48,240 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:36:48,240 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:36:48,308 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 155 edges. 155 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:48,308 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 101 states [2022-04-28 03:36:48,308 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:48,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2022-04-28 03:36:48,309 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=692, Invalid=10438, Unknown=0, NotChecked=0, Total=11130 [2022-04-28 03:36:48,309 INFO L87 Difference]: Start difference. First operand 157 states and 159 transitions. Second operand has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:06,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:06,388 INFO L93 Difference]: Finished difference Result 171 states and 176 transitions. [2022-04-28 03:37:06,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2022-04-28 03:37:06,388 INFO L78 Accepts]: Start accepts. Automaton has has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 155 [2022-04-28 03:37:06,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:37:06,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:06,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 172 transitions. [2022-04-28 03:37:06,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:06,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 172 transitions. [2022-04-28 03:37:06,390 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 99 states and 172 transitions. [2022-04-28 03:37:06,537 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:06,538 INFO L225 Difference]: With dead ends: 171 [2022-04-28 03:37:06,538 INFO L226 Difference]: Without dead ends: 163 [2022-04-28 03:37:06,540 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 279 GetRequests, 28 SyntacticMatches, 51 SemanticMatches, 200 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5851 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=1647, Invalid=38955, Unknown=0, NotChecked=0, Total=40602 [2022-04-28 03:37:06,540 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 108 mSDsluCounter, 232 mSDsCounter, 0 mSdLazyCounter, 14146 mSolverCounterSat, 194 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 8.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 243 SdHoareTripleChecker+Invalid, 14340 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 194 IncrementalHoareTripleChecker+Valid, 14146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:37:06,540 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [108 Valid, 243 Invalid, 14340 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [194 Valid, 14146 Invalid, 0 Unknown, 0 Unchecked, 8.5s Time] [2022-04-28 03:37:06,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2022-04-28 03:37:06,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 160. [2022-04-28 03:37:06,779 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:37:06,780 INFO L82 GeneralOperation]: Start isEquivalent. First operand 163 states. Second operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:06,780 INFO L74 IsIncluded]: Start isIncluded. First operand 163 states. Second operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:06,780 INFO L87 Difference]: Start difference. First operand 163 states. Second operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:06,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:06,781 INFO L93 Difference]: Finished difference Result 163 states and 166 transitions. [2022-04-28 03:37:06,781 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 166 transitions. [2022-04-28 03:37:06,781 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:06,782 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:06,782 INFO L74 IsIncluded]: Start isIncluded. First operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 163 states. [2022-04-28 03:37:06,782 INFO L87 Difference]: Start difference. First operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 163 states. [2022-04-28 03:37:06,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:06,783 INFO L93 Difference]: Finished difference Result 163 states and 166 transitions. [2022-04-28 03:37:06,783 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 166 transitions. [2022-04-28 03:37:06,783 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:06,783 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:06,783 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:37:06,783 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:37:06,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 155 states have (on average 1.0193548387096774) internal successors, (158), 155 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:06,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 162 transitions. [2022-04-28 03:37:06,785 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 162 transitions. Word has length 155 [2022-04-28 03:37:06,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:37:06,785 INFO L495 AbstractCegarLoop]: Abstraction has 160 states and 162 transitions. [2022-04-28 03:37:06,785 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 101 states, 100 states have (on average 1.51) internal successors, (151), 99 states have internal predecessors, (151), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:06,785 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 160 states and 162 transitions. [2022-04-28 03:37:07,011 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:07,011 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 162 transitions. [2022-04-28 03:37:07,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2022-04-28 03:37:07,011 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:37:07,012 INFO L195 NwaCegarLoop]: trace histogram [49, 49, 48, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:37:07,030 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Forceful destruction successful, exit code 0 [2022-04-28 03:37:07,212 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 48 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2022-04-28 03:37:07,212 INFO L420 AbstractCegarLoop]: === Iteration 51 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:37:07,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:37:07,212 INFO L85 PathProgramCache]: Analyzing trace with hash 272626701, now seen corresponding path program 48 times [2022-04-28 03:37:07,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:07,212 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [121179926] [2022-04-28 03:37:07,876 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:37:08,280 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:37:08,281 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:37:08,283 INFO L85 PathProgramCache]: Analyzing trace with hash -1852564817, now seen corresponding path program 1 times [2022-04-28 03:37:08,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:37:08,283 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1334760983] [2022-04-28 03:37:08,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:08,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:37:08,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:08,323 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:37:08,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:08,352 INFO L290 TraceCheckUtils]: 0: Hoare triple {35627#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {35620#true} is VALID [2022-04-28 03:37:08,352 INFO L290 TraceCheckUtils]: 1: Hoare triple {35620#true} assume true; {35620#true} is VALID [2022-04-28 03:37:08,352 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {35620#true} {35620#true} #41#return; {35620#true} is VALID [2022-04-28 03:37:08,353 INFO L272 TraceCheckUtils]: 0: Hoare triple {35620#true} call ULTIMATE.init(); {35627#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:37:08,353 INFO L290 TraceCheckUtils]: 1: Hoare triple {35627#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {35620#true} is VALID [2022-04-28 03:37:08,353 INFO L290 TraceCheckUtils]: 2: Hoare triple {35620#true} assume true; {35620#true} is VALID [2022-04-28 03:37:08,353 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35620#true} {35620#true} #41#return; {35620#true} is VALID [2022-04-28 03:37:08,353 INFO L272 TraceCheckUtils]: 4: Hoare triple {35620#true} call #t~ret7 := main(); {35620#true} is VALID [2022-04-28 03:37:08,353 INFO L290 TraceCheckUtils]: 5: Hoare triple {35620#true} ~x~0 := 0;~y~0 := 0; {35625#(= main_~x~0 0)} is VALID [2022-04-28 03:37:08,354 INFO L290 TraceCheckUtils]: 6: Hoare triple {35625#(= main_~x~0 0)} [237] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1943 4294967296))) (let ((.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_668| |v_main_#t~post6_666|)) (.cse1 (= v_main_~x~0_1943 v_main_~x~0_1942)) (.cse2 (= |v_main_#t~post5_333| |v_main_#t~post5_332|))) (or (and .cse0 .cse1 (= v_main_~y~0_1990 v_main_~y~0_1989) .cse2) (and .cse3 .cse4 (= (+ v_main_~x~0_1942 v_main_~y~0_1989) (+ v_main_~x~0_1943 v_main_~y~0_1990)) (< v_main_~y~0_1989 v_main_~y~0_1990) (<= (div (+ (* (- 1) v_main_~y~0_1990) (* (- 1) v_main_~x~0_1943) 1000000 v_main_~y~0_1989) (- 4294967296)) (+ (div (+ v_main_~x~0_1943 (- 4294967295)) 4294967296) 1))) (and (or (not .cse3) (not .cse4)) .cse0 (= v_main_~y~0_1989 v_main_~y~0_1990) .cse1 .cse2)))) InVars {main_~y~0=v_main_~y~0_1990, main_#t~post5=|v_main_#t~post5_333|, main_~x~0=v_main_~x~0_1943, main_#t~post6=|v_main_#t~post6_668|} OutVars{main_#t~post5=|v_main_#t~post5_332|, main_~y~0=v_main_~y~0_1989, main_~x~0=v_main_~x~0_1942, main_#t~post6=|v_main_#t~post6_666|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {35625#(= main_~x~0 0)} is VALID [2022-04-28 03:37:08,354 INFO L290 TraceCheckUtils]: 7: Hoare triple {35625#(= main_~x~0 0)} [238] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35625#(= main_~x~0 0)} is VALID [2022-04-28 03:37:08,355 INFO L290 TraceCheckUtils]: 8: Hoare triple {35625#(= main_~x~0 0)} [239] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_1945 v_main_~x~0_1944)) (.cse2 (= v_main_~y~0_1992 v_main_~y~0_1991)) (.cse3 (= |v_main_#t~post4_338| |v_main_#t~post4_337|)) (.cse4 (= |v_main_#t~post6_671| |v_main_#t~post6_667|)) (.cse0 (mod v_main_~x~0_1945 4294967296))) (or (and (= (+ v_main_~x~0_1944 v_main_~y~0_1992) (+ v_main_~x~0_1945 v_main_~y~0_1991)) (< v_main_~x~0_1945 v_main_~x~0_1944) (<= (div (+ (* (- 1) v_main_~x~0_1944) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1945 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_338|, main_~y~0=v_main_~y~0_1992, main_~x~0=v_main_~x~0_1945, main_#t~post6=|v_main_#t~post6_671|} OutVars{main_#t~post4=|v_main_#t~post4_337|, main_~y~0=v_main_~y~0_1991, main_~x~0=v_main_~x~0_1944, main_#t~post6=|v_main_#t~post6_667|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {35626#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:37:08,355 INFO L290 TraceCheckUtils]: 9: Hoare triple {35626#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [236] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {35621#false} is VALID [2022-04-28 03:37:08,356 INFO L272 TraceCheckUtils]: 10: Hoare triple {35621#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {35621#false} is VALID [2022-04-28 03:37:08,356 INFO L290 TraceCheckUtils]: 11: Hoare triple {35621#false} ~cond := #in~cond; {35621#false} is VALID [2022-04-28 03:37:08,356 INFO L290 TraceCheckUtils]: 12: Hoare triple {35621#false} assume 0 == ~cond; {35621#false} is VALID [2022-04-28 03:37:08,356 INFO L290 TraceCheckUtils]: 13: Hoare triple {35621#false} assume !false; {35621#false} is VALID [2022-04-28 03:37:08,356 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:08,356 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:37:08,356 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1334760983] [2022-04-28 03:37:08,356 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1334760983] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:37:08,356 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1385523154] [2022-04-28 03:37:08,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:08,356 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:37:08,356 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:37:08,380 INFO L229 MonitoredProcess]: Starting monitored process 49 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:37:08,413 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2022-04-28 03:37:08,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:08,426 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:37:08,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:08,433 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:37:08,597 INFO L272 TraceCheckUtils]: 0: Hoare triple {35620#true} call ULTIMATE.init(); {35620#true} is VALID [2022-04-28 03:37:08,597 INFO L290 TraceCheckUtils]: 1: Hoare triple {35620#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {35620#true} is VALID [2022-04-28 03:37:08,597 INFO L290 TraceCheckUtils]: 2: Hoare triple {35620#true} assume true; {35620#true} is VALID [2022-04-28 03:37:08,598 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35620#true} {35620#true} #41#return; {35620#true} is VALID [2022-04-28 03:37:08,598 INFO L272 TraceCheckUtils]: 4: Hoare triple {35620#true} call #t~ret7 := main(); {35620#true} is VALID [2022-04-28 03:37:08,598 INFO L290 TraceCheckUtils]: 5: Hoare triple {35620#true} ~x~0 := 0;~y~0 := 0; {35646#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:08,599 INFO L290 TraceCheckUtils]: 6: Hoare triple {35646#(and (= main_~x~0 0) (= main_~y~0 0))} [237] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1943 4294967296))) (let ((.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_668| |v_main_#t~post6_666|)) (.cse1 (= v_main_~x~0_1943 v_main_~x~0_1942)) (.cse2 (= |v_main_#t~post5_333| |v_main_#t~post5_332|))) (or (and .cse0 .cse1 (= v_main_~y~0_1990 v_main_~y~0_1989) .cse2) (and .cse3 .cse4 (= (+ v_main_~x~0_1942 v_main_~y~0_1989) (+ v_main_~x~0_1943 v_main_~y~0_1990)) (< v_main_~y~0_1989 v_main_~y~0_1990) (<= (div (+ (* (- 1) v_main_~y~0_1990) (* (- 1) v_main_~x~0_1943) 1000000 v_main_~y~0_1989) (- 4294967296)) (+ (div (+ v_main_~x~0_1943 (- 4294967295)) 4294967296) 1))) (and (or (not .cse3) (not .cse4)) .cse0 (= v_main_~y~0_1989 v_main_~y~0_1990) .cse1 .cse2)))) InVars {main_~y~0=v_main_~y~0_1990, main_#t~post5=|v_main_#t~post5_333|, main_~x~0=v_main_~x~0_1943, main_#t~post6=|v_main_#t~post6_668|} OutVars{main_#t~post5=|v_main_#t~post5_332|, main_~y~0=v_main_~y~0_1989, main_~x~0=v_main_~x~0_1942, main_#t~post6=|v_main_#t~post6_666|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {35646#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:08,599 INFO L290 TraceCheckUtils]: 7: Hoare triple {35646#(and (= main_~x~0 0) (= main_~y~0 0))} [238] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35646#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:08,600 INFO L290 TraceCheckUtils]: 8: Hoare triple {35646#(and (= main_~x~0 0) (= main_~y~0 0))} [239] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_1945 v_main_~x~0_1944)) (.cse2 (= v_main_~y~0_1992 v_main_~y~0_1991)) (.cse3 (= |v_main_#t~post4_338| |v_main_#t~post4_337|)) (.cse4 (= |v_main_#t~post6_671| |v_main_#t~post6_667|)) (.cse0 (mod v_main_~x~0_1945 4294967296))) (or (and (= (+ v_main_~x~0_1944 v_main_~y~0_1992) (+ v_main_~x~0_1945 v_main_~y~0_1991)) (< v_main_~x~0_1945 v_main_~x~0_1944) (<= (div (+ (* (- 1) v_main_~x~0_1944) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1945 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_338|, main_~y~0=v_main_~y~0_1992, main_~x~0=v_main_~x~0_1945, main_#t~post6=|v_main_#t~post6_671|} OutVars{main_#t~post4=|v_main_#t~post4_337|, main_~y~0=v_main_~y~0_1991, main_~x~0=v_main_~x~0_1944, main_#t~post6=|v_main_#t~post6_667|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {35656#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:37:08,600 INFO L290 TraceCheckUtils]: 9: Hoare triple {35656#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [236] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {35621#false} is VALID [2022-04-28 03:37:08,601 INFO L272 TraceCheckUtils]: 10: Hoare triple {35621#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {35621#false} is VALID [2022-04-28 03:37:08,601 INFO L290 TraceCheckUtils]: 11: Hoare triple {35621#false} ~cond := #in~cond; {35621#false} is VALID [2022-04-28 03:37:08,601 INFO L290 TraceCheckUtils]: 12: Hoare triple {35621#false} assume 0 == ~cond; {35621#false} is VALID [2022-04-28 03:37:08,601 INFO L290 TraceCheckUtils]: 13: Hoare triple {35621#false} assume !false; {35621#false} is VALID [2022-04-28 03:37:08,601 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:08,601 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:37:09,380 INFO L290 TraceCheckUtils]: 13: Hoare triple {35621#false} assume !false; {35621#false} is VALID [2022-04-28 03:37:09,381 INFO L290 TraceCheckUtils]: 12: Hoare triple {35675#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {35621#false} is VALID [2022-04-28 03:37:09,381 INFO L290 TraceCheckUtils]: 11: Hoare triple {35679#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {35675#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:37:09,381 INFO L272 TraceCheckUtils]: 10: Hoare triple {35683#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {35679#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:37:09,382 INFO L290 TraceCheckUtils]: 9: Hoare triple {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [236] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {35683#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:37:09,394 INFO L290 TraceCheckUtils]: 8: Hoare triple {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [239] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~x~0_1945 v_main_~x~0_1944)) (.cse2 (= v_main_~y~0_1992 v_main_~y~0_1991)) (.cse3 (= |v_main_#t~post4_338| |v_main_#t~post4_337|)) (.cse4 (= |v_main_#t~post6_671| |v_main_#t~post6_667|)) (.cse0 (mod v_main_~x~0_1945 4294967296))) (or (and (= (+ v_main_~x~0_1944 v_main_~y~0_1992) (+ v_main_~x~0_1945 v_main_~y~0_1991)) (< v_main_~x~0_1945 v_main_~x~0_1944) (<= (div (+ (* (- 1) v_main_~x~0_1944) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_1945 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 .cse3 .cse4 (<= 500000 .cse0)))) InVars {main_#t~post4=|v_main_#t~post4_338|, main_~y~0=v_main_~y~0_1992, main_~x~0=v_main_~x~0_1945, main_#t~post6=|v_main_#t~post6_671|} OutVars{main_#t~post4=|v_main_#t~post4_337|, main_~y~0=v_main_~y~0_1991, main_~x~0=v_main_~x~0_1944, main_#t~post6=|v_main_#t~post6_667|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:09,394 INFO L290 TraceCheckUtils]: 7: Hoare triple {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [238] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:09,403 INFO L290 TraceCheckUtils]: 6: Hoare triple {35697#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2002_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2002_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2002_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [237] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_1943 4294967296))) (let ((.cse3 (< .cse5 1000000)) (.cse4 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_668| |v_main_#t~post6_666|)) (.cse1 (= v_main_~x~0_1943 v_main_~x~0_1942)) (.cse2 (= |v_main_#t~post5_333| |v_main_#t~post5_332|))) (or (and .cse0 .cse1 (= v_main_~y~0_1990 v_main_~y~0_1989) .cse2) (and .cse3 .cse4 (= (+ v_main_~x~0_1942 v_main_~y~0_1989) (+ v_main_~x~0_1943 v_main_~y~0_1990)) (< v_main_~y~0_1989 v_main_~y~0_1990) (<= (div (+ (* (- 1) v_main_~y~0_1990) (* (- 1) v_main_~x~0_1943) 1000000 v_main_~y~0_1989) (- 4294967296)) (+ (div (+ v_main_~x~0_1943 (- 4294967295)) 4294967296) 1))) (and (or (not .cse3) (not .cse4)) .cse0 (= v_main_~y~0_1989 v_main_~y~0_1990) .cse1 .cse2)))) InVars {main_~y~0=v_main_~y~0_1990, main_#t~post5=|v_main_#t~post5_333|, main_~x~0=v_main_~x~0_1943, main_#t~post6=|v_main_#t~post6_668|} OutVars{main_#t~post5=|v_main_#t~post5_332|, main_~y~0=v_main_~y~0_1989, main_~x~0=v_main_~x~0_1942, main_#t~post6=|v_main_#t~post6_666|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {35687#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:09,404 INFO L290 TraceCheckUtils]: 5: Hoare triple {35620#true} ~x~0 := 0;~y~0 := 0; {35697#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2002_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2002_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2002_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:37:09,404 INFO L272 TraceCheckUtils]: 4: Hoare triple {35620#true} call #t~ret7 := main(); {35620#true} is VALID [2022-04-28 03:37:09,404 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35620#true} {35620#true} #41#return; {35620#true} is VALID [2022-04-28 03:37:09,404 INFO L290 TraceCheckUtils]: 2: Hoare triple {35620#true} assume true; {35620#true} is VALID [2022-04-28 03:37:09,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {35620#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {35620#true} is VALID [2022-04-28 03:37:09,404 INFO L272 TraceCheckUtils]: 0: Hoare triple {35620#true} call ULTIMATE.init(); {35620#true} is VALID [2022-04-28 03:37:09,404 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:09,404 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1385523154] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:37:09,404 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:37:09,404 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:37:12,524 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:37:12,524 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [121179926] [2022-04-28 03:37:12,525 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [121179926] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:37:12,525 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:37:12,525 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [52] imperfect sequences [] total 52 [2022-04-28 03:37:12,525 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667775237] [2022-04-28 03:37:12,525 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:37:12,525 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 158 [2022-04-28 03:37:12,525 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:37:12,525 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:12,605 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:12,605 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 52 states [2022-04-28 03:37:12,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:12,605 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2022-04-28 03:37:12,605 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=274, Invalid=3266, Unknown=0, NotChecked=0, Total=3540 [2022-04-28 03:37:12,605 INFO L87 Difference]: Start difference. First operand 160 states and 162 transitions. Second operand has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:20,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:20,578 INFO L93 Difference]: Finished difference Result 172 states and 176 transitions. [2022-04-28 03:37:20,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2022-04-28 03:37:20,578 INFO L78 Accepts]: Start accepts. Automaton has has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 158 [2022-04-28 03:37:20,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:37:20,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:20,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 172 transitions. [2022-04-28 03:37:20,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:20,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 172 transitions. [2022-04-28 03:37:20,580 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 172 transitions. [2022-04-28 03:37:20,663 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:20,665 INFO L225 Difference]: With dead ends: 172 [2022-04-28 03:37:20,665 INFO L226 Difference]: Without dead ends: 164 [2022-04-28 03:37:20,665 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 29 SyntacticMatches, 99 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2119 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=617, Invalid=11155, Unknown=0, NotChecked=0, Total=11772 [2022-04-28 03:37:20,666 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 108 mSDsluCounter, 247 mSDsCounter, 0 mSdLazyCounter, 7547 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 259 SdHoareTripleChecker+Invalid, 7598 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 7547 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:37:20,666 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [108 Valid, 259 Invalid, 7598 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 7547 Invalid, 0 Unknown, 0 Unchecked, 4.0s Time] [2022-04-28 03:37:20,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2022-04-28 03:37:20,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 163. [2022-04-28 03:37:20,821 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:37:20,821 INFO L82 GeneralOperation]: Start isEquivalent. First operand 164 states. Second operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:20,821 INFO L74 IsIncluded]: Start isIncluded. First operand 164 states. Second operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:20,822 INFO L87 Difference]: Start difference. First operand 164 states. Second operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:20,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:20,823 INFO L93 Difference]: Finished difference Result 164 states and 166 transitions. [2022-04-28 03:37:20,823 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 166 transitions. [2022-04-28 03:37:20,823 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:20,823 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:20,823 INFO L74 IsIncluded]: Start isIncluded. First operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 164 states. [2022-04-28 03:37:20,823 INFO L87 Difference]: Start difference. First operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 164 states. [2022-04-28 03:37:20,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:20,825 INFO L93 Difference]: Finished difference Result 164 states and 166 transitions. [2022-04-28 03:37:20,825 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 166 transitions. [2022-04-28 03:37:20,825 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:20,825 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:20,825 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:37:20,825 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:37:20,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 163 states, 158 states have (on average 1.018987341772152) internal successors, (161), 158 states have internal predecessors, (161), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:20,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 165 transitions. [2022-04-28 03:37:20,827 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 165 transitions. Word has length 158 [2022-04-28 03:37:20,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:37:20,827 INFO L495 AbstractCegarLoop]: Abstraction has 163 states and 165 transitions. [2022-04-28 03:37:20,827 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 52 states, 52 states have (on average 2.9615384615384617) internal successors, (154), 51 states have internal predecessors, (154), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:20,827 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 163 states and 165 transitions. [2022-04-28 03:37:21,032 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 165 edges. 165 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:21,032 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 165 transitions. [2022-04-28 03:37:21,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2022-04-28 03:37:21,032 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:37:21,032 INFO L195 NwaCegarLoop]: trace histogram [50, 50, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:37:21,050 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Forceful destruction successful, exit code 0 [2022-04-28 03:37:21,238 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,49 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:37:21,238 INFO L420 AbstractCegarLoop]: === Iteration 52 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:37:21,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:37:21,238 INFO L85 PathProgramCache]: Analyzing trace with hash 496753477, now seen corresponding path program 49 times [2022-04-28 03:37:21,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:21,238 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [178690945] [2022-04-28 03:37:25,035 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:37:25,270 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:37:26,228 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:37:26,230 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:37:26,232 INFO L85 PathProgramCache]: Analyzing trace with hash 196967343, now seen corresponding path program 1 times [2022-04-28 03:37:26,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:37:26,232 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271109688] [2022-04-28 03:37:26,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:26,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:37:26,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:26,312 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:37:26,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:26,315 INFO L290 TraceCheckUtils]: 0: Hoare triple {36869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {36862#true} is VALID [2022-04-28 03:37:26,315 INFO L290 TraceCheckUtils]: 1: Hoare triple {36862#true} assume true; {36862#true} is VALID [2022-04-28 03:37:26,315 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36862#true} {36862#true} #41#return; {36862#true} is VALID [2022-04-28 03:37:26,316 INFO L272 TraceCheckUtils]: 0: Hoare triple {36862#true} call ULTIMATE.init(); {36869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:37:26,316 INFO L290 TraceCheckUtils]: 1: Hoare triple {36869#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {36862#true} is VALID [2022-04-28 03:37:26,316 INFO L290 TraceCheckUtils]: 2: Hoare triple {36862#true} assume true; {36862#true} is VALID [2022-04-28 03:37:26,316 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36862#true} {36862#true} #41#return; {36862#true} is VALID [2022-04-28 03:37:26,316 INFO L272 TraceCheckUtils]: 4: Hoare triple {36862#true} call #t~ret7 := main(); {36862#true} is VALID [2022-04-28 03:37:26,316 INFO L290 TraceCheckUtils]: 5: Hoare triple {36862#true} ~x~0 := 0;~y~0 := 0; {36867#(= main_~x~0 0)} is VALID [2022-04-28 03:37:26,317 INFO L290 TraceCheckUtils]: 6: Hoare triple {36867#(= main_~x~0 0)} [241] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2008 4294967296))) (let ((.cse0 (= v_main_~x~0_2008 v_main_~x~0_2007)) (.cse1 (= v_main_~y~0_2056 v_main_~y~0_2055)) (.cse2 (= |v_main_#t~post6_682| |v_main_#t~post6_680|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 (= |v_main_#t~post5_339| |v_main_#t~post5_340|) .cse1 .cse2 (or (not .cse3) (not .cse4))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post5_340| |v_main_#t~post5_339|)) (and (<= (div (+ (* (- 1) v_main_~y~0_2056) 1000000 v_main_~y~0_2055 (* (- 1) v_main_~x~0_2008)) (- 4294967296)) (+ (div (+ v_main_~x~0_2008 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_2055 v_main_~y~0_2056) .cse3 (= (+ v_main_~x~0_2008 v_main_~y~0_2056) (+ v_main_~x~0_2007 v_main_~y~0_2055)))))) InVars {main_~y~0=v_main_~y~0_2056, main_#t~post5=|v_main_#t~post5_340|, main_~x~0=v_main_~x~0_2008, main_#t~post6=|v_main_#t~post6_682|} OutVars{main_#t~post5=|v_main_#t~post5_339|, main_~y~0=v_main_~y~0_2055, main_~x~0=v_main_~x~0_2007, main_#t~post6=|v_main_#t~post6_680|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {36867#(= main_~x~0 0)} is VALID [2022-04-28 03:37:26,317 INFO L290 TraceCheckUtils]: 7: Hoare triple {36867#(= main_~x~0 0)} [242] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36867#(= main_~x~0 0)} is VALID [2022-04-28 03:37:26,318 INFO L290 TraceCheckUtils]: 8: Hoare triple {36867#(= main_~x~0 0)} [243] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_685| |v_main_#t~post6_681|)) (.cse2 (= v_main_~y~0_2058 v_main_~y~0_2057)) (.cse3 (= |v_main_#t~post4_345| |v_main_#t~post4_344|)) (.cse1 (mod v_main_~x~0_2010 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= v_main_~x~0_2009 v_main_~x~0_2010)) (and .cse0 .cse2 .cse3 (= v_main_~x~0_2010 v_main_~x~0_2009)) (and (< v_main_~x~0_2010 v_main_~x~0_2009) (< .cse1 500000) (= (+ v_main_~x~0_2010 v_main_~y~0_2057) (+ v_main_~x~0_2009 v_main_~y~0_2058)) (<= (div (+ (* (- 1) v_main_~x~0_2009) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2010 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_345|, main_~y~0=v_main_~y~0_2058, main_~x~0=v_main_~x~0_2010, main_#t~post6=|v_main_#t~post6_685|} OutVars{main_#t~post4=|v_main_#t~post4_344|, main_~y~0=v_main_~y~0_2057, main_~x~0=v_main_~x~0_2009, main_#t~post6=|v_main_#t~post6_681|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {36868#(or (= main_~x~0 0) (and (<= main_~x~0 500000) (< 0 main_~x~0)))} is VALID [2022-04-28 03:37:26,319 INFO L290 TraceCheckUtils]: 9: Hoare triple {36868#(or (= main_~x~0 0) (and (<= main_~x~0 500000) (< 0 main_~x~0)))} [240] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {36863#false} is VALID [2022-04-28 03:37:26,319 INFO L272 TraceCheckUtils]: 10: Hoare triple {36863#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {36863#false} is VALID [2022-04-28 03:37:26,319 INFO L290 TraceCheckUtils]: 11: Hoare triple {36863#false} ~cond := #in~cond; {36863#false} is VALID [2022-04-28 03:37:26,319 INFO L290 TraceCheckUtils]: 12: Hoare triple {36863#false} assume 0 == ~cond; {36863#false} is VALID [2022-04-28 03:37:26,319 INFO L290 TraceCheckUtils]: 13: Hoare triple {36863#false} assume !false; {36863#false} is VALID [2022-04-28 03:37:26,319 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:26,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:37:26,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271109688] [2022-04-28 03:37:26,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1271109688] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:37:26,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [388381649] [2022-04-28 03:37:26,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:26,320 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:37:26,320 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:37:26,321 INFO L229 MonitoredProcess]: Starting monitored process 50 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:37:26,322 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2022-04-28 03:37:26,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:26,350 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:37:26,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:26,359 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:37:26,538 INFO L272 TraceCheckUtils]: 0: Hoare triple {36862#true} call ULTIMATE.init(); {36862#true} is VALID [2022-04-28 03:37:26,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {36862#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {36862#true} is VALID [2022-04-28 03:37:26,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {36862#true} assume true; {36862#true} is VALID [2022-04-28 03:37:26,538 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36862#true} {36862#true} #41#return; {36862#true} is VALID [2022-04-28 03:37:26,538 INFO L272 TraceCheckUtils]: 4: Hoare triple {36862#true} call #t~ret7 := main(); {36862#true} is VALID [2022-04-28 03:37:26,538 INFO L290 TraceCheckUtils]: 5: Hoare triple {36862#true} ~x~0 := 0;~y~0 := 0; {36888#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:26,539 INFO L290 TraceCheckUtils]: 6: Hoare triple {36888#(and (= main_~x~0 0) (= main_~y~0 0))} [241] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2008 4294967296))) (let ((.cse0 (= v_main_~x~0_2008 v_main_~x~0_2007)) (.cse1 (= v_main_~y~0_2056 v_main_~y~0_2055)) (.cse2 (= |v_main_#t~post6_682| |v_main_#t~post6_680|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 (= |v_main_#t~post5_339| |v_main_#t~post5_340|) .cse1 .cse2 (or (not .cse3) (not .cse4))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post5_340| |v_main_#t~post5_339|)) (and (<= (div (+ (* (- 1) v_main_~y~0_2056) 1000000 v_main_~y~0_2055 (* (- 1) v_main_~x~0_2008)) (- 4294967296)) (+ (div (+ v_main_~x~0_2008 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_2055 v_main_~y~0_2056) .cse3 (= (+ v_main_~x~0_2008 v_main_~y~0_2056) (+ v_main_~x~0_2007 v_main_~y~0_2055)))))) InVars {main_~y~0=v_main_~y~0_2056, main_#t~post5=|v_main_#t~post5_340|, main_~x~0=v_main_~x~0_2008, main_#t~post6=|v_main_#t~post6_682|} OutVars{main_#t~post5=|v_main_#t~post5_339|, main_~y~0=v_main_~y~0_2055, main_~x~0=v_main_~x~0_2007, main_#t~post6=|v_main_#t~post6_680|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {36888#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:26,539 INFO L290 TraceCheckUtils]: 7: Hoare triple {36888#(and (= main_~x~0 0) (= main_~y~0 0))} [242] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36888#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:26,540 INFO L290 TraceCheckUtils]: 8: Hoare triple {36888#(and (= main_~x~0 0) (= main_~y~0 0))} [243] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_685| |v_main_#t~post6_681|)) (.cse2 (= v_main_~y~0_2058 v_main_~y~0_2057)) (.cse3 (= |v_main_#t~post4_345| |v_main_#t~post4_344|)) (.cse1 (mod v_main_~x~0_2010 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= v_main_~x~0_2009 v_main_~x~0_2010)) (and .cse0 .cse2 .cse3 (= v_main_~x~0_2010 v_main_~x~0_2009)) (and (< v_main_~x~0_2010 v_main_~x~0_2009) (< .cse1 500000) (= (+ v_main_~x~0_2010 v_main_~y~0_2057) (+ v_main_~x~0_2009 v_main_~y~0_2058)) (<= (div (+ (* (- 1) v_main_~x~0_2009) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2010 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_345|, main_~y~0=v_main_~y~0_2058, main_~x~0=v_main_~x~0_2010, main_#t~post6=|v_main_#t~post6_685|} OutVars{main_#t~post4=|v_main_#t~post4_344|, main_~y~0=v_main_~y~0_2057, main_~x~0=v_main_~x~0_2009, main_#t~post6=|v_main_#t~post6_681|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {36898#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:37:26,541 INFO L290 TraceCheckUtils]: 9: Hoare triple {36898#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [240] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {36863#false} is VALID [2022-04-28 03:37:26,541 INFO L272 TraceCheckUtils]: 10: Hoare triple {36863#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {36863#false} is VALID [2022-04-28 03:37:26,541 INFO L290 TraceCheckUtils]: 11: Hoare triple {36863#false} ~cond := #in~cond; {36863#false} is VALID [2022-04-28 03:37:26,541 INFO L290 TraceCheckUtils]: 12: Hoare triple {36863#false} assume 0 == ~cond; {36863#false} is VALID [2022-04-28 03:37:26,541 INFO L290 TraceCheckUtils]: 13: Hoare triple {36863#false} assume !false; {36863#false} is VALID [2022-04-28 03:37:26,542 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:26,542 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:37:27,317 INFO L290 TraceCheckUtils]: 13: Hoare triple {36863#false} assume !false; {36863#false} is VALID [2022-04-28 03:37:27,318 INFO L290 TraceCheckUtils]: 12: Hoare triple {36917#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {36863#false} is VALID [2022-04-28 03:37:27,318 INFO L290 TraceCheckUtils]: 11: Hoare triple {36921#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {36917#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:37:27,318 INFO L272 TraceCheckUtils]: 10: Hoare triple {36925#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {36921#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:37:27,319 INFO L290 TraceCheckUtils]: 9: Hoare triple {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [240] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {36925#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:37:27,321 INFO L290 TraceCheckUtils]: 8: Hoare triple {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [243] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post6_685| |v_main_#t~post6_681|)) (.cse2 (= v_main_~y~0_2058 v_main_~y~0_2057)) (.cse3 (= |v_main_#t~post4_345| |v_main_#t~post4_344|)) (.cse1 (mod v_main_~x~0_2010 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 .cse3 (= v_main_~x~0_2009 v_main_~x~0_2010)) (and .cse0 .cse2 .cse3 (= v_main_~x~0_2010 v_main_~x~0_2009)) (and (< v_main_~x~0_2010 v_main_~x~0_2009) (< .cse1 500000) (= (+ v_main_~x~0_2010 v_main_~y~0_2057) (+ v_main_~x~0_2009 v_main_~y~0_2058)) (<= (div (+ (* (- 1) v_main_~x~0_2009) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2010 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_345|, main_~y~0=v_main_~y~0_2058, main_~x~0=v_main_~x~0_2010, main_#t~post6=|v_main_#t~post6_685|} OutVars{main_#t~post4=|v_main_#t~post4_344|, main_~y~0=v_main_~y~0_2057, main_~x~0=v_main_~x~0_2009, main_#t~post6=|v_main_#t~post6_681|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:27,321 INFO L290 TraceCheckUtils]: 7: Hoare triple {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [242] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:27,346 INFO L290 TraceCheckUtils]: 6: Hoare triple {36939#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2068_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2068_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2068_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [241] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2008 4294967296))) (let ((.cse0 (= v_main_~x~0_2008 v_main_~x~0_2007)) (.cse1 (= v_main_~y~0_2056 v_main_~y~0_2055)) (.cse2 (= |v_main_#t~post6_682| |v_main_#t~post6_680|)) (.cse4 (< .cse5 1000000)) (.cse3 (<= 500000 .cse5))) (or (and .cse0 (= |v_main_#t~post5_339| |v_main_#t~post5_340|) .cse1 .cse2 (or (not .cse3) (not .cse4))) (and .cse0 .cse1 .cse2 (= |v_main_#t~post5_340| |v_main_#t~post5_339|)) (and (<= (div (+ (* (- 1) v_main_~y~0_2056) 1000000 v_main_~y~0_2055 (* (- 1) v_main_~x~0_2008)) (- 4294967296)) (+ (div (+ v_main_~x~0_2008 (- 4294967295)) 4294967296) 1)) .cse4 (< v_main_~y~0_2055 v_main_~y~0_2056) .cse3 (= (+ v_main_~x~0_2008 v_main_~y~0_2056) (+ v_main_~x~0_2007 v_main_~y~0_2055)))))) InVars {main_~y~0=v_main_~y~0_2056, main_#t~post5=|v_main_#t~post5_340|, main_~x~0=v_main_~x~0_2008, main_#t~post6=|v_main_#t~post6_682|} OutVars{main_#t~post5=|v_main_#t~post5_339|, main_~y~0=v_main_~y~0_2055, main_~x~0=v_main_~x~0_2007, main_#t~post6=|v_main_#t~post6_680|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {36929#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:27,347 INFO L290 TraceCheckUtils]: 5: Hoare triple {36862#true} ~x~0 := 0;~y~0 := 0; {36939#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2068_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2068_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2068_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:37:27,347 INFO L272 TraceCheckUtils]: 4: Hoare triple {36862#true} call #t~ret7 := main(); {36862#true} is VALID [2022-04-28 03:37:27,347 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36862#true} {36862#true} #41#return; {36862#true} is VALID [2022-04-28 03:37:27,347 INFO L290 TraceCheckUtils]: 2: Hoare triple {36862#true} assume true; {36862#true} is VALID [2022-04-28 03:37:27,347 INFO L290 TraceCheckUtils]: 1: Hoare triple {36862#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {36862#true} is VALID [2022-04-28 03:37:27,347 INFO L272 TraceCheckUtils]: 0: Hoare triple {36862#true} call ULTIMATE.init(); {36862#true} is VALID [2022-04-28 03:37:27,347 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:27,347 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [388381649] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:37:27,347 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:37:27,347 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:37:30,133 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:37:30,133 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [178690945] [2022-04-28 03:37:30,133 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [178690945] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:37:30,133 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:37:30,133 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [53] imperfect sequences [] total 53 [2022-04-28 03:37:30,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735237774] [2022-04-28 03:37:30,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:37:30,134 INFO L78 Accepts]: Start accepts. Automaton has has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 161 [2022-04-28 03:37:30,134 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:37:30,134 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:30,202 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:30,202 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 53 states [2022-04-28 03:37:30,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:30,203 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2022-04-28 03:37:30,203 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=279, Invalid=3381, Unknown=0, NotChecked=0, Total=3660 [2022-04-28 03:37:30,203 INFO L87 Difference]: Start difference. First operand 163 states and 165 transitions. Second operand has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:38,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:38,951 INFO L93 Difference]: Finished difference Result 175 states and 179 transitions. [2022-04-28 03:37:38,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2022-04-28 03:37:38,951 INFO L78 Accepts]: Start accepts. Automaton has has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 161 [2022-04-28 03:37:38,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:37:38,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:38,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 175 transitions. [2022-04-28 03:37:38,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:38,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 175 transitions. [2022-04-28 03:37:38,953 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 53 states and 175 transitions. [2022-04-28 03:37:39,103 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 175 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:39,104 INFO L225 Difference]: With dead ends: 175 [2022-04-28 03:37:39,105 INFO L226 Difference]: Without dead ends: 167 [2022-04-28 03:37:39,105 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 239 GetRequests, 29 SyntacticMatches, 101 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2187 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=629, Invalid=11581, Unknown=0, NotChecked=0, Total=12210 [2022-04-28 03:37:39,106 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 110 mSDsluCounter, 252 mSDsCounter, 0 mSdLazyCounter, 7851 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 264 SdHoareTripleChecker+Invalid, 7903 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 7851 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:37:39,107 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [110 Valid, 264 Invalid, 7903 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 7851 Invalid, 0 Unknown, 0 Unchecked, 4.4s Time] [2022-04-28 03:37:39,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2022-04-28 03:37:39,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 166. [2022-04-28 03:37:39,350 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:37:39,350 INFO L82 GeneralOperation]: Start isEquivalent. First operand 167 states. Second operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:39,350 INFO L74 IsIncluded]: Start isIncluded. First operand 167 states. Second operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:39,350 INFO L87 Difference]: Start difference. First operand 167 states. Second operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:39,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:39,352 INFO L93 Difference]: Finished difference Result 167 states and 169 transitions. [2022-04-28 03:37:39,352 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions. [2022-04-28 03:37:39,352 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:39,352 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:39,352 INFO L74 IsIncluded]: Start isIncluded. First operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 167 states. [2022-04-28 03:37:39,352 INFO L87 Difference]: Start difference. First operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 167 states. [2022-04-28 03:37:39,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:39,353 INFO L93 Difference]: Finished difference Result 167 states and 169 transitions. [2022-04-28 03:37:39,354 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions. [2022-04-28 03:37:39,354 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:39,354 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:39,354 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:37:39,354 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:37:39,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 166 states, 161 states have (on average 1.0186335403726707) internal successors, (164), 161 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:39,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 168 transitions. [2022-04-28 03:37:39,355 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 168 transitions. Word has length 161 [2022-04-28 03:37:39,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:37:39,356 INFO L495 AbstractCegarLoop]: Abstraction has 166 states and 168 transitions. [2022-04-28 03:37:39,356 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 53 states, 53 states have (on average 2.9622641509433962) internal successors, (157), 52 states have internal predecessors, (157), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:39,356 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 166 states and 168 transitions. [2022-04-28 03:37:39,608 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 168 edges. 168 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:39,609 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 168 transitions. [2022-04-28 03:37:39,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2022-04-28 03:37:39,609 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:37:39,609 INFO L195 NwaCegarLoop]: trace histogram [51, 51, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:37:39,626 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Forceful destruction successful, exit code 0 [2022-04-28 03:37:39,810 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 50 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable51 [2022-04-28 03:37:39,810 INFO L420 AbstractCegarLoop]: === Iteration 53 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:37:39,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:37:39,810 INFO L85 PathProgramCache]: Analyzing trace with hash -1216607987, now seen corresponding path program 50 times [2022-04-28 03:37:39,810 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:39,810 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1186875429] [2022-04-28 03:37:43,252 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:37:43,509 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:37:46,475 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:37:46,632 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:37:46,634 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:37:46,636 INFO L85 PathProgramCache]: Analyzing trace with hash -2048467793, now seen corresponding path program 1 times [2022-04-28 03:37:46,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:37:46,650 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834272675] [2022-04-28 03:37:46,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:46,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:37:46,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:46,706 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:37:46,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:46,714 INFO L290 TraceCheckUtils]: 0: Hoare triple {38132#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {38125#true} is VALID [2022-04-28 03:37:46,714 INFO L290 TraceCheckUtils]: 1: Hoare triple {38125#true} assume true; {38125#true} is VALID [2022-04-28 03:37:46,714 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {38125#true} {38125#true} #41#return; {38125#true} is VALID [2022-04-28 03:37:46,715 INFO L272 TraceCheckUtils]: 0: Hoare triple {38125#true} call ULTIMATE.init(); {38132#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:37:46,715 INFO L290 TraceCheckUtils]: 1: Hoare triple {38132#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {38125#true} is VALID [2022-04-28 03:37:46,715 INFO L290 TraceCheckUtils]: 2: Hoare triple {38125#true} assume true; {38125#true} is VALID [2022-04-28 03:37:46,715 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38125#true} {38125#true} #41#return; {38125#true} is VALID [2022-04-28 03:37:46,715 INFO L272 TraceCheckUtils]: 4: Hoare triple {38125#true} call #t~ret7 := main(); {38125#true} is VALID [2022-04-28 03:37:46,715 INFO L290 TraceCheckUtils]: 5: Hoare triple {38125#true} ~x~0 := 0;~y~0 := 0; {38130#(= main_~x~0 0)} is VALID [2022-04-28 03:37:46,716 INFO L290 TraceCheckUtils]: 6: Hoare triple {38130#(= main_~x~0 0)} [245] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2074 4294967296))) (let ((.cse0 (= |v_main_#t~post5_347| |v_main_#t~post5_346|)) (.cse1 (= v_main_~y~0_2123 v_main_~y~0_2122)) (.cse2 (= |v_main_#t~post6_696| |v_main_#t~post6_694|)) (.cse5 (= v_main_~x~0_2074 v_main_~x~0_2073)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (< v_main_~y~0_2122 v_main_~y~0_2123) (= (+ v_main_~x~0_2074 v_main_~y~0_2123) (+ v_main_~x~0_2073 v_main_~y~0_2122)) (<= (div (+ (* (- 1) v_main_~y~0_2123) 1000000 v_main_~y~0_2122 (* (- 1) v_main_~x~0_2074)) (- 4294967296)) (+ (div (+ v_main_~x~0_2074 (- 4294967295)) 4294967296) 1)) .cse3)))) InVars {main_~y~0=v_main_~y~0_2123, main_#t~post5=|v_main_#t~post5_347|, main_~x~0=v_main_~x~0_2074, main_#t~post6=|v_main_#t~post6_696|} OutVars{main_#t~post5=|v_main_#t~post5_346|, main_~y~0=v_main_~y~0_2122, main_~x~0=v_main_~x~0_2073, main_#t~post6=|v_main_#t~post6_694|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {38130#(= main_~x~0 0)} is VALID [2022-04-28 03:37:46,716 INFO L290 TraceCheckUtils]: 7: Hoare triple {38130#(= main_~x~0 0)} [246] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38130#(= main_~x~0 0)} is VALID [2022-04-28 03:37:46,717 INFO L290 TraceCheckUtils]: 8: Hoare triple {38130#(= main_~x~0 0)} [247] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2076 4294967296)) (.cse0 (= |v_main_#t~post6_699| |v_main_#t~post6_695|)) (.cse1 (= v_main_~x~0_2076 v_main_~x~0_2075)) (.cse2 (= |v_main_#t~post4_352| |v_main_#t~post4_351|)) (.cse3 (= v_main_~y~0_2125 v_main_~y~0_2124))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_2076 v_main_~x~0_2075) (<= (div (+ (* (- 1) v_main_~x~0_2075) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2076 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2075 v_main_~y~0_2125) (+ v_main_~x~0_2076 v_main_~y~0_2124))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_352|, main_~y~0=v_main_~y~0_2125, main_~x~0=v_main_~x~0_2076, main_#t~post6=|v_main_#t~post6_699|} OutVars{main_#t~post4=|v_main_#t~post4_351|, main_~y~0=v_main_~y~0_2124, main_~x~0=v_main_~x~0_2075, main_#t~post6=|v_main_#t~post6_695|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {38131#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:37:46,718 INFO L290 TraceCheckUtils]: 9: Hoare triple {38131#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [244] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {38126#false} is VALID [2022-04-28 03:37:46,718 INFO L272 TraceCheckUtils]: 10: Hoare triple {38126#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {38126#false} is VALID [2022-04-28 03:37:46,718 INFO L290 TraceCheckUtils]: 11: Hoare triple {38126#false} ~cond := #in~cond; {38126#false} is VALID [2022-04-28 03:37:46,718 INFO L290 TraceCheckUtils]: 12: Hoare triple {38126#false} assume 0 == ~cond; {38126#false} is VALID [2022-04-28 03:37:46,718 INFO L290 TraceCheckUtils]: 13: Hoare triple {38126#false} assume !false; {38126#false} is VALID [2022-04-28 03:37:46,718 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:46,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:37:46,718 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834272675] [2022-04-28 03:37:46,718 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834272675] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:37:46,718 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1739323016] [2022-04-28 03:37:46,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:46,719 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:37:46,719 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:37:46,720 INFO L229 MonitoredProcess]: Starting monitored process 51 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:37:46,720 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2022-04-28 03:37:46,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:46,748 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:37:46,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:46,756 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:37:46,923 INFO L272 TraceCheckUtils]: 0: Hoare triple {38125#true} call ULTIMATE.init(); {38125#true} is VALID [2022-04-28 03:37:46,923 INFO L290 TraceCheckUtils]: 1: Hoare triple {38125#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {38125#true} is VALID [2022-04-28 03:37:46,923 INFO L290 TraceCheckUtils]: 2: Hoare triple {38125#true} assume true; {38125#true} is VALID [2022-04-28 03:37:46,923 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38125#true} {38125#true} #41#return; {38125#true} is VALID [2022-04-28 03:37:46,923 INFO L272 TraceCheckUtils]: 4: Hoare triple {38125#true} call #t~ret7 := main(); {38125#true} is VALID [2022-04-28 03:37:46,923 INFO L290 TraceCheckUtils]: 5: Hoare triple {38125#true} ~x~0 := 0;~y~0 := 0; {38151#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:46,924 INFO L290 TraceCheckUtils]: 6: Hoare triple {38151#(and (= main_~x~0 0) (= main_~y~0 0))} [245] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2074 4294967296))) (let ((.cse0 (= |v_main_#t~post5_347| |v_main_#t~post5_346|)) (.cse1 (= v_main_~y~0_2123 v_main_~y~0_2122)) (.cse2 (= |v_main_#t~post6_696| |v_main_#t~post6_694|)) (.cse5 (= v_main_~x~0_2074 v_main_~x~0_2073)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (< v_main_~y~0_2122 v_main_~y~0_2123) (= (+ v_main_~x~0_2074 v_main_~y~0_2123) (+ v_main_~x~0_2073 v_main_~y~0_2122)) (<= (div (+ (* (- 1) v_main_~y~0_2123) 1000000 v_main_~y~0_2122 (* (- 1) v_main_~x~0_2074)) (- 4294967296)) (+ (div (+ v_main_~x~0_2074 (- 4294967295)) 4294967296) 1)) .cse3)))) InVars {main_~y~0=v_main_~y~0_2123, main_#t~post5=|v_main_#t~post5_347|, main_~x~0=v_main_~x~0_2074, main_#t~post6=|v_main_#t~post6_696|} OutVars{main_#t~post5=|v_main_#t~post5_346|, main_~y~0=v_main_~y~0_2122, main_~x~0=v_main_~x~0_2073, main_#t~post6=|v_main_#t~post6_694|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {38151#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:46,924 INFO L290 TraceCheckUtils]: 7: Hoare triple {38151#(and (= main_~x~0 0) (= main_~y~0 0))} [246] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38151#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:37:46,925 INFO L290 TraceCheckUtils]: 8: Hoare triple {38151#(and (= main_~x~0 0) (= main_~y~0 0))} [247] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2076 4294967296)) (.cse0 (= |v_main_#t~post6_699| |v_main_#t~post6_695|)) (.cse1 (= v_main_~x~0_2076 v_main_~x~0_2075)) (.cse2 (= |v_main_#t~post4_352| |v_main_#t~post4_351|)) (.cse3 (= v_main_~y~0_2125 v_main_~y~0_2124))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_2076 v_main_~x~0_2075) (<= (div (+ (* (- 1) v_main_~x~0_2075) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2076 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2075 v_main_~y~0_2125) (+ v_main_~x~0_2076 v_main_~y~0_2124))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_352|, main_~y~0=v_main_~y~0_2125, main_~x~0=v_main_~x~0_2076, main_#t~post6=|v_main_#t~post6_699|} OutVars{main_#t~post4=|v_main_#t~post4_351|, main_~y~0=v_main_~y~0_2124, main_~x~0=v_main_~x~0_2075, main_#t~post6=|v_main_#t~post6_695|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {38161#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:37:46,926 INFO L290 TraceCheckUtils]: 9: Hoare triple {38161#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [244] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {38126#false} is VALID [2022-04-28 03:37:46,926 INFO L272 TraceCheckUtils]: 10: Hoare triple {38126#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {38126#false} is VALID [2022-04-28 03:37:46,926 INFO L290 TraceCheckUtils]: 11: Hoare triple {38126#false} ~cond := #in~cond; {38126#false} is VALID [2022-04-28 03:37:46,926 INFO L290 TraceCheckUtils]: 12: Hoare triple {38126#false} assume 0 == ~cond; {38126#false} is VALID [2022-04-28 03:37:46,926 INFO L290 TraceCheckUtils]: 13: Hoare triple {38126#false} assume !false; {38126#false} is VALID [2022-04-28 03:37:46,926 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:46,926 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:37:47,952 INFO L290 TraceCheckUtils]: 13: Hoare triple {38126#false} assume !false; {38126#false} is VALID [2022-04-28 03:37:47,953 INFO L290 TraceCheckUtils]: 12: Hoare triple {38180#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {38126#false} is VALID [2022-04-28 03:37:47,953 INFO L290 TraceCheckUtils]: 11: Hoare triple {38184#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {38180#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:37:47,953 INFO L272 TraceCheckUtils]: 10: Hoare triple {38188#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {38184#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:37:47,954 INFO L290 TraceCheckUtils]: 9: Hoare triple {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [244] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {38188#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:37:47,959 INFO L290 TraceCheckUtils]: 8: Hoare triple {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [247] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2076 4294967296)) (.cse0 (= |v_main_#t~post6_699| |v_main_#t~post6_695|)) (.cse1 (= v_main_~x~0_2076 v_main_~x~0_2075)) (.cse2 (= |v_main_#t~post4_352| |v_main_#t~post4_351|)) (.cse3 (= v_main_~y~0_2125 v_main_~y~0_2124))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~x~0_2076 v_main_~x~0_2075) (<= (div (+ (* (- 1) v_main_~x~0_2075) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2076 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2075 v_main_~y~0_2125) (+ v_main_~x~0_2076 v_main_~y~0_2124))) (and (<= 500000 .cse4) .cse0 .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_352|, main_~y~0=v_main_~y~0_2125, main_~x~0=v_main_~x~0_2076, main_#t~post6=|v_main_#t~post6_699|} OutVars{main_#t~post4=|v_main_#t~post4_351|, main_~y~0=v_main_~y~0_2124, main_~x~0=v_main_~x~0_2075, main_#t~post6=|v_main_#t~post6_695|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:47,959 INFO L290 TraceCheckUtils]: 7: Hoare triple {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [246] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:48,070 INFO L290 TraceCheckUtils]: 6: Hoare triple {38202#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2135_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2135_33) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2135_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [245] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2074 4294967296))) (let ((.cse0 (= |v_main_#t~post5_347| |v_main_#t~post5_346|)) (.cse1 (= v_main_~y~0_2123 v_main_~y~0_2122)) (.cse2 (= |v_main_#t~post6_696| |v_main_#t~post6_694|)) (.cse5 (= v_main_~x~0_2074 v_main_~x~0_2073)) (.cse4 (< .cse6 1000000)) (.cse3 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and .cse0 .cse1 .cse2 .cse5) (and .cse4 (< v_main_~y~0_2122 v_main_~y~0_2123) (= (+ v_main_~x~0_2074 v_main_~y~0_2123) (+ v_main_~x~0_2073 v_main_~y~0_2122)) (<= (div (+ (* (- 1) v_main_~y~0_2123) 1000000 v_main_~y~0_2122 (* (- 1) v_main_~x~0_2074)) (- 4294967296)) (+ (div (+ v_main_~x~0_2074 (- 4294967295)) 4294967296) 1)) .cse3)))) InVars {main_~y~0=v_main_~y~0_2123, main_#t~post5=|v_main_#t~post5_347|, main_~x~0=v_main_~x~0_2074, main_#t~post6=|v_main_#t~post6_696|} OutVars{main_#t~post5=|v_main_#t~post5_346|, main_~y~0=v_main_~y~0_2122, main_~x~0=v_main_~x~0_2073, main_#t~post6=|v_main_#t~post6_694|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {38192#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:37:48,071 INFO L290 TraceCheckUtils]: 5: Hoare triple {38125#true} ~x~0 := 0;~y~0 := 0; {38202#(and (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2135_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2135_33) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2135_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:37:48,071 INFO L272 TraceCheckUtils]: 4: Hoare triple {38125#true} call #t~ret7 := main(); {38125#true} is VALID [2022-04-28 03:37:48,071 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38125#true} {38125#true} #41#return; {38125#true} is VALID [2022-04-28 03:37:48,071 INFO L290 TraceCheckUtils]: 2: Hoare triple {38125#true} assume true; {38125#true} is VALID [2022-04-28 03:37:48,071 INFO L290 TraceCheckUtils]: 1: Hoare triple {38125#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {38125#true} is VALID [2022-04-28 03:37:48,071 INFO L272 TraceCheckUtils]: 0: Hoare triple {38125#true} call ULTIMATE.init(); {38125#true} is VALID [2022-04-28 03:37:48,072 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:37:48,072 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1739323016] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:37:48,072 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:37:48,072 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:37:51,428 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:37:51,429 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1186875429] [2022-04-28 03:37:51,429 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1186875429] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:37:51,429 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:37:51,429 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [54] imperfect sequences [] total 54 [2022-04-28 03:37:51,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761638312] [2022-04-28 03:37:51,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:37:51,429 INFO L78 Accepts]: Start accepts. Automaton has has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 164 [2022-04-28 03:37:51,429 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:37:51,429 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:51,499 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 164 edges. 164 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:51,499 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2022-04-28 03:37:51,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:51,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2022-04-28 03:37:51,500 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=284, Invalid=3498, Unknown=0, NotChecked=0, Total=3782 [2022-04-28 03:37:51,500 INFO L87 Difference]: Start difference. First operand 166 states and 168 transitions. Second operand has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:59,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:59,725 INFO L93 Difference]: Finished difference Result 178 states and 182 transitions. [2022-04-28 03:37:59,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2022-04-28 03:37:59,725 INFO L78 Accepts]: Start accepts. Automaton has has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 164 [2022-04-28 03:37:59,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:37:59,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:59,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 178 transitions. [2022-04-28 03:37:59,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:59,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 178 transitions. [2022-04-28 03:37:59,727 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 54 states and 178 transitions. [2022-04-28 03:37:59,814 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 178 edges. 178 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:59,816 INFO L225 Difference]: With dead ends: 178 [2022-04-28 03:37:59,816 INFO L226 Difference]: Without dead ends: 170 [2022-04-28 03:37:59,816 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 29 SyntacticMatches, 103 SemanticMatches, 111 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2256 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=641, Invalid=12015, Unknown=0, NotChecked=0, Total=12656 [2022-04-28 03:37:59,817 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 112 mSDsluCounter, 257 mSDsCounter, 0 mSdLazyCounter, 8161 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 8214 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 8161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:37:59,817 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [112 Valid, 269 Invalid, 8214 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 8161 Invalid, 0 Unknown, 0 Unchecked, 4.2s Time] [2022-04-28 03:37:59,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2022-04-28 03:37:59,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 169. [2022-04-28 03:37:59,978 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:37:59,978 INFO L82 GeneralOperation]: Start isEquivalent. First operand 170 states. Second operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:59,978 INFO L74 IsIncluded]: Start isIncluded. First operand 170 states. Second operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:59,979 INFO L87 Difference]: Start difference. First operand 170 states. Second operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:59,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:59,980 INFO L93 Difference]: Finished difference Result 170 states and 172 transitions. [2022-04-28 03:37:59,980 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 172 transitions. [2022-04-28 03:37:59,980 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:59,980 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:59,980 INFO L74 IsIncluded]: Start isIncluded. First operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 170 states. [2022-04-28 03:37:59,980 INFO L87 Difference]: Start difference. First operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 170 states. [2022-04-28 03:37:59,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:59,982 INFO L93 Difference]: Finished difference Result 170 states and 172 transitions. [2022-04-28 03:37:59,982 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 172 transitions. [2022-04-28 03:37:59,982 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:59,982 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:59,982 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:37:59,982 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:37:59,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 169 states, 164 states have (on average 1.0182926829268293) internal successors, (167), 164 states have internal predecessors, (167), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:59,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 171 transitions. [2022-04-28 03:37:59,994 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 171 transitions. Word has length 164 [2022-04-28 03:37:59,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:37:59,995 INFO L495 AbstractCegarLoop]: Abstraction has 169 states and 171 transitions. [2022-04-28 03:37:59,995 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 54 states have (on average 2.962962962962963) internal successors, (160), 53 states have internal predecessors, (160), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:37:59,995 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 169 states and 171 transitions. [2022-04-28 03:38:00,201 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 171 edges. 171 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:00,201 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 171 transitions. [2022-04-28 03:38:00,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2022-04-28 03:38:00,202 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:38:00,202 INFO L195 NwaCegarLoop]: trace histogram [52, 52, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:38:00,220 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Ended with exit code 0 [2022-04-28 03:38:00,418 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 51 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable52 [2022-04-28 03:38:00,418 INFO L420 AbstractCegarLoop]: === Iteration 54 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:38:00,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:38:00,418 INFO L85 PathProgramCache]: Analyzing trace with hash 1718330949, now seen corresponding path program 51 times [2022-04-28 03:38:00,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:38:00,419 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [498845152] [2022-04-28 03:38:03,592 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:38:03,883 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:38:05,508 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:38:05,661 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:38:05,662 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:38:05,664 INFO L85 PathProgramCache]: Analyzing trace with hash 1064367, now seen corresponding path program 1 times [2022-04-28 03:38:05,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:38:05,665 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841571913] [2022-04-28 03:38:05,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:38:05,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:38:05,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:05,720 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:38:05,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:05,724 INFO L290 TraceCheckUtils]: 0: Hoare triple {39416#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {39409#true} is VALID [2022-04-28 03:38:05,724 INFO L290 TraceCheckUtils]: 1: Hoare triple {39409#true} assume true; {39409#true} is VALID [2022-04-28 03:38:05,724 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {39409#true} {39409#true} #41#return; {39409#true} is VALID [2022-04-28 03:38:05,724 INFO L272 TraceCheckUtils]: 0: Hoare triple {39409#true} call ULTIMATE.init(); {39416#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:38:05,724 INFO L290 TraceCheckUtils]: 1: Hoare triple {39416#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {39409#true} is VALID [2022-04-28 03:38:05,724 INFO L290 TraceCheckUtils]: 2: Hoare triple {39409#true} assume true; {39409#true} is VALID [2022-04-28 03:38:05,725 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39409#true} {39409#true} #41#return; {39409#true} is VALID [2022-04-28 03:38:05,725 INFO L272 TraceCheckUtils]: 4: Hoare triple {39409#true} call #t~ret7 := main(); {39409#true} is VALID [2022-04-28 03:38:05,725 INFO L290 TraceCheckUtils]: 5: Hoare triple {39409#true} ~x~0 := 0;~y~0 := 0; {39414#(= main_~x~0 0)} is VALID [2022-04-28 03:38:05,725 INFO L290 TraceCheckUtils]: 6: Hoare triple {39414#(= main_~x~0 0)} [249] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2141 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_2141 v_main_~x~0_2140)) (.cse3 (= v_main_~y~0_2191 v_main_~y~0_2190)) (.cse4 (= |v_main_#t~post5_354| |v_main_#t~post5_353|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_2140) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2141 (- 4294967295)) 4294967296) 1)) .cse0 (= (+ v_main_~x~0_2141 v_main_~y~0_2191) (+ v_main_~x~0_2140 v_main_~y~0_2190)) .cse1 (< v_main_~x~0_2141 v_main_~x~0_2140)) (and (= |v_main_#t~post6_710| |v_main_#t~post6_708|) .cse2 .cse3 .cse4) (and (or (not .cse1) (not .cse0)) (= |v_main_#t~post6_708| |v_main_#t~post6_710|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2191, main_#t~post5=|v_main_#t~post5_354|, main_~x~0=v_main_~x~0_2141, main_#t~post6=|v_main_#t~post6_710|} OutVars{main_#t~post5=|v_main_#t~post5_353|, main_~y~0=v_main_~y~0_2190, main_~x~0=v_main_~x~0_2140, main_#t~post6=|v_main_#t~post6_708|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {39414#(= main_~x~0 0)} is VALID [2022-04-28 03:38:05,726 INFO L290 TraceCheckUtils]: 7: Hoare triple {39414#(= main_~x~0 0)} [250] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39414#(= main_~x~0 0)} is VALID [2022-04-28 03:38:05,727 INFO L290 TraceCheckUtils]: 8: Hoare triple {39414#(= main_~x~0 0)} [251] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2143 v_main_~x~0_2142)) (.cse2 (= v_main_~y~0_2193 v_main_~y~0_2192)) (.cse3 (= |v_main_#t~post4_359| |v_main_#t~post4_358|)) (.cse1 (mod v_main_~x~0_2143 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= |v_main_#t~post6_709| |v_main_#t~post6_713|) .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_713| |v_main_#t~post6_709|) .cse3) (and (< v_main_~y~0_2193 v_main_~y~0_2192) (<= (div (+ (* (- 1) v_main_~x~0_2143) (* (- 1) v_main_~y~0_2192) v_main_~y~0_2193 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2143 (- 4294967295)) 4294967296) 1)) (< .cse1 500000) (= (+ v_main_~x~0_2143 v_main_~y~0_2192) (+ v_main_~x~0_2142 v_main_~y~0_2193))))) InVars {main_#t~post4=|v_main_#t~post4_359|, main_~y~0=v_main_~y~0_2193, main_~x~0=v_main_~x~0_2143, main_#t~post6=|v_main_#t~post6_713|} OutVars{main_#t~post4=|v_main_#t~post4_358|, main_~y~0=v_main_~y~0_2192, main_~x~0=v_main_~x~0_2142, main_#t~post6=|v_main_#t~post6_709|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {39415#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:38:05,727 INFO L290 TraceCheckUtils]: 9: Hoare triple {39415#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [248] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {39410#false} is VALID [2022-04-28 03:38:05,727 INFO L272 TraceCheckUtils]: 10: Hoare triple {39410#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {39410#false} is VALID [2022-04-28 03:38:05,727 INFO L290 TraceCheckUtils]: 11: Hoare triple {39410#false} ~cond := #in~cond; {39410#false} is VALID [2022-04-28 03:38:05,728 INFO L290 TraceCheckUtils]: 12: Hoare triple {39410#false} assume 0 == ~cond; {39410#false} is VALID [2022-04-28 03:38:05,728 INFO L290 TraceCheckUtils]: 13: Hoare triple {39410#false} assume !false; {39410#false} is VALID [2022-04-28 03:38:05,728 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:05,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:38:05,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841571913] [2022-04-28 03:38:05,728 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1841571913] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:38:05,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [336264731] [2022-04-28 03:38:05,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:38:05,728 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:38:05,728 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:38:05,729 INFO L229 MonitoredProcess]: Starting monitored process 52 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:38:05,730 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2022-04-28 03:38:05,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:05,760 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:38:05,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:05,768 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:38:05,935 INFO L272 TraceCheckUtils]: 0: Hoare triple {39409#true} call ULTIMATE.init(); {39409#true} is VALID [2022-04-28 03:38:05,935 INFO L290 TraceCheckUtils]: 1: Hoare triple {39409#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {39409#true} is VALID [2022-04-28 03:38:05,935 INFO L290 TraceCheckUtils]: 2: Hoare triple {39409#true} assume true; {39409#true} is VALID [2022-04-28 03:38:05,935 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39409#true} {39409#true} #41#return; {39409#true} is VALID [2022-04-28 03:38:05,935 INFO L272 TraceCheckUtils]: 4: Hoare triple {39409#true} call #t~ret7 := main(); {39409#true} is VALID [2022-04-28 03:38:05,935 INFO L290 TraceCheckUtils]: 5: Hoare triple {39409#true} ~x~0 := 0;~y~0 := 0; {39435#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:05,936 INFO L290 TraceCheckUtils]: 6: Hoare triple {39435#(and (= main_~x~0 0) (= main_~y~0 0))} [249] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2141 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_2141 v_main_~x~0_2140)) (.cse3 (= v_main_~y~0_2191 v_main_~y~0_2190)) (.cse4 (= |v_main_#t~post5_354| |v_main_#t~post5_353|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_2140) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2141 (- 4294967295)) 4294967296) 1)) .cse0 (= (+ v_main_~x~0_2141 v_main_~y~0_2191) (+ v_main_~x~0_2140 v_main_~y~0_2190)) .cse1 (< v_main_~x~0_2141 v_main_~x~0_2140)) (and (= |v_main_#t~post6_710| |v_main_#t~post6_708|) .cse2 .cse3 .cse4) (and (or (not .cse1) (not .cse0)) (= |v_main_#t~post6_708| |v_main_#t~post6_710|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2191, main_#t~post5=|v_main_#t~post5_354|, main_~x~0=v_main_~x~0_2141, main_#t~post6=|v_main_#t~post6_710|} OutVars{main_#t~post5=|v_main_#t~post5_353|, main_~y~0=v_main_~y~0_2190, main_~x~0=v_main_~x~0_2140, main_#t~post6=|v_main_#t~post6_708|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {39435#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:05,936 INFO L290 TraceCheckUtils]: 7: Hoare triple {39435#(and (= main_~x~0 0) (= main_~y~0 0))} [250] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39435#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:05,937 INFO L290 TraceCheckUtils]: 8: Hoare triple {39435#(and (= main_~x~0 0) (= main_~y~0 0))} [251] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2143 v_main_~x~0_2142)) (.cse2 (= v_main_~y~0_2193 v_main_~y~0_2192)) (.cse3 (= |v_main_#t~post4_359| |v_main_#t~post4_358|)) (.cse1 (mod v_main_~x~0_2143 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= |v_main_#t~post6_709| |v_main_#t~post6_713|) .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_713| |v_main_#t~post6_709|) .cse3) (and (< v_main_~y~0_2193 v_main_~y~0_2192) (<= (div (+ (* (- 1) v_main_~x~0_2143) (* (- 1) v_main_~y~0_2192) v_main_~y~0_2193 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2143 (- 4294967295)) 4294967296) 1)) (< .cse1 500000) (= (+ v_main_~x~0_2143 v_main_~y~0_2192) (+ v_main_~x~0_2142 v_main_~y~0_2193))))) InVars {main_#t~post4=|v_main_#t~post4_359|, main_~y~0=v_main_~y~0_2193, main_~x~0=v_main_~x~0_2143, main_#t~post6=|v_main_#t~post6_713|} OutVars{main_#t~post4=|v_main_#t~post4_358|, main_~y~0=v_main_~y~0_2192, main_~x~0=v_main_~x~0_2142, main_#t~post6=|v_main_#t~post6_709|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {39445#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:38:05,938 INFO L290 TraceCheckUtils]: 9: Hoare triple {39445#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [248] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {39410#false} is VALID [2022-04-28 03:38:05,938 INFO L272 TraceCheckUtils]: 10: Hoare triple {39410#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {39410#false} is VALID [2022-04-28 03:38:05,939 INFO L290 TraceCheckUtils]: 11: Hoare triple {39410#false} ~cond := #in~cond; {39410#false} is VALID [2022-04-28 03:38:05,939 INFO L290 TraceCheckUtils]: 12: Hoare triple {39410#false} assume 0 == ~cond; {39410#false} is VALID [2022-04-28 03:38:05,939 INFO L290 TraceCheckUtils]: 13: Hoare triple {39410#false} assume !false; {39410#false} is VALID [2022-04-28 03:38:05,939 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:05,939 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:38:06,804 INFO L290 TraceCheckUtils]: 13: Hoare triple {39410#false} assume !false; {39410#false} is VALID [2022-04-28 03:38:06,805 INFO L290 TraceCheckUtils]: 12: Hoare triple {39464#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {39410#false} is VALID [2022-04-28 03:38:06,805 INFO L290 TraceCheckUtils]: 11: Hoare triple {39468#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {39464#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:38:06,805 INFO L272 TraceCheckUtils]: 10: Hoare triple {39472#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {39468#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:38:06,806 INFO L290 TraceCheckUtils]: 9: Hoare triple {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [248] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {39472#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:38:06,808 INFO L290 TraceCheckUtils]: 8: Hoare triple {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [251] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2143 v_main_~x~0_2142)) (.cse2 (= v_main_~y~0_2193 v_main_~y~0_2192)) (.cse3 (= |v_main_#t~post4_359| |v_main_#t~post4_358|)) (.cse1 (mod v_main_~x~0_2143 4294967296))) (or (and .cse0 (<= 500000 .cse1) .cse2 (= |v_main_#t~post6_709| |v_main_#t~post6_713|) .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_713| |v_main_#t~post6_709|) .cse3) (and (< v_main_~y~0_2193 v_main_~y~0_2192) (<= (div (+ (* (- 1) v_main_~x~0_2143) (* (- 1) v_main_~y~0_2192) v_main_~y~0_2193 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2143 (- 4294967295)) 4294967296) 1)) (< .cse1 500000) (= (+ v_main_~x~0_2143 v_main_~y~0_2192) (+ v_main_~x~0_2142 v_main_~y~0_2193))))) InVars {main_#t~post4=|v_main_#t~post4_359|, main_~y~0=v_main_~y~0_2193, main_~x~0=v_main_~x~0_2143, main_#t~post6=|v_main_#t~post6_713|} OutVars{main_#t~post4=|v_main_#t~post4_358|, main_~y~0=v_main_~y~0_2192, main_~x~0=v_main_~x~0_2142, main_#t~post6=|v_main_#t~post6_709|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:06,808 INFO L290 TraceCheckUtils]: 7: Hoare triple {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [250] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:07,154 INFO L290 TraceCheckUtils]: 6: Hoare triple {39486#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2203_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2203_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2203_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [249] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2141 4294967296))) (let ((.cse1 (<= 500000 .cse5)) (.cse0 (< .cse5 1000000)) (.cse2 (= v_main_~x~0_2141 v_main_~x~0_2140)) (.cse3 (= v_main_~y~0_2191 v_main_~y~0_2190)) (.cse4 (= |v_main_#t~post5_354| |v_main_#t~post5_353|))) (or (and (<= (div (+ (* (- 1) v_main_~x~0_2140) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2141 (- 4294967295)) 4294967296) 1)) .cse0 (= (+ v_main_~x~0_2141 v_main_~y~0_2191) (+ v_main_~x~0_2140 v_main_~y~0_2190)) .cse1 (< v_main_~x~0_2141 v_main_~x~0_2140)) (and (= |v_main_#t~post6_710| |v_main_#t~post6_708|) .cse2 .cse3 .cse4) (and (or (not .cse1) (not .cse0)) (= |v_main_#t~post6_708| |v_main_#t~post6_710|) .cse2 .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2191, main_#t~post5=|v_main_#t~post5_354|, main_~x~0=v_main_~x~0_2141, main_#t~post6=|v_main_#t~post6_710|} OutVars{main_#t~post5=|v_main_#t~post5_353|, main_~y~0=v_main_~y~0_2190, main_~x~0=v_main_~x~0_2140, main_#t~post6=|v_main_#t~post6_708|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {39476#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:07,155 INFO L290 TraceCheckUtils]: 5: Hoare triple {39409#true} ~x~0 := 0;~y~0 := 0; {39486#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2203_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2203_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2203_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:38:07,155 INFO L272 TraceCheckUtils]: 4: Hoare triple {39409#true} call #t~ret7 := main(); {39409#true} is VALID [2022-04-28 03:38:07,155 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39409#true} {39409#true} #41#return; {39409#true} is VALID [2022-04-28 03:38:07,155 INFO L290 TraceCheckUtils]: 2: Hoare triple {39409#true} assume true; {39409#true} is VALID [2022-04-28 03:38:07,155 INFO L290 TraceCheckUtils]: 1: Hoare triple {39409#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {39409#true} is VALID [2022-04-28 03:38:07,155 INFO L272 TraceCheckUtils]: 0: Hoare triple {39409#true} call ULTIMATE.init(); {39409#true} is VALID [2022-04-28 03:38:07,155 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:07,156 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [336264731] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:38:07,156 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:38:07,156 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:38:10,402 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:38:10,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [498845152] [2022-04-28 03:38:10,402 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [498845152] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:38:10,402 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:38:10,402 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [55] imperfect sequences [] total 55 [2022-04-28 03:38:10,403 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767217224] [2022-04-28 03:38:10,403 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:38:10,404 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 167 [2022-04-28 03:38:10,404 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:38:10,404 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:10,474 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 167 edges. 167 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:10,474 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 55 states [2022-04-28 03:38:10,474 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:38:10,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2022-04-28 03:38:10,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=289, Invalid=3617, Unknown=0, NotChecked=0, Total=3906 [2022-04-28 03:38:10,475 INFO L87 Difference]: Start difference. First operand 169 states and 171 transitions. Second operand has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:19,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:19,047 INFO L93 Difference]: Finished difference Result 181 states and 185 transitions. [2022-04-28 03:38:19,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2022-04-28 03:38:19,047 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 167 [2022-04-28 03:38:19,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:38:19,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:19,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 181 transitions. [2022-04-28 03:38:19,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:19,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 181 transitions. [2022-04-28 03:38:19,049 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 55 states and 181 transitions. [2022-04-28 03:38:19,139 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 181 edges. 181 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:19,140 INFO L225 Difference]: With dead ends: 181 [2022-04-28 03:38:19,140 INFO L226 Difference]: Without dead ends: 173 [2022-04-28 03:38:19,141 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 247 GetRequests, 28 SyntacticMatches, 106 SemanticMatches, 113 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2326 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=653, Invalid=12457, Unknown=0, NotChecked=0, Total=13110 [2022-04-28 03:38:19,155 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 114 mSDsluCounter, 262 mSDsCounter, 0 mSdLazyCounter, 8477 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 274 SdHoareTripleChecker+Invalid, 8531 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 8477 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:38:19,155 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [114 Valid, 274 Invalid, 8531 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 8477 Invalid, 0 Unknown, 0 Unchecked, 4.4s Time] [2022-04-28 03:38:19,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2022-04-28 03:38:19,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 172. [2022-04-28 03:38:19,325 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:38:19,325 INFO L82 GeneralOperation]: Start isEquivalent. First operand 173 states. Second operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:19,325 INFO L74 IsIncluded]: Start isIncluded. First operand 173 states. Second operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:19,325 INFO L87 Difference]: Start difference. First operand 173 states. Second operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:19,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:19,327 INFO L93 Difference]: Finished difference Result 173 states and 175 transitions. [2022-04-28 03:38:19,327 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 175 transitions. [2022-04-28 03:38:19,327 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:38:19,327 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:38:19,327 INFO L74 IsIncluded]: Start isIncluded. First operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 173 states. [2022-04-28 03:38:19,327 INFO L87 Difference]: Start difference. First operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 173 states. [2022-04-28 03:38:19,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:19,335 INFO L93 Difference]: Finished difference Result 173 states and 175 transitions. [2022-04-28 03:38:19,335 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 175 transitions. [2022-04-28 03:38:19,335 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:38:19,335 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:38:19,336 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:38:19,336 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:38:19,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 167 states have (on average 1.0179640718562875) internal successors, (170), 167 states have internal predecessors, (170), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:19,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 174 transitions. [2022-04-28 03:38:19,337 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 174 transitions. Word has length 167 [2022-04-28 03:38:19,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:38:19,338 INFO L495 AbstractCegarLoop]: Abstraction has 172 states and 174 transitions. [2022-04-28 03:38:19,338 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 55 states, 55 states have (on average 2.963636363636364) internal successors, (163), 54 states have internal predecessors, (163), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:19,338 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 172 states and 174 transitions. [2022-04-28 03:38:19,552 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:19,553 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 174 transitions. [2022-04-28 03:38:19,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2022-04-28 03:38:19,553 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:38:19,553 INFO L195 NwaCegarLoop]: trace histogram [53, 53, 52, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:38:19,570 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Ended with exit code 0 [2022-04-28 03:38:19,762 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53,52 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:38:19,762 INFO L420 AbstractCegarLoop]: === Iteration 55 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:38:19,762 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:38:19,762 INFO L85 PathProgramCache]: Analyzing trace with hash -460038643, now seen corresponding path program 52 times [2022-04-28 03:38:19,762 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:38:19,762 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2084281980] [2022-04-28 03:38:23,655 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:38:23,896 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:38:25,056 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:38:25,057 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:38:25,060 INFO L85 PathProgramCache]: Analyzing trace with hash 2050596527, now seen corresponding path program 1 times [2022-04-28 03:38:25,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:38:25,060 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003026461] [2022-04-28 03:38:25,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:38:25,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:38:25,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:25,117 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:38:25,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:25,120 INFO L290 TraceCheckUtils]: 0: Hoare triple {40721#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {40714#true} is VALID [2022-04-28 03:38:25,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {40714#true} assume true; {40714#true} is VALID [2022-04-28 03:38:25,120 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {40714#true} {40714#true} #41#return; {40714#true} is VALID [2022-04-28 03:38:25,121 INFO L272 TraceCheckUtils]: 0: Hoare triple {40714#true} call ULTIMATE.init(); {40721#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:38:25,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {40721#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {40714#true} is VALID [2022-04-28 03:38:25,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {40714#true} assume true; {40714#true} is VALID [2022-04-28 03:38:25,121 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40714#true} {40714#true} #41#return; {40714#true} is VALID [2022-04-28 03:38:25,121 INFO L272 TraceCheckUtils]: 4: Hoare triple {40714#true} call #t~ret7 := main(); {40714#true} is VALID [2022-04-28 03:38:25,121 INFO L290 TraceCheckUtils]: 5: Hoare triple {40714#true} ~x~0 := 0;~y~0 := 0; {40719#(= main_~x~0 0)} is VALID [2022-04-28 03:38:25,122 INFO L290 TraceCheckUtils]: 6: Hoare triple {40719#(= main_~x~0 0)} [253] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2209 4294967296))) (let ((.cse0 (= |v_main_#t~post5_361| |v_main_#t~post5_360|)) (.cse1 (= v_main_~x~0_2209 v_main_~x~0_2208)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_724| |v_main_#t~post6_722|))) (or (and .cse0 .cse1 (= v_main_~y~0_2260 v_main_~y~0_2259) .cse2) (and (= (+ v_main_~x~0_2209 v_main_~y~0_2260) (+ v_main_~x~0_2208 v_main_~y~0_2259)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2208)) (- 4294967296)) (+ (div (+ v_main_~x~0_2209 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_2209 v_main_~x~0_2208) .cse4) (and .cse0 (= v_main_~y~0_2259 v_main_~y~0_2260) .cse1 (or (not .cse4) (not .cse3)) .cse2)))) InVars {main_~y~0=v_main_~y~0_2260, main_#t~post5=|v_main_#t~post5_361|, main_~x~0=v_main_~x~0_2209, main_#t~post6=|v_main_#t~post6_724|} OutVars{main_#t~post5=|v_main_#t~post5_360|, main_~y~0=v_main_~y~0_2259, main_~x~0=v_main_~x~0_2208, main_#t~post6=|v_main_#t~post6_722|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {40719#(= main_~x~0 0)} is VALID [2022-04-28 03:38:25,129 INFO L290 TraceCheckUtils]: 7: Hoare triple {40719#(= main_~x~0 0)} [254] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40719#(= main_~x~0 0)} is VALID [2022-04-28 03:38:25,130 INFO L290 TraceCheckUtils]: 8: Hoare triple {40719#(= main_~x~0 0)} [255] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2211 v_main_~x~0_2210)) (.cse1 (= |v_main_#t~post6_727| |v_main_#t~post6_723|)) (.cse2 (= |v_main_#t~post4_366| |v_main_#t~post4_365|)) (.cse3 (= v_main_~y~0_2262 v_main_~y~0_2261)) (.cse4 (mod v_main_~x~0_2211 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)) (and (= (+ v_main_~x~0_2211 v_main_~y~0_2261) (+ v_main_~x~0_2210 v_main_~y~0_2262)) (<= (div (+ (* (- 1) v_main_~x~0_2210) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2211 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2211 v_main_~x~0_2210) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_366|, main_~y~0=v_main_~y~0_2262, main_~x~0=v_main_~x~0_2211, main_#t~post6=|v_main_#t~post6_727|} OutVars{main_#t~post4=|v_main_#t~post4_365|, main_~y~0=v_main_~y~0_2261, main_~x~0=v_main_~x~0_2210, main_#t~post6=|v_main_#t~post6_723|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {40720#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:38:25,131 INFO L290 TraceCheckUtils]: 9: Hoare triple {40720#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [252] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {40715#false} is VALID [2022-04-28 03:38:25,131 INFO L272 TraceCheckUtils]: 10: Hoare triple {40715#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {40715#false} is VALID [2022-04-28 03:38:25,131 INFO L290 TraceCheckUtils]: 11: Hoare triple {40715#false} ~cond := #in~cond; {40715#false} is VALID [2022-04-28 03:38:25,131 INFO L290 TraceCheckUtils]: 12: Hoare triple {40715#false} assume 0 == ~cond; {40715#false} is VALID [2022-04-28 03:38:25,131 INFO L290 TraceCheckUtils]: 13: Hoare triple {40715#false} assume !false; {40715#false} is VALID [2022-04-28 03:38:25,131 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:25,131 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:38:25,131 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003026461] [2022-04-28 03:38:25,132 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2003026461] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:38:25,132 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1350323529] [2022-04-28 03:38:25,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:38:25,132 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:38:25,132 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:38:25,133 INFO L229 MonitoredProcess]: Starting monitored process 53 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:38:25,134 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2022-04-28 03:38:25,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:25,159 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:38:25,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:25,172 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:38:25,311 INFO L272 TraceCheckUtils]: 0: Hoare triple {40714#true} call ULTIMATE.init(); {40714#true} is VALID [2022-04-28 03:38:25,311 INFO L290 TraceCheckUtils]: 1: Hoare triple {40714#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {40714#true} is VALID [2022-04-28 03:38:25,311 INFO L290 TraceCheckUtils]: 2: Hoare triple {40714#true} assume true; {40714#true} is VALID [2022-04-28 03:38:25,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40714#true} {40714#true} #41#return; {40714#true} is VALID [2022-04-28 03:38:25,312 INFO L272 TraceCheckUtils]: 4: Hoare triple {40714#true} call #t~ret7 := main(); {40714#true} is VALID [2022-04-28 03:38:25,312 INFO L290 TraceCheckUtils]: 5: Hoare triple {40714#true} ~x~0 := 0;~y~0 := 0; {40740#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:25,312 INFO L290 TraceCheckUtils]: 6: Hoare triple {40740#(and (= main_~x~0 0) (= main_~y~0 0))} [253] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2209 4294967296))) (let ((.cse0 (= |v_main_#t~post5_361| |v_main_#t~post5_360|)) (.cse1 (= v_main_~x~0_2209 v_main_~x~0_2208)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_724| |v_main_#t~post6_722|))) (or (and .cse0 .cse1 (= v_main_~y~0_2260 v_main_~y~0_2259) .cse2) (and (= (+ v_main_~x~0_2209 v_main_~y~0_2260) (+ v_main_~x~0_2208 v_main_~y~0_2259)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2208)) (- 4294967296)) (+ (div (+ v_main_~x~0_2209 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_2209 v_main_~x~0_2208) .cse4) (and .cse0 (= v_main_~y~0_2259 v_main_~y~0_2260) .cse1 (or (not .cse4) (not .cse3)) .cse2)))) InVars {main_~y~0=v_main_~y~0_2260, main_#t~post5=|v_main_#t~post5_361|, main_~x~0=v_main_~x~0_2209, main_#t~post6=|v_main_#t~post6_724|} OutVars{main_#t~post5=|v_main_#t~post5_360|, main_~y~0=v_main_~y~0_2259, main_~x~0=v_main_~x~0_2208, main_#t~post6=|v_main_#t~post6_722|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {40740#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:25,313 INFO L290 TraceCheckUtils]: 7: Hoare triple {40740#(and (= main_~x~0 0) (= main_~y~0 0))} [254] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40740#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:25,314 INFO L290 TraceCheckUtils]: 8: Hoare triple {40740#(and (= main_~x~0 0) (= main_~y~0 0))} [255] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2211 v_main_~x~0_2210)) (.cse1 (= |v_main_#t~post6_727| |v_main_#t~post6_723|)) (.cse2 (= |v_main_#t~post4_366| |v_main_#t~post4_365|)) (.cse3 (= v_main_~y~0_2262 v_main_~y~0_2261)) (.cse4 (mod v_main_~x~0_2211 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)) (and (= (+ v_main_~x~0_2211 v_main_~y~0_2261) (+ v_main_~x~0_2210 v_main_~y~0_2262)) (<= (div (+ (* (- 1) v_main_~x~0_2210) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2211 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2211 v_main_~x~0_2210) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_366|, main_~y~0=v_main_~y~0_2262, main_~x~0=v_main_~x~0_2211, main_#t~post6=|v_main_#t~post6_727|} OutVars{main_#t~post4=|v_main_#t~post4_365|, main_~y~0=v_main_~y~0_2261, main_~x~0=v_main_~x~0_2210, main_#t~post6=|v_main_#t~post6_723|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {40750#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:38:25,314 INFO L290 TraceCheckUtils]: 9: Hoare triple {40750#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [252] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {40715#false} is VALID [2022-04-28 03:38:25,315 INFO L272 TraceCheckUtils]: 10: Hoare triple {40715#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {40715#false} is VALID [2022-04-28 03:38:25,315 INFO L290 TraceCheckUtils]: 11: Hoare triple {40715#false} ~cond := #in~cond; {40715#false} is VALID [2022-04-28 03:38:25,315 INFO L290 TraceCheckUtils]: 12: Hoare triple {40715#false} assume 0 == ~cond; {40715#false} is VALID [2022-04-28 03:38:25,315 INFO L290 TraceCheckUtils]: 13: Hoare triple {40715#false} assume !false; {40715#false} is VALID [2022-04-28 03:38:25,315 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:25,315 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:38:26,115 INFO L290 TraceCheckUtils]: 13: Hoare triple {40715#false} assume !false; {40715#false} is VALID [2022-04-28 03:38:26,115 INFO L290 TraceCheckUtils]: 12: Hoare triple {40769#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {40715#false} is VALID [2022-04-28 03:38:26,116 INFO L290 TraceCheckUtils]: 11: Hoare triple {40773#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {40769#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:38:26,116 INFO L272 TraceCheckUtils]: 10: Hoare triple {40777#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {40773#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:38:26,116 INFO L290 TraceCheckUtils]: 9: Hoare triple {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [252] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {40777#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:38:26,119 INFO L290 TraceCheckUtils]: 8: Hoare triple {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [255] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2211 v_main_~x~0_2210)) (.cse1 (= |v_main_#t~post6_727| |v_main_#t~post6_723|)) (.cse2 (= |v_main_#t~post4_366| |v_main_#t~post4_365|)) (.cse3 (= v_main_~y~0_2262 v_main_~y~0_2261)) (.cse4 (mod v_main_~x~0_2211 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 .cse3 (<= 500000 .cse4)) (and (= (+ v_main_~x~0_2211 v_main_~y~0_2261) (+ v_main_~x~0_2210 v_main_~y~0_2262)) (<= (div (+ (* (- 1) v_main_~x~0_2210) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2211 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2211 v_main_~x~0_2210) (< .cse4 500000)))) InVars {main_#t~post4=|v_main_#t~post4_366|, main_~y~0=v_main_~y~0_2262, main_~x~0=v_main_~x~0_2211, main_#t~post6=|v_main_#t~post6_727|} OutVars{main_#t~post4=|v_main_#t~post4_365|, main_~y~0=v_main_~y~0_2261, main_~x~0=v_main_~x~0_2210, main_#t~post6=|v_main_#t~post6_723|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:26,120 INFO L290 TraceCheckUtils]: 7: Hoare triple {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [254] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:26,169 INFO L290 TraceCheckUtils]: 6: Hoare triple {40791#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2272_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2272_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2272_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [253] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2209 4294967296))) (let ((.cse0 (= |v_main_#t~post5_361| |v_main_#t~post5_360|)) (.cse1 (= v_main_~x~0_2209 v_main_~x~0_2208)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000)) (.cse2 (= |v_main_#t~post6_724| |v_main_#t~post6_722|))) (or (and .cse0 .cse1 (= v_main_~y~0_2260 v_main_~y~0_2259) .cse2) (and (= (+ v_main_~x~0_2209 v_main_~y~0_2260) (+ v_main_~x~0_2208 v_main_~y~0_2259)) (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2208)) (- 4294967296)) (+ (div (+ v_main_~x~0_2209 (- 4294967295)) 4294967296) 1)) .cse3 (< v_main_~x~0_2209 v_main_~x~0_2208) .cse4) (and .cse0 (= v_main_~y~0_2259 v_main_~y~0_2260) .cse1 (or (not .cse4) (not .cse3)) .cse2)))) InVars {main_~y~0=v_main_~y~0_2260, main_#t~post5=|v_main_#t~post5_361|, main_~x~0=v_main_~x~0_2209, main_#t~post6=|v_main_#t~post6_724|} OutVars{main_#t~post5=|v_main_#t~post5_360|, main_~y~0=v_main_~y~0_2259, main_~x~0=v_main_~x~0_2208, main_#t~post6=|v_main_#t~post6_722|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {40781#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:26,170 INFO L290 TraceCheckUtils]: 5: Hoare triple {40714#true} ~x~0 := 0;~y~0 := 0; {40791#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2272_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2272_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2272_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:38:26,170 INFO L272 TraceCheckUtils]: 4: Hoare triple {40714#true} call #t~ret7 := main(); {40714#true} is VALID [2022-04-28 03:38:26,171 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40714#true} {40714#true} #41#return; {40714#true} is VALID [2022-04-28 03:38:26,171 INFO L290 TraceCheckUtils]: 2: Hoare triple {40714#true} assume true; {40714#true} is VALID [2022-04-28 03:38:26,171 INFO L290 TraceCheckUtils]: 1: Hoare triple {40714#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {40714#true} is VALID [2022-04-28 03:38:26,171 INFO L272 TraceCheckUtils]: 0: Hoare triple {40714#true} call ULTIMATE.init(); {40714#true} is VALID [2022-04-28 03:38:26,171 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:26,171 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1350323529] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:38:26,171 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:38:26,171 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:38:30,239 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:38:30,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2084281980] [2022-04-28 03:38:30,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2084281980] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:38:30,239 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:38:30,239 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [56] imperfect sequences [] total 56 [2022-04-28 03:38:30,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [622283084] [2022-04-28 03:38:30,239 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:38:30,240 INFO L78 Accepts]: Start accepts. Automaton has has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 170 [2022-04-28 03:38:30,240 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:38:30,240 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:30,353 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:30,353 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 56 states [2022-04-28 03:38:30,353 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:38:30,353 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2022-04-28 03:38:30,354 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=3738, Unknown=0, NotChecked=0, Total=4032 [2022-04-28 03:38:30,354 INFO L87 Difference]: Start difference. First operand 172 states and 174 transitions. Second operand has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:38,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:38,822 INFO L93 Difference]: Finished difference Result 184 states and 188 transitions. [2022-04-28 03:38:38,822 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2022-04-28 03:38:38,822 INFO L78 Accepts]: Start accepts. Automaton has has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 170 [2022-04-28 03:38:38,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:38:38,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:38,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 184 transitions. [2022-04-28 03:38:38,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:38,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 184 transitions. [2022-04-28 03:38:38,824 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 56 states and 184 transitions. [2022-04-28 03:38:38,915 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 184 edges. 184 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:38,917 INFO L225 Difference]: With dead ends: 184 [2022-04-28 03:38:38,917 INFO L226 Difference]: Without dead ends: 176 [2022-04-28 03:38:38,918 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 29 SyntacticMatches, 107 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2397 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=665, Invalid=12907, Unknown=0, NotChecked=0, Total=13572 [2022-04-28 03:38:38,918 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 116 mSDsluCounter, 267 mSDsCounter, 0 mSdLazyCounter, 8799 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 8854 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 8799 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2022-04-28 03:38:38,918 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [116 Valid, 279 Invalid, 8854 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 8799 Invalid, 0 Unknown, 0 Unchecked, 4.3s Time] [2022-04-28 03:38:38,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2022-04-28 03:38:39,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 175. [2022-04-28 03:38:39,093 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:38:39,094 INFO L82 GeneralOperation]: Start isEquivalent. First operand 176 states. Second operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:39,094 INFO L74 IsIncluded]: Start isIncluded. First operand 176 states. Second operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:39,094 INFO L87 Difference]: Start difference. First operand 176 states. Second operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:39,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:39,095 INFO L93 Difference]: Finished difference Result 176 states and 178 transitions. [2022-04-28 03:38:39,095 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 178 transitions. [2022-04-28 03:38:39,096 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:38:39,096 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:38:39,096 INFO L74 IsIncluded]: Start isIncluded. First operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 176 states. [2022-04-28 03:38:39,096 INFO L87 Difference]: Start difference. First operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 176 states. [2022-04-28 03:38:39,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:39,097 INFO L93 Difference]: Finished difference Result 176 states and 178 transitions. [2022-04-28 03:38:39,098 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 178 transitions. [2022-04-28 03:38:39,098 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:38:39,098 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:38:39,098 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:38:39,098 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:38:39,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 175 states, 170 states have (on average 1.0176470588235293) internal successors, (173), 170 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:39,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 177 transitions. [2022-04-28 03:38:39,100 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 177 transitions. Word has length 170 [2022-04-28 03:38:39,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:38:39,100 INFO L495 AbstractCegarLoop]: Abstraction has 175 states and 177 transitions. [2022-04-28 03:38:39,100 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 56 states, 56 states have (on average 2.9642857142857144) internal successors, (166), 55 states have internal predecessors, (166), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:39,100 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 175 states and 177 transitions. [2022-04-28 03:38:39,316 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 177 edges. 177 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:39,316 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 177 transitions. [2022-04-28 03:38:39,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2022-04-28 03:38:39,317 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:38:39,317 INFO L195 NwaCegarLoop]: trace histogram [54, 54, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:38:39,332 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Ended with exit code 0 [2022-04-28 03:38:39,531 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 53 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54 [2022-04-28 03:38:39,532 INFO L420 AbstractCegarLoop]: === Iteration 56 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:38:39,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:38:39,532 INFO L85 PathProgramCache]: Analyzing trace with hash 687288645, now seen corresponding path program 53 times [2022-04-28 03:38:39,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:38:39,532 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [999808898] [2022-04-28 03:38:43,083 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:38:43,639 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:38:43,640 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:38:43,643 INFO L85 PathProgramCache]: Analyzing trace with hash -194838609, now seen corresponding path program 1 times [2022-04-28 03:38:43,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:38:43,643 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578984646] [2022-04-28 03:38:43,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:38:43,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:38:43,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:43,675 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:38:43,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:43,682 INFO L290 TraceCheckUtils]: 0: Hoare triple {42047#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {42040#true} is VALID [2022-04-28 03:38:43,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {42040#true} assume true; {42040#true} is VALID [2022-04-28 03:38:43,683 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {42040#true} {42040#true} #41#return; {42040#true} is VALID [2022-04-28 03:38:43,683 INFO L272 TraceCheckUtils]: 0: Hoare triple {42040#true} call ULTIMATE.init(); {42047#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:38:43,683 INFO L290 TraceCheckUtils]: 1: Hoare triple {42047#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {42040#true} is VALID [2022-04-28 03:38:43,683 INFO L290 TraceCheckUtils]: 2: Hoare triple {42040#true} assume true; {42040#true} is VALID [2022-04-28 03:38:43,683 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42040#true} {42040#true} #41#return; {42040#true} is VALID [2022-04-28 03:38:43,683 INFO L272 TraceCheckUtils]: 4: Hoare triple {42040#true} call #t~ret7 := main(); {42040#true} is VALID [2022-04-28 03:38:43,683 INFO L290 TraceCheckUtils]: 5: Hoare triple {42040#true} ~x~0 := 0;~y~0 := 0; {42045#(= main_~x~0 0)} is VALID [2022-04-28 03:38:43,684 INFO L290 TraceCheckUtils]: 6: Hoare triple {42045#(= main_~x~0 0)} [257] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2278 4294967296))) (let ((.cse0 (= |v_main_#t~post6_738| |v_main_#t~post6_736|)) (.cse1 (= v_main_~y~0_2330 v_main_~y~0_2329)) (.cse2 (= v_main_~x~0_2278 v_main_~x~0_2277)) (.cse3 (= |v_main_#t~post5_368| |v_main_#t~post5_367|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and (or (not .cse4) (not .cse5)) .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_2329 v_main_~y~0_2330) .cse4 .cse5 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2278) v_main_~y~0_2329 (* (- 1) v_main_~y~0_2330)) (- 4294967296)) (+ (div (+ v_main_~x~0_2278 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2278 v_main_~y~0_2330) (+ v_main_~x~0_2277 v_main_~y~0_2329)))))) InVars {main_~y~0=v_main_~y~0_2330, main_#t~post5=|v_main_#t~post5_368|, main_~x~0=v_main_~x~0_2278, main_#t~post6=|v_main_#t~post6_738|} OutVars{main_#t~post5=|v_main_#t~post5_367|, main_~y~0=v_main_~y~0_2329, main_~x~0=v_main_~x~0_2277, main_#t~post6=|v_main_#t~post6_736|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {42045#(= main_~x~0 0)} is VALID [2022-04-28 03:38:43,684 INFO L290 TraceCheckUtils]: 7: Hoare triple {42045#(= main_~x~0 0)} [258] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42045#(= main_~x~0 0)} is VALID [2022-04-28 03:38:43,685 INFO L290 TraceCheckUtils]: 8: Hoare triple {42045#(= main_~x~0 0)} [259] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_2332 v_main_~y~0_2331)) (.cse2 (= |v_main_#t~post4_373| |v_main_#t~post4_372|)) (.cse3 (= v_main_~x~0_2280 v_main_~x~0_2279)) (.cse0 (mod v_main_~x~0_2280 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 (= |v_main_#t~post6_737| |v_main_#t~post6_741|) .cse3) (and (= |v_main_#t~post6_741| |v_main_#t~post6_737|) .cse1 .cse2 .cse3) (and (< v_main_~y~0_2332 v_main_~y~0_2331) (= (+ v_main_~x~0_2280 v_main_~y~0_2331) (+ v_main_~x~0_2279 v_main_~y~0_2332)) (<= (div (+ (* (- 1) v_main_~y~0_2331) (* (- 1) v_main_~x~0_2280) v_main_~y~0_2332 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2280 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)))) InVars {main_#t~post4=|v_main_#t~post4_373|, main_~y~0=v_main_~y~0_2332, main_~x~0=v_main_~x~0_2280, main_#t~post6=|v_main_#t~post6_741|} OutVars{main_#t~post4=|v_main_#t~post4_372|, main_~y~0=v_main_~y~0_2331, main_~x~0=v_main_~x~0_2279, main_#t~post6=|v_main_#t~post6_737|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {42046#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:38:43,686 INFO L290 TraceCheckUtils]: 9: Hoare triple {42046#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [256] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {42041#false} is VALID [2022-04-28 03:38:43,686 INFO L272 TraceCheckUtils]: 10: Hoare triple {42041#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {42041#false} is VALID [2022-04-28 03:38:43,686 INFO L290 TraceCheckUtils]: 11: Hoare triple {42041#false} ~cond := #in~cond; {42041#false} is VALID [2022-04-28 03:38:43,686 INFO L290 TraceCheckUtils]: 12: Hoare triple {42041#false} assume 0 == ~cond; {42041#false} is VALID [2022-04-28 03:38:43,686 INFO L290 TraceCheckUtils]: 13: Hoare triple {42041#false} assume !false; {42041#false} is VALID [2022-04-28 03:38:43,686 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:43,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:38:43,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [578984646] [2022-04-28 03:38:43,686 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [578984646] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:38:43,687 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [343141278] [2022-04-28 03:38:43,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:38:43,687 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:38:43,687 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:38:43,688 INFO L229 MonitoredProcess]: Starting monitored process 54 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:38:43,688 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2022-04-28 03:38:43,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:43,721 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:38:43,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:38:43,728 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:38:43,885 INFO L272 TraceCheckUtils]: 0: Hoare triple {42040#true} call ULTIMATE.init(); {42040#true} is VALID [2022-04-28 03:38:43,885 INFO L290 TraceCheckUtils]: 1: Hoare triple {42040#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {42040#true} is VALID [2022-04-28 03:38:43,885 INFO L290 TraceCheckUtils]: 2: Hoare triple {42040#true} assume true; {42040#true} is VALID [2022-04-28 03:38:43,886 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42040#true} {42040#true} #41#return; {42040#true} is VALID [2022-04-28 03:38:43,886 INFO L272 TraceCheckUtils]: 4: Hoare triple {42040#true} call #t~ret7 := main(); {42040#true} is VALID [2022-04-28 03:38:43,886 INFO L290 TraceCheckUtils]: 5: Hoare triple {42040#true} ~x~0 := 0;~y~0 := 0; {42066#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:43,887 INFO L290 TraceCheckUtils]: 6: Hoare triple {42066#(and (= main_~x~0 0) (= main_~y~0 0))} [257] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2278 4294967296))) (let ((.cse0 (= |v_main_#t~post6_738| |v_main_#t~post6_736|)) (.cse1 (= v_main_~y~0_2330 v_main_~y~0_2329)) (.cse2 (= v_main_~x~0_2278 v_main_~x~0_2277)) (.cse3 (= |v_main_#t~post5_368| |v_main_#t~post5_367|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and (or (not .cse4) (not .cse5)) .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_2329 v_main_~y~0_2330) .cse4 .cse5 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2278) v_main_~y~0_2329 (* (- 1) v_main_~y~0_2330)) (- 4294967296)) (+ (div (+ v_main_~x~0_2278 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2278 v_main_~y~0_2330) (+ v_main_~x~0_2277 v_main_~y~0_2329)))))) InVars {main_~y~0=v_main_~y~0_2330, main_#t~post5=|v_main_#t~post5_368|, main_~x~0=v_main_~x~0_2278, main_#t~post6=|v_main_#t~post6_738|} OutVars{main_#t~post5=|v_main_#t~post5_367|, main_~y~0=v_main_~y~0_2329, main_~x~0=v_main_~x~0_2277, main_#t~post6=|v_main_#t~post6_736|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {42066#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:43,887 INFO L290 TraceCheckUtils]: 7: Hoare triple {42066#(and (= main_~x~0 0) (= main_~y~0 0))} [258] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42066#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:38:43,888 INFO L290 TraceCheckUtils]: 8: Hoare triple {42066#(and (= main_~x~0 0) (= main_~y~0 0))} [259] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_2332 v_main_~y~0_2331)) (.cse2 (= |v_main_#t~post4_373| |v_main_#t~post4_372|)) (.cse3 (= v_main_~x~0_2280 v_main_~x~0_2279)) (.cse0 (mod v_main_~x~0_2280 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 (= |v_main_#t~post6_737| |v_main_#t~post6_741|) .cse3) (and (= |v_main_#t~post6_741| |v_main_#t~post6_737|) .cse1 .cse2 .cse3) (and (< v_main_~y~0_2332 v_main_~y~0_2331) (= (+ v_main_~x~0_2280 v_main_~y~0_2331) (+ v_main_~x~0_2279 v_main_~y~0_2332)) (<= (div (+ (* (- 1) v_main_~y~0_2331) (* (- 1) v_main_~x~0_2280) v_main_~y~0_2332 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2280 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)))) InVars {main_#t~post4=|v_main_#t~post4_373|, main_~y~0=v_main_~y~0_2332, main_~x~0=v_main_~x~0_2280, main_#t~post6=|v_main_#t~post6_741|} OutVars{main_#t~post4=|v_main_#t~post4_372|, main_~y~0=v_main_~y~0_2331, main_~x~0=v_main_~x~0_2279, main_#t~post6=|v_main_#t~post6_737|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {42076#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:38:43,889 INFO L290 TraceCheckUtils]: 9: Hoare triple {42076#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [256] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {42041#false} is VALID [2022-04-28 03:38:43,889 INFO L272 TraceCheckUtils]: 10: Hoare triple {42041#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {42041#false} is VALID [2022-04-28 03:38:43,889 INFO L290 TraceCheckUtils]: 11: Hoare triple {42041#false} ~cond := #in~cond; {42041#false} is VALID [2022-04-28 03:38:43,889 INFO L290 TraceCheckUtils]: 12: Hoare triple {42041#false} assume 0 == ~cond; {42041#false} is VALID [2022-04-28 03:38:43,889 INFO L290 TraceCheckUtils]: 13: Hoare triple {42041#false} assume !false; {42041#false} is VALID [2022-04-28 03:38:43,889 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:43,889 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:38:46,264 INFO L290 TraceCheckUtils]: 13: Hoare triple {42041#false} assume !false; {42041#false} is VALID [2022-04-28 03:38:46,264 INFO L290 TraceCheckUtils]: 12: Hoare triple {42095#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {42041#false} is VALID [2022-04-28 03:38:46,264 INFO L290 TraceCheckUtils]: 11: Hoare triple {42099#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {42095#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:38:46,265 INFO L272 TraceCheckUtils]: 10: Hoare triple {42103#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {42099#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:38:46,265 INFO L290 TraceCheckUtils]: 9: Hoare triple {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [256] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {42103#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:38:46,272 INFO L290 TraceCheckUtils]: 8: Hoare triple {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [259] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_2332 v_main_~y~0_2331)) (.cse2 (= |v_main_#t~post4_373| |v_main_#t~post4_372|)) (.cse3 (= v_main_~x~0_2280 v_main_~x~0_2279)) (.cse0 (mod v_main_~x~0_2280 4294967296))) (or (and (<= 500000 .cse0) .cse1 .cse2 (= |v_main_#t~post6_737| |v_main_#t~post6_741|) .cse3) (and (= |v_main_#t~post6_741| |v_main_#t~post6_737|) .cse1 .cse2 .cse3) (and (< v_main_~y~0_2332 v_main_~y~0_2331) (= (+ v_main_~x~0_2280 v_main_~y~0_2331) (+ v_main_~x~0_2279 v_main_~y~0_2332)) (<= (div (+ (* (- 1) v_main_~y~0_2331) (* (- 1) v_main_~x~0_2280) v_main_~y~0_2332 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2280 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)))) InVars {main_#t~post4=|v_main_#t~post4_373|, main_~y~0=v_main_~y~0_2332, main_~x~0=v_main_~x~0_2280, main_#t~post6=|v_main_#t~post6_741|} OutVars{main_#t~post4=|v_main_#t~post4_372|, main_~y~0=v_main_~y~0_2331, main_~x~0=v_main_~x~0_2279, main_#t~post6=|v_main_#t~post6_737|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:46,272 INFO L290 TraceCheckUtils]: 7: Hoare triple {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [258] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:46,289 INFO L290 TraceCheckUtils]: 6: Hoare triple {42117#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2342_33 Int)) (or (not (<= (div (+ 1000000 (* 4294967296 aux_div_v_main_~y~0_2342_33) (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2342_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [257] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2278 4294967296))) (let ((.cse0 (= |v_main_#t~post6_738| |v_main_#t~post6_736|)) (.cse1 (= v_main_~y~0_2330 v_main_~y~0_2329)) (.cse2 (= v_main_~x~0_2278 v_main_~x~0_2277)) (.cse3 (= |v_main_#t~post5_368| |v_main_#t~post5_367|)) (.cse4 (<= 500000 .cse6)) (.cse5 (< .cse6 1000000))) (or (and .cse0 .cse1 .cse2 .cse3) (and (or (not .cse4) (not .cse5)) .cse0 .cse1 .cse2 .cse3) (and (< v_main_~y~0_2329 v_main_~y~0_2330) .cse4 .cse5 (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2278) v_main_~y~0_2329 (* (- 1) v_main_~y~0_2330)) (- 4294967296)) (+ (div (+ v_main_~x~0_2278 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2278 v_main_~y~0_2330) (+ v_main_~x~0_2277 v_main_~y~0_2329)))))) InVars {main_~y~0=v_main_~y~0_2330, main_#t~post5=|v_main_#t~post5_368|, main_~x~0=v_main_~x~0_2278, main_#t~post6=|v_main_#t~post6_738|} OutVars{main_#t~post5=|v_main_#t~post5_367|, main_~y~0=v_main_~y~0_2329, main_~x~0=v_main_~x~0_2277, main_#t~post6=|v_main_#t~post6_736|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {42107#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:38:46,290 INFO L290 TraceCheckUtils]: 5: Hoare triple {42040#true} ~x~0 := 0;~y~0 := 0; {42117#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2342_33 Int)) (or (not (<= (div (+ 1000000 (* 4294967296 aux_div_v_main_~y~0_2342_33) (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2342_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:38:46,290 INFO L272 TraceCheckUtils]: 4: Hoare triple {42040#true} call #t~ret7 := main(); {42040#true} is VALID [2022-04-28 03:38:46,290 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42040#true} {42040#true} #41#return; {42040#true} is VALID [2022-04-28 03:38:46,290 INFO L290 TraceCheckUtils]: 2: Hoare triple {42040#true} assume true; {42040#true} is VALID [2022-04-28 03:38:46,290 INFO L290 TraceCheckUtils]: 1: Hoare triple {42040#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {42040#true} is VALID [2022-04-28 03:38:46,290 INFO L272 TraceCheckUtils]: 0: Hoare triple {42040#true} call ULTIMATE.init(); {42040#true} is VALID [2022-04-28 03:38:46,290 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:38:46,291 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [343141278] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:38:46,291 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:38:46,291 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:38:49,783 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:38:49,783 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [999808898] [2022-04-28 03:38:49,783 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [999808898] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:38:49,783 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:38:49,783 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [57] imperfect sequences [] total 57 [2022-04-28 03:38:49,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392597909] [2022-04-28 03:38:49,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:38:49,784 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 173 [2022-04-28 03:38:49,784 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:38:49,784 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:49,857 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:49,857 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2022-04-28 03:38:49,857 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:38:49,857 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2022-04-28 03:38:49,857 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=3861, Unknown=0, NotChecked=0, Total=4160 [2022-04-28 03:38:49,858 INFO L87 Difference]: Start difference. First operand 175 states and 177 transitions. Second operand has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:58,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:58,687 INFO L93 Difference]: Finished difference Result 187 states and 191 transitions. [2022-04-28 03:38:58,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2022-04-28 03:38:58,688 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 173 [2022-04-28 03:38:58,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:38:58,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:58,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 187 transitions. [2022-04-28 03:38:58,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:58,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 187 transitions. [2022-04-28 03:38:58,696 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 57 states and 187 transitions. [2022-04-28 03:38:58,815 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 187 edges. 187 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:58,826 INFO L225 Difference]: With dead ends: 187 [2022-04-28 03:38:58,826 INFO L226 Difference]: Without dead ends: 179 [2022-04-28 03:38:58,827 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 29 SyntacticMatches, 109 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2469 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=677, Invalid=13365, Unknown=0, NotChecked=0, Total=14042 [2022-04-28 03:38:58,831 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 118 mSDsluCounter, 272 mSDsCounter, 0 mSdLazyCounter, 9127 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 118 SdHoareTripleChecker+Valid, 284 SdHoareTripleChecker+Invalid, 9183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 9127 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:38:58,831 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [118 Valid, 284 Invalid, 9183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 9127 Invalid, 0 Unknown, 0 Unchecked, 4.5s Time] [2022-04-28 03:38:58,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-04-28 03:38:59,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 178. [2022-04-28 03:38:59,128 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:38:59,128 INFO L82 GeneralOperation]: Start isEquivalent. First operand 179 states. Second operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:59,129 INFO L74 IsIncluded]: Start isIncluded. First operand 179 states. Second operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:59,129 INFO L87 Difference]: Start difference. First operand 179 states. Second operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:59,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:59,130 INFO L93 Difference]: Finished difference Result 179 states and 181 transitions. [2022-04-28 03:38:59,130 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 181 transitions. [2022-04-28 03:38:59,130 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:38:59,130 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:38:59,131 INFO L74 IsIncluded]: Start isIncluded. First operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-28 03:38:59,131 INFO L87 Difference]: Start difference. First operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-28 03:38:59,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:38:59,132 INFO L93 Difference]: Finished difference Result 179 states and 181 transitions. [2022-04-28 03:38:59,132 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 181 transitions. [2022-04-28 03:38:59,132 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:38:59,132 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:38:59,133 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:38:59,133 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:38:59,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 178 states, 173 states have (on average 1.0173410404624277) internal successors, (176), 173 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:59,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 180 transitions. [2022-04-28 03:38:59,134 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 180 transitions. Word has length 173 [2022-04-28 03:38:59,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:38:59,135 INFO L495 AbstractCegarLoop]: Abstraction has 178 states and 180 transitions. [2022-04-28 03:38:59,135 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 57 states have (on average 2.9649122807017543) internal successors, (169), 56 states have internal predecessors, (169), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:38:59,135 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 178 states and 180 transitions. [2022-04-28 03:38:59,410 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 180 edges. 180 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:38:59,410 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 180 transitions. [2022-04-28 03:38:59,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2022-04-28 03:38:59,411 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:38:59,411 INFO L195 NwaCegarLoop]: trace histogram [55, 55, 54, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:38:59,429 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Forceful destruction successful, exit code 0 [2022-04-28 03:38:59,611 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 54 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable55 [2022-04-28 03:38:59,612 INFO L420 AbstractCegarLoop]: === Iteration 57 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:38:59,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:38:59,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1364783885, now seen corresponding path program 54 times [2022-04-28 03:38:59,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:38:59,612 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1818363737] [2022-04-28 03:39:00,347 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:39:03,098 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:39:03,099 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:39:03,101 INFO L85 PathProgramCache]: Analyzing trace with hash 1854693551, now seen corresponding path program 1 times [2022-04-28 03:39:03,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:39:03,102 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665180328] [2022-04-28 03:39:03,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:39:03,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:39:03,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:03,138 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:39:03,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:03,141 INFO L290 TraceCheckUtils]: 0: Hoare triple {43394#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {43387#true} is VALID [2022-04-28 03:39:03,141 INFO L290 TraceCheckUtils]: 1: Hoare triple {43387#true} assume true; {43387#true} is VALID [2022-04-28 03:39:03,141 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {43387#true} {43387#true} #41#return; {43387#true} is VALID [2022-04-28 03:39:03,141 INFO L272 TraceCheckUtils]: 0: Hoare triple {43387#true} call ULTIMATE.init(); {43394#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:39:03,142 INFO L290 TraceCheckUtils]: 1: Hoare triple {43394#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {43387#true} is VALID [2022-04-28 03:39:03,142 INFO L290 TraceCheckUtils]: 2: Hoare triple {43387#true} assume true; {43387#true} is VALID [2022-04-28 03:39:03,142 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43387#true} {43387#true} #41#return; {43387#true} is VALID [2022-04-28 03:39:03,142 INFO L272 TraceCheckUtils]: 4: Hoare triple {43387#true} call #t~ret7 := main(); {43387#true} is VALID [2022-04-28 03:39:03,142 INFO L290 TraceCheckUtils]: 5: Hoare triple {43387#true} ~x~0 := 0;~y~0 := 0; {43392#(= main_~x~0 0)} is VALID [2022-04-28 03:39:03,143 INFO L290 TraceCheckUtils]: 6: Hoare triple {43392#(= main_~x~0 0)} [261] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2348 4294967296))) (let ((.cse2 (= v_main_~y~0_2401 v_main_~y~0_2400)) (.cse3 (= |v_main_#t~post6_752| |v_main_#t~post6_750|)) (.cse4 (= |v_main_#t~post5_375| |v_main_#t~post5_374|)) (.cse5 (= v_main_~x~0_2348 v_main_~x~0_2347)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (= (+ v_main_~x~0_2347 v_main_~y~0_2400) (+ v_main_~x~0_2348 v_main_~y~0_2401)) (<= (div (+ (* (- 1) v_main_~x~0_2347) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2348 (- 4294967295)) 4294967296) 1)) .cse1 .cse0 (< v_main_~x~0_2348 v_main_~x~0_2347))))) InVars {main_~y~0=v_main_~y~0_2401, main_#t~post5=|v_main_#t~post5_375|, main_~x~0=v_main_~x~0_2348, main_#t~post6=|v_main_#t~post6_752|} OutVars{main_#t~post5=|v_main_#t~post5_374|, main_~y~0=v_main_~y~0_2400, main_~x~0=v_main_~x~0_2347, main_#t~post6=|v_main_#t~post6_750|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {43392#(= main_~x~0 0)} is VALID [2022-04-28 03:39:03,143 INFO L290 TraceCheckUtils]: 7: Hoare triple {43392#(= main_~x~0 0)} [262] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43392#(= main_~x~0 0)} is VALID [2022-04-28 03:39:03,144 INFO L290 TraceCheckUtils]: 8: Hoare triple {43392#(= main_~x~0 0)} [263] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2350 4294967296)) (.cse1 (= v_main_~y~0_2403 v_main_~y~0_2402)) (.cse2 (= |v_main_#t~post6_755| |v_main_#t~post6_751|))) (or (and (<= 500000 .cse0) (= v_main_~x~0_2349 v_main_~x~0_2350) .cse1 .cse2 (= |v_main_#t~post4_379| |v_main_#t~post4_380|)) (and (<= (div (+ (* (- 1) v_main_~x~0_2350) (* (- 1) v_main_~y~0_2402) v_main_~y~0_2403 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2350 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2350 v_main_~y~0_2402) (+ v_main_~x~0_2349 v_main_~y~0_2403)) (< .cse0 500000) (< v_main_~y~0_2403 v_main_~y~0_2402)) (and .cse1 (= |v_main_#t~post4_380| |v_main_#t~post4_379|) (= v_main_~x~0_2350 v_main_~x~0_2349) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_380|, main_~y~0=v_main_~y~0_2403, main_~x~0=v_main_~x~0_2350, main_#t~post6=|v_main_#t~post6_755|} OutVars{main_#t~post4=|v_main_#t~post4_379|, main_~y~0=v_main_~y~0_2402, main_~x~0=v_main_~x~0_2349, main_#t~post6=|v_main_#t~post6_751|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {43393#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:39:03,144 INFO L290 TraceCheckUtils]: 9: Hoare triple {43393#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [260] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {43388#false} is VALID [2022-04-28 03:39:03,144 INFO L272 TraceCheckUtils]: 10: Hoare triple {43388#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {43388#false} is VALID [2022-04-28 03:39:03,144 INFO L290 TraceCheckUtils]: 11: Hoare triple {43388#false} ~cond := #in~cond; {43388#false} is VALID [2022-04-28 03:39:03,145 INFO L290 TraceCheckUtils]: 12: Hoare triple {43388#false} assume 0 == ~cond; {43388#false} is VALID [2022-04-28 03:39:03,145 INFO L290 TraceCheckUtils]: 13: Hoare triple {43388#false} assume !false; {43388#false} is VALID [2022-04-28 03:39:03,145 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:03,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:39:03,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665180328] [2022-04-28 03:39:03,145 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1665180328] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:39:03,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1715185284] [2022-04-28 03:39:03,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:39:03,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:39:03,145 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:39:03,146 INFO L229 MonitoredProcess]: Starting monitored process 55 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:39:03,147 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2022-04-28 03:39:03,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:03,176 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:39:03,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:03,185 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:39:03,331 INFO L272 TraceCheckUtils]: 0: Hoare triple {43387#true} call ULTIMATE.init(); {43387#true} is VALID [2022-04-28 03:39:03,331 INFO L290 TraceCheckUtils]: 1: Hoare triple {43387#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {43387#true} is VALID [2022-04-28 03:39:03,332 INFO L290 TraceCheckUtils]: 2: Hoare triple {43387#true} assume true; {43387#true} is VALID [2022-04-28 03:39:03,332 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43387#true} {43387#true} #41#return; {43387#true} is VALID [2022-04-28 03:39:03,332 INFO L272 TraceCheckUtils]: 4: Hoare triple {43387#true} call #t~ret7 := main(); {43387#true} is VALID [2022-04-28 03:39:03,332 INFO L290 TraceCheckUtils]: 5: Hoare triple {43387#true} ~x~0 := 0;~y~0 := 0; {43413#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:03,333 INFO L290 TraceCheckUtils]: 6: Hoare triple {43413#(and (= main_~x~0 0) (= main_~y~0 0))} [261] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2348 4294967296))) (let ((.cse2 (= v_main_~y~0_2401 v_main_~y~0_2400)) (.cse3 (= |v_main_#t~post6_752| |v_main_#t~post6_750|)) (.cse4 (= |v_main_#t~post5_375| |v_main_#t~post5_374|)) (.cse5 (= v_main_~x~0_2348 v_main_~x~0_2347)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (= (+ v_main_~x~0_2347 v_main_~y~0_2400) (+ v_main_~x~0_2348 v_main_~y~0_2401)) (<= (div (+ (* (- 1) v_main_~x~0_2347) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2348 (- 4294967295)) 4294967296) 1)) .cse1 .cse0 (< v_main_~x~0_2348 v_main_~x~0_2347))))) InVars {main_~y~0=v_main_~y~0_2401, main_#t~post5=|v_main_#t~post5_375|, main_~x~0=v_main_~x~0_2348, main_#t~post6=|v_main_#t~post6_752|} OutVars{main_#t~post5=|v_main_#t~post5_374|, main_~y~0=v_main_~y~0_2400, main_~x~0=v_main_~x~0_2347, main_#t~post6=|v_main_#t~post6_750|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {43413#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:03,333 INFO L290 TraceCheckUtils]: 7: Hoare triple {43413#(and (= main_~x~0 0) (= main_~y~0 0))} [262] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43413#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:03,333 INFO L290 TraceCheckUtils]: 8: Hoare triple {43413#(and (= main_~x~0 0) (= main_~y~0 0))} [263] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2350 4294967296)) (.cse1 (= v_main_~y~0_2403 v_main_~y~0_2402)) (.cse2 (= |v_main_#t~post6_755| |v_main_#t~post6_751|))) (or (and (<= 500000 .cse0) (= v_main_~x~0_2349 v_main_~x~0_2350) .cse1 .cse2 (= |v_main_#t~post4_379| |v_main_#t~post4_380|)) (and (<= (div (+ (* (- 1) v_main_~x~0_2350) (* (- 1) v_main_~y~0_2402) v_main_~y~0_2403 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2350 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2350 v_main_~y~0_2402) (+ v_main_~x~0_2349 v_main_~y~0_2403)) (< .cse0 500000) (< v_main_~y~0_2403 v_main_~y~0_2402)) (and .cse1 (= |v_main_#t~post4_380| |v_main_#t~post4_379|) (= v_main_~x~0_2350 v_main_~x~0_2349) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_380|, main_~y~0=v_main_~y~0_2403, main_~x~0=v_main_~x~0_2350, main_#t~post6=|v_main_#t~post6_755|} OutVars{main_#t~post4=|v_main_#t~post4_379|, main_~y~0=v_main_~y~0_2402, main_~x~0=v_main_~x~0_2349, main_#t~post6=|v_main_#t~post6_751|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {43423#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:39:03,334 INFO L290 TraceCheckUtils]: 9: Hoare triple {43423#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [260] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {43388#false} is VALID [2022-04-28 03:39:03,335 INFO L272 TraceCheckUtils]: 10: Hoare triple {43388#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {43388#false} is VALID [2022-04-28 03:39:03,335 INFO L290 TraceCheckUtils]: 11: Hoare triple {43388#false} ~cond := #in~cond; {43388#false} is VALID [2022-04-28 03:39:03,335 INFO L290 TraceCheckUtils]: 12: Hoare triple {43388#false} assume 0 == ~cond; {43388#false} is VALID [2022-04-28 03:39:03,335 INFO L290 TraceCheckUtils]: 13: Hoare triple {43388#false} assume !false; {43388#false} is VALID [2022-04-28 03:39:03,335 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:03,335 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:39:04,419 INFO L290 TraceCheckUtils]: 13: Hoare triple {43388#false} assume !false; {43388#false} is VALID [2022-04-28 03:39:04,420 INFO L290 TraceCheckUtils]: 12: Hoare triple {43442#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {43388#false} is VALID [2022-04-28 03:39:04,420 INFO L290 TraceCheckUtils]: 11: Hoare triple {43446#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {43442#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:39:04,420 INFO L272 TraceCheckUtils]: 10: Hoare triple {43450#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {43446#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:39:04,420 INFO L290 TraceCheckUtils]: 9: Hoare triple {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [260] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {43450#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:39:04,451 INFO L290 TraceCheckUtils]: 8: Hoare triple {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [263] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2350 4294967296)) (.cse1 (= v_main_~y~0_2403 v_main_~y~0_2402)) (.cse2 (= |v_main_#t~post6_755| |v_main_#t~post6_751|))) (or (and (<= 500000 .cse0) (= v_main_~x~0_2349 v_main_~x~0_2350) .cse1 .cse2 (= |v_main_#t~post4_379| |v_main_#t~post4_380|)) (and (<= (div (+ (* (- 1) v_main_~x~0_2350) (* (- 1) v_main_~y~0_2402) v_main_~y~0_2403 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2350 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2350 v_main_~y~0_2402) (+ v_main_~x~0_2349 v_main_~y~0_2403)) (< .cse0 500000) (< v_main_~y~0_2403 v_main_~y~0_2402)) (and .cse1 (= |v_main_#t~post4_380| |v_main_#t~post4_379|) (= v_main_~x~0_2350 v_main_~x~0_2349) .cse2))) InVars {main_#t~post4=|v_main_#t~post4_380|, main_~y~0=v_main_~y~0_2403, main_~x~0=v_main_~x~0_2350, main_#t~post6=|v_main_#t~post6_755|} OutVars{main_#t~post4=|v_main_#t~post4_379|, main_~y~0=v_main_~y~0_2402, main_~x~0=v_main_~x~0_2349, main_#t~post6=|v_main_#t~post6_751|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:04,452 INFO L290 TraceCheckUtils]: 7: Hoare triple {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [262] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:04,472 INFO L290 TraceCheckUtils]: 6: Hoare triple {43464#(and (or (forall ((aux_div_v_main_~y~0_2413_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2413_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2413_33) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [261] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2348 4294967296))) (let ((.cse2 (= v_main_~y~0_2401 v_main_~y~0_2400)) (.cse3 (= |v_main_#t~post6_752| |v_main_#t~post6_750|)) (.cse4 (= |v_main_#t~post5_375| |v_main_#t~post5_374|)) (.cse5 (= v_main_~x~0_2348 v_main_~x~0_2347)) (.cse1 (< .cse6 1000000)) (.cse0 (<= 500000 .cse6))) (or (and (or (not .cse0) (not .cse1)) .cse2 .cse3 .cse4 .cse5) (and .cse2 .cse3 .cse4 .cse5) (and (= (+ v_main_~x~0_2347 v_main_~y~0_2400) (+ v_main_~x~0_2348 v_main_~y~0_2401)) (<= (div (+ (* (- 1) v_main_~x~0_2347) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2348 (- 4294967295)) 4294967296) 1)) .cse1 .cse0 (< v_main_~x~0_2348 v_main_~x~0_2347))))) InVars {main_~y~0=v_main_~y~0_2401, main_#t~post5=|v_main_#t~post5_375|, main_~x~0=v_main_~x~0_2348, main_#t~post6=|v_main_#t~post6_752|} OutVars{main_#t~post5=|v_main_#t~post5_374|, main_~y~0=v_main_~y~0_2400, main_~x~0=v_main_~x~0_2347, main_#t~post6=|v_main_#t~post6_750|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {43454#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:04,472 INFO L290 TraceCheckUtils]: 5: Hoare triple {43387#true} ~x~0 := 0;~y~0 := 0; {43464#(and (or (forall ((aux_div_v_main_~y~0_2413_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2413_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2413_33) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:39:04,472 INFO L272 TraceCheckUtils]: 4: Hoare triple {43387#true} call #t~ret7 := main(); {43387#true} is VALID [2022-04-28 03:39:04,473 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43387#true} {43387#true} #41#return; {43387#true} is VALID [2022-04-28 03:39:04,473 INFO L290 TraceCheckUtils]: 2: Hoare triple {43387#true} assume true; {43387#true} is VALID [2022-04-28 03:39:04,473 INFO L290 TraceCheckUtils]: 1: Hoare triple {43387#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {43387#true} is VALID [2022-04-28 03:39:04,473 INFO L272 TraceCheckUtils]: 0: Hoare triple {43387#true} call ULTIMATE.init(); {43387#true} is VALID [2022-04-28 03:39:04,473 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:04,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1715185284] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:39:04,473 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:39:04,473 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:39:07,306 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:39:07,306 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1818363737] [2022-04-28 03:39:07,306 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1818363737] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:39:07,306 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:39:07,306 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [58] imperfect sequences [] total 58 [2022-04-28 03:39:07,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850037353] [2022-04-28 03:39:07,306 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:39:07,307 INFO L78 Accepts]: Start accepts. Automaton has has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 176 [2022-04-28 03:39:07,307 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:39:07,307 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:07,382 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:07,382 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 58 states [2022-04-28 03:39:07,382 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:39:07,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2022-04-28 03:39:07,382 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=3986, Unknown=0, NotChecked=0, Total=4290 [2022-04-28 03:39:07,383 INFO L87 Difference]: Start difference. First operand 178 states and 180 transitions. Second operand has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:17,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:17,272 INFO L93 Difference]: Finished difference Result 190 states and 194 transitions. [2022-04-28 03:39:17,272 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2022-04-28 03:39:17,273 INFO L78 Accepts]: Start accepts. Automaton has has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 176 [2022-04-28 03:39:17,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:39:17,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:17,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 190 transitions. [2022-04-28 03:39:17,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:17,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 190 transitions. [2022-04-28 03:39:17,274 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 58 states and 190 transitions. [2022-04-28 03:39:17,366 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 190 edges. 190 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:17,367 INFO L225 Difference]: With dead ends: 190 [2022-04-28 03:39:17,367 INFO L226 Difference]: Without dead ends: 182 [2022-04-28 03:39:17,368 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 29 SyntacticMatches, 111 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2542 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=689, Invalid=13831, Unknown=0, NotChecked=0, Total=14520 [2022-04-28 03:39:17,368 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 120 mSDsluCounter, 277 mSDsCounter, 0 mSdLazyCounter, 9461 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 120 SdHoareTripleChecker+Valid, 289 SdHoareTripleChecker+Invalid, 9518 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 9461 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:39:17,368 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [120 Valid, 289 Invalid, 9518 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 9461 Invalid, 0 Unknown, 0 Unchecked, 5.0s Time] [2022-04-28 03:39:17,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2022-04-28 03:39:17,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 181. [2022-04-28 03:39:17,662 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:39:17,662 INFO L82 GeneralOperation]: Start isEquivalent. First operand 182 states. Second operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:17,662 INFO L74 IsIncluded]: Start isIncluded. First operand 182 states. Second operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:17,662 INFO L87 Difference]: Start difference. First operand 182 states. Second operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:17,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:17,664 INFO L93 Difference]: Finished difference Result 182 states and 184 transitions. [2022-04-28 03:39:17,664 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 184 transitions. [2022-04-28 03:39:17,664 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:39:17,664 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:39:17,664 INFO L74 IsIncluded]: Start isIncluded. First operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 182 states. [2022-04-28 03:39:17,664 INFO L87 Difference]: Start difference. First operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 182 states. [2022-04-28 03:39:17,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:17,666 INFO L93 Difference]: Finished difference Result 182 states and 184 transitions. [2022-04-28 03:39:17,666 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 184 transitions. [2022-04-28 03:39:17,666 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:39:17,666 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:39:17,666 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:39:17,666 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:39:17,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 181 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 176 states have internal predecessors, (179), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:17,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 183 transitions. [2022-04-28 03:39:17,669 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 183 transitions. Word has length 176 [2022-04-28 03:39:17,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:39:17,669 INFO L495 AbstractCegarLoop]: Abstraction has 181 states and 183 transitions. [2022-04-28 03:39:17,669 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 58 states, 58 states have (on average 2.9655172413793105) internal successors, (172), 57 states have internal predecessors, (172), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:17,669 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 181 states and 183 transitions. [2022-04-28 03:39:17,944 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:17,944 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 183 transitions. [2022-04-28 03:39:17,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2022-04-28 03:39:17,945 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:39:17,945 INFO L195 NwaCegarLoop]: trace histogram [56, 56, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:39:17,960 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Forceful destruction successful, exit code 0 [2022-04-28 03:39:18,145 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56,55 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:39:18,145 INFO L420 AbstractCegarLoop]: === Iteration 58 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:39:18,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:39:18,145 INFO L85 PathProgramCache]: Analyzing trace with hash -1720812475, now seen corresponding path program 55 times [2022-04-28 03:39:18,145 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:39:18,146 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1184111760] [2022-04-28 03:39:18,861 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:39:19,221 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:39:19,222 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:39:19,224 INFO L85 PathProgramCache]: Analyzing trace with hash -390741585, now seen corresponding path program 1 times [2022-04-28 03:39:19,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:39:19,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333669676] [2022-04-28 03:39:19,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:39:19,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:39:19,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:19,272 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:39:19,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:19,274 INFO L290 TraceCheckUtils]: 0: Hoare triple {44762#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {44755#true} is VALID [2022-04-28 03:39:19,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {44755#true} assume true; {44755#true} is VALID [2022-04-28 03:39:19,274 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {44755#true} {44755#true} #41#return; {44755#true} is VALID [2022-04-28 03:39:19,274 INFO L272 TraceCheckUtils]: 0: Hoare triple {44755#true} call ULTIMATE.init(); {44762#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:39:19,275 INFO L290 TraceCheckUtils]: 1: Hoare triple {44762#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {44755#true} is VALID [2022-04-28 03:39:19,275 INFO L290 TraceCheckUtils]: 2: Hoare triple {44755#true} assume true; {44755#true} is VALID [2022-04-28 03:39:19,275 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {44755#true} {44755#true} #41#return; {44755#true} is VALID [2022-04-28 03:39:19,275 INFO L272 TraceCheckUtils]: 4: Hoare triple {44755#true} call #t~ret7 := main(); {44755#true} is VALID [2022-04-28 03:39:19,275 INFO L290 TraceCheckUtils]: 5: Hoare triple {44755#true} ~x~0 := 0;~y~0 := 0; {44760#(= main_~x~0 0)} is VALID [2022-04-28 03:39:19,276 INFO L290 TraceCheckUtils]: 6: Hoare triple {44760#(= main_~x~0 0)} [265] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2419 4294967296))) (let ((.cse0 (= |v_main_#t~post6_766| |v_main_#t~post6_764|)) (.cse1 (= v_main_~x~0_2419 v_main_~x~0_2418)) (.cse2 (= v_main_~y~0_2473 v_main_~y~0_2472)) (.cse3 (= |v_main_#t~post5_382| |v_main_#t~post5_381|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (< v_main_~y~0_2472 v_main_~y~0_2473) .cse5 .cse4 (= (+ v_main_~x~0_2418 v_main_~y~0_2472) (+ v_main_~x~0_2419 v_main_~y~0_2473)) (<= (div (+ (* (- 1) v_main_~y~0_2473) 1000000 v_main_~y~0_2472 (* (- 1) v_main_~x~0_2419)) (- 4294967296)) (+ (div (+ v_main_~x~0_2419 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_2473, main_#t~post5=|v_main_#t~post5_382|, main_~x~0=v_main_~x~0_2419, main_#t~post6=|v_main_#t~post6_766|} OutVars{main_#t~post5=|v_main_#t~post5_381|, main_~y~0=v_main_~y~0_2472, main_~x~0=v_main_~x~0_2418, main_#t~post6=|v_main_#t~post6_764|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {44760#(= main_~x~0 0)} is VALID [2022-04-28 03:39:19,276 INFO L290 TraceCheckUtils]: 7: Hoare triple {44760#(= main_~x~0 0)} [266] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44760#(= main_~x~0 0)} is VALID [2022-04-28 03:39:19,277 INFO L290 TraceCheckUtils]: 8: Hoare triple {44760#(= main_~x~0 0)} [267] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2421 v_main_~x~0_2420)) (.cse1 (= v_main_~y~0_2475 v_main_~y~0_2474)) (.cse4 (mod v_main_~x~0_2421 4294967296)) (.cse2 (= |v_main_#t~post4_387| |v_main_#t~post4_386|)) (.cse3 (= |v_main_#t~post6_769| |v_main_#t~post6_765|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~y~0_2475 v_main_~y~0_2474) (<= (div (+ (* (- 1) v_main_~x~0_2421) (* (- 1) v_main_~y~0_2474) v_main_~y~0_2475 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2421 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2420 v_main_~y~0_2475) (+ v_main_~x~0_2421 v_main_~y~0_2474))) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_387|, main_~y~0=v_main_~y~0_2475, main_~x~0=v_main_~x~0_2421, main_#t~post6=|v_main_#t~post6_769|} OutVars{main_#t~post4=|v_main_#t~post4_386|, main_~y~0=v_main_~y~0_2474, main_~x~0=v_main_~x~0_2420, main_#t~post6=|v_main_#t~post6_765|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {44761#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:39:19,277 INFO L290 TraceCheckUtils]: 9: Hoare triple {44761#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [264] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {44756#false} is VALID [2022-04-28 03:39:19,277 INFO L272 TraceCheckUtils]: 10: Hoare triple {44756#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {44756#false} is VALID [2022-04-28 03:39:19,277 INFO L290 TraceCheckUtils]: 11: Hoare triple {44756#false} ~cond := #in~cond; {44756#false} is VALID [2022-04-28 03:39:19,277 INFO L290 TraceCheckUtils]: 12: Hoare triple {44756#false} assume 0 == ~cond; {44756#false} is VALID [2022-04-28 03:39:19,277 INFO L290 TraceCheckUtils]: 13: Hoare triple {44756#false} assume !false; {44756#false} is VALID [2022-04-28 03:39:19,278 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:19,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:39:19,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333669676] [2022-04-28 03:39:19,278 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [333669676] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:39:19,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1180977648] [2022-04-28 03:39:19,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:39:19,278 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:39:19,278 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:39:19,279 INFO L229 MonitoredProcess]: Starting monitored process 56 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:39:19,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2022-04-28 03:39:19,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:19,314 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:39:19,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:19,320 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:39:19,422 INFO L272 TraceCheckUtils]: 0: Hoare triple {44755#true} call ULTIMATE.init(); {44755#true} is VALID [2022-04-28 03:39:19,422 INFO L290 TraceCheckUtils]: 1: Hoare triple {44755#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {44755#true} is VALID [2022-04-28 03:39:19,422 INFO L290 TraceCheckUtils]: 2: Hoare triple {44755#true} assume true; {44755#true} is VALID [2022-04-28 03:39:19,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {44755#true} {44755#true} #41#return; {44755#true} is VALID [2022-04-28 03:39:19,422 INFO L272 TraceCheckUtils]: 4: Hoare triple {44755#true} call #t~ret7 := main(); {44755#true} is VALID [2022-04-28 03:39:19,422 INFO L290 TraceCheckUtils]: 5: Hoare triple {44755#true} ~x~0 := 0;~y~0 := 0; {44781#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:19,423 INFO L290 TraceCheckUtils]: 6: Hoare triple {44781#(and (= main_~x~0 0) (= main_~y~0 0))} [265] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2419 4294967296))) (let ((.cse0 (= |v_main_#t~post6_766| |v_main_#t~post6_764|)) (.cse1 (= v_main_~x~0_2419 v_main_~x~0_2418)) (.cse2 (= v_main_~y~0_2473 v_main_~y~0_2472)) (.cse3 (= |v_main_#t~post5_382| |v_main_#t~post5_381|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (< v_main_~y~0_2472 v_main_~y~0_2473) .cse5 .cse4 (= (+ v_main_~x~0_2418 v_main_~y~0_2472) (+ v_main_~x~0_2419 v_main_~y~0_2473)) (<= (div (+ (* (- 1) v_main_~y~0_2473) 1000000 v_main_~y~0_2472 (* (- 1) v_main_~x~0_2419)) (- 4294967296)) (+ (div (+ v_main_~x~0_2419 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_2473, main_#t~post5=|v_main_#t~post5_382|, main_~x~0=v_main_~x~0_2419, main_#t~post6=|v_main_#t~post6_766|} OutVars{main_#t~post5=|v_main_#t~post5_381|, main_~y~0=v_main_~y~0_2472, main_~x~0=v_main_~x~0_2418, main_#t~post6=|v_main_#t~post6_764|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {44781#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:19,423 INFO L290 TraceCheckUtils]: 7: Hoare triple {44781#(and (= main_~x~0 0) (= main_~y~0 0))} [266] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44781#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:19,424 INFO L290 TraceCheckUtils]: 8: Hoare triple {44781#(and (= main_~x~0 0) (= main_~y~0 0))} [267] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2421 v_main_~x~0_2420)) (.cse1 (= v_main_~y~0_2475 v_main_~y~0_2474)) (.cse4 (mod v_main_~x~0_2421 4294967296)) (.cse2 (= |v_main_#t~post4_387| |v_main_#t~post4_386|)) (.cse3 (= |v_main_#t~post6_769| |v_main_#t~post6_765|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~y~0_2475 v_main_~y~0_2474) (<= (div (+ (* (- 1) v_main_~x~0_2421) (* (- 1) v_main_~y~0_2474) v_main_~y~0_2475 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2421 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2420 v_main_~y~0_2475) (+ v_main_~x~0_2421 v_main_~y~0_2474))) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_387|, main_~y~0=v_main_~y~0_2475, main_~x~0=v_main_~x~0_2421, main_#t~post6=|v_main_#t~post6_769|} OutVars{main_#t~post4=|v_main_#t~post4_386|, main_~y~0=v_main_~y~0_2474, main_~x~0=v_main_~x~0_2420, main_#t~post6=|v_main_#t~post6_765|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {44791#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:39:19,424 INFO L290 TraceCheckUtils]: 9: Hoare triple {44791#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [264] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {44756#false} is VALID [2022-04-28 03:39:19,424 INFO L272 TraceCheckUtils]: 10: Hoare triple {44756#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {44756#false} is VALID [2022-04-28 03:39:19,424 INFO L290 TraceCheckUtils]: 11: Hoare triple {44756#false} ~cond := #in~cond; {44756#false} is VALID [2022-04-28 03:39:19,424 INFO L290 TraceCheckUtils]: 12: Hoare triple {44756#false} assume 0 == ~cond; {44756#false} is VALID [2022-04-28 03:39:19,424 INFO L290 TraceCheckUtils]: 13: Hoare triple {44756#false} assume !false; {44756#false} is VALID [2022-04-28 03:39:19,425 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:19,425 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:39:20,484 INFO L290 TraceCheckUtils]: 13: Hoare triple {44756#false} assume !false; {44756#false} is VALID [2022-04-28 03:39:20,485 INFO L290 TraceCheckUtils]: 12: Hoare triple {44810#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {44756#false} is VALID [2022-04-28 03:39:20,485 INFO L290 TraceCheckUtils]: 11: Hoare triple {44814#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {44810#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:39:20,485 INFO L272 TraceCheckUtils]: 10: Hoare triple {44818#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {44814#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:39:20,485 INFO L290 TraceCheckUtils]: 9: Hoare triple {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [264] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {44818#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:39:20,487 INFO L290 TraceCheckUtils]: 8: Hoare triple {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [267] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2421 v_main_~x~0_2420)) (.cse1 (= v_main_~y~0_2475 v_main_~y~0_2474)) (.cse4 (mod v_main_~x~0_2421 4294967296)) (.cse2 (= |v_main_#t~post4_387| |v_main_#t~post4_386|)) (.cse3 (= |v_main_#t~post6_769| |v_main_#t~post6_765|))) (or (and .cse0 .cse1 .cse2 .cse3) (and (< .cse4 500000) (< v_main_~y~0_2475 v_main_~y~0_2474) (<= (div (+ (* (- 1) v_main_~x~0_2421) (* (- 1) v_main_~y~0_2474) v_main_~y~0_2475 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2421 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2420 v_main_~y~0_2475) (+ v_main_~x~0_2421 v_main_~y~0_2474))) (and .cse0 .cse1 (<= 500000 .cse4) .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_387|, main_~y~0=v_main_~y~0_2475, main_~x~0=v_main_~x~0_2421, main_#t~post6=|v_main_#t~post6_769|} OutVars{main_#t~post4=|v_main_#t~post4_386|, main_~y~0=v_main_~y~0_2474, main_~x~0=v_main_~x~0_2420, main_#t~post6=|v_main_#t~post6_765|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:20,487 INFO L290 TraceCheckUtils]: 7: Hoare triple {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [266] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:20,499 INFO L290 TraceCheckUtils]: 6: Hoare triple {44832#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2485_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_2485_33) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2485_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [265] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2419 4294967296))) (let ((.cse0 (= |v_main_#t~post6_766| |v_main_#t~post6_764|)) (.cse1 (= v_main_~x~0_2419 v_main_~x~0_2418)) (.cse2 (= v_main_~y~0_2473 v_main_~y~0_2472)) (.cse3 (= |v_main_#t~post5_382| |v_main_#t~post5_381|)) (.cse5 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 (or (not .cse4) (not .cse5)) .cse2 .cse3) (and (< v_main_~y~0_2472 v_main_~y~0_2473) .cse5 .cse4 (= (+ v_main_~x~0_2418 v_main_~y~0_2472) (+ v_main_~x~0_2419 v_main_~y~0_2473)) (<= (div (+ (* (- 1) v_main_~y~0_2473) 1000000 v_main_~y~0_2472 (* (- 1) v_main_~x~0_2419)) (- 4294967296)) (+ (div (+ v_main_~x~0_2419 (- 4294967295)) 4294967296) 1)))))) InVars {main_~y~0=v_main_~y~0_2473, main_#t~post5=|v_main_#t~post5_382|, main_~x~0=v_main_~x~0_2419, main_#t~post6=|v_main_#t~post6_766|} OutVars{main_#t~post5=|v_main_#t~post5_381|, main_~y~0=v_main_~y~0_2472, main_~x~0=v_main_~x~0_2418, main_#t~post6=|v_main_#t~post6_764|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {44822#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:20,499 INFO L290 TraceCheckUtils]: 5: Hoare triple {44755#true} ~x~0 := 0;~y~0 := 0; {44832#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2485_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* 4294967296 aux_div_v_main_~y~0_2485_33) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2485_33) main_~y~0)))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:39:20,499 INFO L272 TraceCheckUtils]: 4: Hoare triple {44755#true} call #t~ret7 := main(); {44755#true} is VALID [2022-04-28 03:39:20,499 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {44755#true} {44755#true} #41#return; {44755#true} is VALID [2022-04-28 03:39:20,499 INFO L290 TraceCheckUtils]: 2: Hoare triple {44755#true} assume true; {44755#true} is VALID [2022-04-28 03:39:20,499 INFO L290 TraceCheckUtils]: 1: Hoare triple {44755#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {44755#true} is VALID [2022-04-28 03:39:20,500 INFO L272 TraceCheckUtils]: 0: Hoare triple {44755#true} call ULTIMATE.init(); {44755#true} is VALID [2022-04-28 03:39:20,500 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:20,500 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1180977648] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:39:20,500 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:39:20,500 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:39:23,666 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:39:23,666 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1184111760] [2022-04-28 03:39:23,666 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1184111760] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:39:23,666 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:39:23,666 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [59] imperfect sequences [] total 59 [2022-04-28 03:39:23,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1266810002] [2022-04-28 03:39:23,667 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:39:23,679 INFO L78 Accepts]: Start accepts. Automaton has has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 179 [2022-04-28 03:39:23,679 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:39:23,679 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:23,759 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 179 edges. 179 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:23,759 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 59 states [2022-04-28 03:39:23,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:39:23,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2022-04-28 03:39:23,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=309, Invalid=4113, Unknown=0, NotChecked=0, Total=4422 [2022-04-28 03:39:23,760 INFO L87 Difference]: Start difference. First operand 181 states and 183 transitions. Second operand has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:32,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:32,792 INFO L93 Difference]: Finished difference Result 193 states and 197 transitions. [2022-04-28 03:39:32,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2022-04-28 03:39:32,792 INFO L78 Accepts]: Start accepts. Automaton has has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 179 [2022-04-28 03:39:32,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:39:32,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:32,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 193 transitions. [2022-04-28 03:39:32,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:32,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 193 transitions. [2022-04-28 03:39:32,794 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 59 states and 193 transitions. [2022-04-28 03:39:32,887 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 193 edges. 193 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:32,889 INFO L225 Difference]: With dead ends: 193 [2022-04-28 03:39:32,889 INFO L226 Difference]: Without dead ends: 185 [2022-04-28 03:39:32,890 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 263 GetRequests, 29 SyntacticMatches, 113 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2616 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=701, Invalid=14305, Unknown=0, NotChecked=0, Total=15006 [2022-04-28 03:39:32,890 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 122 mSDsluCounter, 282 mSDsCounter, 0 mSdLazyCounter, 9801 mSolverCounterSat, 58 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 122 SdHoareTripleChecker+Valid, 294 SdHoareTripleChecker+Invalid, 9859 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 58 IncrementalHoareTripleChecker+Valid, 9801 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-04-28 03:39:32,890 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [122 Valid, 294 Invalid, 9859 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [58 Valid, 9801 Invalid, 0 Unknown, 0 Unchecked, 4.6s Time] [2022-04-28 03:39:32,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2022-04-28 03:39:33,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 184. [2022-04-28 03:39:33,105 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:39:33,106 INFO L82 GeneralOperation]: Start isEquivalent. First operand 185 states. Second operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:33,106 INFO L74 IsIncluded]: Start isIncluded. First operand 185 states. Second operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:33,106 INFO L87 Difference]: Start difference. First operand 185 states. Second operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:33,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:33,107 INFO L93 Difference]: Finished difference Result 185 states and 187 transitions. [2022-04-28 03:39:33,107 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 187 transitions. [2022-04-28 03:39:33,108 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:39:33,108 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:39:33,108 INFO L74 IsIncluded]: Start isIncluded. First operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-28 03:39:33,108 INFO L87 Difference]: Start difference. First operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-28 03:39:33,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:33,109 INFO L93 Difference]: Finished difference Result 185 states and 187 transitions. [2022-04-28 03:39:33,109 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 187 transitions. [2022-04-28 03:39:33,109 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:39:33,110 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:39:33,110 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:39:33,110 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:39:33,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 184 states, 179 states have (on average 1.0167597765363128) internal successors, (182), 179 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:33,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 186 transitions. [2022-04-28 03:39:33,111 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 186 transitions. Word has length 179 [2022-04-28 03:39:33,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:39:33,112 INFO L495 AbstractCegarLoop]: Abstraction has 184 states and 186 transitions. [2022-04-28 03:39:33,112 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 59 states, 59 states have (on average 2.9661016949152543) internal successors, (175), 58 states have internal predecessors, (175), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:33,112 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 184 states and 186 transitions. [2022-04-28 03:39:33,338 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 186 edges. 186 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:33,338 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 186 transitions. [2022-04-28 03:39:33,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2022-04-28 03:39:33,339 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:39:33,339 INFO L195 NwaCegarLoop]: trace histogram [57, 57, 56, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:39:33,355 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Forceful destruction successful, exit code 0 [2022-04-28 03:39:33,550 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57,56 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:39:33,551 INFO L420 AbstractCegarLoop]: === Iteration 59 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:39:33,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:39:33,551 INFO L85 PathProgramCache]: Analyzing trace with hash 463063053, now seen corresponding path program 56 times [2022-04-28 03:39:33,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:39:33,551 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1721833414] [2022-04-28 03:39:36,373 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:39:36,605 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:39:37,023 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:39:37,024 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:39:37,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1658790575, now seen corresponding path program 1 times [2022-04-28 03:39:37,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:39:37,027 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113789291] [2022-04-28 03:39:37,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:39:37,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:39:37,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:37,061 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:39:37,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:37,064 INFO L290 TraceCheckUtils]: 0: Hoare triple {46151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {46144#true} is VALID [2022-04-28 03:39:37,064 INFO L290 TraceCheckUtils]: 1: Hoare triple {46144#true} assume true; {46144#true} is VALID [2022-04-28 03:39:37,064 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {46144#true} {46144#true} #41#return; {46144#true} is VALID [2022-04-28 03:39:37,064 INFO L272 TraceCheckUtils]: 0: Hoare triple {46144#true} call ULTIMATE.init(); {46151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:39:37,064 INFO L290 TraceCheckUtils]: 1: Hoare triple {46151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {46144#true} is VALID [2022-04-28 03:39:37,064 INFO L290 TraceCheckUtils]: 2: Hoare triple {46144#true} assume true; {46144#true} is VALID [2022-04-28 03:39:37,064 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46144#true} {46144#true} #41#return; {46144#true} is VALID [2022-04-28 03:39:37,065 INFO L272 TraceCheckUtils]: 4: Hoare triple {46144#true} call #t~ret7 := main(); {46144#true} is VALID [2022-04-28 03:39:37,065 INFO L290 TraceCheckUtils]: 5: Hoare triple {46144#true} ~x~0 := 0;~y~0 := 0; {46149#(= main_~x~0 0)} is VALID [2022-04-28 03:39:37,065 INFO L290 TraceCheckUtils]: 6: Hoare triple {46149#(= main_~x~0 0)} [269] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2491 4294967296))) (let ((.cse2 (= v_main_~y~0_2546 v_main_~y~0_2545)) (.cse3 (= |v_main_#t~post5_389| |v_main_#t~post5_388|)) (.cse0 (<= 500000 .cse4)) (.cse1 (< .cse4 1000000))) (or (and (= v_main_~x~0_2490 v_main_~x~0_2491) (or (not .cse0) (not .cse1)) .cse2 (= |v_main_#t~post6_778| |v_main_#t~post6_780|) .cse3) (and (= v_main_~x~0_2491 v_main_~x~0_2490) .cse2 (= |v_main_#t~post6_780| |v_main_#t~post6_778|) .cse3) (and (= (+ v_main_~x~0_2490 v_main_~y~0_2545) (+ v_main_~x~0_2491 v_main_~y~0_2546)) (<= (div (+ (* (- 1) v_main_~x~0_2491) (* (- 1) v_main_~y~0_2546) 1000000 v_main_~y~0_2545) (- 4294967296)) (+ (div (+ v_main_~x~0_2491 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_2545 v_main_~y~0_2546) .cse0 .cse1)))) InVars {main_~y~0=v_main_~y~0_2546, main_#t~post5=|v_main_#t~post5_389|, main_~x~0=v_main_~x~0_2491, main_#t~post6=|v_main_#t~post6_780|} OutVars{main_#t~post5=|v_main_#t~post5_388|, main_~y~0=v_main_~y~0_2545, main_~x~0=v_main_~x~0_2490, main_#t~post6=|v_main_#t~post6_778|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {46149#(= main_~x~0 0)} is VALID [2022-04-28 03:39:37,066 INFO L290 TraceCheckUtils]: 7: Hoare triple {46149#(= main_~x~0 0)} [270] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46149#(= main_~x~0 0)} is VALID [2022-04-28 03:39:37,067 INFO L290 TraceCheckUtils]: 8: Hoare triple {46149#(= main_~x~0 0)} [271] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2548 v_main_~y~0_2547)) (.cse2 (= |v_main_#t~post4_394| |v_main_#t~post4_393|)) (.cse3 (= v_main_~x~0_2493 v_main_~x~0_2492)) (.cse1 (mod v_main_~x~0_2493 4294967296))) (or (and (= |v_main_#t~post6_779| |v_main_#t~post6_783|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_783| |v_main_#t~post6_779|) .cse3) (and (= (+ v_main_~x~0_2493 v_main_~y~0_2547) (+ v_main_~x~0_2492 v_main_~y~0_2548)) (< .cse1 500000) (< v_main_~y~0_2548 v_main_~y~0_2547) (<= (div (+ (* (- 1) v_main_~x~0_2493) v_main_~y~0_2548 500000 (* (- 1) v_main_~y~0_2547)) (- 4294967296)) (+ (div (+ v_main_~x~0_2493 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_394|, main_~y~0=v_main_~y~0_2548, main_~x~0=v_main_~x~0_2493, main_#t~post6=|v_main_#t~post6_783|} OutVars{main_#t~post4=|v_main_#t~post4_393|, main_~y~0=v_main_~y~0_2547, main_~x~0=v_main_~x~0_2492, main_#t~post6=|v_main_#t~post6_779|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {46150#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:39:37,067 INFO L290 TraceCheckUtils]: 9: Hoare triple {46150#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [268] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {46145#false} is VALID [2022-04-28 03:39:37,067 INFO L272 TraceCheckUtils]: 10: Hoare triple {46145#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {46145#false} is VALID [2022-04-28 03:39:37,067 INFO L290 TraceCheckUtils]: 11: Hoare triple {46145#false} ~cond := #in~cond; {46145#false} is VALID [2022-04-28 03:39:37,067 INFO L290 TraceCheckUtils]: 12: Hoare triple {46145#false} assume 0 == ~cond; {46145#false} is VALID [2022-04-28 03:39:37,067 INFO L290 TraceCheckUtils]: 13: Hoare triple {46145#false} assume !false; {46145#false} is VALID [2022-04-28 03:39:37,068 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:37,068 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:39:37,068 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113789291] [2022-04-28 03:39:37,068 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [113789291] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:39:37,068 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [182673653] [2022-04-28 03:39:37,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:39:37,068 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:39:37,068 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:39:37,069 INFO L229 MonitoredProcess]: Starting monitored process 57 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:39:37,070 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2022-04-28 03:39:37,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:37,097 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:39:37,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:37,106 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:39:37,235 INFO L272 TraceCheckUtils]: 0: Hoare triple {46144#true} call ULTIMATE.init(); {46144#true} is VALID [2022-04-28 03:39:37,236 INFO L290 TraceCheckUtils]: 1: Hoare triple {46144#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {46144#true} is VALID [2022-04-28 03:39:37,236 INFO L290 TraceCheckUtils]: 2: Hoare triple {46144#true} assume true; {46144#true} is VALID [2022-04-28 03:39:37,236 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46144#true} {46144#true} #41#return; {46144#true} is VALID [2022-04-28 03:39:37,236 INFO L272 TraceCheckUtils]: 4: Hoare triple {46144#true} call #t~ret7 := main(); {46144#true} is VALID [2022-04-28 03:39:37,236 INFO L290 TraceCheckUtils]: 5: Hoare triple {46144#true} ~x~0 := 0;~y~0 := 0; {46170#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:37,237 INFO L290 TraceCheckUtils]: 6: Hoare triple {46170#(and (= main_~x~0 0) (= main_~y~0 0))} [269] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2491 4294967296))) (let ((.cse2 (= v_main_~y~0_2546 v_main_~y~0_2545)) (.cse3 (= |v_main_#t~post5_389| |v_main_#t~post5_388|)) (.cse0 (<= 500000 .cse4)) (.cse1 (< .cse4 1000000))) (or (and (= v_main_~x~0_2490 v_main_~x~0_2491) (or (not .cse0) (not .cse1)) .cse2 (= |v_main_#t~post6_778| |v_main_#t~post6_780|) .cse3) (and (= v_main_~x~0_2491 v_main_~x~0_2490) .cse2 (= |v_main_#t~post6_780| |v_main_#t~post6_778|) .cse3) (and (= (+ v_main_~x~0_2490 v_main_~y~0_2545) (+ v_main_~x~0_2491 v_main_~y~0_2546)) (<= (div (+ (* (- 1) v_main_~x~0_2491) (* (- 1) v_main_~y~0_2546) 1000000 v_main_~y~0_2545) (- 4294967296)) (+ (div (+ v_main_~x~0_2491 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_2545 v_main_~y~0_2546) .cse0 .cse1)))) InVars {main_~y~0=v_main_~y~0_2546, main_#t~post5=|v_main_#t~post5_389|, main_~x~0=v_main_~x~0_2491, main_#t~post6=|v_main_#t~post6_780|} OutVars{main_#t~post5=|v_main_#t~post5_388|, main_~y~0=v_main_~y~0_2545, main_~x~0=v_main_~x~0_2490, main_#t~post6=|v_main_#t~post6_778|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {46170#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:37,237 INFO L290 TraceCheckUtils]: 7: Hoare triple {46170#(and (= main_~x~0 0) (= main_~y~0 0))} [270] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46170#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:39:37,238 INFO L290 TraceCheckUtils]: 8: Hoare triple {46170#(and (= main_~x~0 0) (= main_~y~0 0))} [271] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2548 v_main_~y~0_2547)) (.cse2 (= |v_main_#t~post4_394| |v_main_#t~post4_393|)) (.cse3 (= v_main_~x~0_2493 v_main_~x~0_2492)) (.cse1 (mod v_main_~x~0_2493 4294967296))) (or (and (= |v_main_#t~post6_779| |v_main_#t~post6_783|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_783| |v_main_#t~post6_779|) .cse3) (and (= (+ v_main_~x~0_2493 v_main_~y~0_2547) (+ v_main_~x~0_2492 v_main_~y~0_2548)) (< .cse1 500000) (< v_main_~y~0_2548 v_main_~y~0_2547) (<= (div (+ (* (- 1) v_main_~x~0_2493) v_main_~y~0_2548 500000 (* (- 1) v_main_~y~0_2547)) (- 4294967296)) (+ (div (+ v_main_~x~0_2493 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_394|, main_~y~0=v_main_~y~0_2548, main_~x~0=v_main_~x~0_2493, main_#t~post6=|v_main_#t~post6_783|} OutVars{main_#t~post4=|v_main_#t~post4_393|, main_~y~0=v_main_~y~0_2547, main_~x~0=v_main_~x~0_2492, main_#t~post6=|v_main_#t~post6_779|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {46180#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:39:37,238 INFO L290 TraceCheckUtils]: 9: Hoare triple {46180#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [268] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {46145#false} is VALID [2022-04-28 03:39:37,238 INFO L272 TraceCheckUtils]: 10: Hoare triple {46145#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {46145#false} is VALID [2022-04-28 03:39:37,239 INFO L290 TraceCheckUtils]: 11: Hoare triple {46145#false} ~cond := #in~cond; {46145#false} is VALID [2022-04-28 03:39:37,239 INFO L290 TraceCheckUtils]: 12: Hoare triple {46145#false} assume 0 == ~cond; {46145#false} is VALID [2022-04-28 03:39:37,239 INFO L290 TraceCheckUtils]: 13: Hoare triple {46145#false} assume !false; {46145#false} is VALID [2022-04-28 03:39:37,239 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:37,239 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:39:38,059 INFO L290 TraceCheckUtils]: 13: Hoare triple {46145#false} assume !false; {46145#false} is VALID [2022-04-28 03:39:38,059 INFO L290 TraceCheckUtils]: 12: Hoare triple {46199#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {46145#false} is VALID [2022-04-28 03:39:38,059 INFO L290 TraceCheckUtils]: 11: Hoare triple {46203#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {46199#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:39:38,060 INFO L272 TraceCheckUtils]: 10: Hoare triple {46207#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {46203#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:39:38,060 INFO L290 TraceCheckUtils]: 9: Hoare triple {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [268] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {46207#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:39:38,064 INFO L290 TraceCheckUtils]: 8: Hoare triple {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [271] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2548 v_main_~y~0_2547)) (.cse2 (= |v_main_#t~post4_394| |v_main_#t~post4_393|)) (.cse3 (= v_main_~x~0_2493 v_main_~x~0_2492)) (.cse1 (mod v_main_~x~0_2493 4294967296))) (or (and (= |v_main_#t~post6_779| |v_main_#t~post6_783|) .cse0 (<= 500000 .cse1) .cse2 .cse3) (and .cse0 .cse2 (= |v_main_#t~post6_783| |v_main_#t~post6_779|) .cse3) (and (= (+ v_main_~x~0_2493 v_main_~y~0_2547) (+ v_main_~x~0_2492 v_main_~y~0_2548)) (< .cse1 500000) (< v_main_~y~0_2548 v_main_~y~0_2547) (<= (div (+ (* (- 1) v_main_~x~0_2493) v_main_~y~0_2548 500000 (* (- 1) v_main_~y~0_2547)) (- 4294967296)) (+ (div (+ v_main_~x~0_2493 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_394|, main_~y~0=v_main_~y~0_2548, main_~x~0=v_main_~x~0_2493, main_#t~post6=|v_main_#t~post6_783|} OutVars{main_#t~post4=|v_main_#t~post4_393|, main_~y~0=v_main_~y~0_2547, main_~x~0=v_main_~x~0_2492, main_#t~post6=|v_main_#t~post6_779|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:38,064 INFO L290 TraceCheckUtils]: 7: Hoare triple {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [270] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:38,072 INFO L290 TraceCheckUtils]: 6: Hoare triple {46221#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_2558_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2558_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2558_33) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [269] L9-2-->L9-3_primed: Formula: (let ((.cse4 (mod v_main_~x~0_2491 4294967296))) (let ((.cse2 (= v_main_~y~0_2546 v_main_~y~0_2545)) (.cse3 (= |v_main_#t~post5_389| |v_main_#t~post5_388|)) (.cse0 (<= 500000 .cse4)) (.cse1 (< .cse4 1000000))) (or (and (= v_main_~x~0_2490 v_main_~x~0_2491) (or (not .cse0) (not .cse1)) .cse2 (= |v_main_#t~post6_778| |v_main_#t~post6_780|) .cse3) (and (= v_main_~x~0_2491 v_main_~x~0_2490) .cse2 (= |v_main_#t~post6_780| |v_main_#t~post6_778|) .cse3) (and (= (+ v_main_~x~0_2490 v_main_~y~0_2545) (+ v_main_~x~0_2491 v_main_~y~0_2546)) (<= (div (+ (* (- 1) v_main_~x~0_2491) (* (- 1) v_main_~y~0_2546) 1000000 v_main_~y~0_2545) (- 4294967296)) (+ (div (+ v_main_~x~0_2491 (- 4294967295)) 4294967296) 1)) (< v_main_~y~0_2545 v_main_~y~0_2546) .cse0 .cse1)))) InVars {main_~y~0=v_main_~y~0_2546, main_#t~post5=|v_main_#t~post5_389|, main_~x~0=v_main_~x~0_2491, main_#t~post6=|v_main_#t~post6_780|} OutVars{main_#t~post5=|v_main_#t~post5_388|, main_~y~0=v_main_~y~0_2545, main_~x~0=v_main_~x~0_2490, main_#t~post6=|v_main_#t~post6_778|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {46211#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:39:38,072 INFO L290 TraceCheckUtils]: 5: Hoare triple {46144#true} ~x~0 := 0;~y~0 := 0; {46221#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_2558_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2558_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2558_33) main_~y~0)))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:39:38,072 INFO L272 TraceCheckUtils]: 4: Hoare triple {46144#true} call #t~ret7 := main(); {46144#true} is VALID [2022-04-28 03:39:38,073 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46144#true} {46144#true} #41#return; {46144#true} is VALID [2022-04-28 03:39:38,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {46144#true} assume true; {46144#true} is VALID [2022-04-28 03:39:38,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {46144#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {46144#true} is VALID [2022-04-28 03:39:38,073 INFO L272 TraceCheckUtils]: 0: Hoare triple {46144#true} call ULTIMATE.init(); {46144#true} is VALID [2022-04-28 03:39:38,073 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:38,073 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [182673653] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:39:38,073 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:39:38,073 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:39:42,380 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:39:42,380 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1721833414] [2022-04-28 03:39:42,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1721833414] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:39:42,380 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:39:42,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [60] imperfect sequences [] total 60 [2022-04-28 03:39:42,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [608777168] [2022-04-28 03:39:42,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:39:42,381 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 182 [2022-04-28 03:39:42,381 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:39:42,381 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:42,500 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 182 edges. 182 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:42,500 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 60 states [2022-04-28 03:39:42,500 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:39:42,501 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2022-04-28 03:39:42,501 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=314, Invalid=4242, Unknown=0, NotChecked=0, Total=4556 [2022-04-28 03:39:42,501 INFO L87 Difference]: Start difference. First operand 184 states and 186 transitions. Second operand has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:54,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:54,929 INFO L93 Difference]: Finished difference Result 196 states and 200 transitions. [2022-04-28 03:39:54,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2022-04-28 03:39:54,930 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 182 [2022-04-28 03:39:54,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:39:54,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:54,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 196 transitions. [2022-04-28 03:39:54,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:54,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 196 transitions. [2022-04-28 03:39:54,948 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 60 states and 196 transitions. [2022-04-28 03:39:55,099 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 196 edges. 196 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:55,100 INFO L225 Difference]: With dead ends: 196 [2022-04-28 03:39:55,101 INFO L226 Difference]: Without dead ends: 188 [2022-04-28 03:39:55,101 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 29 SyntacticMatches, 115 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2691 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=713, Invalid=14787, Unknown=0, NotChecked=0, Total=15500 [2022-04-28 03:39:55,101 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 124 mSDsluCounter, 287 mSDsCounter, 0 mSdLazyCounter, 10147 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 299 SdHoareTripleChecker+Invalid, 10206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 10147 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.3s IncrementalHoareTripleChecker+Time [2022-04-28 03:39:55,102 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [124 Valid, 299 Invalid, 10206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 10147 Invalid, 0 Unknown, 0 Unchecked, 6.3s Time] [2022-04-28 03:39:55,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2022-04-28 03:39:55,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 187. [2022-04-28 03:39:55,435 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:39:55,435 INFO L82 GeneralOperation]: Start isEquivalent. First operand 188 states. Second operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:55,435 INFO L74 IsIncluded]: Start isIncluded. First operand 188 states. Second operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:55,435 INFO L87 Difference]: Start difference. First operand 188 states. Second operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:55,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:55,437 INFO L93 Difference]: Finished difference Result 188 states and 190 transitions. [2022-04-28 03:39:55,437 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2022-04-28 03:39:55,437 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:39:55,437 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:39:55,437 INFO L74 IsIncluded]: Start isIncluded. First operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 188 states. [2022-04-28 03:39:55,437 INFO L87 Difference]: Start difference. First operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 188 states. [2022-04-28 03:39:55,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:39:55,439 INFO L93 Difference]: Finished difference Result 188 states and 190 transitions. [2022-04-28 03:39:55,439 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2022-04-28 03:39:55,439 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:39:55,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:39:55,439 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:39:55,439 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:39:55,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 187 states, 182 states have (on average 1.0164835164835164) internal successors, (185), 182 states have internal predecessors, (185), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:55,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 189 transitions. [2022-04-28 03:39:55,441 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 189 transitions. Word has length 182 [2022-04-28 03:39:55,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:39:55,441 INFO L495 AbstractCegarLoop]: Abstraction has 187 states and 189 transitions. [2022-04-28 03:39:55,441 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 60 states, 60 states have (on average 2.966666666666667) internal successors, (178), 59 states have internal predecessors, (178), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:39:55,441 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 187 states and 189 transitions. [2022-04-28 03:39:55,713 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:39:55,713 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 189 transitions. [2022-04-28 03:39:55,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2022-04-28 03:39:55,713 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:39:55,713 INFO L195 NwaCegarLoop]: trace histogram [58, 58, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:39:55,729 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Forceful destruction successful, exit code 0 [2022-04-28 03:39:55,927 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58,57 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:39:55,927 INFO L420 AbstractCegarLoop]: === Iteration 60 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:39:55,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:39:55,928 INFO L85 PathProgramCache]: Analyzing trace with hash 134317893, now seen corresponding path program 57 times [2022-04-28 03:39:55,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:39:55,928 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [961775424] [2022-04-28 03:39:56,807 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:39:57,430 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:39:57,431 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:39:57,435 INFO L85 PathProgramCache]: Analyzing trace with hash -586644561, now seen corresponding path program 1 times [2022-04-28 03:39:57,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:39:57,435 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977173657] [2022-04-28 03:39:57,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:39:57,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:39:57,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:57,479 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:39:57,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:57,483 INFO L290 TraceCheckUtils]: 0: Hoare triple {47561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {47554#true} is VALID [2022-04-28 03:39:57,483 INFO L290 TraceCheckUtils]: 1: Hoare triple {47554#true} assume true; {47554#true} is VALID [2022-04-28 03:39:57,483 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47554#true} {47554#true} #41#return; {47554#true} is VALID [2022-04-28 03:39:57,484 INFO L272 TraceCheckUtils]: 0: Hoare triple {47554#true} call ULTIMATE.init(); {47561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:39:57,484 INFO L290 TraceCheckUtils]: 1: Hoare triple {47561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {47554#true} is VALID [2022-04-28 03:39:57,484 INFO L290 TraceCheckUtils]: 2: Hoare triple {47554#true} assume true; {47554#true} is VALID [2022-04-28 03:39:57,484 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47554#true} {47554#true} #41#return; {47554#true} is VALID [2022-04-28 03:39:57,484 INFO L272 TraceCheckUtils]: 4: Hoare triple {47554#true} call #t~ret7 := main(); {47554#true} is VALID [2022-04-28 03:39:57,484 INFO L290 TraceCheckUtils]: 5: Hoare triple {47554#true} ~x~0 := 0;~y~0 := 0; {47559#(= main_~x~0 0)} is VALID [2022-04-28 03:39:57,485 INFO L290 TraceCheckUtils]: 6: Hoare triple {47559#(= main_~x~0 0)} [273] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2564 4294967296))) (let ((.cse2 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_794| |v_main_#t~post6_792|)) (.cse3 (= v_main_~x~0_2564 v_main_~x~0_2563)) (.cse4 (= |v_main_#t~post5_396| |v_main_#t~post5_395|))) (or (and (= v_main_~y~0_2619 v_main_~y~0_2620) .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4) (and (= (+ v_main_~x~0_2563 v_main_~y~0_2619) (+ v_main_~x~0_2564 v_main_~y~0_2620)) .cse2 (< v_main_~x~0_2564 v_main_~x~0_2563) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2563) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2564 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse3 .cse4 (= v_main_~y~0_2620 v_main_~y~0_2619))))) InVars {main_~y~0=v_main_~y~0_2620, main_#t~post5=|v_main_#t~post5_396|, main_~x~0=v_main_~x~0_2564, main_#t~post6=|v_main_#t~post6_794|} OutVars{main_#t~post5=|v_main_#t~post5_395|, main_~y~0=v_main_~y~0_2619, main_~x~0=v_main_~x~0_2563, main_#t~post6=|v_main_#t~post6_792|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {47559#(= main_~x~0 0)} is VALID [2022-04-28 03:39:57,485 INFO L290 TraceCheckUtils]: 7: Hoare triple {47559#(= main_~x~0 0)} [274] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47559#(= main_~x~0 0)} is VALID [2022-04-28 03:39:57,486 INFO L290 TraceCheckUtils]: 8: Hoare triple {47559#(= main_~x~0 0)} [275] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2566 v_main_~x~0_2565)) (.cse1 (= |v_main_#t~post6_797| |v_main_#t~post6_793|)) (.cse2 (= v_main_~y~0_2622 v_main_~y~0_2621)) (.cse3 (= |v_main_#t~post4_401| |v_main_#t~post4_400|)) (.cse4 (mod v_main_~x~0_2566 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_2566 v_main_~y~0_2621) (+ v_main_~x~0_2565 v_main_~y~0_2622)) (< v_main_~x~0_2566 v_main_~x~0_2565) (<= (div (+ (* (- 1) v_main_~x~0_2565) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2566 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_401|, main_~y~0=v_main_~y~0_2622, main_~x~0=v_main_~x~0_2566, main_#t~post6=|v_main_#t~post6_797|} OutVars{main_#t~post4=|v_main_#t~post4_400|, main_~y~0=v_main_~y~0_2621, main_~x~0=v_main_~x~0_2565, main_#t~post6=|v_main_#t~post6_793|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {47560#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:39:57,486 INFO L290 TraceCheckUtils]: 9: Hoare triple {47560#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [272] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {47555#false} is VALID [2022-04-28 03:39:57,487 INFO L272 TraceCheckUtils]: 10: Hoare triple {47555#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {47555#false} is VALID [2022-04-28 03:39:57,487 INFO L290 TraceCheckUtils]: 11: Hoare triple {47555#false} ~cond := #in~cond; {47555#false} is VALID [2022-04-28 03:39:57,487 INFO L290 TraceCheckUtils]: 12: Hoare triple {47555#false} assume 0 == ~cond; {47555#false} is VALID [2022-04-28 03:39:57,487 INFO L290 TraceCheckUtils]: 13: Hoare triple {47555#false} assume !false; {47555#false} is VALID [2022-04-28 03:39:57,487 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:57,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:39:57,487 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977173657] [2022-04-28 03:39:57,487 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1977173657] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:39:57,487 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [546454783] [2022-04-28 03:39:57,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:39:57,487 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:39:57,487 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:39:57,488 INFO L229 MonitoredProcess]: Starting monitored process 58 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:39:57,489 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2022-04-28 03:39:57,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:57,516 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-28 03:39:57,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:39:57,521 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:39:57,611 INFO L272 TraceCheckUtils]: 0: Hoare triple {47554#true} call ULTIMATE.init(); {47554#true} is VALID [2022-04-28 03:39:57,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {47554#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {47554#true} is VALID [2022-04-28 03:39:57,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {47554#true} assume true; {47554#true} is VALID [2022-04-28 03:39:57,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47554#true} {47554#true} #41#return; {47554#true} is VALID [2022-04-28 03:39:57,612 INFO L272 TraceCheckUtils]: 4: Hoare triple {47554#true} call #t~ret7 := main(); {47554#true} is VALID [2022-04-28 03:39:57,612 INFO L290 TraceCheckUtils]: 5: Hoare triple {47554#true} ~x~0 := 0;~y~0 := 0; {47559#(= main_~x~0 0)} is VALID [2022-04-28 03:39:57,612 INFO L290 TraceCheckUtils]: 6: Hoare triple {47559#(= main_~x~0 0)} [273] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2564 4294967296))) (let ((.cse2 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_794| |v_main_#t~post6_792|)) (.cse3 (= v_main_~x~0_2564 v_main_~x~0_2563)) (.cse4 (= |v_main_#t~post5_396| |v_main_#t~post5_395|))) (or (and (= v_main_~y~0_2619 v_main_~y~0_2620) .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4) (and (= (+ v_main_~x~0_2563 v_main_~y~0_2619) (+ v_main_~x~0_2564 v_main_~y~0_2620)) .cse2 (< v_main_~x~0_2564 v_main_~x~0_2563) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2563) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2564 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse3 .cse4 (= v_main_~y~0_2620 v_main_~y~0_2619))))) InVars {main_~y~0=v_main_~y~0_2620, main_#t~post5=|v_main_#t~post5_396|, main_~x~0=v_main_~x~0_2564, main_#t~post6=|v_main_#t~post6_794|} OutVars{main_#t~post5=|v_main_#t~post5_395|, main_~y~0=v_main_~y~0_2619, main_~x~0=v_main_~x~0_2563, main_#t~post6=|v_main_#t~post6_792|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {47559#(= main_~x~0 0)} is VALID [2022-04-28 03:39:57,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {47559#(= main_~x~0 0)} [274] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47559#(= main_~x~0 0)} is VALID [2022-04-28 03:39:57,613 INFO L290 TraceCheckUtils]: 8: Hoare triple {47559#(= main_~x~0 0)} [275] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2566 v_main_~x~0_2565)) (.cse1 (= |v_main_#t~post6_797| |v_main_#t~post6_793|)) (.cse2 (= v_main_~y~0_2622 v_main_~y~0_2621)) (.cse3 (= |v_main_#t~post4_401| |v_main_#t~post4_400|)) (.cse4 (mod v_main_~x~0_2566 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_2566 v_main_~y~0_2621) (+ v_main_~x~0_2565 v_main_~y~0_2622)) (< v_main_~x~0_2566 v_main_~x~0_2565) (<= (div (+ (* (- 1) v_main_~x~0_2565) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2566 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_401|, main_~y~0=v_main_~y~0_2622, main_~x~0=v_main_~x~0_2566, main_#t~post6=|v_main_#t~post6_797|} OutVars{main_#t~post4=|v_main_#t~post4_400|, main_~y~0=v_main_~y~0_2621, main_~x~0=v_main_~x~0_2565, main_#t~post6=|v_main_#t~post6_793|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {47589#(or (= main_~x~0 0) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:39:57,614 INFO L290 TraceCheckUtils]: 9: Hoare triple {47589#(or (= main_~x~0 0) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (< 0 main_~x~0)))} [272] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {47555#false} is VALID [2022-04-28 03:39:57,614 INFO L272 TraceCheckUtils]: 10: Hoare triple {47555#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {47555#false} is VALID [2022-04-28 03:39:57,614 INFO L290 TraceCheckUtils]: 11: Hoare triple {47555#false} ~cond := #in~cond; {47555#false} is VALID [2022-04-28 03:39:57,614 INFO L290 TraceCheckUtils]: 12: Hoare triple {47555#false} assume 0 == ~cond; {47555#false} is VALID [2022-04-28 03:39:57,614 INFO L290 TraceCheckUtils]: 13: Hoare triple {47555#false} assume !false; {47555#false} is VALID [2022-04-28 03:39:57,614 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:57,614 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:39:57,904 INFO L290 TraceCheckUtils]: 13: Hoare triple {47555#false} assume !false; {47555#false} is VALID [2022-04-28 03:39:57,904 INFO L290 TraceCheckUtils]: 12: Hoare triple {47555#false} assume 0 == ~cond; {47555#false} is VALID [2022-04-28 03:39:57,904 INFO L290 TraceCheckUtils]: 11: Hoare triple {47555#false} ~cond := #in~cond; {47555#false} is VALID [2022-04-28 03:39:57,904 INFO L272 TraceCheckUtils]: 10: Hoare triple {47555#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {47555#false} is VALID [2022-04-28 03:39:57,904 INFO L290 TraceCheckUtils]: 9: Hoare triple {47617#(< (mod main_~x~0 4294967296) 1000000)} [272] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {47555#false} is VALID [2022-04-28 03:39:57,907 INFO L290 TraceCheckUtils]: 8: Hoare triple {47617#(< (mod main_~x~0 4294967296) 1000000)} [275] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~x~0_2566 v_main_~x~0_2565)) (.cse1 (= |v_main_#t~post6_797| |v_main_#t~post6_793|)) (.cse2 (= v_main_~y~0_2622 v_main_~y~0_2621)) (.cse3 (= |v_main_#t~post4_401| |v_main_#t~post4_400|)) (.cse4 (mod v_main_~x~0_2566 4294967296))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse0 .cse1 .cse2 (<= 500000 .cse4) .cse3) (and (< .cse4 500000) (= (+ v_main_~x~0_2566 v_main_~y~0_2621) (+ v_main_~x~0_2565 v_main_~y~0_2622)) (< v_main_~x~0_2566 v_main_~x~0_2565) (<= (div (+ (* (- 1) v_main_~x~0_2565) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2566 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_401|, main_~y~0=v_main_~y~0_2622, main_~x~0=v_main_~x~0_2566, main_#t~post6=|v_main_#t~post6_797|} OutVars{main_#t~post4=|v_main_#t~post4_400|, main_~y~0=v_main_~y~0_2621, main_~x~0=v_main_~x~0_2565, main_#t~post6=|v_main_#t~post6_793|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {47617#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:39:57,907 INFO L290 TraceCheckUtils]: 7: Hoare triple {47617#(< (mod main_~x~0 4294967296) 1000000)} [274] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47617#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:39:57,907 INFO L290 TraceCheckUtils]: 6: Hoare triple {47627#(< (mod main_~x~0 4294967296) 500000)} [273] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2564 4294967296))) (let ((.cse2 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse0 (= |v_main_#t~post6_794| |v_main_#t~post6_792|)) (.cse3 (= v_main_~x~0_2564 v_main_~x~0_2563)) (.cse4 (= |v_main_#t~post5_396| |v_main_#t~post5_395|))) (or (and (= v_main_~y~0_2619 v_main_~y~0_2620) .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4) (and (= (+ v_main_~x~0_2563 v_main_~y~0_2619) (+ v_main_~x~0_2564 v_main_~y~0_2620)) .cse2 (< v_main_~x~0_2564 v_main_~x~0_2563) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2563) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2564 (- 4294967295)) 4294967296) 1))) (and .cse0 .cse3 .cse4 (= v_main_~y~0_2620 v_main_~y~0_2619))))) InVars {main_~y~0=v_main_~y~0_2620, main_#t~post5=|v_main_#t~post5_396|, main_~x~0=v_main_~x~0_2564, main_#t~post6=|v_main_#t~post6_794|} OutVars{main_#t~post5=|v_main_#t~post5_395|, main_~y~0=v_main_~y~0_2619, main_~x~0=v_main_~x~0_2563, main_#t~post6=|v_main_#t~post6_792|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {47617#(< (mod main_~x~0 4294967296) 1000000)} is VALID [2022-04-28 03:39:57,908 INFO L290 TraceCheckUtils]: 5: Hoare triple {47554#true} ~x~0 := 0;~y~0 := 0; {47627#(< (mod main_~x~0 4294967296) 500000)} is VALID [2022-04-28 03:39:57,908 INFO L272 TraceCheckUtils]: 4: Hoare triple {47554#true} call #t~ret7 := main(); {47554#true} is VALID [2022-04-28 03:39:57,908 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47554#true} {47554#true} #41#return; {47554#true} is VALID [2022-04-28 03:39:57,908 INFO L290 TraceCheckUtils]: 2: Hoare triple {47554#true} assume true; {47554#true} is VALID [2022-04-28 03:39:57,908 INFO L290 TraceCheckUtils]: 1: Hoare triple {47554#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {47554#true} is VALID [2022-04-28 03:39:57,908 INFO L272 TraceCheckUtils]: 0: Hoare triple {47554#true} call ULTIMATE.init(); {47554#true} is VALID [2022-04-28 03:39:57,908 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:39:57,908 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [546454783] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:39:57,908 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:39:57,908 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2022-04-28 03:40:00,882 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:40:00,882 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [961775424] [2022-04-28 03:40:00,883 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [961775424] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:40:00,883 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:40:00,883 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [61] imperfect sequences [] total 61 [2022-04-28 03:40:00,883 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146907600] [2022-04-28 03:40:00,883 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:40:00,883 INFO L78 Accepts]: Start accepts. Automaton has has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 185 [2022-04-28 03:40:00,883 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:40:00,883 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:00,960 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 185 edges. 185 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:40:00,960 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 61 states [2022-04-28 03:40:00,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:40:00,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2022-04-28 03:40:00,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=3797, Unknown=0, NotChecked=0, Total=4160 [2022-04-28 03:40:00,961 INFO L87 Difference]: Start difference. First operand 187 states and 189 transitions. Second operand has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:12,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:40:12,479 INFO L93 Difference]: Finished difference Result 199 states and 203 transitions. [2022-04-28 03:40:12,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2022-04-28 03:40:12,479 INFO L78 Accepts]: Start accepts. Automaton has has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 185 [2022-04-28 03:40:12,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:40:12,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:12,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 199 transitions. [2022-04-28 03:40:12,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:12,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 199 transitions. [2022-04-28 03:40:12,481 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 61 states and 199 transitions. [2022-04-28 03:40:12,588 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 199 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:40:12,590 INFO L225 Difference]: With dead ends: 199 [2022-04-28 03:40:12,590 INFO L226 Difference]: Without dead ends: 191 [2022-04-28 03:40:12,591 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 33 SyntacticMatches, 117 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2518 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=827, Invalid=14179, Unknown=0, NotChecked=0, Total=15006 [2022-04-28 03:40:12,591 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 126 mSDsluCounter, 292 mSDsCounter, 0 mSdLazyCounter, 10499 mSolverCounterSat, 60 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 304 SdHoareTripleChecker+Invalid, 10559 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 60 IncrementalHoareTripleChecker+Valid, 10499 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.9s IncrementalHoareTripleChecker+Time [2022-04-28 03:40:12,591 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [126 Valid, 304 Invalid, 10559 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [60 Valid, 10499 Invalid, 0 Unknown, 0 Unchecked, 5.9s Time] [2022-04-28 03:40:12,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2022-04-28 03:40:12,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 190. [2022-04-28 03:40:12,923 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:40:12,923 INFO L82 GeneralOperation]: Start isEquivalent. First operand 191 states. Second operand has 190 states, 185 states have (on average 1.0162162162162163) internal successors, (188), 185 states have internal predecessors, (188), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:12,924 INFO L74 IsIncluded]: Start isIncluded. First operand 191 states. Second operand has 190 states, 185 states have (on average 1.0162162162162163) internal successors, (188), 185 states have internal predecessors, (188), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:12,924 INFO L87 Difference]: Start difference. First operand 191 states. Second operand has 190 states, 185 states have (on average 1.0162162162162163) internal successors, (188), 185 states have internal predecessors, (188), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:12,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:40:12,925 INFO L93 Difference]: Finished difference Result 191 states and 193 transitions. [2022-04-28 03:40:12,925 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 193 transitions. [2022-04-28 03:40:12,925 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:40:12,926 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:40:12,926 INFO L74 IsIncluded]: Start isIncluded. First operand has 190 states, 185 states have (on average 1.0162162162162163) internal successors, (188), 185 states have internal predecessors, (188), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 191 states. [2022-04-28 03:40:12,926 INFO L87 Difference]: Start difference. First operand has 190 states, 185 states have (on average 1.0162162162162163) internal successors, (188), 185 states have internal predecessors, (188), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 191 states. [2022-04-28 03:40:12,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:40:12,927 INFO L93 Difference]: Finished difference Result 191 states and 193 transitions. [2022-04-28 03:40:12,927 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 193 transitions. [2022-04-28 03:40:12,927 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:40:12,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:40:12,928 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:40:12,928 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:40:12,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 190 states, 185 states have (on average 1.0162162162162163) internal successors, (188), 185 states have internal predecessors, (188), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:12,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 192 transitions. [2022-04-28 03:40:12,930 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 192 transitions. Word has length 185 [2022-04-28 03:40:12,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:40:12,930 INFO L495 AbstractCegarLoop]: Abstraction has 190 states and 192 transitions. [2022-04-28 03:40:12,930 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 61 states, 61 states have (on average 2.9672131147540983) internal successors, (181), 60 states have internal predecessors, (181), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:12,930 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 190 states and 192 transitions. [2022-04-28 03:40:13,209 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 192 edges. 192 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:40:13,209 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 192 transitions. [2022-04-28 03:40:13,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2022-04-28 03:40:13,210 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:40:13,210 INFO L195 NwaCegarLoop]: trace histogram [59, 59, 58, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:40:13,226 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Forceful destruction successful, exit code 0 [2022-04-28 03:40:13,423 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 58 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable59 [2022-04-28 03:40:13,423 INFO L420 AbstractCegarLoop]: === Iteration 61 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:40:13,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:40:13,423 INFO L85 PathProgramCache]: Analyzing trace with hash -987308787, now seen corresponding path program 58 times [2022-04-28 03:40:13,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:40:13,423 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1794834879] [2022-04-28 03:40:16,662 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:40:16,860 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:40:19,002 WARN L970 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:40:19,158 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:40:19,159 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:40:19,162 INFO L85 PathProgramCache]: Analyzing trace with hash 1462887599, now seen corresponding path program 1 times [2022-04-28 03:40:19,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:40:19,162 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622507750] [2022-04-28 03:40:19,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:40:19,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:40:19,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:40:19,218 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:40:19,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:40:19,221 INFO L290 TraceCheckUtils]: 0: Hoare triple {48988#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {48981#true} is VALID [2022-04-28 03:40:19,221 INFO L290 TraceCheckUtils]: 1: Hoare triple {48981#true} assume true; {48981#true} is VALID [2022-04-28 03:40:19,221 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {48981#true} {48981#true} #41#return; {48981#true} is VALID [2022-04-28 03:40:19,222 INFO L272 TraceCheckUtils]: 0: Hoare triple {48981#true} call ULTIMATE.init(); {48988#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:40:19,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {48988#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {48981#true} is VALID [2022-04-28 03:40:19,222 INFO L290 TraceCheckUtils]: 2: Hoare triple {48981#true} assume true; {48981#true} is VALID [2022-04-28 03:40:19,222 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48981#true} {48981#true} #41#return; {48981#true} is VALID [2022-04-28 03:40:19,222 INFO L272 TraceCheckUtils]: 4: Hoare triple {48981#true} call #t~ret7 := main(); {48981#true} is VALID [2022-04-28 03:40:19,222 INFO L290 TraceCheckUtils]: 5: Hoare triple {48981#true} ~x~0 := 0;~y~0 := 0; {48986#(= main_~x~0 0)} is VALID [2022-04-28 03:40:19,223 INFO L290 TraceCheckUtils]: 6: Hoare triple {48986#(= main_~x~0 0)} [277] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2638 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6)) (.cse0 (= |v_main_#t~post6_808| |v_main_#t~post6_806|)) (.cse3 (= v_main_~x~0_2638 v_main_~x~0_2637)) (.cse4 (= v_main_~y~0_2695 v_main_~y~0_2694)) (.cse5 (= |v_main_#t~post5_403| |v_main_#t~post5_402|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (< v_main_~y~0_2694 v_main_~y~0_2695) (<= (div (+ 1000000 v_main_~y~0_2694 (* (- 1) v_main_~x~0_2638) (* (- 1) v_main_~y~0_2695)) (- 4294967296)) (+ (div (+ v_main_~x~0_2638 (- 4294967295)) 4294967296) 1)) .cse2 (= (+ v_main_~x~0_2638 v_main_~y~0_2695) (+ v_main_~x~0_2637 v_main_~y~0_2694)) .cse1) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_2695, main_#t~post5=|v_main_#t~post5_403|, main_~x~0=v_main_~x~0_2638, main_#t~post6=|v_main_#t~post6_808|} OutVars{main_#t~post5=|v_main_#t~post5_402|, main_~y~0=v_main_~y~0_2694, main_~x~0=v_main_~x~0_2637, main_#t~post6=|v_main_#t~post6_806|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {48986#(= main_~x~0 0)} is VALID [2022-04-28 03:40:19,248 INFO L290 TraceCheckUtils]: 7: Hoare triple {48986#(= main_~x~0 0)} [278] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48986#(= main_~x~0 0)} is VALID [2022-04-28 03:40:19,249 INFO L290 TraceCheckUtils]: 8: Hoare triple {48986#(= main_~x~0 0)} [279] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_408| |v_main_#t~post4_407|)) (.cse2 (= v_main_~y~0_2697 v_main_~y~0_2696)) (.cse1 (mod v_main_~x~0_2640 4294967296))) (or (and .cse0 (= |v_main_#t~post6_807| |v_main_#t~post6_811|) (= v_main_~x~0_2639 v_main_~x~0_2640) (<= 500000 .cse1) .cse2) (and .cse0 (= |v_main_#t~post6_811| |v_main_#t~post6_807|) .cse2 (= v_main_~x~0_2640 v_main_~x~0_2639)) (and (< v_main_~y~0_2697 v_main_~y~0_2696) (= (+ v_main_~x~0_2639 v_main_~y~0_2697) (+ v_main_~x~0_2640 v_main_~y~0_2696)) (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~y~0_2696) v_main_~y~0_2697 500000 (* (- 1) v_main_~x~0_2640)) (- 4294967296)) (+ (div (+ v_main_~x~0_2640 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_408|, main_~y~0=v_main_~y~0_2697, main_~x~0=v_main_~x~0_2640, main_#t~post6=|v_main_#t~post6_811|} OutVars{main_#t~post4=|v_main_#t~post4_407|, main_~y~0=v_main_~y~0_2696, main_~x~0=v_main_~x~0_2639, main_#t~post6=|v_main_#t~post6_807|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {48987#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:40:19,250 INFO L290 TraceCheckUtils]: 9: Hoare triple {48987#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [276] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {48982#false} is VALID [2022-04-28 03:40:19,250 INFO L272 TraceCheckUtils]: 10: Hoare triple {48982#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {48982#false} is VALID [2022-04-28 03:40:19,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {48982#false} ~cond := #in~cond; {48982#false} is VALID [2022-04-28 03:40:19,250 INFO L290 TraceCheckUtils]: 12: Hoare triple {48982#false} assume 0 == ~cond; {48982#false} is VALID [2022-04-28 03:40:19,250 INFO L290 TraceCheckUtils]: 13: Hoare triple {48982#false} assume !false; {48982#false} is VALID [2022-04-28 03:40:19,250 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:40:19,250 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:40:19,250 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1622507750] [2022-04-28 03:40:19,250 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1622507750] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:40:19,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1351356909] [2022-04-28 03:40:19,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:40:19,251 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:40:19,251 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:40:19,268 INFO L229 MonitoredProcess]: Starting monitored process 59 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:40:19,323 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2022-04-28 03:40:19,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:40:19,346 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:40:19,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:40:19,353 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:40:19,523 INFO L272 TraceCheckUtils]: 0: Hoare triple {48981#true} call ULTIMATE.init(); {48981#true} is VALID [2022-04-28 03:40:19,523 INFO L290 TraceCheckUtils]: 1: Hoare triple {48981#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {48981#true} is VALID [2022-04-28 03:40:19,523 INFO L290 TraceCheckUtils]: 2: Hoare triple {48981#true} assume true; {48981#true} is VALID [2022-04-28 03:40:19,523 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48981#true} {48981#true} #41#return; {48981#true} is VALID [2022-04-28 03:40:19,523 INFO L272 TraceCheckUtils]: 4: Hoare triple {48981#true} call #t~ret7 := main(); {48981#true} is VALID [2022-04-28 03:40:19,523 INFO L290 TraceCheckUtils]: 5: Hoare triple {48981#true} ~x~0 := 0;~y~0 := 0; {49007#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:40:19,524 INFO L290 TraceCheckUtils]: 6: Hoare triple {49007#(and (= main_~x~0 0) (= main_~y~0 0))} [277] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2638 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6)) (.cse0 (= |v_main_#t~post6_808| |v_main_#t~post6_806|)) (.cse3 (= v_main_~x~0_2638 v_main_~x~0_2637)) (.cse4 (= v_main_~y~0_2695 v_main_~y~0_2694)) (.cse5 (= |v_main_#t~post5_403| |v_main_#t~post5_402|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (< v_main_~y~0_2694 v_main_~y~0_2695) (<= (div (+ 1000000 v_main_~y~0_2694 (* (- 1) v_main_~x~0_2638) (* (- 1) v_main_~y~0_2695)) (- 4294967296)) (+ (div (+ v_main_~x~0_2638 (- 4294967295)) 4294967296) 1)) .cse2 (= (+ v_main_~x~0_2638 v_main_~y~0_2695) (+ v_main_~x~0_2637 v_main_~y~0_2694)) .cse1) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_2695, main_#t~post5=|v_main_#t~post5_403|, main_~x~0=v_main_~x~0_2638, main_#t~post6=|v_main_#t~post6_808|} OutVars{main_#t~post5=|v_main_#t~post5_402|, main_~y~0=v_main_~y~0_2694, main_~x~0=v_main_~x~0_2637, main_#t~post6=|v_main_#t~post6_806|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {49007#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:40:19,524 INFO L290 TraceCheckUtils]: 7: Hoare triple {49007#(and (= main_~x~0 0) (= main_~y~0 0))} [278] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49007#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:40:19,525 INFO L290 TraceCheckUtils]: 8: Hoare triple {49007#(and (= main_~x~0 0) (= main_~y~0 0))} [279] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_408| |v_main_#t~post4_407|)) (.cse2 (= v_main_~y~0_2697 v_main_~y~0_2696)) (.cse1 (mod v_main_~x~0_2640 4294967296))) (or (and .cse0 (= |v_main_#t~post6_807| |v_main_#t~post6_811|) (= v_main_~x~0_2639 v_main_~x~0_2640) (<= 500000 .cse1) .cse2) (and .cse0 (= |v_main_#t~post6_811| |v_main_#t~post6_807|) .cse2 (= v_main_~x~0_2640 v_main_~x~0_2639)) (and (< v_main_~y~0_2697 v_main_~y~0_2696) (= (+ v_main_~x~0_2639 v_main_~y~0_2697) (+ v_main_~x~0_2640 v_main_~y~0_2696)) (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~y~0_2696) v_main_~y~0_2697 500000 (* (- 1) v_main_~x~0_2640)) (- 4294967296)) (+ (div (+ v_main_~x~0_2640 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_408|, main_~y~0=v_main_~y~0_2697, main_~x~0=v_main_~x~0_2640, main_#t~post6=|v_main_#t~post6_811|} OutVars{main_#t~post4=|v_main_#t~post4_407|, main_~y~0=v_main_~y~0_2696, main_~x~0=v_main_~x~0_2639, main_#t~post6=|v_main_#t~post6_807|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {49017#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:40:19,526 INFO L290 TraceCheckUtils]: 9: Hoare triple {49017#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [276] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {48982#false} is VALID [2022-04-28 03:40:19,526 INFO L272 TraceCheckUtils]: 10: Hoare triple {48982#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {48982#false} is VALID [2022-04-28 03:40:19,526 INFO L290 TraceCheckUtils]: 11: Hoare triple {48982#false} ~cond := #in~cond; {48982#false} is VALID [2022-04-28 03:40:19,526 INFO L290 TraceCheckUtils]: 12: Hoare triple {48982#false} assume 0 == ~cond; {48982#false} is VALID [2022-04-28 03:40:19,527 INFO L290 TraceCheckUtils]: 13: Hoare triple {48982#false} assume !false; {48982#false} is VALID [2022-04-28 03:40:19,527 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:40:19,527 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:40:20,382 INFO L290 TraceCheckUtils]: 13: Hoare triple {48982#false} assume !false; {48982#false} is VALID [2022-04-28 03:40:20,383 INFO L290 TraceCheckUtils]: 12: Hoare triple {49036#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {48982#false} is VALID [2022-04-28 03:40:20,383 INFO L290 TraceCheckUtils]: 11: Hoare triple {49040#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {49036#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:40:20,383 INFO L272 TraceCheckUtils]: 10: Hoare triple {49044#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {49040#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:40:20,384 INFO L290 TraceCheckUtils]: 9: Hoare triple {49048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [276] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {49044#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:40:20,386 INFO L290 TraceCheckUtils]: 8: Hoare triple {49048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [279] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= |v_main_#t~post4_408| |v_main_#t~post4_407|)) (.cse2 (= v_main_~y~0_2697 v_main_~y~0_2696)) (.cse1 (mod v_main_~x~0_2640 4294967296))) (or (and .cse0 (= |v_main_#t~post6_807| |v_main_#t~post6_811|) (= v_main_~x~0_2639 v_main_~x~0_2640) (<= 500000 .cse1) .cse2) (and .cse0 (= |v_main_#t~post6_811| |v_main_#t~post6_807|) .cse2 (= v_main_~x~0_2640 v_main_~x~0_2639)) (and (< v_main_~y~0_2697 v_main_~y~0_2696) (= (+ v_main_~x~0_2639 v_main_~y~0_2697) (+ v_main_~x~0_2640 v_main_~y~0_2696)) (< .cse1 500000) (<= (div (+ (* (- 1) v_main_~y~0_2696) v_main_~y~0_2697 500000 (* (- 1) v_main_~x~0_2640)) (- 4294967296)) (+ (div (+ v_main_~x~0_2640 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_408|, main_~y~0=v_main_~y~0_2697, main_~x~0=v_main_~x~0_2640, main_#t~post6=|v_main_#t~post6_811|} OutVars{main_#t~post4=|v_main_#t~post4_407|, main_~y~0=v_main_~y~0_2696, main_~x~0=v_main_~x~0_2639, main_#t~post6=|v_main_#t~post6_807|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {49048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:40:20,387 INFO L290 TraceCheckUtils]: 7: Hoare triple {49048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [278] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:40:20,393 INFO L290 TraceCheckUtils]: 6: Hoare triple {49058#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2707_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2707_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2707_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [277] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2638 4294967296))) (let ((.cse2 (< .cse6 1000000)) (.cse1 (<= 500000 .cse6)) (.cse0 (= |v_main_#t~post6_808| |v_main_#t~post6_806|)) (.cse3 (= v_main_~x~0_2638 v_main_~x~0_2637)) (.cse4 (= v_main_~y~0_2695 v_main_~y~0_2694)) (.cse5 (= |v_main_#t~post5_403| |v_main_#t~post5_402|))) (or (and .cse0 (or (not .cse1) (not .cse2)) .cse3 .cse4 .cse5) (and (< v_main_~y~0_2694 v_main_~y~0_2695) (<= (div (+ 1000000 v_main_~y~0_2694 (* (- 1) v_main_~x~0_2638) (* (- 1) v_main_~y~0_2695)) (- 4294967296)) (+ (div (+ v_main_~x~0_2638 (- 4294967295)) 4294967296) 1)) .cse2 (= (+ v_main_~x~0_2638 v_main_~y~0_2695) (+ v_main_~x~0_2637 v_main_~y~0_2694)) .cse1) (and .cse0 .cse3 .cse4 .cse5)))) InVars {main_~y~0=v_main_~y~0_2695, main_#t~post5=|v_main_#t~post5_403|, main_~x~0=v_main_~x~0_2638, main_#t~post6=|v_main_#t~post6_808|} OutVars{main_#t~post5=|v_main_#t~post5_402|, main_~y~0=v_main_~y~0_2694, main_~x~0=v_main_~x~0_2637, main_#t~post6=|v_main_#t~post6_806|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {49048#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:40:20,394 INFO L290 TraceCheckUtils]: 5: Hoare triple {48981#true} ~x~0 := 0;~y~0 := 0; {49058#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2707_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2707_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2707_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:40:20,394 INFO L272 TraceCheckUtils]: 4: Hoare triple {48981#true} call #t~ret7 := main(); {48981#true} is VALID [2022-04-28 03:40:20,394 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48981#true} {48981#true} #41#return; {48981#true} is VALID [2022-04-28 03:40:20,394 INFO L290 TraceCheckUtils]: 2: Hoare triple {48981#true} assume true; {48981#true} is VALID [2022-04-28 03:40:20,394 INFO L290 TraceCheckUtils]: 1: Hoare triple {48981#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {48981#true} is VALID [2022-04-28 03:40:20,394 INFO L272 TraceCheckUtils]: 0: Hoare triple {48981#true} call ULTIMATE.init(); {48981#true} is VALID [2022-04-28 03:40:20,394 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:40:20,394 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1351356909] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:40:20,394 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:40:20,394 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:40:24,995 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:40:24,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1794834879] [2022-04-28 03:40:24,995 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1794834879] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:40:24,995 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:40:24,995 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [62] imperfect sequences [] total 62 [2022-04-28 03:40:24,995 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [108927203] [2022-04-28 03:40:24,995 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:40:24,996 INFO L78 Accepts]: Start accepts. Automaton has has 62 states, 62 states have (on average 2.967741935483871) internal successors, (184), 61 states have internal predecessors, (184), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 188 [2022-04-28 03:40:24,996 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:40:24,996 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 62 states, 62 states have (on average 2.967741935483871) internal successors, (184), 61 states have internal predecessors, (184), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:25,124 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:40:25,124 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 62 states [2022-04-28 03:40:25,124 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:40:25,124 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2022-04-28 03:40:25,124 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=324, Invalid=4506, Unknown=0, NotChecked=0, Total=4830 [2022-04-28 03:40:25,124 INFO L87 Difference]: Start difference. First operand 190 states and 192 transitions. Second operand has 62 states, 62 states have (on average 2.967741935483871) internal successors, (184), 61 states have internal predecessors, (184), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:36,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:40:36,200 INFO L93 Difference]: Finished difference Result 202 states and 206 transitions. [2022-04-28 03:40:36,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2022-04-28 03:40:36,201 INFO L78 Accepts]: Start accepts. Automaton has has 62 states, 62 states have (on average 2.967741935483871) internal successors, (184), 61 states have internal predecessors, (184), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 188 [2022-04-28 03:40:36,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:40:36,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 2.967741935483871) internal successors, (184), 61 states have internal predecessors, (184), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:36,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 202 transitions. [2022-04-28 03:40:36,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 2.967741935483871) internal successors, (184), 61 states have internal predecessors, (184), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:36,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 202 transitions. [2022-04-28 03:40:36,203 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 62 states and 202 transitions. [2022-04-28 03:40:36,357 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 202 edges. 202 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:40:36,359 INFO L225 Difference]: With dead ends: 202 [2022-04-28 03:40:36,359 INFO L226 Difference]: Without dead ends: 194 [2022-04-28 03:40:36,360 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 275 GetRequests, 29 SyntacticMatches, 119 SemanticMatches, 127 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2844 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=737, Invalid=15775, Unknown=0, NotChecked=0, Total=16512 [2022-04-28 03:40:36,360 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 128 mSDsluCounter, 297 mSDsCounter, 0 mSdLazyCounter, 10857 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 309 SdHoareTripleChecker+Invalid, 10918 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 10857 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.6s IncrementalHoareTripleChecker+Time [2022-04-28 03:40:36,360 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [128 Valid, 309 Invalid, 10918 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 10857 Invalid, 0 Unknown, 0 Unchecked, 5.6s Time] [2022-04-28 03:40:36,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2022-04-28 03:40:36,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 193. [2022-04-28 03:40:36,678 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:40:36,678 INFO L82 GeneralOperation]: Start isEquivalent. First operand 194 states. Second operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:36,679 INFO L74 IsIncluded]: Start isIncluded. First operand 194 states. Second operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:36,679 INFO L87 Difference]: Start difference. First operand 194 states. Second operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:36,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:40:36,681 INFO L93 Difference]: Finished difference Result 194 states and 196 transitions. [2022-04-28 03:40:36,681 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 196 transitions. [2022-04-28 03:40:36,681 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:40:36,681 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:40:36,681 INFO L74 IsIncluded]: Start isIncluded. First operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 194 states. [2022-04-28 03:40:36,681 INFO L87 Difference]: Start difference. First operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 194 states. [2022-04-28 03:40:36,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:40:36,683 INFO L93 Difference]: Finished difference Result 194 states and 196 transitions. [2022-04-28 03:40:36,683 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 196 transitions. [2022-04-28 03:40:36,683 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:40:36,683 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:40:36,683 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:40:36,683 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:40:36,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 193 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 188 states have internal predecessors, (191), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:36,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 195 transitions. [2022-04-28 03:40:36,685 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 195 transitions. Word has length 188 [2022-04-28 03:40:36,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:40:36,685 INFO L495 AbstractCegarLoop]: Abstraction has 193 states and 195 transitions. [2022-04-28 03:40:36,685 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 62 states, 62 states have (on average 2.967741935483871) internal successors, (184), 61 states have internal predecessors, (184), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:36,686 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 193 states and 195 transitions. [2022-04-28 03:40:37,003 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 195 edges. 195 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:40:37,003 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 195 transitions. [2022-04-28 03:40:37,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2022-04-28 03:40:37,004 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:40:37,004 INFO L195 NwaCegarLoop]: trace histogram [60, 60, 59, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:40:37,020 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Forceful destruction successful, exit code 0 [2022-04-28 03:40:37,204 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 59 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable60 [2022-04-28 03:40:37,205 INFO L420 AbstractCegarLoop]: === Iteration 62 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:40:37,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:40:37,205 INFO L85 PathProgramCache]: Analyzing trace with hash -522169787, now seen corresponding path program 59 times [2022-04-28 03:40:37,205 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:40:37,205 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [533233728] [2022-04-28 03:40:39,461 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:40:39,695 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:40:40,385 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:40:40,386 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:40:40,388 INFO L85 PathProgramCache]: Analyzing trace with hash -782547537, now seen corresponding path program 1 times [2022-04-28 03:40:40,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:40:40,388 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610329760] [2022-04-28 03:40:40,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:40:40,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:40:40,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:40:40,435 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:40:40,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:40:40,437 INFO L290 TraceCheckUtils]: 0: Hoare triple {50440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {50433#true} is VALID [2022-04-28 03:40:40,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {50433#true} assume true; {50433#true} is VALID [2022-04-28 03:40:40,438 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {50433#true} {50433#true} #41#return; {50433#true} is VALID [2022-04-28 03:40:40,438 INFO L272 TraceCheckUtils]: 0: Hoare triple {50433#true} call ULTIMATE.init(); {50440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:40:40,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {50440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {50433#true} is VALID [2022-04-28 03:40:40,438 INFO L290 TraceCheckUtils]: 2: Hoare triple {50433#true} assume true; {50433#true} is VALID [2022-04-28 03:40:40,438 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50433#true} {50433#true} #41#return; {50433#true} is VALID [2022-04-28 03:40:40,438 INFO L272 TraceCheckUtils]: 4: Hoare triple {50433#true} call #t~ret7 := main(); {50433#true} is VALID [2022-04-28 03:40:40,439 INFO L290 TraceCheckUtils]: 5: Hoare triple {50433#true} ~x~0 := 0;~y~0 := 0; {50438#(= main_~x~0 0)} is VALID [2022-04-28 03:40:40,439 INFO L290 TraceCheckUtils]: 6: Hoare triple {50438#(= main_~x~0 0)} [281] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2713 4294967296))) (let ((.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse2 (= v_main_~y~0_2771 v_main_~y~0_2770)) (.cse3 (= v_main_~x~0_2713 v_main_~x~0_2712)) (.cse4 (= |v_main_#t~post6_822| |v_main_#t~post6_820|))) (or (and .cse0 .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2712) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2713 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2713 v_main_~x~0_2712) (= (+ v_main_~x~0_2713 v_main_~y~0_2771) (+ v_main_~x~0_2712 v_main_~y~0_2770))) (and .cse2 (= |v_main_#t~post5_410| |v_main_#t~post5_409|) .cse3 .cse4) (and (or (not .cse0) (not .cse1)) .cse2 .cse3 (= |v_main_#t~post5_409| |v_main_#t~post5_410|) .cse4)))) InVars {main_~y~0=v_main_~y~0_2771, main_#t~post5=|v_main_#t~post5_410|, main_~x~0=v_main_~x~0_2713, main_#t~post6=|v_main_#t~post6_822|} OutVars{main_#t~post5=|v_main_#t~post5_409|, main_~y~0=v_main_~y~0_2770, main_~x~0=v_main_~x~0_2712, main_#t~post6=|v_main_#t~post6_820|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {50438#(= main_~x~0 0)} is VALID [2022-04-28 03:40:40,440 INFO L290 TraceCheckUtils]: 7: Hoare triple {50438#(= main_~x~0 0)} [282] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {50438#(= main_~x~0 0)} is VALID [2022-04-28 03:40:40,440 INFO L290 TraceCheckUtils]: 8: Hoare triple {50438#(= main_~x~0 0)} [283] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2773 v_main_~y~0_2772)) (.cse1 (= |v_main_#t~post4_415| |v_main_#t~post4_414|)) (.cse3 (= |v_main_#t~post6_825| |v_main_#t~post6_821|)) (.cse4 (= v_main_~x~0_2715 v_main_~x~0_2714)) (.cse2 (mod v_main_~x~0_2715 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (< v_main_~y~0_2773 v_main_~y~0_2772) (< .cse2 500000) (= (+ v_main_~x~0_2715 v_main_~y~0_2772) (+ v_main_~x~0_2714 v_main_~y~0_2773)) (<= (div (+ v_main_~y~0_2773 500000 (* (- 1) v_main_~x~0_2715) (* (- 1) v_main_~y~0_2772)) (- 4294967296)) (+ (div (+ v_main_~x~0_2715 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_415|, main_~y~0=v_main_~y~0_2773, main_~x~0=v_main_~x~0_2715, main_#t~post6=|v_main_#t~post6_825|} OutVars{main_#t~post4=|v_main_#t~post4_414|, main_~y~0=v_main_~y~0_2772, main_~x~0=v_main_~x~0_2714, main_#t~post6=|v_main_#t~post6_821|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {50439#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:40:40,441 INFO L290 TraceCheckUtils]: 9: Hoare triple {50439#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [280] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {50434#false} is VALID [2022-04-28 03:40:40,441 INFO L272 TraceCheckUtils]: 10: Hoare triple {50434#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {50434#false} is VALID [2022-04-28 03:40:40,441 INFO L290 TraceCheckUtils]: 11: Hoare triple {50434#false} ~cond := #in~cond; {50434#false} is VALID [2022-04-28 03:40:40,441 INFO L290 TraceCheckUtils]: 12: Hoare triple {50434#false} assume 0 == ~cond; {50434#false} is VALID [2022-04-28 03:40:40,441 INFO L290 TraceCheckUtils]: 13: Hoare triple {50434#false} assume !false; {50434#false} is VALID [2022-04-28 03:40:40,441 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:40:40,441 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:40:40,441 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610329760] [2022-04-28 03:40:40,442 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610329760] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:40:40,442 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [544303291] [2022-04-28 03:40:40,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:40:40,442 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:40:40,442 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:40:40,443 INFO L229 MonitoredProcess]: Starting monitored process 60 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:40:40,443 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2022-04-28 03:40:40,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:40:40,469 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:40:40,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:40:40,476 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:40:40,643 INFO L272 TraceCheckUtils]: 0: Hoare triple {50433#true} call ULTIMATE.init(); {50433#true} is VALID [2022-04-28 03:40:40,643 INFO L290 TraceCheckUtils]: 1: Hoare triple {50433#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {50433#true} is VALID [2022-04-28 03:40:40,643 INFO L290 TraceCheckUtils]: 2: Hoare triple {50433#true} assume true; {50433#true} is VALID [2022-04-28 03:40:40,643 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50433#true} {50433#true} #41#return; {50433#true} is VALID [2022-04-28 03:40:40,643 INFO L272 TraceCheckUtils]: 4: Hoare triple {50433#true} call #t~ret7 := main(); {50433#true} is VALID [2022-04-28 03:40:40,643 INFO L290 TraceCheckUtils]: 5: Hoare triple {50433#true} ~x~0 := 0;~y~0 := 0; {50459#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:40:40,644 INFO L290 TraceCheckUtils]: 6: Hoare triple {50459#(and (= main_~x~0 0) (= main_~y~0 0))} [281] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2713 4294967296))) (let ((.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse2 (= v_main_~y~0_2771 v_main_~y~0_2770)) (.cse3 (= v_main_~x~0_2713 v_main_~x~0_2712)) (.cse4 (= |v_main_#t~post6_822| |v_main_#t~post6_820|))) (or (and .cse0 .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2712) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2713 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2713 v_main_~x~0_2712) (= (+ v_main_~x~0_2713 v_main_~y~0_2771) (+ v_main_~x~0_2712 v_main_~y~0_2770))) (and .cse2 (= |v_main_#t~post5_410| |v_main_#t~post5_409|) .cse3 .cse4) (and (or (not .cse0) (not .cse1)) .cse2 .cse3 (= |v_main_#t~post5_409| |v_main_#t~post5_410|) .cse4)))) InVars {main_~y~0=v_main_~y~0_2771, main_#t~post5=|v_main_#t~post5_410|, main_~x~0=v_main_~x~0_2713, main_#t~post6=|v_main_#t~post6_822|} OutVars{main_#t~post5=|v_main_#t~post5_409|, main_~y~0=v_main_~y~0_2770, main_~x~0=v_main_~x~0_2712, main_#t~post6=|v_main_#t~post6_820|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {50459#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:40:40,644 INFO L290 TraceCheckUtils]: 7: Hoare triple {50459#(and (= main_~x~0 0) (= main_~y~0 0))} [282] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {50459#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:40:40,645 INFO L290 TraceCheckUtils]: 8: Hoare triple {50459#(and (= main_~x~0 0) (= main_~y~0 0))} [283] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2773 v_main_~y~0_2772)) (.cse1 (= |v_main_#t~post4_415| |v_main_#t~post4_414|)) (.cse3 (= |v_main_#t~post6_825| |v_main_#t~post6_821|)) (.cse4 (= v_main_~x~0_2715 v_main_~x~0_2714)) (.cse2 (mod v_main_~x~0_2715 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (< v_main_~y~0_2773 v_main_~y~0_2772) (< .cse2 500000) (= (+ v_main_~x~0_2715 v_main_~y~0_2772) (+ v_main_~x~0_2714 v_main_~y~0_2773)) (<= (div (+ v_main_~y~0_2773 500000 (* (- 1) v_main_~x~0_2715) (* (- 1) v_main_~y~0_2772)) (- 4294967296)) (+ (div (+ v_main_~x~0_2715 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_415|, main_~y~0=v_main_~y~0_2773, main_~x~0=v_main_~x~0_2715, main_#t~post6=|v_main_#t~post6_825|} OutVars{main_#t~post4=|v_main_#t~post4_414|, main_~y~0=v_main_~y~0_2772, main_~x~0=v_main_~x~0_2714, main_#t~post6=|v_main_#t~post6_821|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {50469#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} is VALID [2022-04-28 03:40:40,646 INFO L290 TraceCheckUtils]: 9: Hoare triple {50469#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ 500000 (* (- 1) main_~y~0)) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~y~0)))} [280] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {50434#false} is VALID [2022-04-28 03:40:40,646 INFO L272 TraceCheckUtils]: 10: Hoare triple {50434#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {50434#false} is VALID [2022-04-28 03:40:40,646 INFO L290 TraceCheckUtils]: 11: Hoare triple {50434#false} ~cond := #in~cond; {50434#false} is VALID [2022-04-28 03:40:40,646 INFO L290 TraceCheckUtils]: 12: Hoare triple {50434#false} assume 0 == ~cond; {50434#false} is VALID [2022-04-28 03:40:40,646 INFO L290 TraceCheckUtils]: 13: Hoare triple {50434#false} assume !false; {50434#false} is VALID [2022-04-28 03:40:40,646 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:40:40,646 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:40:41,557 INFO L290 TraceCheckUtils]: 13: Hoare triple {50434#false} assume !false; {50434#false} is VALID [2022-04-28 03:40:41,557 INFO L290 TraceCheckUtils]: 12: Hoare triple {50488#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {50434#false} is VALID [2022-04-28 03:40:41,557 INFO L290 TraceCheckUtils]: 11: Hoare triple {50492#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {50488#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:40:41,558 INFO L272 TraceCheckUtils]: 10: Hoare triple {50496#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {50492#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:40:41,558 INFO L290 TraceCheckUtils]: 9: Hoare triple {50500#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [280] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {50496#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:40:41,561 INFO L290 TraceCheckUtils]: 8: Hoare triple {50500#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [283] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_2773 v_main_~y~0_2772)) (.cse1 (= |v_main_#t~post4_415| |v_main_#t~post4_414|)) (.cse3 (= |v_main_#t~post6_825| |v_main_#t~post6_821|)) (.cse4 (= v_main_~x~0_2715 v_main_~x~0_2714)) (.cse2 (mod v_main_~x~0_2715 4294967296))) (or (and .cse0 .cse1 (<= 500000 .cse2) .cse3 .cse4) (and .cse0 .cse1 .cse3 .cse4) (and (< v_main_~y~0_2773 v_main_~y~0_2772) (< .cse2 500000) (= (+ v_main_~x~0_2715 v_main_~y~0_2772) (+ v_main_~x~0_2714 v_main_~y~0_2773)) (<= (div (+ v_main_~y~0_2773 500000 (* (- 1) v_main_~x~0_2715) (* (- 1) v_main_~y~0_2772)) (- 4294967296)) (+ (div (+ v_main_~x~0_2715 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_415|, main_~y~0=v_main_~y~0_2773, main_~x~0=v_main_~x~0_2715, main_#t~post6=|v_main_#t~post6_825|} OutVars{main_#t~post4=|v_main_#t~post4_414|, main_~y~0=v_main_~y~0_2772, main_~x~0=v_main_~x~0_2714, main_#t~post6=|v_main_#t~post6_821|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {50500#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:40:41,561 INFO L290 TraceCheckUtils]: 7: Hoare triple {50500#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [282] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {50500#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:40:41,595 INFO L290 TraceCheckUtils]: 6: Hoare triple {50510#(and (or (forall ((aux_div_v_main_~y~0_2783_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2783_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2783_33) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [281] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2713 4294967296))) (let ((.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse2 (= v_main_~y~0_2771 v_main_~y~0_2770)) (.cse3 (= v_main_~x~0_2713 v_main_~x~0_2712)) (.cse4 (= |v_main_#t~post6_822| |v_main_#t~post6_820|))) (or (and .cse0 .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2712) 1000000) (- 4294967296)) (+ (div (+ v_main_~x~0_2713 (- 4294967295)) 4294967296) 1)) (< v_main_~x~0_2713 v_main_~x~0_2712) (= (+ v_main_~x~0_2713 v_main_~y~0_2771) (+ v_main_~x~0_2712 v_main_~y~0_2770))) (and .cse2 (= |v_main_#t~post5_410| |v_main_#t~post5_409|) .cse3 .cse4) (and (or (not .cse0) (not .cse1)) .cse2 .cse3 (= |v_main_#t~post5_409| |v_main_#t~post5_410|) .cse4)))) InVars {main_~y~0=v_main_~y~0_2771, main_#t~post5=|v_main_#t~post5_410|, main_~x~0=v_main_~x~0_2713, main_#t~post6=|v_main_#t~post6_822|} OutVars{main_#t~post5=|v_main_#t~post5_409|, main_~y~0=v_main_~y~0_2770, main_~x~0=v_main_~x~0_2712, main_#t~post6=|v_main_#t~post6_820|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {50500#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:40:41,596 INFO L290 TraceCheckUtils]: 5: Hoare triple {50433#true} ~x~0 := 0;~y~0 := 0; {50510#(and (or (forall ((aux_div_v_main_~y~0_2783_33 Int)) (or (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 aux_div_v_main_~y~0_2783_33)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2783_33) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:40:41,596 INFO L272 TraceCheckUtils]: 4: Hoare triple {50433#true} call #t~ret7 := main(); {50433#true} is VALID [2022-04-28 03:40:41,596 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {50433#true} {50433#true} #41#return; {50433#true} is VALID [2022-04-28 03:40:41,596 INFO L290 TraceCheckUtils]: 2: Hoare triple {50433#true} assume true; {50433#true} is VALID [2022-04-28 03:40:41,596 INFO L290 TraceCheckUtils]: 1: Hoare triple {50433#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {50433#true} is VALID [2022-04-28 03:40:41,596 INFO L272 TraceCheckUtils]: 0: Hoare triple {50433#true} call ULTIMATE.init(); {50433#true} is VALID [2022-04-28 03:40:41,596 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:40:41,596 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [544303291] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:40:41,596 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:40:41,596 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:40:46,481 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:40:46,482 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [533233728] [2022-04-28 03:40:46,482 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [533233728] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:40:46,482 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:40:46,482 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [63] imperfect sequences [] total 63 [2022-04-28 03:40:46,482 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [386168805] [2022-04-28 03:40:46,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:40:46,482 INFO L78 Accepts]: Start accepts. Automaton has has 63 states, 63 states have (on average 2.9682539682539684) internal successors, (187), 62 states have internal predecessors, (187), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 191 [2022-04-28 03:40:46,482 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:40:46,482 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 63 states, 63 states have (on average 2.9682539682539684) internal successors, (187), 62 states have internal predecessors, (187), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:40:46,611 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 191 edges. 191 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:40:46,612 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2022-04-28 03:40:46,612 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:40:46,612 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2022-04-28 03:40:46,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=329, Invalid=4641, Unknown=0, NotChecked=0, Total=4970 [2022-04-28 03:40:46,613 INFO L87 Difference]: Start difference. First operand 193 states and 195 transitions. Second operand has 63 states, 63 states have (on average 2.9682539682539684) internal successors, (187), 62 states have internal predecessors, (187), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:00,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:41:00,901 INFO L93 Difference]: Finished difference Result 205 states and 209 transitions. [2022-04-28 03:41:00,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2022-04-28 03:41:00,901 INFO L78 Accepts]: Start accepts. Automaton has has 63 states, 63 states have (on average 2.9682539682539684) internal successors, (187), 62 states have internal predecessors, (187), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 191 [2022-04-28 03:41:00,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:41:00,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 2.9682539682539684) internal successors, (187), 62 states have internal predecessors, (187), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:00,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 205 transitions. [2022-04-28 03:41:00,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 2.9682539682539684) internal successors, (187), 62 states have internal predecessors, (187), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:00,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 205 transitions. [2022-04-28 03:41:00,903 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 63 states and 205 transitions. [2022-04-28 03:41:01,012 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 205 edges. 205 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:41:01,014 INFO L225 Difference]: With dead ends: 205 [2022-04-28 03:41:01,014 INFO L226 Difference]: Without dead ends: 197 [2022-04-28 03:41:01,015 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 279 GetRequests, 28 SyntacticMatches, 122 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2922 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=749, Invalid=16281, Unknown=0, NotChecked=0, Total=17030 [2022-04-28 03:41:01,015 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 130 mSDsluCounter, 302 mSDsCounter, 0 mSdLazyCounter, 11221 mSolverCounterSat, 62 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 314 SdHoareTripleChecker+Invalid, 11283 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 62 IncrementalHoareTripleChecker+Valid, 11221 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:41:01,015 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [130 Valid, 314 Invalid, 11283 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [62 Valid, 11221 Invalid, 0 Unknown, 0 Unchecked, 7.2s Time] [2022-04-28 03:41:01,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2022-04-28 03:41:01,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 196. [2022-04-28 03:41:01,352 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:41:01,352 INFO L82 GeneralOperation]: Start isEquivalent. First operand 197 states. Second operand has 196 states, 191 states have (on average 1.0157068062827226) internal successors, (194), 191 states have internal predecessors, (194), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:01,352 INFO L74 IsIncluded]: Start isIncluded. First operand 197 states. Second operand has 196 states, 191 states have (on average 1.0157068062827226) internal successors, (194), 191 states have internal predecessors, (194), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:01,352 INFO L87 Difference]: Start difference. First operand 197 states. Second operand has 196 states, 191 states have (on average 1.0157068062827226) internal successors, (194), 191 states have internal predecessors, (194), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:01,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:41:01,354 INFO L93 Difference]: Finished difference Result 197 states and 199 transitions. [2022-04-28 03:41:01,354 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 199 transitions. [2022-04-28 03:41:01,354 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:41:01,354 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:41:01,354 INFO L74 IsIncluded]: Start isIncluded. First operand has 196 states, 191 states have (on average 1.0157068062827226) internal successors, (194), 191 states have internal predecessors, (194), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 197 states. [2022-04-28 03:41:01,355 INFO L87 Difference]: Start difference. First operand has 196 states, 191 states have (on average 1.0157068062827226) internal successors, (194), 191 states have internal predecessors, (194), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 197 states. [2022-04-28 03:41:01,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:41:01,356 INFO L93 Difference]: Finished difference Result 197 states and 199 transitions. [2022-04-28 03:41:01,357 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 199 transitions. [2022-04-28 03:41:01,357 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:41:01,357 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:41:01,357 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:41:01,357 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:41:01,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 191 states have (on average 1.0157068062827226) internal successors, (194), 191 states have internal predecessors, (194), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:01,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 198 transitions. [2022-04-28 03:41:01,359 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 198 transitions. Word has length 191 [2022-04-28 03:41:01,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:41:01,359 INFO L495 AbstractCegarLoop]: Abstraction has 196 states and 198 transitions. [2022-04-28 03:41:01,359 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 2.9682539682539684) internal successors, (187), 62 states have internal predecessors, (187), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:01,359 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 196 states and 198 transitions. [2022-04-28 03:41:01,683 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 198 edges. 198 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:41:01,683 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 198 transitions. [2022-04-28 03:41:01,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2022-04-28 03:41:01,684 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:41:01,684 INFO L195 NwaCegarLoop]: trace histogram [61, 61, 60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:41:01,700 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Forceful destruction successful, exit code 0 [2022-04-28 03:41:01,884 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 60 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable61 [2022-04-28 03:41:01,885 INFO L420 AbstractCegarLoop]: === Iteration 63 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:41:01,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:41:01,885 INFO L85 PathProgramCache]: Analyzing trace with hash 869282317, now seen corresponding path program 60 times [2022-04-28 03:41:01,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:41:01,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1159730928] [2022-04-28 03:41:03,884 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:41:04,084 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:41:04,462 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:41:04,463 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:41:04,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1266984623, now seen corresponding path program 1 times [2022-04-28 03:41:04,465 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:41:04,465 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1377807440] [2022-04-28 03:41:04,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:41:04,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:41:04,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:41:04,549 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:41:04,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:41:04,551 INFO L290 TraceCheckUtils]: 0: Hoare triple {51913#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {51906#true} is VALID [2022-04-28 03:41:04,552 INFO L290 TraceCheckUtils]: 1: Hoare triple {51906#true} assume true; {51906#true} is VALID [2022-04-28 03:41:04,552 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {51906#true} {51906#true} #41#return; {51906#true} is VALID [2022-04-28 03:41:04,552 INFO L272 TraceCheckUtils]: 0: Hoare triple {51906#true} call ULTIMATE.init(); {51913#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:41:04,552 INFO L290 TraceCheckUtils]: 1: Hoare triple {51913#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {51906#true} is VALID [2022-04-28 03:41:04,552 INFO L290 TraceCheckUtils]: 2: Hoare triple {51906#true} assume true; {51906#true} is VALID [2022-04-28 03:41:04,552 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51906#true} {51906#true} #41#return; {51906#true} is VALID [2022-04-28 03:41:04,552 INFO L272 TraceCheckUtils]: 4: Hoare triple {51906#true} call #t~ret7 := main(); {51906#true} is VALID [2022-04-28 03:41:04,553 INFO L290 TraceCheckUtils]: 5: Hoare triple {51906#true} ~x~0 := 0;~y~0 := 0; {51911#(= main_~x~0 0)} is VALID [2022-04-28 03:41:04,553 INFO L290 TraceCheckUtils]: 6: Hoare triple {51911#(= main_~x~0 0)} [285] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2789 4294967296))) (let ((.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse2 (= v_main_~y~0_2848 v_main_~y~0_2847)) (.cse3 (= |v_main_#t~post6_836| |v_main_#t~post6_834|)) (.cse4 (= v_main_~x~0_2789 v_main_~x~0_2788))) (or (and .cse0 (< v_main_~y~0_2847 v_main_~y~0_2848) (= (+ v_main_~x~0_2789 v_main_~y~0_2848) (+ v_main_~x~0_2788 v_main_~y~0_2847)) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2789) 1000000 v_main_~y~0_2847 (* (- 1) v_main_~y~0_2848)) (- 4294967296)) (+ (div (+ v_main_~x~0_2789 (- 4294967295)) 4294967296) 1))) (and .cse2 (or (not .cse0) (not .cse1)) (= |v_main_#t~post5_416| |v_main_#t~post5_417|) .cse3 .cse4) (and .cse2 .cse3 (= |v_main_#t~post5_417| |v_main_#t~post5_416|) .cse4)))) InVars {main_~y~0=v_main_~y~0_2848, main_#t~post5=|v_main_#t~post5_417|, main_~x~0=v_main_~x~0_2789, main_#t~post6=|v_main_#t~post6_836|} OutVars{main_#t~post5=|v_main_#t~post5_416|, main_~y~0=v_main_~y~0_2847, main_~x~0=v_main_~x~0_2788, main_#t~post6=|v_main_#t~post6_834|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {51911#(= main_~x~0 0)} is VALID [2022-04-28 03:41:04,553 INFO L290 TraceCheckUtils]: 7: Hoare triple {51911#(= main_~x~0 0)} [286] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51911#(= main_~x~0 0)} is VALID [2022-04-28 03:41:04,554 INFO L290 TraceCheckUtils]: 8: Hoare triple {51911#(= main_~x~0 0)} [287] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2791 4294967296)) (.cse1 (= |v_main_#t~post4_422| |v_main_#t~post4_421|)) (.cse2 (= v_main_~x~0_2791 v_main_~x~0_2790)) (.cse3 (= |v_main_#t~post6_839| |v_main_#t~post6_835|))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_2849 v_main_~y~0_2850)) (and (= (+ v_main_~x~0_2791 v_main_~y~0_2849) (+ v_main_~x~0_2790 v_main_~y~0_2850)) (< v_main_~x~0_2791 v_main_~x~0_2790) (<= (div (+ (* (- 1) v_main_~x~0_2790) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2791 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 (= v_main_~y~0_2850 v_main_~y~0_2849) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_422|, main_~y~0=v_main_~y~0_2850, main_~x~0=v_main_~x~0_2791, main_#t~post6=|v_main_#t~post6_839|} OutVars{main_#t~post4=|v_main_#t~post4_421|, main_~y~0=v_main_~y~0_2849, main_~x~0=v_main_~x~0_2790, main_#t~post6=|v_main_#t~post6_835|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {51912#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:41:04,555 INFO L290 TraceCheckUtils]: 9: Hoare triple {51912#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [284] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {51907#false} is VALID [2022-04-28 03:41:04,555 INFO L272 TraceCheckUtils]: 10: Hoare triple {51907#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {51907#false} is VALID [2022-04-28 03:41:04,555 INFO L290 TraceCheckUtils]: 11: Hoare triple {51907#false} ~cond := #in~cond; {51907#false} is VALID [2022-04-28 03:41:04,555 INFO L290 TraceCheckUtils]: 12: Hoare triple {51907#false} assume 0 == ~cond; {51907#false} is VALID [2022-04-28 03:41:04,555 INFO L290 TraceCheckUtils]: 13: Hoare triple {51907#false} assume !false; {51907#false} is VALID [2022-04-28 03:41:04,555 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:41:04,555 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:41:04,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1377807440] [2022-04-28 03:41:04,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1377807440] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:41:04,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1290518534] [2022-04-28 03:41:04,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:41:04,556 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:41:04,557 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:41:04,558 INFO L229 MonitoredProcess]: Starting monitored process 61 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:41:04,569 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2022-04-28 03:41:04,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:41:04,595 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:41:04,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:41:04,603 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:41:04,744 INFO L272 TraceCheckUtils]: 0: Hoare triple {51906#true} call ULTIMATE.init(); {51906#true} is VALID [2022-04-28 03:41:04,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {51906#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {51906#true} is VALID [2022-04-28 03:41:04,744 INFO L290 TraceCheckUtils]: 2: Hoare triple {51906#true} assume true; {51906#true} is VALID [2022-04-28 03:41:04,744 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51906#true} {51906#true} #41#return; {51906#true} is VALID [2022-04-28 03:41:04,744 INFO L272 TraceCheckUtils]: 4: Hoare triple {51906#true} call #t~ret7 := main(); {51906#true} is VALID [2022-04-28 03:41:04,768 INFO L290 TraceCheckUtils]: 5: Hoare triple {51906#true} ~x~0 := 0;~y~0 := 0; {51932#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:04,769 INFO L290 TraceCheckUtils]: 6: Hoare triple {51932#(and (= main_~x~0 0) (= main_~y~0 0))} [285] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2789 4294967296))) (let ((.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse2 (= v_main_~y~0_2848 v_main_~y~0_2847)) (.cse3 (= |v_main_#t~post6_836| |v_main_#t~post6_834|)) (.cse4 (= v_main_~x~0_2789 v_main_~x~0_2788))) (or (and .cse0 (< v_main_~y~0_2847 v_main_~y~0_2848) (= (+ v_main_~x~0_2789 v_main_~y~0_2848) (+ v_main_~x~0_2788 v_main_~y~0_2847)) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2789) 1000000 v_main_~y~0_2847 (* (- 1) v_main_~y~0_2848)) (- 4294967296)) (+ (div (+ v_main_~x~0_2789 (- 4294967295)) 4294967296) 1))) (and .cse2 (or (not .cse0) (not .cse1)) (= |v_main_#t~post5_416| |v_main_#t~post5_417|) .cse3 .cse4) (and .cse2 .cse3 (= |v_main_#t~post5_417| |v_main_#t~post5_416|) .cse4)))) InVars {main_~y~0=v_main_~y~0_2848, main_#t~post5=|v_main_#t~post5_417|, main_~x~0=v_main_~x~0_2789, main_#t~post6=|v_main_#t~post6_836|} OutVars{main_#t~post5=|v_main_#t~post5_416|, main_~y~0=v_main_~y~0_2847, main_~x~0=v_main_~x~0_2788, main_#t~post6=|v_main_#t~post6_834|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {51932#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:04,769 INFO L290 TraceCheckUtils]: 7: Hoare triple {51932#(and (= main_~x~0 0) (= main_~y~0 0))} [286] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51932#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:04,770 INFO L290 TraceCheckUtils]: 8: Hoare triple {51932#(and (= main_~x~0 0) (= main_~y~0 0))} [287] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2791 4294967296)) (.cse1 (= |v_main_#t~post4_422| |v_main_#t~post4_421|)) (.cse2 (= v_main_~x~0_2791 v_main_~x~0_2790)) (.cse3 (= |v_main_#t~post6_839| |v_main_#t~post6_835|))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_2849 v_main_~y~0_2850)) (and (= (+ v_main_~x~0_2791 v_main_~y~0_2849) (+ v_main_~x~0_2790 v_main_~y~0_2850)) (< v_main_~x~0_2791 v_main_~x~0_2790) (<= (div (+ (* (- 1) v_main_~x~0_2790) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2791 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 (= v_main_~y~0_2850 v_main_~y~0_2849) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_422|, main_~y~0=v_main_~y~0_2850, main_~x~0=v_main_~x~0_2791, main_#t~post6=|v_main_#t~post6_839|} OutVars{main_#t~post4=|v_main_#t~post4_421|, main_~y~0=v_main_~y~0_2849, main_~x~0=v_main_~x~0_2790, main_#t~post6=|v_main_#t~post6_835|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {51942#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:41:04,771 INFO L290 TraceCheckUtils]: 9: Hoare triple {51942#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [284] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {51907#false} is VALID [2022-04-28 03:41:04,771 INFO L272 TraceCheckUtils]: 10: Hoare triple {51907#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {51907#false} is VALID [2022-04-28 03:41:04,772 INFO L290 TraceCheckUtils]: 11: Hoare triple {51907#false} ~cond := #in~cond; {51907#false} is VALID [2022-04-28 03:41:04,772 INFO L290 TraceCheckUtils]: 12: Hoare triple {51907#false} assume 0 == ~cond; {51907#false} is VALID [2022-04-28 03:41:04,772 INFO L290 TraceCheckUtils]: 13: Hoare triple {51907#false} assume !false; {51907#false} is VALID [2022-04-28 03:41:04,772 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:41:04,772 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:41:05,645 INFO L290 TraceCheckUtils]: 13: Hoare triple {51907#false} assume !false; {51907#false} is VALID [2022-04-28 03:41:05,646 INFO L290 TraceCheckUtils]: 12: Hoare triple {51961#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {51907#false} is VALID [2022-04-28 03:41:05,646 INFO L290 TraceCheckUtils]: 11: Hoare triple {51965#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {51961#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:41:05,647 INFO L272 TraceCheckUtils]: 10: Hoare triple {51969#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {51965#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:41:05,647 INFO L290 TraceCheckUtils]: 9: Hoare triple {51973#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [284] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {51969#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:41:05,660 INFO L290 TraceCheckUtils]: 8: Hoare triple {51973#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [287] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2791 4294967296)) (.cse1 (= |v_main_#t~post4_422| |v_main_#t~post4_421|)) (.cse2 (= v_main_~x~0_2791 v_main_~x~0_2790)) (.cse3 (= |v_main_#t~post6_839| |v_main_#t~post6_835|))) (or (and (<= 500000 .cse0) .cse1 .cse2 .cse3 (= v_main_~y~0_2849 v_main_~y~0_2850)) (and (= (+ v_main_~x~0_2791 v_main_~y~0_2849) (+ v_main_~x~0_2790 v_main_~y~0_2850)) (< v_main_~x~0_2791 v_main_~x~0_2790) (<= (div (+ (* (- 1) v_main_~x~0_2790) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2791 (- 4294967295)) 4294967296) 1)) (< .cse0 500000)) (and .cse1 .cse2 (= v_main_~y~0_2850 v_main_~y~0_2849) .cse3))) InVars {main_#t~post4=|v_main_#t~post4_422|, main_~y~0=v_main_~y~0_2850, main_~x~0=v_main_~x~0_2791, main_#t~post6=|v_main_#t~post6_839|} OutVars{main_#t~post4=|v_main_#t~post4_421|, main_~y~0=v_main_~y~0_2849, main_~x~0=v_main_~x~0_2790, main_#t~post6=|v_main_#t~post6_835|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {51973#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:41:05,661 INFO L290 TraceCheckUtils]: 7: Hoare triple {51973#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [286] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51973#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:41:05,746 INFO L290 TraceCheckUtils]: 6: Hoare triple {51983#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_2860_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2860_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2860_33) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [285] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2789 4294967296))) (let ((.cse0 (< .cse5 1000000)) (.cse1 (<= 500000 .cse5)) (.cse2 (= v_main_~y~0_2848 v_main_~y~0_2847)) (.cse3 (= |v_main_#t~post6_836| |v_main_#t~post6_834|)) (.cse4 (= v_main_~x~0_2789 v_main_~x~0_2788))) (or (and .cse0 (< v_main_~y~0_2847 v_main_~y~0_2848) (= (+ v_main_~x~0_2789 v_main_~y~0_2848) (+ v_main_~x~0_2788 v_main_~y~0_2847)) .cse1 (<= (div (+ (* (- 1) v_main_~x~0_2789) 1000000 v_main_~y~0_2847 (* (- 1) v_main_~y~0_2848)) (- 4294967296)) (+ (div (+ v_main_~x~0_2789 (- 4294967295)) 4294967296) 1))) (and .cse2 (or (not .cse0) (not .cse1)) (= |v_main_#t~post5_416| |v_main_#t~post5_417|) .cse3 .cse4) (and .cse2 .cse3 (= |v_main_#t~post5_417| |v_main_#t~post5_416|) .cse4)))) InVars {main_~y~0=v_main_~y~0_2848, main_#t~post5=|v_main_#t~post5_417|, main_~x~0=v_main_~x~0_2789, main_#t~post6=|v_main_#t~post6_836|} OutVars{main_#t~post5=|v_main_#t~post5_416|, main_~y~0=v_main_~y~0_2847, main_~x~0=v_main_~x~0_2788, main_#t~post6=|v_main_#t~post6_834|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {51973#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:41:05,747 INFO L290 TraceCheckUtils]: 5: Hoare triple {51906#true} ~x~0 := 0;~y~0 := 0; {51983#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (forall ((aux_div_v_main_~y~0_2860_33 Int)) (or (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2860_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* 4294967296 aux_div_v_main_~y~0_2860_33) main_~y~0)))) (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:41:05,747 INFO L272 TraceCheckUtils]: 4: Hoare triple {51906#true} call #t~ret7 := main(); {51906#true} is VALID [2022-04-28 03:41:05,747 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51906#true} {51906#true} #41#return; {51906#true} is VALID [2022-04-28 03:41:05,747 INFO L290 TraceCheckUtils]: 2: Hoare triple {51906#true} assume true; {51906#true} is VALID [2022-04-28 03:41:05,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {51906#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {51906#true} is VALID [2022-04-28 03:41:05,747 INFO L272 TraceCheckUtils]: 0: Hoare triple {51906#true} call ULTIMATE.init(); {51906#true} is VALID [2022-04-28 03:41:05,747 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:41:05,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1290518534] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:41:05,747 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:41:05,747 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:41:09,504 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:41:09,505 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1159730928] [2022-04-28 03:41:09,505 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1159730928] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:41:09,505 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:41:09,505 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [64] imperfect sequences [] total 64 [2022-04-28 03:41:09,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428641143] [2022-04-28 03:41:09,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:41:09,505 INFO L78 Accepts]: Start accepts. Automaton has has 64 states, 64 states have (on average 2.96875) internal successors, (190), 63 states have internal predecessors, (190), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 194 [2022-04-28 03:41:09,505 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:41:09,506 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 64 states, 64 states have (on average 2.96875) internal successors, (190), 63 states have internal predecessors, (190), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:09,588 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 194 edges. 194 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:41:09,588 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2022-04-28 03:41:09,588 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:41:09,588 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2022-04-28 03:41:09,589 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=334, Invalid=4778, Unknown=0, NotChecked=0, Total=5112 [2022-04-28 03:41:09,589 INFO L87 Difference]: Start difference. First operand 196 states and 198 transitions. Second operand has 64 states, 64 states have (on average 2.96875) internal successors, (190), 63 states have internal predecessors, (190), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:20,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:41:20,335 INFO L93 Difference]: Finished difference Result 208 states and 212 transitions. [2022-04-28 03:41:20,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2022-04-28 03:41:20,335 INFO L78 Accepts]: Start accepts. Automaton has has 64 states, 64 states have (on average 2.96875) internal successors, (190), 63 states have internal predecessors, (190), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 194 [2022-04-28 03:41:20,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:41:20,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 2.96875) internal successors, (190), 63 states have internal predecessors, (190), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:20,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 208 transitions. [2022-04-28 03:41:20,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 2.96875) internal successors, (190), 63 states have internal predecessors, (190), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:20,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 208 transitions. [2022-04-28 03:41:20,337 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 64 states and 208 transitions. [2022-04-28 03:41:20,439 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 208 edges. 208 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:41:20,441 INFO L225 Difference]: With dead ends: 208 [2022-04-28 03:41:20,442 INFO L226 Difference]: Without dead ends: 200 [2022-04-28 03:41:20,442 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 283 GetRequests, 28 SyntacticMatches, 124 SemanticMatches, 131 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3001 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=761, Invalid=16795, Unknown=0, NotChecked=0, Total=17556 [2022-04-28 03:41:20,442 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 132 mSDsluCounter, 307 mSDsCounter, 0 mSdLazyCounter, 11591 mSolverCounterSat, 63 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 132 SdHoareTripleChecker+Valid, 319 SdHoareTripleChecker+Invalid, 11654 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 63 IncrementalHoareTripleChecker+Valid, 11591 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:41:20,443 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [132 Valid, 319 Invalid, 11654 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [63 Valid, 11591 Invalid, 0 Unknown, 0 Unchecked, 5.5s Time] [2022-04-28 03:41:20,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2022-04-28 03:41:20,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 199. [2022-04-28 03:41:20,804 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:41:20,805 INFO L82 GeneralOperation]: Start isEquivalent. First operand 200 states. Second operand has 199 states, 194 states have (on average 1.0154639175257731) internal successors, (197), 194 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:20,805 INFO L74 IsIncluded]: Start isIncluded. First operand 200 states. Second operand has 199 states, 194 states have (on average 1.0154639175257731) internal successors, (197), 194 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:20,805 INFO L87 Difference]: Start difference. First operand 200 states. Second operand has 199 states, 194 states have (on average 1.0154639175257731) internal successors, (197), 194 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:20,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:41:20,807 INFO L93 Difference]: Finished difference Result 200 states and 202 transitions. [2022-04-28 03:41:20,807 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 202 transitions. [2022-04-28 03:41:20,807 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:41:20,807 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:41:20,807 INFO L74 IsIncluded]: Start isIncluded. First operand has 199 states, 194 states have (on average 1.0154639175257731) internal successors, (197), 194 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 200 states. [2022-04-28 03:41:20,807 INFO L87 Difference]: Start difference. First operand has 199 states, 194 states have (on average 1.0154639175257731) internal successors, (197), 194 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 200 states. [2022-04-28 03:41:20,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:41:20,809 INFO L93 Difference]: Finished difference Result 200 states and 202 transitions. [2022-04-28 03:41:20,809 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 202 transitions. [2022-04-28 03:41:20,809 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:41:20,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:41:20,809 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:41:20,809 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:41:20,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 199 states, 194 states have (on average 1.0154639175257731) internal successors, (197), 194 states have internal predecessors, (197), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:20,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 201 transitions. [2022-04-28 03:41:20,812 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 201 transitions. Word has length 194 [2022-04-28 03:41:20,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:41:20,812 INFO L495 AbstractCegarLoop]: Abstraction has 199 states and 201 transitions. [2022-04-28 03:41:20,812 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 64 states have (on average 2.96875) internal successors, (190), 63 states have internal predecessors, (190), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:20,812 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 199 states and 201 transitions. [2022-04-28 03:41:21,149 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 201 edges. 201 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:41:21,149 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 201 transitions. [2022-04-28 03:41:21,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2022-04-28 03:41:21,150 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:41:21,150 INFO L195 NwaCegarLoop]: trace histogram [62, 62, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:41:21,166 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Forceful destruction successful, exit code 0 [2022-04-28 03:41:21,350 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62,61 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:41:21,351 INFO L420 AbstractCegarLoop]: === Iteration 64 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:41:21,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:41:21,351 INFO L85 PathProgramCache]: Analyzing trace with hash -1405428411, now seen corresponding path program 61 times [2022-04-28 03:41:21,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:41:21,351 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [909590403] [2022-04-28 03:41:26,898 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:41:27,169 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:41:27,609 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:41:27,610 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:41:27,613 INFO L85 PathProgramCache]: Analyzing trace with hash -978450513, now seen corresponding path program 1 times [2022-04-28 03:41:27,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:41:27,613 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [704003628] [2022-04-28 03:41:27,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:41:27,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:41:27,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:41:27,682 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:41:27,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:41:27,686 INFO L290 TraceCheckUtils]: 0: Hoare triple {53407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {53400#true} is VALID [2022-04-28 03:41:27,686 INFO L290 TraceCheckUtils]: 1: Hoare triple {53400#true} assume true; {53400#true} is VALID [2022-04-28 03:41:27,686 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {53400#true} {53400#true} #41#return; {53400#true} is VALID [2022-04-28 03:41:27,686 INFO L272 TraceCheckUtils]: 0: Hoare triple {53400#true} call ULTIMATE.init(); {53407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:41:27,687 INFO L290 TraceCheckUtils]: 1: Hoare triple {53407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {53400#true} is VALID [2022-04-28 03:41:27,687 INFO L290 TraceCheckUtils]: 2: Hoare triple {53400#true} assume true; {53400#true} is VALID [2022-04-28 03:41:27,687 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53400#true} {53400#true} #41#return; {53400#true} is VALID [2022-04-28 03:41:27,687 INFO L272 TraceCheckUtils]: 4: Hoare triple {53400#true} call #t~ret7 := main(); {53400#true} is VALID [2022-04-28 03:41:27,687 INFO L290 TraceCheckUtils]: 5: Hoare triple {53400#true} ~x~0 := 0;~y~0 := 0; {53405#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:27,688 INFO L290 TraceCheckUtils]: 6: Hoare triple {53405#(and (= main_~x~0 0) (= main_~y~0 0))} [289] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2866 4294967296))) (let ((.cse0 (= v_main_~x~0_2866 v_main_~x~0_2865)) (.cse1 (= |v_main_#t~post5_424| |v_main_#t~post5_423|)) (.cse2 (= v_main_~y~0_2926 v_main_~y~0_2925)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_850| |v_main_#t~post6_848|)) (and (= |v_main_#t~post6_848| |v_main_#t~post6_850|) (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2) (and (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2866) v_main_~y~0_2925 (* (- 1) v_main_~y~0_2926)) (- 4294967296)) (+ (div (+ v_main_~x~0_2866 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2866 v_main_~y~0_2926) (+ v_main_~x~0_2865 v_main_~y~0_2925)) (< v_main_~y~0_2925 v_main_~y~0_2926) .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2926, main_#t~post5=|v_main_#t~post5_424|, main_~x~0=v_main_~x~0_2866, main_#t~post6=|v_main_#t~post6_850|} OutVars{main_#t~post5=|v_main_#t~post5_423|, main_~y~0=v_main_~y~0_2925, main_~x~0=v_main_~x~0_2865, main_#t~post6=|v_main_#t~post6_848|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {53405#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:27,688 INFO L290 TraceCheckUtils]: 7: Hoare triple {53405#(and (= main_~x~0 0) (= main_~y~0 0))} [290] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53405#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:27,689 INFO L290 TraceCheckUtils]: 8: Hoare triple {53405#(and (= main_~x~0 0) (= main_~y~0 0))} [291] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2868 4294967296)) (.cse1 (= |v_main_#t~post4_429| |v_main_#t~post4_428|)) (.cse2 (= v_main_~x~0_2868 v_main_~x~0_2867)) (.cse3 (= v_main_~y~0_2928 v_main_~y~0_2927))) (or (and (= (+ v_main_~x~0_2868 v_main_~y~0_2927) (+ v_main_~x~0_2867 v_main_~y~0_2928)) (<= (div (+ (* (- 1) v_main_~x~0_2867) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2868 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_2868 v_main_~x~0_2867)) (and .cse1 (<= 500000 .cse0) .cse2 (= |v_main_#t~post6_849| |v_main_#t~post6_853|) .cse3) (and (= |v_main_#t~post6_853| |v_main_#t~post6_849|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_429|, main_~y~0=v_main_~y~0_2928, main_~x~0=v_main_~x~0_2868, main_#t~post6=|v_main_#t~post6_853|} OutVars{main_#t~post4=|v_main_#t~post4_428|, main_~y~0=v_main_~y~0_2927, main_~x~0=v_main_~x~0_2867, main_#t~post6=|v_main_#t~post6_849|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {53406#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} is VALID [2022-04-28 03:41:27,690 INFO L290 TraceCheckUtils]: 9: Hoare triple {53406#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 500001))} [288] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {53401#false} is VALID [2022-04-28 03:41:27,690 INFO L272 TraceCheckUtils]: 10: Hoare triple {53401#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {53401#false} is VALID [2022-04-28 03:41:27,690 INFO L290 TraceCheckUtils]: 11: Hoare triple {53401#false} ~cond := #in~cond; {53401#false} is VALID [2022-04-28 03:41:27,690 INFO L290 TraceCheckUtils]: 12: Hoare triple {53401#false} assume 0 == ~cond; {53401#false} is VALID [2022-04-28 03:41:27,690 INFO L290 TraceCheckUtils]: 13: Hoare triple {53401#false} assume !false; {53401#false} is VALID [2022-04-28 03:41:27,690 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:41:27,690 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:41:27,690 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [704003628] [2022-04-28 03:41:27,690 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [704003628] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:41:27,690 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [341019745] [2022-04-28 03:41:27,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:41:27,690 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:41:27,691 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:41:27,691 INFO L229 MonitoredProcess]: Starting monitored process 62 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:41:27,692 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2022-04-28 03:41:27,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:41:27,720 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:41:27,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:41:27,727 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:41:27,893 INFO L272 TraceCheckUtils]: 0: Hoare triple {53400#true} call ULTIMATE.init(); {53400#true} is VALID [2022-04-28 03:41:27,893 INFO L290 TraceCheckUtils]: 1: Hoare triple {53400#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {53400#true} is VALID [2022-04-28 03:41:27,893 INFO L290 TraceCheckUtils]: 2: Hoare triple {53400#true} assume true; {53400#true} is VALID [2022-04-28 03:41:27,893 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53400#true} {53400#true} #41#return; {53400#true} is VALID [2022-04-28 03:41:27,893 INFO L272 TraceCheckUtils]: 4: Hoare triple {53400#true} call #t~ret7 := main(); {53400#true} is VALID [2022-04-28 03:41:27,893 INFO L290 TraceCheckUtils]: 5: Hoare triple {53400#true} ~x~0 := 0;~y~0 := 0; {53405#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:27,894 INFO L290 TraceCheckUtils]: 6: Hoare triple {53405#(and (= main_~x~0 0) (= main_~y~0 0))} [289] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2866 4294967296))) (let ((.cse0 (= v_main_~x~0_2866 v_main_~x~0_2865)) (.cse1 (= |v_main_#t~post5_424| |v_main_#t~post5_423|)) (.cse2 (= v_main_~y~0_2926 v_main_~y~0_2925)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_850| |v_main_#t~post6_848|)) (and (= |v_main_#t~post6_848| |v_main_#t~post6_850|) (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2) (and (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2866) v_main_~y~0_2925 (* (- 1) v_main_~y~0_2926)) (- 4294967296)) (+ (div (+ v_main_~x~0_2866 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2866 v_main_~y~0_2926) (+ v_main_~x~0_2865 v_main_~y~0_2925)) (< v_main_~y~0_2925 v_main_~y~0_2926) .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2926, main_#t~post5=|v_main_#t~post5_424|, main_~x~0=v_main_~x~0_2866, main_#t~post6=|v_main_#t~post6_850|} OutVars{main_#t~post5=|v_main_#t~post5_423|, main_~y~0=v_main_~y~0_2925, main_~x~0=v_main_~x~0_2865, main_#t~post6=|v_main_#t~post6_848|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {53405#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:27,894 INFO L290 TraceCheckUtils]: 7: Hoare triple {53405#(and (= main_~x~0 0) (= main_~y~0 0))} [290] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53405#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:41:27,895 INFO L290 TraceCheckUtils]: 8: Hoare triple {53405#(and (= main_~x~0 0) (= main_~y~0 0))} [291] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2868 4294967296)) (.cse1 (= |v_main_#t~post4_429| |v_main_#t~post4_428|)) (.cse2 (= v_main_~x~0_2868 v_main_~x~0_2867)) (.cse3 (= v_main_~y~0_2928 v_main_~y~0_2927))) (or (and (= (+ v_main_~x~0_2868 v_main_~y~0_2927) (+ v_main_~x~0_2867 v_main_~y~0_2928)) (<= (div (+ (* (- 1) v_main_~x~0_2867) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2868 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_2868 v_main_~x~0_2867)) (and .cse1 (<= 500000 .cse0) .cse2 (= |v_main_#t~post6_849| |v_main_#t~post6_853|) .cse3) (and (= |v_main_#t~post6_853| |v_main_#t~post6_849|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_429|, main_~y~0=v_main_~y~0_2928, main_~x~0=v_main_~x~0_2868, main_#t~post6=|v_main_#t~post6_853|} OutVars{main_#t~post4=|v_main_#t~post4_428|, main_~y~0=v_main_~y~0_2927, main_~x~0=v_main_~x~0_2867, main_#t~post6=|v_main_#t~post6_849|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {53435#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:41:27,896 INFO L290 TraceCheckUtils]: 9: Hoare triple {53435#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [288] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {53401#false} is VALID [2022-04-28 03:41:27,896 INFO L272 TraceCheckUtils]: 10: Hoare triple {53401#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {53401#false} is VALID [2022-04-28 03:41:27,896 INFO L290 TraceCheckUtils]: 11: Hoare triple {53401#false} ~cond := #in~cond; {53401#false} is VALID [2022-04-28 03:41:27,896 INFO L290 TraceCheckUtils]: 12: Hoare triple {53401#false} assume 0 == ~cond; {53401#false} is VALID [2022-04-28 03:41:27,897 INFO L290 TraceCheckUtils]: 13: Hoare triple {53401#false} assume !false; {53401#false} is VALID [2022-04-28 03:41:27,897 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:41:27,897 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:41:28,732 INFO L290 TraceCheckUtils]: 13: Hoare triple {53401#false} assume !false; {53401#false} is VALID [2022-04-28 03:41:28,732 INFO L290 TraceCheckUtils]: 12: Hoare triple {53454#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {53401#false} is VALID [2022-04-28 03:41:28,732 INFO L290 TraceCheckUtils]: 11: Hoare triple {53458#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {53454#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:41:28,733 INFO L272 TraceCheckUtils]: 10: Hoare triple {53462#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {53458#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:41:28,733 INFO L290 TraceCheckUtils]: 9: Hoare triple {53466#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [288] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {53462#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:41:28,750 INFO L290 TraceCheckUtils]: 8: Hoare triple {53466#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [291] L9-2-->L9-3_primed: Formula: (let ((.cse0 (mod v_main_~x~0_2868 4294967296)) (.cse1 (= |v_main_#t~post4_429| |v_main_#t~post4_428|)) (.cse2 (= v_main_~x~0_2868 v_main_~x~0_2867)) (.cse3 (= v_main_~y~0_2928 v_main_~y~0_2927))) (or (and (= (+ v_main_~x~0_2868 v_main_~y~0_2927) (+ v_main_~x~0_2867 v_main_~y~0_2928)) (<= (div (+ (* (- 1) v_main_~x~0_2867) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2868 (- 4294967295)) 4294967296) 1)) (< .cse0 500000) (< v_main_~x~0_2868 v_main_~x~0_2867)) (and .cse1 (<= 500000 .cse0) .cse2 (= |v_main_#t~post6_849| |v_main_#t~post6_853|) .cse3) (and (= |v_main_#t~post6_853| |v_main_#t~post6_849|) .cse1 .cse2 .cse3))) InVars {main_#t~post4=|v_main_#t~post4_429|, main_~y~0=v_main_~y~0_2928, main_~x~0=v_main_~x~0_2868, main_#t~post6=|v_main_#t~post6_853|} OutVars{main_#t~post4=|v_main_#t~post4_428|, main_~y~0=v_main_~y~0_2927, main_~x~0=v_main_~x~0_2867, main_#t~post6=|v_main_#t~post6_849|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {53466#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:41:28,750 INFO L290 TraceCheckUtils]: 7: Hoare triple {53466#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [290] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53466#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:41:28,875 INFO L290 TraceCheckUtils]: 6: Hoare triple {53476#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2938_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2938_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2938_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} [289] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_2866 4294967296))) (let ((.cse0 (= v_main_~x~0_2866 v_main_~x~0_2865)) (.cse1 (= |v_main_#t~post5_424| |v_main_#t~post5_423|)) (.cse2 (= v_main_~y~0_2926 v_main_~y~0_2925)) (.cse3 (<= 500000 .cse5)) (.cse4 (< .cse5 1000000))) (or (and .cse0 .cse1 .cse2 (= |v_main_#t~post6_850| |v_main_#t~post6_848|)) (and (= |v_main_#t~post6_848| |v_main_#t~post6_850|) (or (not .cse3) (not .cse4)) .cse0 .cse1 .cse2) (and (<= (div (+ 1000000 (* (- 1) v_main_~x~0_2866) v_main_~y~0_2925 (* (- 1) v_main_~y~0_2926)) (- 4294967296)) (+ (div (+ v_main_~x~0_2866 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_2866 v_main_~y~0_2926) (+ v_main_~x~0_2865 v_main_~y~0_2925)) (< v_main_~y~0_2925 v_main_~y~0_2926) .cse3 .cse4)))) InVars {main_~y~0=v_main_~y~0_2926, main_#t~post5=|v_main_#t~post5_424|, main_~x~0=v_main_~x~0_2866, main_#t~post6=|v_main_#t~post6_850|} OutVars{main_#t~post5=|v_main_#t~post5_423|, main_~y~0=v_main_~y~0_2925, main_~x~0=v_main_~x~0_2865, main_#t~post6=|v_main_#t~post6_848|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {53466#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:41:28,876 INFO L290 TraceCheckUtils]: 5: Hoare triple {53400#true} ~x~0 := 0;~y~0 := 0; {53476#(and (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_2938_33 Int)) (or (not (< (* 4294967296 aux_div_v_main_~y~0_2938_33) main_~y~0)) (not (<= (div (+ (* 4294967296 aux_div_v_main_~y~0_2938_33) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:41:28,876 INFO L272 TraceCheckUtils]: 4: Hoare triple {53400#true} call #t~ret7 := main(); {53400#true} is VALID [2022-04-28 03:41:28,876 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53400#true} {53400#true} #41#return; {53400#true} is VALID [2022-04-28 03:41:28,876 INFO L290 TraceCheckUtils]: 2: Hoare triple {53400#true} assume true; {53400#true} is VALID [2022-04-28 03:41:28,876 INFO L290 TraceCheckUtils]: 1: Hoare triple {53400#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {53400#true} is VALID [2022-04-28 03:41:28,876 INFO L272 TraceCheckUtils]: 0: Hoare triple {53400#true} call ULTIMATE.init(); {53400#true} is VALID [2022-04-28 03:41:28,876 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:41:28,876 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [341019745] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:41:28,877 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:41:28,877 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 11 [2022-04-28 03:41:36,006 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:41:36,006 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [909590403] [2022-04-28 03:41:36,006 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [909590403] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:41:36,006 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:41:36,006 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [126] imperfect sequences [] total 126 [2022-04-28 03:41:36,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199855852] [2022-04-28 03:41:36,006 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:41:36,007 INFO L78 Accepts]: Start accepts. Automaton has has 126 states, 126 states have (on average 1.5317460317460319) internal successors, (193), 125 states have internal predecessors, (193), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 197 [2022-04-28 03:41:36,007 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:41:36,007 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 126 states, 126 states have (on average 1.5317460317460319) internal successors, (193), 125 states have internal predecessors, (193), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:41:36,139 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 197 edges. 197 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:41:36,140 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 126 states [2022-04-28 03:41:36,140 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:41:36,140 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 126 interpolants. [2022-04-28 03:41:36,141 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=821, Invalid=16735, Unknown=0, NotChecked=0, Total=17556 [2022-04-28 03:41:36,141 INFO L87 Difference]: Start difference. First operand 199 states and 201 transitions. Second operand has 126 states, 126 states have (on average 1.5317460317460319) internal successors, (193), 125 states have internal predecessors, (193), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:00,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:42:00,145 INFO L93 Difference]: Finished difference Result 210 states and 214 transitions. [2022-04-28 03:42:00,145 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 126 states. [2022-04-28 03:42:00,145 INFO L78 Accepts]: Start accepts. Automaton has has 126 states, 126 states have (on average 1.5317460317460319) internal successors, (193), 125 states have internal predecessors, (193), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 197 [2022-04-28 03:42:00,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:42:00,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 126 states, 126 states have (on average 1.5317460317460319) internal successors, (193), 125 states have internal predecessors, (193), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:00,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 210 transitions. [2022-04-28 03:42:00,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 126 states, 126 states have (on average 1.5317460317460319) internal successors, (193), 125 states have internal predecessors, (193), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:00,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 210 transitions. [2022-04-28 03:42:00,149 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 126 states and 210 transitions. [2022-04-28 03:42:00,249 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 210 edges. 210 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:42:00,251 INFO L225 Difference]: With dead ends: 210 [2022-04-28 03:42:00,251 INFO L226 Difference]: Without dead ends: 202 [2022-04-28 03:42:00,253 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 348 GetRequests, 30 SyntacticMatches, 64 SemanticMatches, 254 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14111 ImplicationChecksByTransitivity, 10.3s TimeCoverageRelationStatistics Valid=1866, Invalid=63414, Unknown=0, NotChecked=0, Total=65280 [2022-04-28 03:42:00,254 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 71 mSDsluCounter, 617 mSDsCounter, 0 mSdLazyCounter, 23617 mSolverCounterSat, 125 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 11.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 629 SdHoareTripleChecker+Invalid, 23742 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 125 IncrementalHoareTripleChecker+Valid, 23617 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 11.7s IncrementalHoareTripleChecker+Time [2022-04-28 03:42:00,259 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [71 Valid, 629 Invalid, 23742 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [125 Valid, 23617 Invalid, 0 Unknown, 0 Unchecked, 11.7s Time] [2022-04-28 03:42:00,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2022-04-28 03:42:00,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2022-04-28 03:42:00,454 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:42:00,455 INFO L82 GeneralOperation]: Start isEquivalent. First operand 202 states. Second operand has 202 states, 197 states have (on average 1.015228426395939) internal successors, (200), 197 states have internal predecessors, (200), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:00,455 INFO L74 IsIncluded]: Start isIncluded. First operand 202 states. Second operand has 202 states, 197 states have (on average 1.015228426395939) internal successors, (200), 197 states have internal predecessors, (200), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:00,455 INFO L87 Difference]: Start difference. First operand 202 states. Second operand has 202 states, 197 states have (on average 1.015228426395939) internal successors, (200), 197 states have internal predecessors, (200), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:00,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:42:00,457 INFO L93 Difference]: Finished difference Result 202 states and 204 transitions. [2022-04-28 03:42:00,457 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 204 transitions. [2022-04-28 03:42:00,457 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:42:00,457 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:42:00,458 INFO L74 IsIncluded]: Start isIncluded. First operand has 202 states, 197 states have (on average 1.015228426395939) internal successors, (200), 197 states have internal predecessors, (200), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 202 states. [2022-04-28 03:42:00,458 INFO L87 Difference]: Start difference. First operand has 202 states, 197 states have (on average 1.015228426395939) internal successors, (200), 197 states have internal predecessors, (200), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 202 states. [2022-04-28 03:42:00,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:42:00,461 INFO L93 Difference]: Finished difference Result 202 states and 204 transitions. [2022-04-28 03:42:00,461 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 204 transitions. [2022-04-28 03:42:00,461 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:42:00,461 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:42:00,461 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:42:00,461 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:42:00,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 202 states, 197 states have (on average 1.015228426395939) internal successors, (200), 197 states have internal predecessors, (200), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:00,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 204 transitions. [2022-04-28 03:42:00,465 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 204 transitions. Word has length 197 [2022-04-28 03:42:00,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:42:00,465 INFO L495 AbstractCegarLoop]: Abstraction has 202 states and 204 transitions. [2022-04-28 03:42:00,465 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 126 states, 126 states have (on average 1.5317460317460319) internal successors, (193), 125 states have internal predecessors, (193), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:00,465 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 202 states and 204 transitions. [2022-04-28 03:42:00,716 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 204 edges. 204 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:42:00,716 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 204 transitions. [2022-04-28 03:42:00,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2022-04-28 03:42:00,716 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:42:00,716 INFO L195 NwaCegarLoop]: trace histogram [63, 63, 62, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:42:00,733 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Forceful destruction successful, exit code 0 [2022-04-28 03:42:00,933 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63,62 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:42:00,933 INFO L420 AbstractCegarLoop]: === Iteration 65 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:42:00,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:42:00,934 INFO L85 PathProgramCache]: Analyzing trace with hash -1318729971, now seen corresponding path program 62 times [2022-04-28 03:42:00,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:42:00,934 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [793956506] [2022-04-28 03:42:03,691 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:42:03,907 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:42:04,237 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:42:04,238 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:42:04,241 INFO L85 PathProgramCache]: Analyzing trace with hash 1071081647, now seen corresponding path program 1 times [2022-04-28 03:42:04,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:42:04,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1110698863] [2022-04-28 03:42:04,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:42:04,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:42:04,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:42:04,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:42:04,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:42:04,278 INFO L290 TraceCheckUtils]: 0: Hoare triple {55100#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {55093#true} is VALID [2022-04-28 03:42:04,278 INFO L290 TraceCheckUtils]: 1: Hoare triple {55093#true} assume true; {55093#true} is VALID [2022-04-28 03:42:04,278 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {55093#true} {55093#true} #41#return; {55093#true} is VALID [2022-04-28 03:42:04,279 INFO L272 TraceCheckUtils]: 0: Hoare triple {55093#true} call ULTIMATE.init(); {55100#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:42:04,279 INFO L290 TraceCheckUtils]: 1: Hoare triple {55100#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {55093#true} is VALID [2022-04-28 03:42:04,279 INFO L290 TraceCheckUtils]: 2: Hoare triple {55093#true} assume true; {55093#true} is VALID [2022-04-28 03:42:04,279 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55093#true} {55093#true} #41#return; {55093#true} is VALID [2022-04-28 03:42:04,279 INFO L272 TraceCheckUtils]: 4: Hoare triple {55093#true} call #t~ret7 := main(); {55093#true} is VALID [2022-04-28 03:42:04,279 INFO L290 TraceCheckUtils]: 5: Hoare triple {55093#true} ~x~0 := 0;~y~0 := 0; {55098#(= main_~x~0 0)} is VALID [2022-04-28 03:42:04,280 INFO L290 TraceCheckUtils]: 6: Hoare triple {55098#(= main_~x~0 0)} [293] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2944 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= |v_main_#t~post5_431| |v_main_#t~post5_430|)) (.cse1 (= v_main_~y~0_3005 v_main_~y~0_3004)) (.cse2 (= |v_main_#t~post6_864| |v_main_#t~post6_862|)) (.cse5 (= v_main_~x~0_2944 v_main_~x~0_2943))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (= (+ v_main_~x~0_2943 v_main_~y~0_3004) (+ v_main_~x~0_2944 v_main_~y~0_3005)) (< v_main_~y~0_3004 v_main_~y~0_3005) (<= (div (+ (* (- 1) v_main_~y~0_3005) 1000000 v_main_~y~0_3004 (* (- 1) v_main_~x~0_2944)) (- 4294967296)) (+ (div (+ v_main_~x~0_2944 (- 4294967295)) 4294967296) 1)) .cse3 .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_3005, main_#t~post5=|v_main_#t~post5_431|, main_~x~0=v_main_~x~0_2944, main_#t~post6=|v_main_#t~post6_864|} OutVars{main_#t~post5=|v_main_#t~post5_430|, main_~y~0=v_main_~y~0_3004, main_~x~0=v_main_~x~0_2943, main_#t~post6=|v_main_#t~post6_862|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {55098#(= main_~x~0 0)} is VALID [2022-04-28 03:42:04,280 INFO L290 TraceCheckUtils]: 7: Hoare triple {55098#(= main_~x~0 0)} [294] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {55098#(= main_~x~0 0)} is VALID [2022-04-28 03:42:04,281 INFO L290 TraceCheckUtils]: 8: Hoare triple {55098#(= main_~x~0 0)} [295] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_3007 v_main_~y~0_3006)) (.cse2 (= |v_main_#t~post6_867| |v_main_#t~post6_863|)) (.cse0 (mod v_main_~x~0_2946 4294967296)) (.cse3 (= |v_main_#t~post4_436| |v_main_#t~post4_435|)) (.cse4 (= v_main_~x~0_2946 v_main_~x~0_2945))) (or (and (< .cse0 500000) (< v_main_~x~0_2946 v_main_~x~0_2945) (= (+ v_main_~x~0_2945 v_main_~y~0_3007) (+ v_main_~x~0_2946 v_main_~y~0_3006)) (<= (div (+ (* (- 1) v_main_~x~0_2945) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2946 (- 4294967295)) 4294967296) 1))) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_436|, main_~y~0=v_main_~y~0_3007, main_~x~0=v_main_~x~0_2946, main_#t~post6=|v_main_#t~post6_867|} OutVars{main_#t~post4=|v_main_#t~post4_435|, main_~y~0=v_main_~y~0_3006, main_~x~0=v_main_~x~0_2945, main_#t~post6=|v_main_#t~post6_863|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {55099#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-28 03:42:04,282 INFO L290 TraceCheckUtils]: 9: Hoare triple {55099#(and (<= main_~x~0 500000) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [292] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {55094#false} is VALID [2022-04-28 03:42:04,282 INFO L272 TraceCheckUtils]: 10: Hoare triple {55094#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {55094#false} is VALID [2022-04-28 03:42:04,282 INFO L290 TraceCheckUtils]: 11: Hoare triple {55094#false} ~cond := #in~cond; {55094#false} is VALID [2022-04-28 03:42:04,282 INFO L290 TraceCheckUtils]: 12: Hoare triple {55094#false} assume 0 == ~cond; {55094#false} is VALID [2022-04-28 03:42:04,282 INFO L290 TraceCheckUtils]: 13: Hoare triple {55094#false} assume !false; {55094#false} is VALID [2022-04-28 03:42:04,282 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:42:04,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:42:04,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1110698863] [2022-04-28 03:42:04,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1110698863] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:42:04,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [649806651] [2022-04-28 03:42:04,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:42:04,283 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:42:04,283 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:42:04,284 INFO L229 MonitoredProcess]: Starting monitored process 63 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:42:04,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2022-04-28 03:42:04,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:42:04,316 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:42:04,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:42:04,324 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:42:04,487 INFO L272 TraceCheckUtils]: 0: Hoare triple {55093#true} call ULTIMATE.init(); {55093#true} is VALID [2022-04-28 03:42:04,487 INFO L290 TraceCheckUtils]: 1: Hoare triple {55093#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {55093#true} is VALID [2022-04-28 03:42:04,487 INFO L290 TraceCheckUtils]: 2: Hoare triple {55093#true} assume true; {55093#true} is VALID [2022-04-28 03:42:04,487 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55093#true} {55093#true} #41#return; {55093#true} is VALID [2022-04-28 03:42:04,487 INFO L272 TraceCheckUtils]: 4: Hoare triple {55093#true} call #t~ret7 := main(); {55093#true} is VALID [2022-04-28 03:42:04,488 INFO L290 TraceCheckUtils]: 5: Hoare triple {55093#true} ~x~0 := 0;~y~0 := 0; {55119#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:04,488 INFO L290 TraceCheckUtils]: 6: Hoare triple {55119#(and (= main_~x~0 0) (= main_~y~0 0))} [293] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2944 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= |v_main_#t~post5_431| |v_main_#t~post5_430|)) (.cse1 (= v_main_~y~0_3005 v_main_~y~0_3004)) (.cse2 (= |v_main_#t~post6_864| |v_main_#t~post6_862|)) (.cse5 (= v_main_~x~0_2944 v_main_~x~0_2943))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (= (+ v_main_~x~0_2943 v_main_~y~0_3004) (+ v_main_~x~0_2944 v_main_~y~0_3005)) (< v_main_~y~0_3004 v_main_~y~0_3005) (<= (div (+ (* (- 1) v_main_~y~0_3005) 1000000 v_main_~y~0_3004 (* (- 1) v_main_~x~0_2944)) (- 4294967296)) (+ (div (+ v_main_~x~0_2944 (- 4294967295)) 4294967296) 1)) .cse3 .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_3005, main_#t~post5=|v_main_#t~post5_431|, main_~x~0=v_main_~x~0_2944, main_#t~post6=|v_main_#t~post6_864|} OutVars{main_#t~post5=|v_main_#t~post5_430|, main_~y~0=v_main_~y~0_3004, main_~x~0=v_main_~x~0_2943, main_#t~post6=|v_main_#t~post6_862|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {55119#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:04,489 INFO L290 TraceCheckUtils]: 7: Hoare triple {55119#(and (= main_~x~0 0) (= main_~y~0 0))} [294] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {55119#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:04,489 INFO L290 TraceCheckUtils]: 8: Hoare triple {55119#(and (= main_~x~0 0) (= main_~y~0 0))} [295] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_3007 v_main_~y~0_3006)) (.cse2 (= |v_main_#t~post6_867| |v_main_#t~post6_863|)) (.cse0 (mod v_main_~x~0_2946 4294967296)) (.cse3 (= |v_main_#t~post4_436| |v_main_#t~post4_435|)) (.cse4 (= v_main_~x~0_2946 v_main_~x~0_2945))) (or (and (< .cse0 500000) (< v_main_~x~0_2946 v_main_~x~0_2945) (= (+ v_main_~x~0_2945 v_main_~y~0_3007) (+ v_main_~x~0_2946 v_main_~y~0_3006)) (<= (div (+ (* (- 1) v_main_~x~0_2945) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2946 (- 4294967295)) 4294967296) 1))) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_436|, main_~y~0=v_main_~y~0_3007, main_~x~0=v_main_~x~0_2946, main_#t~post6=|v_main_#t~post6_867|} OutVars{main_#t~post4=|v_main_#t~post4_435|, main_~y~0=v_main_~y~0_3006, main_~x~0=v_main_~x~0_2945, main_#t~post6=|v_main_#t~post6_863|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {55129#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:42:04,490 INFO L290 TraceCheckUtils]: 9: Hoare triple {55129#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [292] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {55094#false} is VALID [2022-04-28 03:42:04,490 INFO L272 TraceCheckUtils]: 10: Hoare triple {55094#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {55094#false} is VALID [2022-04-28 03:42:04,490 INFO L290 TraceCheckUtils]: 11: Hoare triple {55094#false} ~cond := #in~cond; {55094#false} is VALID [2022-04-28 03:42:04,490 INFO L290 TraceCheckUtils]: 12: Hoare triple {55094#false} assume 0 == ~cond; {55094#false} is VALID [2022-04-28 03:42:04,490 INFO L290 TraceCheckUtils]: 13: Hoare triple {55094#false} assume !false; {55094#false} is VALID [2022-04-28 03:42:04,490 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:42:04,491 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:42:05,306 INFO L290 TraceCheckUtils]: 13: Hoare triple {55094#false} assume !false; {55094#false} is VALID [2022-04-28 03:42:05,306 INFO L290 TraceCheckUtils]: 12: Hoare triple {55148#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {55094#false} is VALID [2022-04-28 03:42:05,307 INFO L290 TraceCheckUtils]: 11: Hoare triple {55152#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {55148#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:42:05,307 INFO L272 TraceCheckUtils]: 10: Hoare triple {55156#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {55152#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:42:05,307 INFO L290 TraceCheckUtils]: 9: Hoare triple {55160#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [292] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {55156#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:42:05,319 INFO L290 TraceCheckUtils]: 8: Hoare triple {55160#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [295] L9-2-->L9-3_primed: Formula: (let ((.cse1 (= v_main_~y~0_3007 v_main_~y~0_3006)) (.cse2 (= |v_main_#t~post6_867| |v_main_#t~post6_863|)) (.cse0 (mod v_main_~x~0_2946 4294967296)) (.cse3 (= |v_main_#t~post4_436| |v_main_#t~post4_435|)) (.cse4 (= v_main_~x~0_2946 v_main_~x~0_2945))) (or (and (< .cse0 500000) (< v_main_~x~0_2946 v_main_~x~0_2945) (= (+ v_main_~x~0_2945 v_main_~y~0_3007) (+ v_main_~x~0_2946 v_main_~y~0_3006)) (<= (div (+ (* (- 1) v_main_~x~0_2945) 500000) (- 4294967296)) (+ (div (+ v_main_~x~0_2946 (- 4294967295)) 4294967296) 1))) (and .cse1 .cse2 .cse3 .cse4) (and .cse1 .cse2 (<= 500000 .cse0) .cse3 .cse4))) InVars {main_#t~post4=|v_main_#t~post4_436|, main_~y~0=v_main_~y~0_3007, main_~x~0=v_main_~x~0_2946, main_#t~post6=|v_main_#t~post6_867|} OutVars{main_#t~post4=|v_main_#t~post4_435|, main_~y~0=v_main_~y~0_3006, main_~x~0=v_main_~x~0_2945, main_#t~post6=|v_main_#t~post6_863|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {55160#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:42:05,320 INFO L290 TraceCheckUtils]: 7: Hoare triple {55160#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [294] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {55160#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:42:05,789 INFO L290 TraceCheckUtils]: 6: Hoare triple {55170#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_3017_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_3017_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_3017_33 4294967296) main_~y~0))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [293] L9-2-->L9-3_primed: Formula: (let ((.cse6 (mod v_main_~x~0_2944 4294967296))) (let ((.cse3 (< .cse6 1000000)) (.cse4 (<= 500000 .cse6)) (.cse0 (= |v_main_#t~post5_431| |v_main_#t~post5_430|)) (.cse1 (= v_main_~y~0_3005 v_main_~y~0_3004)) (.cse2 (= |v_main_#t~post6_864| |v_main_#t~post6_862|)) (.cse5 (= v_main_~x~0_2944 v_main_~x~0_2943))) (or (and .cse0 .cse1 .cse2 (or (not .cse3) (not .cse4)) .cse5) (and (= (+ v_main_~x~0_2943 v_main_~y~0_3004) (+ v_main_~x~0_2944 v_main_~y~0_3005)) (< v_main_~y~0_3004 v_main_~y~0_3005) (<= (div (+ (* (- 1) v_main_~y~0_3005) 1000000 v_main_~y~0_3004 (* (- 1) v_main_~x~0_2944)) (- 4294967296)) (+ (div (+ v_main_~x~0_2944 (- 4294967295)) 4294967296) 1)) .cse3 .cse4) (and .cse0 .cse1 .cse2 .cse5)))) InVars {main_~y~0=v_main_~y~0_3005, main_#t~post5=|v_main_#t~post5_431|, main_~x~0=v_main_~x~0_2944, main_#t~post6=|v_main_#t~post6_864|} OutVars{main_#t~post5=|v_main_#t~post5_430|, main_~y~0=v_main_~y~0_3004, main_~x~0=v_main_~x~0_2943, main_#t~post6=|v_main_#t~post6_862|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {55160#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:42:05,789 INFO L290 TraceCheckUtils]: 5: Hoare triple {55093#true} ~x~0 := 0;~y~0 := 0; {55170#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1)) (forall ((aux_div_v_main_~y~0_3017_33 Int)) (or (not (<= (div (+ (* aux_div_v_main_~y~0_3017_33 4294967296) 1000000 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))) (not (< (* aux_div_v_main_~y~0_3017_33 4294967296) main_~y~0))))) (or (not (= (mod main_~y~0 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:42:05,790 INFO L272 TraceCheckUtils]: 4: Hoare triple {55093#true} call #t~ret7 := main(); {55093#true} is VALID [2022-04-28 03:42:05,790 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {55093#true} {55093#true} #41#return; {55093#true} is VALID [2022-04-28 03:42:05,790 INFO L290 TraceCheckUtils]: 2: Hoare triple {55093#true} assume true; {55093#true} is VALID [2022-04-28 03:42:05,790 INFO L290 TraceCheckUtils]: 1: Hoare triple {55093#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {55093#true} is VALID [2022-04-28 03:42:05,790 INFO L272 TraceCheckUtils]: 0: Hoare triple {55093#true} call ULTIMATE.init(); {55093#true} is VALID [2022-04-28 03:42:05,790 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:42:05,790 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [649806651] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:42:05,790 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:42:05,790 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 7] total 12 [2022-04-28 03:42:09,786 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:42:09,786 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [793956506] [2022-04-28 03:42:09,786 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [793956506] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:42:09,786 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:42:09,786 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [66] imperfect sequences [] total 66 [2022-04-28 03:42:09,786 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963005010] [2022-04-28 03:42:09,786 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:42:09,787 INFO L78 Accepts]: Start accepts. Automaton has has 66 states, 66 states have (on average 2.9696969696969697) internal successors, (196), 65 states have internal predecessors, (196), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 200 [2022-04-28 03:42:09,787 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:42:09,787 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 66 states, 66 states have (on average 2.9696969696969697) internal successors, (196), 65 states have internal predecessors, (196), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:09,870 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 200 edges. 200 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:42:09,870 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 66 states [2022-04-28 03:42:09,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:42:09,870 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2022-04-28 03:42:09,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=344, Invalid=5058, Unknown=0, NotChecked=0, Total=5402 [2022-04-28 03:42:09,883 INFO L87 Difference]: Start difference. First operand 202 states and 204 transitions. Second operand has 66 states, 66 states have (on average 2.9696969696969697) internal successors, (196), 65 states have internal predecessors, (196), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:23,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:42:23,254 INFO L93 Difference]: Finished difference Result 214 states and 218 transitions. [2022-04-28 03:42:23,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2022-04-28 03:42:23,254 INFO L78 Accepts]: Start accepts. Automaton has has 66 states, 66 states have (on average 2.9696969696969697) internal successors, (196), 65 states have internal predecessors, (196), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 200 [2022-04-28 03:42:23,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:42:23,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 2.9696969696969697) internal successors, (196), 65 states have internal predecessors, (196), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:23,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 214 transitions. [2022-04-28 03:42:23,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 2.9696969696969697) internal successors, (196), 65 states have internal predecessors, (196), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:23,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 214 transitions. [2022-04-28 03:42:23,256 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 66 states and 214 transitions. [2022-04-28 03:42:23,419 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 214 edges. 214 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:42:23,421 INFO L225 Difference]: With dead ends: 214 [2022-04-28 03:42:23,422 INFO L226 Difference]: Without dead ends: 206 [2022-04-28 03:42:23,422 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 29 SyntacticMatches, 127 SemanticMatches, 135 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3162 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=785, Invalid=17847, Unknown=0, NotChecked=0, Total=18632 [2022-04-28 03:42:23,423 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 136 mSDsluCounter, 317 mSDsCounter, 0 mSdLazyCounter, 12349 mSolverCounterSat, 65 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 136 SdHoareTripleChecker+Valid, 329 SdHoareTripleChecker+Invalid, 12414 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 65 IncrementalHoareTripleChecker+Valid, 12349 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.8s IncrementalHoareTripleChecker+Time [2022-04-28 03:42:23,423 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [136 Valid, 329 Invalid, 12414 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [65 Valid, 12349 Invalid, 0 Unknown, 0 Unchecked, 6.8s Time] [2022-04-28 03:42:23,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2022-04-28 03:42:23,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 205. [2022-04-28 03:42:23,758 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:42:23,758 INFO L82 GeneralOperation]: Start isEquivalent. First operand 206 states. Second operand has 205 states, 200 states have (on average 1.015) internal successors, (203), 200 states have internal predecessors, (203), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:23,758 INFO L74 IsIncluded]: Start isIncluded. First operand 206 states. Second operand has 205 states, 200 states have (on average 1.015) internal successors, (203), 200 states have internal predecessors, (203), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:23,758 INFO L87 Difference]: Start difference. First operand 206 states. Second operand has 205 states, 200 states have (on average 1.015) internal successors, (203), 200 states have internal predecessors, (203), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:23,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:42:23,760 INFO L93 Difference]: Finished difference Result 206 states and 208 transitions. [2022-04-28 03:42:23,760 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 208 transitions. [2022-04-28 03:42:23,760 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:42:23,760 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:42:23,761 INFO L74 IsIncluded]: Start isIncluded. First operand has 205 states, 200 states have (on average 1.015) internal successors, (203), 200 states have internal predecessors, (203), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 206 states. [2022-04-28 03:42:23,761 INFO L87 Difference]: Start difference. First operand has 205 states, 200 states have (on average 1.015) internal successors, (203), 200 states have internal predecessors, (203), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 206 states. [2022-04-28 03:42:23,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:42:23,763 INFO L93 Difference]: Finished difference Result 206 states and 208 transitions. [2022-04-28 03:42:23,763 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 208 transitions. [2022-04-28 03:42:23,763 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:42:23,763 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:42:23,763 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:42:23,763 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:42:23,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 205 states, 200 states have (on average 1.015) internal successors, (203), 200 states have internal predecessors, (203), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:23,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 207 transitions. [2022-04-28 03:42:23,765 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 207 transitions. Word has length 200 [2022-04-28 03:42:23,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:42:23,766 INFO L495 AbstractCegarLoop]: Abstraction has 205 states and 207 transitions. [2022-04-28 03:42:23,766 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 66 states, 66 states have (on average 2.9696969696969697) internal successors, (196), 65 states have internal predecessors, (196), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:23,766 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 205 states and 207 transitions. [2022-04-28 03:42:24,094 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 207 edges. 207 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:42:24,094 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 207 transitions. [2022-04-28 03:42:24,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2022-04-28 03:42:24,094 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:42:24,094 INFO L195 NwaCegarLoop]: trace histogram [64, 64, 63, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:42:24,111 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Forceful destruction successful, exit code 0 [2022-04-28 03:42:24,300 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 63 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable64 [2022-04-28 03:42:24,301 INFO L420 AbstractCegarLoop]: === Iteration 66 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:42:24,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:42:24,301 INFO L85 PathProgramCache]: Analyzing trace with hash 239151173, now seen corresponding path program 63 times [2022-04-28 03:42:24,301 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:42:24,301 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [704252034] [2022-04-28 03:42:28,914 WARN L977 rdanLoopAcceleration]: Unable to prove correctness of quantifier elimination. [2022-04-28 03:42:29,119 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:42:30,556 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 1 QuantifierFreeResult [2022-04-28 03:42:30,557 INFO L271 tedInterpolationCore]: Starting analysis with loop acceleration approximation PRECISE [2022-04-28 03:42:30,560 INFO L85 PathProgramCache]: Analyzing trace with hash -1174353489, now seen corresponding path program 1 times [2022-04-28 03:42:30,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:42:30,560 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764240855] [2022-04-28 03:42:30,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:42:30,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:42:30,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:42:30,634 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:42:30,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:42:30,639 INFO L290 TraceCheckUtils]: 0: Hoare triple {56639#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {56629#true} is VALID [2022-04-28 03:42:30,639 INFO L290 TraceCheckUtils]: 1: Hoare triple {56629#true} assume true; {56629#true} is VALID [2022-04-28 03:42:30,639 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56629#true} {56629#true} #41#return; {56629#true} is VALID [2022-04-28 03:42:30,639 INFO L272 TraceCheckUtils]: 0: Hoare triple {56629#true} call ULTIMATE.init(); {56639#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:42:30,639 INFO L290 TraceCheckUtils]: 1: Hoare triple {56639#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {56629#true} is VALID [2022-04-28 03:42:30,639 INFO L290 TraceCheckUtils]: 2: Hoare triple {56629#true} assume true; {56629#true} is VALID [2022-04-28 03:42:30,639 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56629#true} {56629#true} #41#return; {56629#true} is VALID [2022-04-28 03:42:30,640 INFO L272 TraceCheckUtils]: 4: Hoare triple {56629#true} call #t~ret7 := main(); {56629#true} is VALID [2022-04-28 03:42:30,640 INFO L290 TraceCheckUtils]: 5: Hoare triple {56629#true} ~x~0 := 0;~y~0 := 0; {56634#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:30,641 INFO L290 TraceCheckUtils]: 6: Hoare triple {56634#(and (= main_~x~0 0) (= main_~y~0 0))} [297] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_3023 4294967296))) (let ((.cse0 (= v_main_~y~0_3085 v_main_~y~0_3084)) (.cse1 (= v_main_~x~0_3023 v_main_~x~0_3022)) (.cse2 (= |v_main_#t~post5_438| |v_main_#t~post5_437|)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and .cse0 .cse1 (= |v_main_#t~post6_878| |v_main_#t~post6_876|) .cse2) (and .cse0 (= |v_main_#t~post6_876| |v_main_#t~post6_878|) .cse1 (or (not .cse3) (not .cse4)) .cse2) (and .cse4 (< v_main_~y~0_3084 v_main_~y~0_3085) (<= (div (+ (* (- 1) v_main_~x~0_3023) (* (- 1) v_main_~y~0_3085) 1000000 v_main_~y~0_3084) (- 4294967296)) (+ (div (+ v_main_~x~0_3023 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_3023 v_main_~y~0_3085) (+ v_main_~x~0_3022 v_main_~y~0_3084)) .cse3)))) InVars {main_~y~0=v_main_~y~0_3085, main_#t~post5=|v_main_#t~post5_438|, main_~x~0=v_main_~x~0_3023, main_#t~post6=|v_main_#t~post6_878|} OutVars{main_#t~post5=|v_main_#t~post5_437|, main_~y~0=v_main_~y~0_3084, main_~x~0=v_main_~x~0_3022, main_#t~post6=|v_main_#t~post6_876|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {56634#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:30,641 INFO L290 TraceCheckUtils]: 7: Hoare triple {56634#(and (= main_~x~0 0) (= main_~y~0 0))} [298] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {56634#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:30,642 INFO L290 TraceCheckUtils]: 8: Hoare triple {56634#(and (= main_~x~0 0) (= main_~y~0 0))} [299] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_3087 v_main_~y~0_3086)) (.cse1 (= |v_main_#t~post4_443| |v_main_#t~post4_442|)) (.cse2 (= v_main_~x~0_3025 v_main_~x~0_3024)) (.cse3 (mod v_main_~x~0_3025 4294967296))) (or (and .cse0 (= |v_main_#t~post6_881| |v_main_#t~post6_877|) .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_877| |v_main_#t~post6_881|) .cse1 (<= 500000 .cse3) .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_3025 v_main_~y~0_3086) (+ v_main_~x~0_3024 v_main_~y~0_3087)) (< v_main_~x~0_3025 v_main_~x~0_3024) (<= (div (+ 500000 (* (- 1) v_main_~x~0_3024)) (- 4294967296)) (+ (div (+ v_main_~x~0_3025 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_443|, main_~y~0=v_main_~y~0_3087, main_~x~0=v_main_~x~0_3025, main_#t~post6=|v_main_#t~post6_881|} OutVars{main_#t~post4=|v_main_#t~post4_442|, main_~y~0=v_main_~y~0_3086, main_~x~0=v_main_~x~0_3024, main_#t~post6=|v_main_#t~post6_877|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {56635#(or (= main_~x~0 0) (and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0)))} is VALID [2022-04-28 03:42:30,643 INFO L290 TraceCheckUtils]: 9: Hoare triple {56635#(or (= main_~x~0 0) (and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0)))} [296] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {56636#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:42:30,643 INFO L272 TraceCheckUtils]: 10: Hoare triple {56636#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {56637#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-28 03:42:30,643 INFO L290 TraceCheckUtils]: 11: Hoare triple {56637#(not (= |__VERIFIER_assert_#in~cond| 0))} ~cond := #in~cond; {56638#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:42:30,644 INFO L290 TraceCheckUtils]: 12: Hoare triple {56638#(not (= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {56630#false} is VALID [2022-04-28 03:42:30,644 INFO L290 TraceCheckUtils]: 13: Hoare triple {56630#false} assume !false; {56630#false} is VALID [2022-04-28 03:42:30,644 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:42:30,644 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:42:30,644 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [764240855] [2022-04-28 03:42:30,644 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [764240855] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:42:30,644 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [443778231] [2022-04-28 03:42:30,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:42:30,644 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:42:30,645 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:42:30,645 INFO L229 MonitoredProcess]: Starting monitored process 64 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:42:30,646 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2022-04-28 03:42:30,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:42:30,672 INFO L263 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-28 03:42:30,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:42:30,678 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:42:30,851 INFO L272 TraceCheckUtils]: 0: Hoare triple {56629#true} call ULTIMATE.init(); {56629#true} is VALID [2022-04-28 03:42:30,851 INFO L290 TraceCheckUtils]: 1: Hoare triple {56629#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {56629#true} is VALID [2022-04-28 03:42:30,851 INFO L290 TraceCheckUtils]: 2: Hoare triple {56629#true} assume true; {56629#true} is VALID [2022-04-28 03:42:30,852 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56629#true} {56629#true} #41#return; {56629#true} is VALID [2022-04-28 03:42:30,852 INFO L272 TraceCheckUtils]: 4: Hoare triple {56629#true} call #t~ret7 := main(); {56629#true} is VALID [2022-04-28 03:42:30,852 INFO L290 TraceCheckUtils]: 5: Hoare triple {56629#true} ~x~0 := 0;~y~0 := 0; {56634#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:30,853 INFO L290 TraceCheckUtils]: 6: Hoare triple {56634#(and (= main_~x~0 0) (= main_~y~0 0))} [297] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_3023 4294967296))) (let ((.cse0 (= v_main_~y~0_3085 v_main_~y~0_3084)) (.cse1 (= v_main_~x~0_3023 v_main_~x~0_3022)) (.cse2 (= |v_main_#t~post5_438| |v_main_#t~post5_437|)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and .cse0 .cse1 (= |v_main_#t~post6_878| |v_main_#t~post6_876|) .cse2) (and .cse0 (= |v_main_#t~post6_876| |v_main_#t~post6_878|) .cse1 (or (not .cse3) (not .cse4)) .cse2) (and .cse4 (< v_main_~y~0_3084 v_main_~y~0_3085) (<= (div (+ (* (- 1) v_main_~x~0_3023) (* (- 1) v_main_~y~0_3085) 1000000 v_main_~y~0_3084) (- 4294967296)) (+ (div (+ v_main_~x~0_3023 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_3023 v_main_~y~0_3085) (+ v_main_~x~0_3022 v_main_~y~0_3084)) .cse3)))) InVars {main_~y~0=v_main_~y~0_3085, main_#t~post5=|v_main_#t~post5_438|, main_~x~0=v_main_~x~0_3023, main_#t~post6=|v_main_#t~post6_878|} OutVars{main_#t~post5=|v_main_#t~post5_437|, main_~y~0=v_main_~y~0_3084, main_~x~0=v_main_~x~0_3022, main_#t~post6=|v_main_#t~post6_876|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {56634#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:30,853 INFO L290 TraceCheckUtils]: 7: Hoare triple {56634#(and (= main_~x~0 0) (= main_~y~0 0))} [298] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {56634#(and (= main_~x~0 0) (= main_~y~0 0))} is VALID [2022-04-28 03:42:30,854 INFO L290 TraceCheckUtils]: 8: Hoare triple {56634#(and (= main_~x~0 0) (= main_~y~0 0))} [299] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_3087 v_main_~y~0_3086)) (.cse1 (= |v_main_#t~post4_443| |v_main_#t~post4_442|)) (.cse2 (= v_main_~x~0_3025 v_main_~x~0_3024)) (.cse3 (mod v_main_~x~0_3025 4294967296))) (or (and .cse0 (= |v_main_#t~post6_881| |v_main_#t~post6_877|) .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_877| |v_main_#t~post6_881|) .cse1 (<= 500000 .cse3) .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_3025 v_main_~y~0_3086) (+ v_main_~x~0_3024 v_main_~y~0_3087)) (< v_main_~x~0_3025 v_main_~x~0_3024) (<= (div (+ 500000 (* (- 1) v_main_~x~0_3024)) (- 4294967296)) (+ (div (+ v_main_~x~0_3025 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_443|, main_~y~0=v_main_~y~0_3087, main_~x~0=v_main_~x~0_3025, main_#t~post6=|v_main_#t~post6_881|} OutVars{main_#t~post4=|v_main_#t~post4_442|, main_~y~0=v_main_~y~0_3086, main_~x~0=v_main_~x~0_3024, main_#t~post6=|v_main_#t~post6_877|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {56667#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} is VALID [2022-04-28 03:42:30,855 INFO L290 TraceCheckUtils]: 9: Hoare triple {56667#(or (and (= main_~x~0 0) (= main_~y~0 0)) (and (<= (div (+ (* (- 1) main_~x~0) 500000) (- 4294967296)) 0) (= main_~y~0 main_~x~0) (< 0 main_~x~0)))} [296] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {56630#false} is VALID [2022-04-28 03:42:30,855 INFO L272 TraceCheckUtils]: 10: Hoare triple {56630#false} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {56630#false} is VALID [2022-04-28 03:42:30,855 INFO L290 TraceCheckUtils]: 11: Hoare triple {56630#false} ~cond := #in~cond; {56630#false} is VALID [2022-04-28 03:42:30,855 INFO L290 TraceCheckUtils]: 12: Hoare triple {56630#false} assume 0 == ~cond; {56630#false} is VALID [2022-04-28 03:42:30,855 INFO L290 TraceCheckUtils]: 13: Hoare triple {56630#false} assume !false; {56630#false} is VALID [2022-04-28 03:42:30,855 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:42:30,855 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:42:31,831 INFO L290 TraceCheckUtils]: 13: Hoare triple {56630#false} assume !false; {56630#false} is VALID [2022-04-28 03:42:31,831 INFO L290 TraceCheckUtils]: 12: Hoare triple {56686#(not (<= __VERIFIER_assert_~cond 0))} assume 0 == ~cond; {56630#false} is VALID [2022-04-28 03:42:31,831 INFO L290 TraceCheckUtils]: 11: Hoare triple {56690#(< 0 |__VERIFIER_assert_#in~cond|)} ~cond := #in~cond; {56686#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-28 03:42:31,832 INFO L272 TraceCheckUtils]: 10: Hoare triple {56694#(not (= (mod main_~y~0 4294967296) 0))} call __VERIFIER_assert((if 0 != ~y~0 % 4294967296 then 1 else 0)); {56690#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-28 03:42:31,832 INFO L290 TraceCheckUtils]: 9: Hoare triple {56698#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [296] L9-3_primed-->L9-3: Formula: (not (< (mod v_main_~x~0_7 4294967296) 1000000)) InVars {main_~x~0=v_main_~x~0_7} OutVars{main_~x~0=v_main_~x~0_7} AuxVars[] AssignedVars[] {56694#(not (= (mod main_~y~0 4294967296) 0))} is VALID [2022-04-28 03:42:31,834 INFO L290 TraceCheckUtils]: 8: Hoare triple {56698#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [299] L9-2-->L9-3_primed: Formula: (let ((.cse0 (= v_main_~y~0_3087 v_main_~y~0_3086)) (.cse1 (= |v_main_#t~post4_443| |v_main_#t~post4_442|)) (.cse2 (= v_main_~x~0_3025 v_main_~x~0_3024)) (.cse3 (mod v_main_~x~0_3025 4294967296))) (or (and .cse0 (= |v_main_#t~post6_881| |v_main_#t~post6_877|) .cse1 .cse2) (and .cse0 (= |v_main_#t~post6_877| |v_main_#t~post6_881|) .cse1 (<= 500000 .cse3) .cse2) (and (< .cse3 500000) (= (+ v_main_~x~0_3025 v_main_~y~0_3086) (+ v_main_~x~0_3024 v_main_~y~0_3087)) (< v_main_~x~0_3025 v_main_~x~0_3024) (<= (div (+ 500000 (* (- 1) v_main_~x~0_3024)) (- 4294967296)) (+ (div (+ v_main_~x~0_3025 (- 4294967295)) 4294967296) 1))))) InVars {main_#t~post4=|v_main_#t~post4_443|, main_~y~0=v_main_~y~0_3087, main_~x~0=v_main_~x~0_3025, main_#t~post6=|v_main_#t~post6_881|} OutVars{main_#t~post4=|v_main_#t~post4_442|, main_~y~0=v_main_~y~0_3086, main_~x~0=v_main_~x~0_3024, main_#t~post6=|v_main_#t~post6_877|} AuxVars[] AssignedVars[main_~x~0, main_#t~post4, main_~y~0, main_#t~post6] {56698#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:42:31,834 INFO L290 TraceCheckUtils]: 7: Hoare triple {56698#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} [298] L9-3_primed-->L9-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {56698#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:42:31,907 INFO L290 TraceCheckUtils]: 6: Hoare triple {56708#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_3097_33 Int)) (or (not (< (* aux_div_v_main_~y~0_3097_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_3097_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} [297] L9-2-->L9-3_primed: Formula: (let ((.cse5 (mod v_main_~x~0_3023 4294967296))) (let ((.cse0 (= v_main_~y~0_3085 v_main_~y~0_3084)) (.cse1 (= v_main_~x~0_3023 v_main_~x~0_3022)) (.cse2 (= |v_main_#t~post5_438| |v_main_#t~post5_437|)) (.cse4 (<= 500000 .cse5)) (.cse3 (< .cse5 1000000))) (or (and .cse0 .cse1 (= |v_main_#t~post6_878| |v_main_#t~post6_876|) .cse2) (and .cse0 (= |v_main_#t~post6_876| |v_main_#t~post6_878|) .cse1 (or (not .cse3) (not .cse4)) .cse2) (and .cse4 (< v_main_~y~0_3084 v_main_~y~0_3085) (<= (div (+ (* (- 1) v_main_~x~0_3023) (* (- 1) v_main_~y~0_3085) 1000000 v_main_~y~0_3084) (- 4294967296)) (+ (div (+ v_main_~x~0_3023 (- 4294967295)) 4294967296) 1)) (= (+ v_main_~x~0_3023 v_main_~y~0_3085) (+ v_main_~x~0_3022 v_main_~y~0_3084)) .cse3)))) InVars {main_~y~0=v_main_~y~0_3085, main_#t~post5=|v_main_#t~post5_438|, main_~x~0=v_main_~x~0_3023, main_#t~post6=|v_main_#t~post6_878|} OutVars{main_#t~post5=|v_main_#t~post5_437|, main_~y~0=v_main_~y~0_3084, main_~x~0=v_main_~x~0_3022, main_#t~post6=|v_main_#t~post6_876|} AuxVars[] AssignedVars[main_~x~0, main_#t~post5, main_~y~0, main_#t~post6] {56698#(or (not (= (mod main_~y~0 4294967296) 0)) (< (mod main_~x~0 4294967296) 1000000))} is VALID [2022-04-28 03:42:31,908 INFO L290 TraceCheckUtils]: 5: Hoare triple {56629#true} ~x~0 := 0;~y~0 := 0; {56708#(and (or (not (<= 500000 (mod main_~x~0 4294967296))) (not (< (mod main_~x~0 4294967296) 1000000)) (forall ((aux_div_v_main_~y~0_3097_33 Int)) (or (not (< (* aux_div_v_main_~y~0_3097_33 4294967296) main_~y~0)) (not (<= (div (+ 1000000 (* (- 1) main_~x~0) (* aux_div_v_main_~y~0_3097_33 4294967296) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967295)) 4294967296) 1))))) (<= (div (+ 999999 (* (- 1) main_~x~0) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 main_~x~0 (- 4294967296)) 4294967296) 1))) (or (not (= (mod (* main_~y~0 4294967295) 4294967296) 0)) (<= (div (+ 999999 (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1))))} is VALID [2022-04-28 03:42:31,908 INFO L272 TraceCheckUtils]: 4: Hoare triple {56629#true} call #t~ret7 := main(); {56629#true} is VALID [2022-04-28 03:42:31,908 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56629#true} {56629#true} #41#return; {56629#true} is VALID [2022-04-28 03:42:31,908 INFO L290 TraceCheckUtils]: 2: Hoare triple {56629#true} assume true; {56629#true} is VALID [2022-04-28 03:42:31,908 INFO L290 TraceCheckUtils]: 1: Hoare triple {56629#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);call #Ultimate.allocInit(12, 3); {56629#true} is VALID [2022-04-28 03:42:31,908 INFO L272 TraceCheckUtils]: 0: Hoare triple {56629#true} call ULTIMATE.init(); {56629#true} is VALID [2022-04-28 03:42:31,909 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:42:31,909 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [443778231] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:42:31,909 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:42:31,909 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 4, 7] total 14 [2022-04-28 03:42:38,297 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:42:38,297 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [704252034] [2022-04-28 03:42:38,297 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [704252034] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:42:38,297 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:42:38,297 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [133] imperfect sequences [] total 133 [2022-04-28 03:42:38,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780108460] [2022-04-28 03:42:38,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:42:38,298 INFO L78 Accepts]: Start accepts. Automaton has has 133 states, 132 states have (on average 1.5075757575757576) internal successors, (199), 131 states have internal predecessors, (199), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 203 [2022-04-28 03:42:38,299 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:42:38,299 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 133 states, 132 states have (on average 1.5075757575757576) internal successors, (199), 131 states have internal predecessors, (199), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 03:42:38,386 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 203 edges. 203 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:42:38,386 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 133 states [2022-04-28 03:42:38,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:42:38,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 133 interpolants. [2022-04-28 03:42:38,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=984, Invalid=18476, Unknown=0, NotChecked=0, Total=19460 [2022-04-28 03:42:38,387 INFO L87 Difference]: Start difference. First operand 205 states and 207 transitions. Second operand has 133 states, 132 states have (on average 1.5075757575757576) internal successors, (199), 131 states have internal predecessors, (199), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)