/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/discover_list.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-28 03:34:23,586 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-28 03:34:23,588 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-28 03:34:23,633 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-28 03:34:23,633 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-28 03:34:23,634 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-28 03:34:23,637 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-28 03:34:23,641 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-28 03:34:23,643 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-28 03:34:23,647 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-28 03:34:23,648 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-28 03:34:23,649 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-28 03:34:23,649 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-28 03:34:23,654 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-28 03:34:23,655 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-28 03:34:23,657 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-28 03:34:23,658 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-28 03:34:23,659 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-28 03:34:23,661 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-28 03:34:23,663 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-28 03:34:23,664 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-28 03:34:23,665 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-28 03:34:23,666 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-28 03:34:23,666 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-28 03:34:23,667 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-28 03:34:23,669 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-28 03:34:23,675 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-28 03:34:23,675 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-28 03:34:23,676 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-28 03:34:23,677 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf [2022-04-28 03:34:23,684 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-28 03:34:23,684 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-28 03:34:23,685 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-28 03:34:23,685 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-28 03:34:23,688 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-28 03:34:23,689 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-28 03:34:23,689 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-28 03:34:23,689 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-28 03:34:23,689 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-28 03:34:23,689 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-28 03:34:23,689 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-28 03:34:23,690 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-28 03:34:23,690 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-28 03:34:23,690 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-28 03:34:23,690 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-28 03:34:23,690 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-28 03:34:23,691 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-28 03:34:23,691 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-28 03:34:23,691 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 03:34:23,691 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-28 03:34:23,691 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-28 03:34:23,691 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-28 03:34:23,692 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-28 03:34:23,692 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-28 03:34:23,692 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=JORDAN [2022-04-28 03:34:23,692 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-28 03:34:23,907 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-28 03:34:23,936 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-28 03:34:23,938 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-28 03:34:23,939 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-28 03:34:23,939 INFO L275 PluginConnector]: CDTParser initialized [2022-04-28 03:34:23,940 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/discover_list.c [2022-04-28 03:34:24,007 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1c7489cb8/229eb56f693148d6a1736b859b716c3d/FLAGd92bd21b2 [2022-04-28 03:34:24,416 INFO L306 CDTParser]: Found 1 translation units. [2022-04-28 03:34:24,417 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c [2022-04-28 03:34:24,426 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1c7489cb8/229eb56f693148d6a1736b859b716c3d/FLAGd92bd21b2 [2022-04-28 03:34:24,441 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1c7489cb8/229eb56f693148d6a1736b859b716c3d [2022-04-28 03:34:24,443 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-28 03:34:24,445 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-28 03:34:24,448 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-28 03:34:24,448 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-28 03:34:24,450 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-28 03:34:24,451 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:24,452 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1cf77e68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24, skipping insertion in model container [2022-04-28 03:34:24,452 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:24,458 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-28 03:34:24,490 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-28 03:34:24,690 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c[4997,5010] [2022-04-28 03:34:24,800 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 03:34:24,813 INFO L203 MainTranslator]: Completed pre-run [2022-04-28 03:34:24,837 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c[4997,5010] [2022-04-28 03:34:24,913 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 03:34:24,933 INFO L208 MainTranslator]: Completed translation [2022-04-28 03:34:24,933 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24 WrapperNode [2022-04-28 03:34:24,933 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-28 03:34:24,934 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-28 03:34:24,934 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-28 03:34:24,935 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-28 03:34:24,945 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:24,945 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:24,974 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:24,975 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:25,054 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:25,064 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:25,072 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:25,093 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-28 03:34:25,094 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-28 03:34:25,094 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-28 03:34:25,095 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-28 03:34:25,095 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (1/1) ... [2022-04-28 03:34:25,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 03:34:25,125 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:25,149 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-28 03:34:25,174 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-28 03:34:25,197 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-28 03:34:25,198 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-28 03:34:25,198 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-28 03:34:25,198 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-28 03:34:25,198 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_func_def_resp_len [2022-04-28 03:34:25,198 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_is_naa5 [2022-04-28 03:34:25,198 INFO L138 BoogieDeclarations]: Found implementation of procedure dStrHex [2022-04-28 03:34:25,198 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_num [2022-04-28 03:34:25,199 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_llnum [2022-04-28 03:34:25,199 INFO L138 BoogieDeclarations]: Found implementation of procedure do_discover_list [2022-04-28 03:34:25,199 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-28 03:34:25,200 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-28 03:34:25,200 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-28 03:34:25,200 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure fopen [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure sscanf [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-28 03:34:25,201 INFO L130 BoogieDeclarations]: Found specification of procedure strcmp [2022-04-28 03:34:25,202 INFO L130 BoogieDeclarations]: Found specification of procedure strchr [2022-04-28 03:34:25,202 INFO L130 BoogieDeclarations]: Found specification of procedure strlen [2022-04-28 03:34:25,202 INFO L130 BoogieDeclarations]: Found specification of procedure getopt_long [2022-04-28 03:34:25,202 INFO L130 BoogieDeclarations]: Found specification of procedure smp_initiator_open [2022-04-28 03:34:25,202 INFO L130 BoogieDeclarations]: Found specification of procedure smp_send_req [2022-04-28 03:34:25,202 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_func_def_resp_len [2022-04-28 03:34:25,202 INFO L130 BoogieDeclarations]: Found specification of procedure smp_is_naa5 [2022-04-28 03:34:25,202 INFO L130 BoogieDeclarations]: Found specification of procedure dStrHex [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_num [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_llnum [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure do_discover_list [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure main6 [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure sprintf [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure toupper [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-28 03:34:25,203 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-28 03:34:25,204 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-28 03:34:25,204 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-28 03:34:25,204 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-28 03:34:25,204 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-28 03:34:25,204 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-28 03:34:25,381 INFO L234 CfgBuilder]: Building ICFG [2022-04-28 03:34:25,387 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-28 03:34:26,431 INFO L275 CfgBuilder]: Performing block encoding [2022-04-28 03:34:26,445 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-28 03:34:26,445 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-28 03:34:26,447 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 03:34:26 BoogieIcfgContainer [2022-04-28 03:34:26,448 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-28 03:34:26,451 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-28 03:34:26,451 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-28 03:34:26,455 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-28 03:34:26,455 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.04 03:34:24" (1/3) ... [2022-04-28 03:34:26,456 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ce9ccb3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 03:34:26, skipping insertion in model container [2022-04-28 03:34:26,456 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 03:34:24" (2/3) ... [2022-04-28 03:34:26,457 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ce9ccb3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 03:34:26, skipping insertion in model container [2022-04-28 03:34:26,457 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 03:34:26" (3/3) ... [2022-04-28 03:34:26,458 INFO L111 eAbstractionObserver]: Analyzing ICFG discover_list.c [2022-04-28 03:34:26,472 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-28 03:34:26,473 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-28 03:34:26,517 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-28 03:34:26,521 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@5f46b9c7, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@41c4cf29 [2022-04-28 03:34:26,522 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-28 03:34:26,530 INFO L276 IsEmpty]: Start isEmpty. Operand has 91 states, 69 states have (on average 1.4927536231884058) internal successors, (103), 71 states have internal predecessors, (103), 13 states have call successors, (13), 7 states have call predecessors, (13), 7 states have return successors, (13), 13 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-28 03:34:26,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-28 03:34:26,538 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:26,539 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:26,539 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:26,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:26,544 INFO L85 PathProgramCache]: Analyzing trace with hash 467458188, now seen corresponding path program 1 times [2022-04-28 03:34:26,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:26,552 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [720119295] [2022-04-28 03:34:26,562 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:26,562 INFO L85 PathProgramCache]: Analyzing trace with hash 467458188, now seen corresponding path program 2 times [2022-04-28 03:34:26,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:26,565 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632907175] [2022-04-28 03:34:26,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:26,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:26,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:26,959 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:26,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:26,999 INFO L290 TraceCheckUtils]: 0: Hoare triple {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {94#true} is VALID [2022-04-28 03:34:27,000 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume true; {94#true} is VALID [2022-04-28 03:34:27,000 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {94#true} {94#true} #682#return; {94#true} is VALID [2022-04-28 03:34:27,007 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:27,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:27,020 INFO L290 TraceCheckUtils]: 0: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-28 03:34:27,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-28 03:34:27,021 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-28 03:34:27,021 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {95#false} #672#return; {95#false} is VALID [2022-04-28 03:34:27,021 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-04-28 03:34:27,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:27,032 INFO L290 TraceCheckUtils]: 0: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-28 03:34:27,032 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-28 03:34:27,032 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-28 03:34:27,033 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {95#false} #656#return; {95#false} is VALID [2022-04-28 03:34:27,034 INFO L272 TraceCheckUtils]: 0: Hoare triple {94#true} call ULTIMATE.init(); {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:27,034 INFO L290 TraceCheckUtils]: 1: Hoare triple {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {94#true} is VALID [2022-04-28 03:34:27,035 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume true; {94#true} is VALID [2022-04-28 03:34:27,035 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {94#true} #682#return; {94#true} is VALID [2022-04-28 03:34:27,035 INFO L272 TraceCheckUtils]: 4: Hoare triple {94#true} call #t~ret187 := main(); {94#true} is VALID [2022-04-28 03:34:27,035 INFO L290 TraceCheckUtils]: 5: Hoare triple {94#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {94#true} is VALID [2022-04-28 03:34:27,036 INFO L272 TraceCheckUtils]: 6: Hoare triple {94#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {94#true} is VALID [2022-04-28 03:34:27,036 INFO L290 TraceCheckUtils]: 7: Hoare triple {94#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {94#true} is VALID [2022-04-28 03:34:27,036 INFO L290 TraceCheckUtils]: 8: Hoare triple {94#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {94#true} is VALID [2022-04-28 03:34:27,037 INFO L290 TraceCheckUtils]: 9: Hoare triple {94#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {94#true} is VALID [2022-04-28 03:34:27,037 INFO L290 TraceCheckUtils]: 10: Hoare triple {94#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} is VALID [2022-04-28 03:34:27,038 INFO L290 TraceCheckUtils]: 11: Hoare triple {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} is VALID [2022-04-28 03:34:27,039 INFO L290 TraceCheckUtils]: 12: Hoare triple {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} assume 1 == #t~mem153 && ~mnum_desc~0 > 40;havoc #t~mem153;~mnum_desc~0 := 40; {95#false} is VALID [2022-04-28 03:34:27,040 INFO L290 TraceCheckUtils]: 13: Hoare triple {95#false} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {95#false} is VALID [2022-04-28 03:34:27,040 INFO L290 TraceCheckUtils]: 14: Hoare triple {95#false} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {95#false} is VALID [2022-04-28 03:34:27,040 INFO L290 TraceCheckUtils]: 15: Hoare triple {95#false} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {95#false} is VALID [2022-04-28 03:34:27,040 INFO L272 TraceCheckUtils]: 16: Hoare triple {95#false} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {109#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:27,041 INFO L290 TraceCheckUtils]: 17: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-28 03:34:27,041 INFO L290 TraceCheckUtils]: 18: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-28 03:34:27,041 INFO L290 TraceCheckUtils]: 19: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-28 03:34:27,042 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {94#true} {95#false} #672#return; {95#false} is VALID [2022-04-28 03:34:27,042 INFO L290 TraceCheckUtils]: 21: Hoare triple {95#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {95#false} is VALID [2022-04-28 03:34:27,042 INFO L290 TraceCheckUtils]: 22: Hoare triple {95#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {95#false} is VALID [2022-04-28 03:34:27,042 INFO L290 TraceCheckUtils]: 23: Hoare triple {95#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {95#false} is VALID [2022-04-28 03:34:27,043 INFO L290 TraceCheckUtils]: 24: Hoare triple {95#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {95#false} is VALID [2022-04-28 03:34:27,043 INFO L290 TraceCheckUtils]: 25: Hoare triple {95#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {95#false} is VALID [2022-04-28 03:34:27,043 INFO L290 TraceCheckUtils]: 26: Hoare triple {95#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {95#false} is VALID [2022-04-28 03:34:27,043 INFO L290 TraceCheckUtils]: 27: Hoare triple {95#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {95#false} is VALID [2022-04-28 03:34:27,043 INFO L290 TraceCheckUtils]: 28: Hoare triple {95#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {95#false} is VALID [2022-04-28 03:34:27,044 INFO L290 TraceCheckUtils]: 29: Hoare triple {95#false} assume #t~short172; {95#false} is VALID [2022-04-28 03:34:27,044 INFO L290 TraceCheckUtils]: 30: Hoare triple {95#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {95#false} is VALID [2022-04-28 03:34:27,044 INFO L290 TraceCheckUtils]: 31: Hoare triple {95#false} assume 0 != #t~mem173;havoc #t~mem173; {95#false} is VALID [2022-04-28 03:34:27,044 INFO L272 TraceCheckUtils]: 32: Hoare triple {95#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {95#false} is VALID [2022-04-28 03:34:27,044 INFO L290 TraceCheckUtils]: 33: Hoare triple {95#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {95#false} is VALID [2022-04-28 03:34:27,045 INFO L290 TraceCheckUtils]: 34: Hoare triple {95#false} assume !(~len <= 0); {95#false} is VALID [2022-04-28 03:34:27,045 INFO L272 TraceCheckUtils]: 35: Hoare triple {95#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {109#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:27,045 INFO L290 TraceCheckUtils]: 36: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-28 03:34:27,045 INFO L290 TraceCheckUtils]: 37: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-28 03:34:27,046 INFO L290 TraceCheckUtils]: 38: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-28 03:34:27,046 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {94#true} {95#false} #656#return; {95#false} is VALID [2022-04-28 03:34:27,047 INFO L290 TraceCheckUtils]: 40: Hoare triple {95#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {95#false} is VALID [2022-04-28 03:34:27,047 INFO L290 TraceCheckUtils]: 41: Hoare triple {95#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {95#false} is VALID [2022-04-28 03:34:27,047 INFO L272 TraceCheckUtils]: 42: Hoare triple {95#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {95#false} is VALID [2022-04-28 03:34:27,047 INFO L290 TraceCheckUtils]: 43: Hoare triple {95#false} ~cond := #in~cond; {95#false} is VALID [2022-04-28 03:34:27,048 INFO L290 TraceCheckUtils]: 44: Hoare triple {95#false} assume 0 == ~cond; {95#false} is VALID [2022-04-28 03:34:27,048 INFO L290 TraceCheckUtils]: 45: Hoare triple {95#false} assume !false; {95#false} is VALID [2022-04-28 03:34:27,048 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-28 03:34:27,049 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:27,049 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632907175] [2022-04-28 03:34:27,050 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [632907175] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:27,050 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:27,050 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 03:34:27,052 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:27,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [720119295] [2022-04-28 03:34:27,053 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [720119295] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:27,053 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:27,053 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 03:34:27,053 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [999608285] [2022-04-28 03:34:27,054 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:27,058 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-28 03:34:27,060 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:27,063 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:27,125 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:27,126 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-28 03:34:27,126 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:27,147 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-28 03:34:27,148 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-28 03:34:27,151 INFO L87 Difference]: Start difference. First operand has 91 states, 69 states have (on average 1.4927536231884058) internal successors, (103), 71 states have internal predecessors, (103), 13 states have call successors, (13), 7 states have call predecessors, (13), 7 states have return successors, (13), 13 states have call predecessors, (13), 13 states have call successors, (13) Second operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:28,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:28,410 INFO L93 Difference]: Finished difference Result 227 states and 347 transitions. [2022-04-28 03:34:28,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-28 03:34:28,410 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-28 03:34:28,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:28,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:28,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 347 transitions. [2022-04-28 03:34:28,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:28,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 347 transitions. [2022-04-28 03:34:28,447 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 347 transitions. [2022-04-28 03:34:28,860 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 347 edges. 347 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:28,879 INFO L225 Difference]: With dead ends: 227 [2022-04-28 03:34:28,879 INFO L226 Difference]: Without dead ends: 103 [2022-04-28 03:34:28,883 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-28 03:34:28,886 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 202 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 207 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:28,887 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [207 Valid, 141 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 03:34:28,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2022-04-28 03:34:28,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 76. [2022-04-28 03:34:28,943 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:28,944 INFO L82 GeneralOperation]: Start isEquivalent. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:28,945 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:28,946 INFO L87 Difference]: Start difference. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:28,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:28,953 INFO L93 Difference]: Finished difference Result 103 states and 139 transitions. [2022-04-28 03:34:28,953 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-28 03:34:28,955 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:28,955 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:28,956 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-28 03:34:28,956 INFO L87 Difference]: Start difference. First operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-28 03:34:28,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:28,962 INFO L93 Difference]: Finished difference Result 103 states and 139 transitions. [2022-04-28 03:34:28,962 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-28 03:34:28,964 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:28,964 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:28,964 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:28,965 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:28,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:28,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 98 transitions. [2022-04-28 03:34:28,970 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 98 transitions. Word has length 46 [2022-04-28 03:34:28,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:28,970 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 98 transitions. [2022-04-28 03:34:28,971 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:28,971 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 98 transitions. [2022-04-28 03:34:29,079 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:29,080 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 98 transitions. [2022-04-28 03:34:29,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-28 03:34:29,085 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:29,085 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:29,086 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-28 03:34:29,086 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:29,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:29,086 INFO L85 PathProgramCache]: Analyzing trace with hash -1776525110, now seen corresponding path program 1 times [2022-04-28 03:34:29,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:29,087 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2101927109] [2022-04-28 03:34:29,087 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:29,087 INFO L85 PathProgramCache]: Analyzing trace with hash -1776525110, now seen corresponding path program 2 times [2022-04-28 03:34:29,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:29,088 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596659434] [2022-04-28 03:34:29,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:29,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:29,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:29,209 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:29,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:29,222 INFO L290 TraceCheckUtils]: 0: Hoare triple {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-28 03:34:29,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-28 03:34:29,222 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-28 03:34:29,225 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:29,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:29,300 INFO L290 TraceCheckUtils]: 0: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:29,301 INFO L290 TraceCheckUtils]: 1: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:29,302 INFO L290 TraceCheckUtils]: 2: Hoare triple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:29,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} {929#true} #672#return; {930#false} is VALID [2022-04-28 03:34:29,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-04-28 03:34:29,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:29,324 INFO L290 TraceCheckUtils]: 0: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {929#true} is VALID [2022-04-28 03:34:29,325 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {929#true} is VALID [2022-04-28 03:34:29,325 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {929#true} is VALID [2022-04-28 03:34:29,325 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {930#false} #656#return; {930#false} is VALID [2022-04-28 03:34:29,326 INFO L272 TraceCheckUtils]: 0: Hoare triple {929#true} call ULTIMATE.init(); {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:29,326 INFO L290 TraceCheckUtils]: 1: Hoare triple {942#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-28 03:34:29,327 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-28 03:34:29,327 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-28 03:34:29,327 INFO L272 TraceCheckUtils]: 4: Hoare triple {929#true} call #t~ret187 := main(); {929#true} is VALID [2022-04-28 03:34:29,327 INFO L290 TraceCheckUtils]: 5: Hoare triple {929#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {929#true} is VALID [2022-04-28 03:34:29,327 INFO L272 TraceCheckUtils]: 6: Hoare triple {929#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {929#true} is VALID [2022-04-28 03:34:29,328 INFO L290 TraceCheckUtils]: 7: Hoare triple {929#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {929#true} is VALID [2022-04-28 03:34:29,328 INFO L290 TraceCheckUtils]: 8: Hoare triple {929#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {929#true} is VALID [2022-04-28 03:34:29,328 INFO L290 TraceCheckUtils]: 9: Hoare triple {929#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-28 03:34:29,328 INFO L290 TraceCheckUtils]: 10: Hoare triple {929#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {929#true} is VALID [2022-04-28 03:34:29,328 INFO L290 TraceCheckUtils]: 11: Hoare triple {929#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-28 03:34:29,329 INFO L290 TraceCheckUtils]: 12: Hoare triple {929#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {929#true} is VALID [2022-04-28 03:34:29,329 INFO L290 TraceCheckUtils]: 13: Hoare triple {929#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {929#true} is VALID [2022-04-28 03:34:29,329 INFO L290 TraceCheckUtils]: 14: Hoare triple {929#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {929#true} is VALID [2022-04-28 03:34:29,329 INFO L290 TraceCheckUtils]: 15: Hoare triple {929#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {929#true} is VALID [2022-04-28 03:34:29,330 INFO L272 TraceCheckUtils]: 16: Hoare triple {929#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {943#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:29,331 INFO L290 TraceCheckUtils]: 17: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:29,332 INFO L290 TraceCheckUtils]: 18: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:29,332 INFO L290 TraceCheckUtils]: 19: Hoare triple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:29,333 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {945#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} {929#true} #672#return; {930#false} is VALID [2022-04-28 03:34:29,333 INFO L290 TraceCheckUtils]: 21: Hoare triple {930#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {930#false} is VALID [2022-04-28 03:34:29,334 INFO L290 TraceCheckUtils]: 22: Hoare triple {930#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {930#false} is VALID [2022-04-28 03:34:29,334 INFO L290 TraceCheckUtils]: 23: Hoare triple {930#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {930#false} is VALID [2022-04-28 03:34:29,334 INFO L290 TraceCheckUtils]: 24: Hoare triple {930#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {930#false} is VALID [2022-04-28 03:34:29,334 INFO L290 TraceCheckUtils]: 25: Hoare triple {930#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {930#false} is VALID [2022-04-28 03:34:29,334 INFO L290 TraceCheckUtils]: 26: Hoare triple {930#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {930#false} is VALID [2022-04-28 03:34:29,334 INFO L290 TraceCheckUtils]: 27: Hoare triple {930#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {930#false} is VALID [2022-04-28 03:34:29,335 INFO L290 TraceCheckUtils]: 28: Hoare triple {930#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {930#false} is VALID [2022-04-28 03:34:29,335 INFO L290 TraceCheckUtils]: 29: Hoare triple {930#false} assume #t~short172; {930#false} is VALID [2022-04-28 03:34:29,335 INFO L290 TraceCheckUtils]: 30: Hoare triple {930#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {930#false} is VALID [2022-04-28 03:34:29,335 INFO L290 TraceCheckUtils]: 31: Hoare triple {930#false} assume 0 != #t~mem173;havoc #t~mem173; {930#false} is VALID [2022-04-28 03:34:29,335 INFO L272 TraceCheckUtils]: 32: Hoare triple {930#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {930#false} is VALID [2022-04-28 03:34:29,335 INFO L290 TraceCheckUtils]: 33: Hoare triple {930#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {930#false} is VALID [2022-04-28 03:34:29,336 INFO L290 TraceCheckUtils]: 34: Hoare triple {930#false} assume !(~len <= 0); {930#false} is VALID [2022-04-28 03:34:29,336 INFO L272 TraceCheckUtils]: 35: Hoare triple {930#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {943#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:29,336 INFO L290 TraceCheckUtils]: 36: Hoare triple {943#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {929#true} is VALID [2022-04-28 03:34:29,336 INFO L290 TraceCheckUtils]: 37: Hoare triple {929#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {929#true} is VALID [2022-04-28 03:34:29,336 INFO L290 TraceCheckUtils]: 38: Hoare triple {929#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {929#true} is VALID [2022-04-28 03:34:29,337 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {929#true} {930#false} #656#return; {930#false} is VALID [2022-04-28 03:34:29,337 INFO L290 TraceCheckUtils]: 40: Hoare triple {930#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {930#false} is VALID [2022-04-28 03:34:29,337 INFO L290 TraceCheckUtils]: 41: Hoare triple {930#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {930#false} is VALID [2022-04-28 03:34:29,337 INFO L272 TraceCheckUtils]: 42: Hoare triple {930#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {930#false} is VALID [2022-04-28 03:34:29,337 INFO L290 TraceCheckUtils]: 43: Hoare triple {930#false} ~cond := #in~cond; {930#false} is VALID [2022-04-28 03:34:29,337 INFO L290 TraceCheckUtils]: 44: Hoare triple {930#false} assume 0 == ~cond; {930#false} is VALID [2022-04-28 03:34:29,338 INFO L290 TraceCheckUtils]: 45: Hoare triple {930#false} assume !false; {930#false} is VALID [2022-04-28 03:34:29,338 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:29,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:29,339 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596659434] [2022-04-28 03:34:29,339 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [596659434] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:29,339 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [768002360] [2022-04-28 03:34:29,339 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 03:34:29,339 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:29,339 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:29,351 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:29,358 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-28 03:34:29,924 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 03:34:29,924 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:34:29,930 INFO L263 TraceCheckSpWp]: Trace formula consists of 681 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-28 03:34:29,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:29,961 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:30,267 INFO L272 TraceCheckUtils]: 0: Hoare triple {929#true} call ULTIMATE.init(); {929#true} is VALID [2022-04-28 03:34:30,267 INFO L290 TraceCheckUtils]: 1: Hoare triple {929#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {929#true} is VALID [2022-04-28 03:34:30,267 INFO L290 TraceCheckUtils]: 2: Hoare triple {929#true} assume true; {929#true} is VALID [2022-04-28 03:34:30,268 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {929#true} {929#true} #682#return; {929#true} is VALID [2022-04-28 03:34:30,268 INFO L272 TraceCheckUtils]: 4: Hoare triple {929#true} call #t~ret187 := main(); {929#true} is VALID [2022-04-28 03:34:30,268 INFO L290 TraceCheckUtils]: 5: Hoare triple {929#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {929#true} is VALID [2022-04-28 03:34:30,268 INFO L272 TraceCheckUtils]: 6: Hoare triple {929#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {929#true} is VALID [2022-04-28 03:34:30,268 INFO L290 TraceCheckUtils]: 7: Hoare triple {929#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {929#true} is VALID [2022-04-28 03:34:30,268 INFO L290 TraceCheckUtils]: 8: Hoare triple {929#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {929#true} is VALID [2022-04-28 03:34:30,269 INFO L290 TraceCheckUtils]: 9: Hoare triple {929#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-28 03:34:30,269 INFO L290 TraceCheckUtils]: 10: Hoare triple {929#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {929#true} is VALID [2022-04-28 03:34:30,269 INFO L290 TraceCheckUtils]: 11: Hoare triple {929#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {929#true} is VALID [2022-04-28 03:34:30,269 INFO L290 TraceCheckUtils]: 12: Hoare triple {929#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {929#true} is VALID [2022-04-28 03:34:30,269 INFO L290 TraceCheckUtils]: 13: Hoare triple {929#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {929#true} is VALID [2022-04-28 03:34:30,270 INFO L290 TraceCheckUtils]: 14: Hoare triple {929#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {929#true} is VALID [2022-04-28 03:34:30,270 INFO L290 TraceCheckUtils]: 15: Hoare triple {929#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {929#true} is VALID [2022-04-28 03:34:30,270 INFO L272 TraceCheckUtils]: 16: Hoare triple {929#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {929#true} is VALID [2022-04-28 03:34:30,283 INFO L290 TraceCheckUtils]: 17: Hoare triple {929#true} #t~loopctr188 := 0; {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:30,285 INFO L290 TraceCheckUtils]: 18: Hoare triple {944#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1003#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} is VALID [2022-04-28 03:34:30,285 INFO L290 TraceCheckUtils]: 19: Hoare triple {1003#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1003#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} is VALID [2022-04-28 03:34:30,287 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1003#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} {929#true} #672#return; {930#false} is VALID [2022-04-28 03:34:30,287 INFO L290 TraceCheckUtils]: 21: Hoare triple {930#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {930#false} is VALID [2022-04-28 03:34:30,287 INFO L290 TraceCheckUtils]: 22: Hoare triple {930#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {930#false} is VALID [2022-04-28 03:34:30,287 INFO L290 TraceCheckUtils]: 23: Hoare triple {930#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {930#false} is VALID [2022-04-28 03:34:30,287 INFO L290 TraceCheckUtils]: 24: Hoare triple {930#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {930#false} is VALID [2022-04-28 03:34:30,288 INFO L290 TraceCheckUtils]: 25: Hoare triple {930#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {930#false} is VALID [2022-04-28 03:34:30,288 INFO L290 TraceCheckUtils]: 26: Hoare triple {930#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {930#false} is VALID [2022-04-28 03:34:30,288 INFO L290 TraceCheckUtils]: 27: Hoare triple {930#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {930#false} is VALID [2022-04-28 03:34:30,288 INFO L290 TraceCheckUtils]: 28: Hoare triple {930#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {930#false} is VALID [2022-04-28 03:34:30,288 INFO L290 TraceCheckUtils]: 29: Hoare triple {930#false} assume #t~short172; {930#false} is VALID [2022-04-28 03:34:30,288 INFO L290 TraceCheckUtils]: 30: Hoare triple {930#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {930#false} is VALID [2022-04-28 03:34:30,289 INFO L290 TraceCheckUtils]: 31: Hoare triple {930#false} assume 0 != #t~mem173;havoc #t~mem173; {930#false} is VALID [2022-04-28 03:34:30,289 INFO L272 TraceCheckUtils]: 32: Hoare triple {930#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {930#false} is VALID [2022-04-28 03:34:30,289 INFO L290 TraceCheckUtils]: 33: Hoare triple {930#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {930#false} is VALID [2022-04-28 03:34:30,289 INFO L290 TraceCheckUtils]: 34: Hoare triple {930#false} assume !(~len <= 0); {930#false} is VALID [2022-04-28 03:34:30,289 INFO L272 TraceCheckUtils]: 35: Hoare triple {930#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {930#false} is VALID [2022-04-28 03:34:30,289 INFO L290 TraceCheckUtils]: 36: Hoare triple {930#false} #t~loopctr188 := 0; {930#false} is VALID [2022-04-28 03:34:30,290 INFO L290 TraceCheckUtils]: 37: Hoare triple {930#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {930#false} is VALID [2022-04-28 03:34:30,290 INFO L290 TraceCheckUtils]: 38: Hoare triple {930#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {930#false} is VALID [2022-04-28 03:34:30,290 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {930#false} {930#false} #656#return; {930#false} is VALID [2022-04-28 03:34:30,290 INFO L290 TraceCheckUtils]: 40: Hoare triple {930#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {930#false} is VALID [2022-04-28 03:34:30,290 INFO L290 TraceCheckUtils]: 41: Hoare triple {930#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {930#false} is VALID [2022-04-28 03:34:30,290 INFO L272 TraceCheckUtils]: 42: Hoare triple {930#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {930#false} is VALID [2022-04-28 03:34:30,291 INFO L290 TraceCheckUtils]: 43: Hoare triple {930#false} ~cond := #in~cond; {930#false} is VALID [2022-04-28 03:34:30,291 INFO L290 TraceCheckUtils]: 44: Hoare triple {930#false} assume 0 == ~cond; {930#false} is VALID [2022-04-28 03:34:30,291 INFO L290 TraceCheckUtils]: 45: Hoare triple {930#false} assume !false; {930#false} is VALID [2022-04-28 03:34:30,291 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 03:34:30,291 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 03:34:30,292 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [768002360] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:30,292 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 03:34:30,292 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2022-04-28 03:34:30,293 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:30,293 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2101927109] [2022-04-28 03:34:30,293 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2101927109] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:30,293 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:30,293 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 03:34:30,294 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1131840222] [2022-04-28 03:34:30,294 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:30,295 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-28 03:34:30,295 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:30,295 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:30,339 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:30,340 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 03:34:30,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:30,340 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 03:34:30,341 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-04-28 03:34:30,341 INFO L87 Difference]: Start difference. First operand 76 states and 98 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:30,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:30,604 INFO L93 Difference]: Finished difference Result 136 states and 178 transitions. [2022-04-28 03:34:30,604 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 03:34:30,604 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-28 03:34:30,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:30,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:30,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-28 03:34:30,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:30,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-28 03:34:30,617 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 176 transitions. [2022-04-28 03:34:30,784 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:30,787 INFO L225 Difference]: With dead ends: 136 [2022-04-28 03:34:30,787 INFO L226 Difference]: Without dead ends: 77 [2022-04-28 03:34:30,788 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-28 03:34:30,789 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 2 mSDsluCounter, 184 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 278 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:30,789 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 278 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 03:34:30,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-28 03:34:30,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2022-04-28 03:34:30,802 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:30,802 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:30,803 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:30,803 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:30,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:30,806 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2022-04-28 03:34:30,806 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-28 03:34:30,807 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:30,807 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:30,807 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 77 states. [2022-04-28 03:34:30,808 INFO L87 Difference]: Start difference. First operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 77 states. [2022-04-28 03:34:30,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:30,813 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2022-04-28 03:34:30,813 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-28 03:34:30,814 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:30,814 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:30,814 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:30,814 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:30,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:30,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 99 transitions. [2022-04-28 03:34:30,818 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 99 transitions. Word has length 46 [2022-04-28 03:34:30,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:30,818 INFO L495 AbstractCegarLoop]: Abstraction has 77 states and 99 transitions. [2022-04-28 03:34:30,819 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:30,819 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 77 states and 99 transitions. [2022-04-28 03:34:30,931 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 99 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:30,931 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-28 03:34:30,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-04-28 03:34:30,932 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:30,932 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:30,961 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:31,151 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:31,152 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:31,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:31,152 INFO L85 PathProgramCache]: Analyzing trace with hash 1831279328, now seen corresponding path program 1 times [2022-04-28 03:34:31,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:31,152 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [785692281] [2022-04-28 03:34:31,153 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:31,153 INFO L85 PathProgramCache]: Analyzing trace with hash 1831279328, now seen corresponding path program 2 times [2022-04-28 03:34:31,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:31,153 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087947914] [2022-04-28 03:34:31,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:31,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:31,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:31,270 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:31,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:31,282 INFO L290 TraceCheckUtils]: 0: Hoare triple {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-28 03:34:31,283 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-28 03:34:31,283 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-28 03:34:31,286 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:31,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:31,377 INFO L290 TraceCheckUtils]: 0: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:31,378 INFO L290 TraceCheckUtils]: 1: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1684#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} is VALID [2022-04-28 03:34:31,379 INFO L290 TraceCheckUtils]: 2: Hoare triple {1684#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:31,380 INFO L290 TraceCheckUtils]: 3: Hoare triple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:31,381 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {1666#true} #672#return; {1667#false} is VALID [2022-04-28 03:34:31,382 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-28 03:34:31,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:31,398 INFO L290 TraceCheckUtils]: 0: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-28 03:34:31,400 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-28 03:34:31,400 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1666#true} is VALID [2022-04-28 03:34:31,400 INFO L290 TraceCheckUtils]: 3: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-28 03:34:31,400 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-28 03:34:31,401 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:31,401 INFO L290 TraceCheckUtils]: 1: Hoare triple {1681#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-28 03:34:31,402 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-28 03:34:31,403 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-28 03:34:31,403 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-28 03:34:31,403 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-28 03:34:31,403 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-28 03:34:31,403 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-28 03:34:31,406 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-28 03:34:31,407 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:31,407 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-28 03:34:31,407 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:31,408 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-28 03:34:31,408 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:31,408 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-28 03:34:31,408 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-28 03:34:31,409 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1682#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:31,410 INFO L290 TraceCheckUtils]: 17: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:31,411 INFO L290 TraceCheckUtils]: 18: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1684#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} is VALID [2022-04-28 03:34:31,412 INFO L290 TraceCheckUtils]: 19: Hoare triple {1684#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:31,412 INFO L290 TraceCheckUtils]: 20: Hoare triple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:31,413 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1685#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {1666#true} #672#return; {1667#false} is VALID [2022-04-28 03:34:31,414 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-28 03:34:31,414 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-28 03:34:31,414 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-28 03:34:31,414 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-28 03:34:31,418 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-28 03:34:31,418 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-28 03:34:31,418 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-28 03:34:31,418 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-28 03:34:31,418 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-28 03:34:31,418 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-28 03:34:31,418 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-28 03:34:31,418 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-28 03:34:31,419 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-28 03:34:31,419 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-28 03:34:31,419 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1682#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:31,419 INFO L290 TraceCheckUtils]: 37: Hoare triple {1682#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-28 03:34:31,419 INFO L290 TraceCheckUtils]: 38: Hoare triple {1666#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-28 03:34:31,419 INFO L290 TraceCheckUtils]: 39: Hoare triple {1666#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1666#true} is VALID [2022-04-28 03:34:31,419 INFO L290 TraceCheckUtils]: 40: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-28 03:34:31,419 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-28 03:34:31,419 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-28 03:34:31,419 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-28 03:34:31,420 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-28 03:34:31,420 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-28 03:34:31,420 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-28 03:34:31,420 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-28 03:34:31,420 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-28 03:34:31,420 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:31,420 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087947914] [2022-04-28 03:34:31,420 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1087947914] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:31,421 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1098126118] [2022-04-28 03:34:31,421 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 03:34:31,421 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:31,421 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:31,422 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:31,423 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-28 03:34:32,019 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 03:34:32,019 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:34:32,023 INFO L263 TraceCheckSpWp]: Trace formula consists of 695 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-28 03:34:32,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:32,044 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:32,347 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1666#true} is VALID [2022-04-28 03:34:32,347 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-28 03:34:32,347 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-28 03:34:32,347 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-28 03:34:32,348 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-28 03:34:32,348 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-28 03:34:32,348 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-28 03:34:32,348 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-28 03:34:32,348 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-28 03:34:32,348 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:32,349 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-28 03:34:32,349 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:32,349 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-28 03:34:32,349 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:32,349 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-28 03:34:32,349 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-28 03:34:32,349 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1666#true} is VALID [2022-04-28 03:34:32,361 INFO L290 TraceCheckUtils]: 17: Hoare triple {1666#true} #t~loopctr188 := 0; {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:32,362 INFO L290 TraceCheckUtils]: 18: Hoare triple {1683#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:32,367 INFO L290 TraceCheckUtils]: 19: Hoare triple {1743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1747#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} is VALID [2022-04-28 03:34:32,368 INFO L290 TraceCheckUtils]: 20: Hoare triple {1747#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1747#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} is VALID [2022-04-28 03:34:32,370 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1747#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} {1666#true} #672#return; {1667#false} is VALID [2022-04-28 03:34:32,370 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-28 03:34:32,370 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-28 03:34:32,370 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-28 03:34:32,371 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-28 03:34:32,371 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-28 03:34:32,371 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-28 03:34:32,371 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-28 03:34:32,371 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-28 03:34:32,371 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-28 03:34:32,372 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-28 03:34:32,372 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-28 03:34:32,372 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-28 03:34:32,372 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-28 03:34:32,372 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-28 03:34:32,372 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L290 TraceCheckUtils]: 37: Hoare triple {1667#false} #t~loopctr188 := 0; {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L290 TraceCheckUtils]: 38: Hoare triple {1667#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L290 TraceCheckUtils]: 39: Hoare triple {1667#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L290 TraceCheckUtils]: 40: Hoare triple {1667#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1667#false} {1667#false} #656#return; {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-28 03:34:32,373 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-28 03:34:32,374 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-28 03:34:32,374 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-28 03:34:32,374 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 03:34:32,374 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:32,684 INFO L290 TraceCheckUtils]: 47: Hoare triple {1667#false} assume !false; {1667#false} is VALID [2022-04-28 03:34:32,685 INFO L290 TraceCheckUtils]: 46: Hoare triple {1667#false} assume 0 == ~cond; {1667#false} is VALID [2022-04-28 03:34:32,685 INFO L290 TraceCheckUtils]: 45: Hoare triple {1667#false} ~cond := #in~cond; {1667#false} is VALID [2022-04-28 03:34:32,685 INFO L272 TraceCheckUtils]: 44: Hoare triple {1667#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1667#false} is VALID [2022-04-28 03:34:32,685 INFO L290 TraceCheckUtils]: 43: Hoare triple {1667#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1667#false} is VALID [2022-04-28 03:34:32,685 INFO L290 TraceCheckUtils]: 42: Hoare triple {1667#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1667#false} is VALID [2022-04-28 03:34:32,685 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1666#true} {1667#false} #656#return; {1667#false} is VALID [2022-04-28 03:34:32,685 INFO L290 TraceCheckUtils]: 40: Hoare triple {1666#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1666#true} is VALID [2022-04-28 03:34:32,685 INFO L290 TraceCheckUtils]: 39: Hoare triple {1666#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1666#true} is VALID [2022-04-28 03:34:32,685 INFO L290 TraceCheckUtils]: 38: Hoare triple {1666#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1666#true} is VALID [2022-04-28 03:34:32,686 INFO L290 TraceCheckUtils]: 37: Hoare triple {1666#true} #t~loopctr188 := 0; {1666#true} is VALID [2022-04-28 03:34:32,686 INFO L272 TraceCheckUtils]: 36: Hoare triple {1667#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1666#true} is VALID [2022-04-28 03:34:32,686 INFO L290 TraceCheckUtils]: 35: Hoare triple {1667#false} assume !(~len <= 0); {1667#false} is VALID [2022-04-28 03:34:32,686 INFO L290 TraceCheckUtils]: 34: Hoare triple {1667#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1667#false} is VALID [2022-04-28 03:34:32,686 INFO L272 TraceCheckUtils]: 33: Hoare triple {1667#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1667#false} is VALID [2022-04-28 03:34:32,686 INFO L290 TraceCheckUtils]: 32: Hoare triple {1667#false} assume 0 != #t~mem173;havoc #t~mem173; {1667#false} is VALID [2022-04-28 03:34:32,686 INFO L290 TraceCheckUtils]: 31: Hoare triple {1667#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1667#false} is VALID [2022-04-28 03:34:32,686 INFO L290 TraceCheckUtils]: 30: Hoare triple {1667#false} assume #t~short172; {1667#false} is VALID [2022-04-28 03:34:32,686 INFO L290 TraceCheckUtils]: 29: Hoare triple {1667#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1667#false} is VALID [2022-04-28 03:34:32,687 INFO L290 TraceCheckUtils]: 28: Hoare triple {1667#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1667#false} is VALID [2022-04-28 03:34:32,687 INFO L290 TraceCheckUtils]: 27: Hoare triple {1667#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1667#false} is VALID [2022-04-28 03:34:32,687 INFO L290 TraceCheckUtils]: 26: Hoare triple {1667#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1667#false} is VALID [2022-04-28 03:34:32,687 INFO L290 TraceCheckUtils]: 25: Hoare triple {1667#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1667#false} is VALID [2022-04-28 03:34:32,687 INFO L290 TraceCheckUtils]: 24: Hoare triple {1667#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1667#false} is VALID [2022-04-28 03:34:32,687 INFO L290 TraceCheckUtils]: 23: Hoare triple {1667#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1667#false} is VALID [2022-04-28 03:34:32,687 INFO L290 TraceCheckUtils]: 22: Hoare triple {1667#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1667#false} is VALID [2022-04-28 03:34:32,689 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1913#(not (= |#Ultimate.C_memset_#amount| 24))} {1666#true} #672#return; {1667#false} is VALID [2022-04-28 03:34:32,689 INFO L290 TraceCheckUtils]: 20: Hoare triple {1913#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1913#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:34:32,690 INFO L290 TraceCheckUtils]: 19: Hoare triple {1920#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1913#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:34:32,691 INFO L290 TraceCheckUtils]: 18: Hoare triple {1924#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1920#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:32,692 INFO L290 TraceCheckUtils]: 17: Hoare triple {1666#true} #t~loopctr188 := 0; {1924#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:32,692 INFO L272 TraceCheckUtils]: 16: Hoare triple {1666#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1666#true} is VALID [2022-04-28 03:34:32,692 INFO L290 TraceCheckUtils]: 15: Hoare triple {1666#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1666#true} is VALID [2022-04-28 03:34:32,692 INFO L290 TraceCheckUtils]: 14: Hoare triple {1666#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1666#true} is VALID [2022-04-28 03:34:32,692 INFO L290 TraceCheckUtils]: 13: Hoare triple {1666#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:32,692 INFO L290 TraceCheckUtils]: 12: Hoare triple {1666#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1666#true} is VALID [2022-04-28 03:34:32,692 INFO L290 TraceCheckUtils]: 11: Hoare triple {1666#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:32,692 INFO L290 TraceCheckUtils]: 10: Hoare triple {1666#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1666#true} is VALID [2022-04-28 03:34:32,693 INFO L290 TraceCheckUtils]: 9: Hoare triple {1666#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1666#true} is VALID [2022-04-28 03:34:32,693 INFO L290 TraceCheckUtils]: 8: Hoare triple {1666#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1666#true} is VALID [2022-04-28 03:34:32,693 INFO L290 TraceCheckUtils]: 7: Hoare triple {1666#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1666#true} is VALID [2022-04-28 03:34:32,693 INFO L272 TraceCheckUtils]: 6: Hoare triple {1666#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1666#true} is VALID [2022-04-28 03:34:32,693 INFO L290 TraceCheckUtils]: 5: Hoare triple {1666#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1666#true} is VALID [2022-04-28 03:34:32,693 INFO L272 TraceCheckUtils]: 4: Hoare triple {1666#true} call #t~ret187 := main(); {1666#true} is VALID [2022-04-28 03:34:32,693 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1666#true} {1666#true} #682#return; {1666#true} is VALID [2022-04-28 03:34:32,693 INFO L290 TraceCheckUtils]: 2: Hoare triple {1666#true} assume true; {1666#true} is VALID [2022-04-28 03:34:32,694 INFO L290 TraceCheckUtils]: 1: Hoare triple {1666#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1666#true} is VALID [2022-04-28 03:34:32,694 INFO L272 TraceCheckUtils]: 0: Hoare triple {1666#true} call ULTIMATE.init(); {1666#true} is VALID [2022-04-28 03:34:32,694 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-28 03:34:32,694 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1098126118] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:32,694 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:32,695 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 12 [2022-04-28 03:34:32,695 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:32,695 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [785692281] [2022-04-28 03:34:32,695 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [785692281] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:32,695 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:32,695 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-04-28 03:34:32,695 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [225051631] [2022-04-28 03:34:32,696 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:32,696 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 48 [2022-04-28 03:34:32,696 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:32,697 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:32,753 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:32,754 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-28 03:34:32,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:32,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-28 03:34:32,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2022-04-28 03:34:32,755 INFO L87 Difference]: Start difference. First operand 77 states and 99 transitions. Second operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:33,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:33,899 INFO L93 Difference]: Finished difference Result 142 states and 186 transitions. [2022-04-28 03:34:33,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-28 03:34:33,899 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 48 [2022-04-28 03:34:33,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:33,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:33,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 183 transitions. [2022-04-28 03:34:33,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:33,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 183 transitions. [2022-04-28 03:34:33,906 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 183 transitions. [2022-04-28 03:34:34,104 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:34,113 INFO L225 Difference]: With dead ends: 142 [2022-04-28 03:34:34,113 INFO L226 Difference]: Without dead ends: 82 [2022-04-28 03:34:34,117 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 95 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=178, Unknown=0, NotChecked=0, Total=240 [2022-04-28 03:34:34,123 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 333 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 333 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:34,124 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 333 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-28 03:34:34,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-04-28 03:34:34,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 78. [2022-04-28 03:34:34,143 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:34,144 INFO L82 GeneralOperation]: Start isEquivalent. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:34,144 INFO L74 IsIncluded]: Start isIncluded. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:34,144 INFO L87 Difference]: Start difference. First operand 82 states. Second operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:34,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:34,147 INFO L93 Difference]: Finished difference Result 82 states and 106 transitions. [2022-04-28 03:34:34,147 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 106 transitions. [2022-04-28 03:34:34,147 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:34,148 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:34,148 INFO L74 IsIncluded]: Start isIncluded. First operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 82 states. [2022-04-28 03:34:34,148 INFO L87 Difference]: Start difference. First operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 82 states. [2022-04-28 03:34:34,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:34,151 INFO L93 Difference]: Finished difference Result 82 states and 106 transitions. [2022-04-28 03:34:34,151 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 106 transitions. [2022-04-28 03:34:34,151 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:34,152 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:34,152 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:34,152 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:34,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 60 states have (on average 1.2833333333333334) internal successors, (77), 60 states have internal predecessors, (77), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:34,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 100 transitions. [2022-04-28 03:34:34,155 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 100 transitions. Word has length 48 [2022-04-28 03:34:34,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:34,155 INFO L495 AbstractCegarLoop]: Abstraction has 78 states and 100 transitions. [2022-04-28 03:34:34,155 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 5.428571428571429) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:34,155 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 78 states and 100 transitions. [2022-04-28 03:34:34,275 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 100 edges. 100 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:34,275 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 100 transitions. [2022-04-28 03:34:34,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-28 03:34:34,275 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:34,275 INFO L195 NwaCegarLoop]: trace histogram [4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:34,294 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:34,476 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-28 03:34:34,476 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:34,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:34,477 INFO L85 PathProgramCache]: Analyzing trace with hash -110265974, now seen corresponding path program 3 times [2022-04-28 03:34:34,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:34,477 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [520068059] [2022-04-28 03:34:34,477 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:34,478 INFO L85 PathProgramCache]: Analyzing trace with hash -110265974, now seen corresponding path program 4 times [2022-04-28 03:34:34,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:34,478 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115230339] [2022-04-28 03:34:34,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:34,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:34,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:34,625 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:34,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:34,651 INFO L290 TraceCheckUtils]: 0: Hoare triple {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-28 03:34:34,651 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-28 03:34:34,651 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-28 03:34:34,655 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:34,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:34,798 INFO L290 TraceCheckUtils]: 0: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:34,799 INFO L290 TraceCheckUtils]: 1: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:34,800 INFO L290 TraceCheckUtils]: 2: Hoare triple {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2612#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:34:34,802 INFO L290 TraceCheckUtils]: 3: Hoare triple {2612#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:34,802 INFO L290 TraceCheckUtils]: 4: Hoare triple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:34,804 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {2591#true} #672#return; {2592#false} is VALID [2022-04-28 03:34:34,804 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-04-28 03:34:34,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:34,830 INFO L290 TraceCheckUtils]: 0: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-28 03:34:34,830 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 03:34:34,830 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 03:34:34,830 INFO L290 TraceCheckUtils]: 3: Hoare triple {2591#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2591#true} is VALID [2022-04-28 03:34:34,830 INFO L290 TraceCheckUtils]: 4: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-28 03:34:34,831 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {2591#true} {2592#false} #656#return; {2592#false} is VALID [2022-04-28 03:34:34,833 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:34,833 INFO L290 TraceCheckUtils]: 1: Hoare triple {2608#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-28 03:34:34,833 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-28 03:34:34,833 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-28 03:34:34,833 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-28 03:34:34,834 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-28 03:34:34,836 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2609#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:34,836 INFO L290 TraceCheckUtils]: 17: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:34,837 INFO L290 TraceCheckUtils]: 18: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:34,838 INFO L290 TraceCheckUtils]: 19: Hoare triple {2611#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2612#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:34:34,840 INFO L290 TraceCheckUtils]: 20: Hoare triple {2612#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:34,840 INFO L290 TraceCheckUtils]: 21: Hoare triple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:34,841 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2613#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {2591#true} #672#return; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 23: Hoare triple {2592#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 24: Hoare triple {2592#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 25: Hoare triple {2592#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 26: Hoare triple {2592#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 27: Hoare triple {2592#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 28: Hoare triple {2592#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 29: Hoare triple {2592#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 30: Hoare triple {2592#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 31: Hoare triple {2592#false} assume #t~short172; {2592#false} is VALID [2022-04-28 03:34:34,842 INFO L290 TraceCheckUtils]: 32: Hoare triple {2592#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2592#false} is VALID [2022-04-28 03:34:34,843 INFO L290 TraceCheckUtils]: 33: Hoare triple {2592#false} assume 0 != #t~mem173;havoc #t~mem173; {2592#false} is VALID [2022-04-28 03:34:34,843 INFO L272 TraceCheckUtils]: 34: Hoare triple {2592#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2592#false} is VALID [2022-04-28 03:34:34,843 INFO L290 TraceCheckUtils]: 35: Hoare triple {2592#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2592#false} is VALID [2022-04-28 03:34:34,843 INFO L290 TraceCheckUtils]: 36: Hoare triple {2592#false} assume !(~len <= 0); {2592#false} is VALID [2022-04-28 03:34:34,843 INFO L272 TraceCheckUtils]: 37: Hoare triple {2592#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2609#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:34,843 INFO L290 TraceCheckUtils]: 38: Hoare triple {2609#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-28 03:34:34,843 INFO L290 TraceCheckUtils]: 39: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 03:34:34,843 INFO L290 TraceCheckUtils]: 40: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 03:34:34,843 INFO L290 TraceCheckUtils]: 41: Hoare triple {2591#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2591#true} is VALID [2022-04-28 03:34:34,844 INFO L290 TraceCheckUtils]: 42: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-28 03:34:34,844 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2591#true} {2592#false} #656#return; {2592#false} is VALID [2022-04-28 03:34:34,844 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-28 03:34:34,844 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-28 03:34:34,844 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-28 03:34:34,844 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-28 03:34:34,844 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-28 03:34:34,844 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-28 03:34:34,845 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-28 03:34:34,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:34,845 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115230339] [2022-04-28 03:34:34,845 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [115230339] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:34,845 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1583050415] [2022-04-28 03:34:34,845 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 03:34:34,845 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:34,845 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:34,849 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:34,850 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-28 03:34:35,075 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 03:34:35,075 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:34:35,079 INFO L263 TraceCheckSpWp]: Trace formula consists of 709 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-28 03:34:35,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:35,100 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:35,728 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2591#true} is VALID [2022-04-28 03:34:35,728 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-28 03:34:35,728 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-28 03:34:35,728 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-28 03:34:35,728 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-28 03:34:35,729 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:35,730 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-28 03:34:35,730 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-28 03:34:35,730 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2591#true} is VALID [2022-04-28 03:34:35,732 INFO L290 TraceCheckUtils]: 17: Hoare triple {2591#true} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:35,733 INFO L290 TraceCheckUtils]: 18: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:35,733 INFO L290 TraceCheckUtils]: 19: Hoare triple {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 03:34:35,733 INFO L290 TraceCheckUtils]: 20: Hoare triple {2591#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2591#true} is VALID [2022-04-28 03:34:35,733 INFO L290 TraceCheckUtils]: 21: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-28 03:34:35,733 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2591#true} {2591#true} #672#return; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 23: Hoare triple {2591#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 24: Hoare triple {2591#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 25: Hoare triple {2591#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 26: Hoare triple {2591#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 27: Hoare triple {2591#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 28: Hoare triple {2591#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 29: Hoare triple {2591#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 30: Hoare triple {2591#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 31: Hoare triple {2591#true} assume #t~short172; {2591#true} is VALID [2022-04-28 03:34:35,734 INFO L290 TraceCheckUtils]: 32: Hoare triple {2591#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:35,735 INFO L290 TraceCheckUtils]: 33: Hoare triple {2591#true} assume 0 != #t~mem173;havoc #t~mem173; {2591#true} is VALID [2022-04-28 03:34:35,735 INFO L272 TraceCheckUtils]: 34: Hoare triple {2591#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2591#true} is VALID [2022-04-28 03:34:35,735 INFO L290 TraceCheckUtils]: 35: Hoare triple {2591#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2591#true} is VALID [2022-04-28 03:34:35,735 INFO L290 TraceCheckUtils]: 36: Hoare triple {2591#true} assume !(~len <= 0); {2591#true} is VALID [2022-04-28 03:34:35,735 INFO L272 TraceCheckUtils]: 37: Hoare triple {2591#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2591#true} is VALID [2022-04-28 03:34:35,736 INFO L290 TraceCheckUtils]: 38: Hoare triple {2591#true} #t~loopctr188 := 0; {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:35,737 INFO L290 TraceCheckUtils]: 39: Hoare triple {2610#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:35,738 INFO L290 TraceCheckUtils]: 40: Hoare triple {2671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2738#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:35,740 INFO L290 TraceCheckUtils]: 41: Hoare triple {2738#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2742#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967298) 4294967296) 1))} is VALID [2022-04-28 03:34:35,741 INFO L290 TraceCheckUtils]: 42: Hoare triple {2742#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967298) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2742#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967298) 4294967296) 1))} is VALID [2022-04-28 03:34:35,742 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2742#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967298) 4294967296) 1))} {2591#true} #656#return; {2592#false} is VALID [2022-04-28 03:34:35,742 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-28 03:34:35,742 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-28 03:34:35,742 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-28 03:34:35,742 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-28 03:34:35,743 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-28 03:34:35,743 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-28 03:34:35,743 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 5 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-28 03:34:35,743 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:36,048 INFO L290 TraceCheckUtils]: 49: Hoare triple {2592#false} assume !false; {2592#false} is VALID [2022-04-28 03:34:36,048 INFO L290 TraceCheckUtils]: 48: Hoare triple {2592#false} assume 0 == ~cond; {2592#false} is VALID [2022-04-28 03:34:36,049 INFO L290 TraceCheckUtils]: 47: Hoare triple {2592#false} ~cond := #in~cond; {2592#false} is VALID [2022-04-28 03:34:36,049 INFO L272 TraceCheckUtils]: 46: Hoare triple {2592#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2592#false} is VALID [2022-04-28 03:34:36,049 INFO L290 TraceCheckUtils]: 45: Hoare triple {2592#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2592#false} is VALID [2022-04-28 03:34:36,049 INFO L290 TraceCheckUtils]: 44: Hoare triple {2592#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2592#false} is VALID [2022-04-28 03:34:36,050 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {2788#(not (= |#Ultimate.C_memset_#amount| 80))} {2591#true} #656#return; {2592#false} is VALID [2022-04-28 03:34:36,050 INFO L290 TraceCheckUtils]: 42: Hoare triple {2788#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2788#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:34:36,051 INFO L290 TraceCheckUtils]: 41: Hoare triple {2795#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2788#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:34:36,052 INFO L290 TraceCheckUtils]: 40: Hoare triple {2799#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2795#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:34:36,054 INFO L290 TraceCheckUtils]: 39: Hoare triple {2803#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2799#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:36,054 INFO L290 TraceCheckUtils]: 38: Hoare triple {2591#true} #t~loopctr188 := 0; {2803#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:36,054 INFO L272 TraceCheckUtils]: 37: Hoare triple {2591#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 36: Hoare triple {2591#true} assume !(~len <= 0); {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 35: Hoare triple {2591#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L272 TraceCheckUtils]: 34: Hoare triple {2591#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 33: Hoare triple {2591#true} assume 0 != #t~mem173;havoc #t~mem173; {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 32: Hoare triple {2591#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 31: Hoare triple {2591#true} assume #t~short172; {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 30: Hoare triple {2591#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 29: Hoare triple {2591#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 28: Hoare triple {2591#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 27: Hoare triple {2591#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2591#true} is VALID [2022-04-28 03:34:36,055 INFO L290 TraceCheckUtils]: 26: Hoare triple {2591#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 25: Hoare triple {2591#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 24: Hoare triple {2591#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 23: Hoare triple {2591#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2591#true} {2591#true} #672#return; {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 21: Hoare triple {2591#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 20: Hoare triple {2591#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 19: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 18: Hoare triple {2591#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 17: Hoare triple {2591#true} #t~loopctr188 := 0; {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L272 TraceCheckUtils]: 16: Hoare triple {2591#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2591#true} is VALID [2022-04-28 03:34:36,056 INFO L290 TraceCheckUtils]: 15: Hoare triple {2591#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 14: Hoare triple {2591#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 13: Hoare triple {2591#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 12: Hoare triple {2591#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 11: Hoare triple {2591#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 10: Hoare triple {2591#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 9: Hoare triple {2591#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 8: Hoare triple {2591#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 7: Hoare triple {2591#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L272 TraceCheckUtils]: 6: Hoare triple {2591#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L290 TraceCheckUtils]: 5: Hoare triple {2591#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2591#true} is VALID [2022-04-28 03:34:36,057 INFO L272 TraceCheckUtils]: 4: Hoare triple {2591#true} call #t~ret187 := main(); {2591#true} is VALID [2022-04-28 03:34:36,058 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2591#true} {2591#true} #682#return; {2591#true} is VALID [2022-04-28 03:34:36,058 INFO L290 TraceCheckUtils]: 2: Hoare triple {2591#true} assume true; {2591#true} is VALID [2022-04-28 03:34:36,058 INFO L290 TraceCheckUtils]: 1: Hoare triple {2591#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2591#true} is VALID [2022-04-28 03:34:36,058 INFO L272 TraceCheckUtils]: 0: Hoare triple {2591#true} call ULTIMATE.init(); {2591#true} is VALID [2022-04-28 03:34:36,058 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 11 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-28 03:34:36,058 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1583050415] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:36,058 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:36,059 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2022-04-28 03:34:36,059 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:36,059 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [520068059] [2022-04-28 03:34:36,059 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [520068059] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:36,059 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:36,059 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-28 03:34:36,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1154038434] [2022-04-28 03:34:36,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:36,060 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 50 [2022-04-28 03:34:36,060 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:36,060 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:36,115 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:36,115 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-28 03:34:36,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:36,116 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-28 03:34:36,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2022-04-28 03:34:36,116 INFO L87 Difference]: Start difference. First operand 78 states and 100 transitions. Second operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:37,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:37,414 INFO L93 Difference]: Finished difference Result 144 states and 188 transitions. [2022-04-28 03:34:37,414 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-28 03:34:37,415 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 50 [2022-04-28 03:34:37,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:37,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:37,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 184 transitions. [2022-04-28 03:34:37,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:37,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 184 transitions. [2022-04-28 03:34:37,421 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 184 transitions. [2022-04-28 03:34:37,593 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 184 edges. 184 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:37,596 INFO L225 Difference]: With dead ends: 144 [2022-04-28 03:34:37,596 INFO L226 Difference]: Without dead ends: 83 [2022-04-28 03:34:37,598 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=283, Unknown=0, NotChecked=0, Total=380 [2022-04-28 03:34:37,600 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 336 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 371 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 336 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:37,602 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 371 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 336 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 03:34:37,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-04-28 03:34:37,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 79. [2022-04-28 03:34:37,636 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:37,636 INFO L82 GeneralOperation]: Start isEquivalent. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:37,637 INFO L74 IsIncluded]: Start isIncluded. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:37,638 INFO L87 Difference]: Start difference. First operand 83 states. Second operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:37,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:37,641 INFO L93 Difference]: Finished difference Result 83 states and 107 transitions. [2022-04-28 03:34:37,641 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 107 transitions. [2022-04-28 03:34:37,642 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:37,642 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:37,643 INFO L74 IsIncluded]: Start isIncluded. First operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 83 states. [2022-04-28 03:34:37,645 INFO L87 Difference]: Start difference. First operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 83 states. [2022-04-28 03:34:37,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:37,648 INFO L93 Difference]: Finished difference Result 83 states and 107 transitions. [2022-04-28 03:34:37,648 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 107 transitions. [2022-04-28 03:34:37,649 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:37,649 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:37,649 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:37,649 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:37,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 61 states have (on average 1.278688524590164) internal successors, (78), 61 states have internal predecessors, (78), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:37,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 101 transitions. [2022-04-28 03:34:37,653 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 101 transitions. Word has length 50 [2022-04-28 03:34:37,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:37,654 INFO L495 AbstractCegarLoop]: Abstraction has 79 states and 101 transitions. [2022-04-28 03:34:37,654 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.875) internal successors, (39), 6 states have internal predecessors, (39), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:37,654 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 79 states and 101 transitions. [2022-04-28 03:34:37,780 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:37,780 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 101 transitions. [2022-04-28 03:34:37,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-04-28 03:34:37,781 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:37,781 INFO L195 NwaCegarLoop]: trace histogram [6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:37,801 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:37,981 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:37,982 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:37,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:37,982 INFO L85 PathProgramCache]: Analyzing trace with hash -523287008, now seen corresponding path program 5 times [2022-04-28 03:34:37,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:37,982 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [723486621] [2022-04-28 03:34:37,983 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:37,983 INFO L85 PathProgramCache]: Analyzing trace with hash -523287008, now seen corresponding path program 6 times [2022-04-28 03:34:37,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:37,983 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506862900] [2022-04-28 03:34:37,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:37,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:38,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:38,132 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:38,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:38,148 INFO L290 TraceCheckUtils]: 0: Hoare triple {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-28 03:34:38,148 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-28 03:34:38,149 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-28 03:34:38,152 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:38,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:38,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:38,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:38,294 INFO L290 TraceCheckUtils]: 2: Hoare triple {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:38,296 INFO L290 TraceCheckUtils]: 3: Hoare triple {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3567#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-28 03:34:38,297 INFO L290 TraceCheckUtils]: 4: Hoare triple {3567#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-28 03:34:38,297 INFO L290 TraceCheckUtils]: 5: Hoare triple {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-28 03:34:38,298 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} {3543#true} #672#return; {3544#false} is VALID [2022-04-28 03:34:38,299 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-28 03:34:38,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:38,310 INFO L290 TraceCheckUtils]: 0: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-28 03:34:38,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:38,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:38,310 INFO L290 TraceCheckUtils]: 3: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:38,310 INFO L290 TraceCheckUtils]: 4: Hoare triple {3543#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3543#true} is VALID [2022-04-28 03:34:38,310 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-28 03:34:38,310 INFO L284 TraceCheckUtils]: 6: Hoare quadruple {3543#true} {3544#false} #656#return; {3544#false} is VALID [2022-04-28 03:34:38,315 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:38,316 INFO L290 TraceCheckUtils]: 1: Hoare triple {3562#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-28 03:34:38,316 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-28 03:34:38,345 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-28 03:34:38,345 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-28 03:34:38,345 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-28 03:34:38,345 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-28 03:34:38,345 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-28 03:34:38,345 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-28 03:34:38,346 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:38,346 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-28 03:34:38,346 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:38,346 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-28 03:34:38,346 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:38,346 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-28 03:34:38,346 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-28 03:34:38,348 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3563#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:38,349 INFO L290 TraceCheckUtils]: 17: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:38,350 INFO L290 TraceCheckUtils]: 18: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:38,351 INFO L290 TraceCheckUtils]: 19: Hoare triple {3565#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:38,352 INFO L290 TraceCheckUtils]: 20: Hoare triple {3566#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3567#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-28 03:34:38,353 INFO L290 TraceCheckUtils]: 21: Hoare triple {3567#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 3) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-28 03:34:38,354 INFO L290 TraceCheckUtils]: 22: Hoare triple {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} is VALID [2022-04-28 03:34:38,355 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3568#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 3))} {3543#true} #672#return; {3544#false} is VALID [2022-04-28 03:34:38,355 INFO L290 TraceCheckUtils]: 24: Hoare triple {3544#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3544#false} is VALID [2022-04-28 03:34:38,355 INFO L290 TraceCheckUtils]: 25: Hoare triple {3544#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3544#false} is VALID [2022-04-28 03:34:38,355 INFO L290 TraceCheckUtils]: 26: Hoare triple {3544#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3544#false} is VALID [2022-04-28 03:34:38,355 INFO L290 TraceCheckUtils]: 27: Hoare triple {3544#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3544#false} is VALID [2022-04-28 03:34:38,355 INFO L290 TraceCheckUtils]: 28: Hoare triple {3544#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3544#false} is VALID [2022-04-28 03:34:38,355 INFO L290 TraceCheckUtils]: 29: Hoare triple {3544#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 30: Hoare triple {3544#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 31: Hoare triple {3544#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 32: Hoare triple {3544#false} assume #t~short172; {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 33: Hoare triple {3544#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 34: Hoare triple {3544#false} assume 0 != #t~mem173;havoc #t~mem173; {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L272 TraceCheckUtils]: 35: Hoare triple {3544#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 36: Hoare triple {3544#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 37: Hoare triple {3544#false} assume !(~len <= 0); {3544#false} is VALID [2022-04-28 03:34:38,356 INFO L272 TraceCheckUtils]: 38: Hoare triple {3544#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3563#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 39: Hoare triple {3563#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 40: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 41: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:38,356 INFO L290 TraceCheckUtils]: 42: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:38,357 INFO L290 TraceCheckUtils]: 43: Hoare triple {3543#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3543#true} is VALID [2022-04-28 03:34:38,357 INFO L290 TraceCheckUtils]: 44: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-28 03:34:38,357 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3543#true} {3544#false} #656#return; {3544#false} is VALID [2022-04-28 03:34:38,357 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-28 03:34:38,357 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-28 03:34:38,357 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-28 03:34:38,357 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-28 03:34:38,357 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-28 03:34:38,357 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-28 03:34:38,357 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-28 03:34:38,358 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:38,358 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506862900] [2022-04-28 03:34:38,358 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1506862900] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:38,358 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [309514485] [2022-04-28 03:34:38,358 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 03:34:38,358 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:38,358 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:38,359 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:38,361 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-28 03:34:39,941 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-28 03:34:39,941 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:34:39,947 INFO L263 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-28 03:34:39,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:39,970 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:40,521 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:40,522 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-28 03:34:40,523 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:40,523 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-28 03:34:40,523 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:40,523 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-28 03:34:40,523 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-28 03:34:40,523 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3543#true} is VALID [2022-04-28 03:34:40,524 INFO L290 TraceCheckUtils]: 17: Hoare triple {3543#true} #t~loopctr188 := 0; {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:40,525 INFO L290 TraceCheckUtils]: 18: Hoare triple {3564#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3626#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:40,526 INFO L290 TraceCheckUtils]: 19: Hoare triple {3626#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3630#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:40,528 INFO L290 TraceCheckUtils]: 20: Hoare triple {3630#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3634#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:40,530 INFO L290 TraceCheckUtils]: 21: Hoare triple {3634#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3638#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 2))} is VALID [2022-04-28 03:34:40,531 INFO L290 TraceCheckUtils]: 22: Hoare triple {3638#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 2))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3638#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 2))} is VALID [2022-04-28 03:34:40,532 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3638#(< (div (+ (- 4294967298) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 3 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 2))} {3543#true} #672#return; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 24: Hoare triple {3544#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 25: Hoare triple {3544#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 26: Hoare triple {3544#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 27: Hoare triple {3544#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 28: Hoare triple {3544#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 29: Hoare triple {3544#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 30: Hoare triple {3544#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 31: Hoare triple {3544#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 32: Hoare triple {3544#false} assume #t~short172; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 33: Hoare triple {3544#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L290 TraceCheckUtils]: 34: Hoare triple {3544#false} assume 0 != #t~mem173;havoc #t~mem173; {3544#false} is VALID [2022-04-28 03:34:40,533 INFO L272 TraceCheckUtils]: 35: Hoare triple {3544#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 36: Hoare triple {3544#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 37: Hoare triple {3544#false} assume !(~len <= 0); {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L272 TraceCheckUtils]: 38: Hoare triple {3544#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 39: Hoare triple {3544#false} #t~loopctr188 := 0; {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 40: Hoare triple {3544#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 41: Hoare triple {3544#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 42: Hoare triple {3544#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 43: Hoare triple {3544#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 44: Hoare triple {3544#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3544#false} {3544#false} #656#return; {3544#false} is VALID [2022-04-28 03:34:40,534 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-28 03:34:40,535 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-28 03:34:40,535 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-28 03:34:40,535 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-28 03:34:40,535 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-28 03:34:40,535 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-28 03:34:40,535 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 19 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-28 03:34:40,535 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:40,950 INFO L290 TraceCheckUtils]: 51: Hoare triple {3544#false} assume !false; {3544#false} is VALID [2022-04-28 03:34:40,950 INFO L290 TraceCheckUtils]: 50: Hoare triple {3544#false} assume 0 == ~cond; {3544#false} is VALID [2022-04-28 03:34:40,950 INFO L290 TraceCheckUtils]: 49: Hoare triple {3544#false} ~cond := #in~cond; {3544#false} is VALID [2022-04-28 03:34:40,951 INFO L272 TraceCheckUtils]: 48: Hoare triple {3544#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3544#false} is VALID [2022-04-28 03:34:40,951 INFO L290 TraceCheckUtils]: 47: Hoare triple {3544#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3544#false} is VALID [2022-04-28 03:34:40,951 INFO L290 TraceCheckUtils]: 46: Hoare triple {3544#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3544#false} is VALID [2022-04-28 03:34:40,951 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {3543#true} {3544#false} #656#return; {3544#false} is VALID [2022-04-28 03:34:40,951 INFO L290 TraceCheckUtils]: 44: Hoare triple {3543#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3543#true} is VALID [2022-04-28 03:34:40,951 INFO L290 TraceCheckUtils]: 43: Hoare triple {3543#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3543#true} is VALID [2022-04-28 03:34:40,951 INFO L290 TraceCheckUtils]: 42: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:40,951 INFO L290 TraceCheckUtils]: 41: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:40,951 INFO L290 TraceCheckUtils]: 40: Hoare triple {3543#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3543#true} is VALID [2022-04-28 03:34:40,951 INFO L290 TraceCheckUtils]: 39: Hoare triple {3543#true} #t~loopctr188 := 0; {3543#true} is VALID [2022-04-28 03:34:40,952 INFO L272 TraceCheckUtils]: 38: Hoare triple {3544#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3543#true} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 37: Hoare triple {3544#false} assume !(~len <= 0); {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 36: Hoare triple {3544#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L272 TraceCheckUtils]: 35: Hoare triple {3544#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 34: Hoare triple {3544#false} assume 0 != #t~mem173;havoc #t~mem173; {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 33: Hoare triple {3544#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 32: Hoare triple {3544#false} assume #t~short172; {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 31: Hoare triple {3544#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 30: Hoare triple {3544#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 29: Hoare triple {3544#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3544#false} is VALID [2022-04-28 03:34:40,952 INFO L290 TraceCheckUtils]: 28: Hoare triple {3544#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3544#false} is VALID [2022-04-28 03:34:40,953 INFO L290 TraceCheckUtils]: 27: Hoare triple {3544#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3544#false} is VALID [2022-04-28 03:34:40,953 INFO L290 TraceCheckUtils]: 26: Hoare triple {3544#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3544#false} is VALID [2022-04-28 03:34:40,953 INFO L290 TraceCheckUtils]: 25: Hoare triple {3544#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3544#false} is VALID [2022-04-28 03:34:40,953 INFO L290 TraceCheckUtils]: 24: Hoare triple {3544#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3544#false} is VALID [2022-04-28 03:34:40,954 INFO L284 TraceCheckUtils]: 23: Hoare quadruple {3816#(not (= |#Ultimate.C_memset_#amount| 24))} {3543#true} #672#return; {3544#false} is VALID [2022-04-28 03:34:40,955 INFO L290 TraceCheckUtils]: 22: Hoare triple {3816#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3816#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:34:40,955 INFO L290 TraceCheckUtils]: 21: Hoare triple {3823#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3816#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:34:40,957 INFO L290 TraceCheckUtils]: 20: Hoare triple {3827#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3823#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:40,959 INFO L290 TraceCheckUtils]: 19: Hoare triple {3831#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3827#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:40,960 INFO L290 TraceCheckUtils]: 18: Hoare triple {3835#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3831#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 17: Hoare triple {3543#true} #t~loopctr188 := 0; {3835#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:34:40,961 INFO L272 TraceCheckUtils]: 16: Hoare triple {3543#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 15: Hoare triple {3543#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 14: Hoare triple {3543#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 12: Hoare triple {3543#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 11: Hoare triple {3543#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 10: Hoare triple {3543#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 9: Hoare triple {3543#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 8: Hoare triple {3543#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 7: Hoare triple {3543#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L272 TraceCheckUtils]: 6: Hoare triple {3543#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3543#true} is VALID [2022-04-28 03:34:40,961 INFO L290 TraceCheckUtils]: 5: Hoare triple {3543#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3543#true} is VALID [2022-04-28 03:34:40,962 INFO L272 TraceCheckUtils]: 4: Hoare triple {3543#true} call #t~ret187 := main(); {3543#true} is VALID [2022-04-28 03:34:40,962 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3543#true} {3543#true} #682#return; {3543#true} is VALID [2022-04-28 03:34:40,962 INFO L290 TraceCheckUtils]: 2: Hoare triple {3543#true} assume true; {3543#true} is VALID [2022-04-28 03:34:40,962 INFO L290 TraceCheckUtils]: 1: Hoare triple {3543#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3543#true} is VALID [2022-04-28 03:34:40,962 INFO L272 TraceCheckUtils]: 0: Hoare triple {3543#true} call ULTIMATE.init(); {3543#true} is VALID [2022-04-28 03:34:40,962 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-28 03:34:40,962 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [309514485] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:40,962 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:40,962 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 18 [2022-04-28 03:34:40,963 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:40,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [723486621] [2022-04-28 03:34:40,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [723486621] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:40,963 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:40,963 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-28 03:34:40,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959397194] [2022-04-28 03:34:40,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:40,964 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 52 [2022-04-28 03:34:40,965 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:40,965 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:41,010 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:41,010 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-28 03:34:41,010 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:41,011 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-28 03:34:41,011 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=224, Unknown=0, NotChecked=0, Total=306 [2022-04-28 03:34:41,011 INFO L87 Difference]: Start difference. First operand 79 states and 101 transitions. Second operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:42,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:42,417 INFO L93 Difference]: Finished difference Result 146 states and 190 transitions. [2022-04-28 03:34:42,417 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-28 03:34:42,417 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 52 [2022-04-28 03:34:42,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:42,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:42,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 185 transitions. [2022-04-28 03:34:42,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:42,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 185 transitions. [2022-04-28 03:34:42,424 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 185 transitions. [2022-04-28 03:34:42,592 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 185 edges. 185 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:42,595 INFO L225 Difference]: With dead ends: 146 [2022-04-28 03:34:42,595 INFO L226 Difference]: Without dead ends: 84 [2022-04-28 03:34:42,595 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 99 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=416, Unknown=0, NotChecked=0, Total=552 [2022-04-28 03:34:42,596 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 422 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 459 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 422 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:42,596 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 160 Invalid, 459 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 422 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 03:34:42,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-04-28 03:34:42,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 80. [2022-04-28 03:34:42,629 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:42,630 INFO L82 GeneralOperation]: Start isEquivalent. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:42,630 INFO L74 IsIncluded]: Start isIncluded. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:42,630 INFO L87 Difference]: Start difference. First operand 84 states. Second operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:42,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:42,634 INFO L93 Difference]: Finished difference Result 84 states and 108 transitions. [2022-04-28 03:34:42,634 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 108 transitions. [2022-04-28 03:34:42,634 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:42,634 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:42,635 INFO L74 IsIncluded]: Start isIncluded. First operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 84 states. [2022-04-28 03:34:42,635 INFO L87 Difference]: Start difference. First operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 84 states. [2022-04-28 03:34:42,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:42,638 INFO L93 Difference]: Finished difference Result 84 states and 108 transitions. [2022-04-28 03:34:42,638 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 108 transitions. [2022-04-28 03:34:42,638 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:42,638 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:42,638 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:42,638 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:42,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 62 states have (on average 1.2741935483870968) internal successors, (79), 62 states have internal predecessors, (79), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:42,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 102 transitions. [2022-04-28 03:34:42,647 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 102 transitions. Word has length 52 [2022-04-28 03:34:42,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:42,647 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 102 transitions. [2022-04-28 03:34:42,648 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 4.444444444444445) internal successors, (40), 7 states have internal predecessors, (40), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:42,648 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 80 states and 102 transitions. [2022-04-28 03:34:42,775 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:42,776 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 102 transitions. [2022-04-28 03:34:42,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-28 03:34:42,776 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:42,776 INFO L195 NwaCegarLoop]: trace histogram [8, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:42,796 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:42,979 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:42,979 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:42,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:42,980 INFO L85 PathProgramCache]: Analyzing trace with hash -1966742966, now seen corresponding path program 7 times [2022-04-28 03:34:42,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:42,980 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [179706925] [2022-04-28 03:34:42,980 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:42,980 INFO L85 PathProgramCache]: Analyzing trace with hash -1966742966, now seen corresponding path program 8 times [2022-04-28 03:34:42,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:42,981 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1362333614] [2022-04-28 03:34:42,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:42,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:43,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:43,121 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:43,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:43,131 INFO L290 TraceCheckUtils]: 0: Hoare triple {4543#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4522#true} is VALID [2022-04-28 03:34:43,132 INFO L290 TraceCheckUtils]: 1: Hoare triple {4522#true} assume true; {4522#true} is VALID [2022-04-28 03:34:43,132 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4522#true} {4522#true} #682#return; {4522#true} is VALID [2022-04-28 03:34:43,135 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:43,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:43,297 INFO L290 TraceCheckUtils]: 0: Hoare triple {4544#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:43,299 INFO L290 TraceCheckUtils]: 1: Hoare triple {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4546#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:43,300 INFO L290 TraceCheckUtils]: 2: Hoare triple {4546#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4547#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:43,301 INFO L290 TraceCheckUtils]: 3: Hoare triple {4547#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4548#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:43,302 INFO L290 TraceCheckUtils]: 4: Hoare triple {4548#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4549#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:34:43,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {4549#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:43,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:43,305 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {4522#true} #672#return; {4523#false} is VALID [2022-04-28 03:34:43,306 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2022-04-28 03:34:43,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:43,328 INFO L290 TraceCheckUtils]: 0: Hoare triple {4544#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4522#true} is VALID [2022-04-28 03:34:43,329 INFO L290 TraceCheckUtils]: 1: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:43,329 INFO L290 TraceCheckUtils]: 2: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:43,329 INFO L290 TraceCheckUtils]: 3: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:43,329 INFO L290 TraceCheckUtils]: 4: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:43,329 INFO L290 TraceCheckUtils]: 5: Hoare triple {4522#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4522#true} is VALID [2022-04-28 03:34:43,329 INFO L290 TraceCheckUtils]: 6: Hoare triple {4522#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4522#true} is VALID [2022-04-28 03:34:43,329 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {4522#true} {4523#false} #656#return; {4523#false} is VALID [2022-04-28 03:34:43,330 INFO L272 TraceCheckUtils]: 0: Hoare triple {4522#true} call ULTIMATE.init(); {4543#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:43,330 INFO L290 TraceCheckUtils]: 1: Hoare triple {4543#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4522#true} is VALID [2022-04-28 03:34:43,330 INFO L290 TraceCheckUtils]: 2: Hoare triple {4522#true} assume true; {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4522#true} {4522#true} #682#return; {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L272 TraceCheckUtils]: 4: Hoare triple {4522#true} call #t~ret187 := main(); {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L290 TraceCheckUtils]: 5: Hoare triple {4522#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L272 TraceCheckUtils]: 6: Hoare triple {4522#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L290 TraceCheckUtils]: 7: Hoare triple {4522#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L290 TraceCheckUtils]: 8: Hoare triple {4522#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L290 TraceCheckUtils]: 9: Hoare triple {4522#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L290 TraceCheckUtils]: 10: Hoare triple {4522#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L290 TraceCheckUtils]: 11: Hoare triple {4522#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:43,331 INFO L290 TraceCheckUtils]: 12: Hoare triple {4522#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4522#true} is VALID [2022-04-28 03:34:43,332 INFO L290 TraceCheckUtils]: 13: Hoare triple {4522#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:43,332 INFO L290 TraceCheckUtils]: 14: Hoare triple {4522#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4522#true} is VALID [2022-04-28 03:34:43,332 INFO L290 TraceCheckUtils]: 15: Hoare triple {4522#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4522#true} is VALID [2022-04-28 03:34:43,333 INFO L272 TraceCheckUtils]: 16: Hoare triple {4522#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4544#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:43,334 INFO L290 TraceCheckUtils]: 17: Hoare triple {4544#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:43,335 INFO L290 TraceCheckUtils]: 18: Hoare triple {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4546#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:43,336 INFO L290 TraceCheckUtils]: 19: Hoare triple {4546#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4547#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:43,338 INFO L290 TraceCheckUtils]: 20: Hoare triple {4547#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4548#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:43,339 INFO L290 TraceCheckUtils]: 21: Hoare triple {4548#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4549#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:34:43,341 INFO L290 TraceCheckUtils]: 22: Hoare triple {4549#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 4) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:43,341 INFO L290 TraceCheckUtils]: 23: Hoare triple {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:43,352 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4550#(or (<= |#Ultimate.C_memset_#amount| 4) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {4522#true} #672#return; {4523#false} is VALID [2022-04-28 03:34:43,352 INFO L290 TraceCheckUtils]: 25: Hoare triple {4523#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4523#false} is VALID [2022-04-28 03:34:43,352 INFO L290 TraceCheckUtils]: 26: Hoare triple {4523#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 27: Hoare triple {4523#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 28: Hoare triple {4523#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 29: Hoare triple {4523#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 30: Hoare triple {4523#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 31: Hoare triple {4523#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 32: Hoare triple {4523#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 33: Hoare triple {4523#false} assume #t~short172; {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 34: Hoare triple {4523#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 35: Hoare triple {4523#false} assume 0 != #t~mem173;havoc #t~mem173; {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L272 TraceCheckUtils]: 36: Hoare triple {4523#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4523#false} is VALID [2022-04-28 03:34:43,353 INFO L290 TraceCheckUtils]: 37: Hoare triple {4523#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4523#false} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 38: Hoare triple {4523#false} assume !(~len <= 0); {4523#false} is VALID [2022-04-28 03:34:43,354 INFO L272 TraceCheckUtils]: 39: Hoare triple {4523#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4544#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 40: Hoare triple {4544#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4522#true} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 41: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 42: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 43: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 44: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 45: Hoare triple {4522#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4522#true} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 46: Hoare triple {4522#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4522#true} is VALID [2022-04-28 03:34:43,354 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4522#true} {4523#false} #656#return; {4523#false} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 48: Hoare triple {4523#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4523#false} is VALID [2022-04-28 03:34:43,354 INFO L290 TraceCheckUtils]: 49: Hoare triple {4523#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4523#false} is VALID [2022-04-28 03:34:43,355 INFO L272 TraceCheckUtils]: 50: Hoare triple {4523#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4523#false} is VALID [2022-04-28 03:34:43,355 INFO L290 TraceCheckUtils]: 51: Hoare triple {4523#false} ~cond := #in~cond; {4523#false} is VALID [2022-04-28 03:34:43,355 INFO L290 TraceCheckUtils]: 52: Hoare triple {4523#false} assume 0 == ~cond; {4523#false} is VALID [2022-04-28 03:34:43,355 INFO L290 TraceCheckUtils]: 53: Hoare triple {4523#false} assume !false; {4523#false} is VALID [2022-04-28 03:34:43,355 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-28 03:34:43,355 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:43,355 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1362333614] [2022-04-28 03:34:43,355 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1362333614] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:43,356 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1981016771] [2022-04-28 03:34:43,356 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 03:34:43,356 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:43,356 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:43,357 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:43,358 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-28 03:34:44,107 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 03:34:44,107 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:34:44,112 INFO L263 TraceCheckSpWp]: Trace formula consists of 737 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-28 03:34:44,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:44,135 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:44,794 INFO L272 TraceCheckUtils]: 0: Hoare triple {4522#true} call ULTIMATE.init(); {4522#true} is VALID [2022-04-28 03:34:44,795 INFO L290 TraceCheckUtils]: 1: Hoare triple {4522#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4522#true} is VALID [2022-04-28 03:34:44,795 INFO L290 TraceCheckUtils]: 2: Hoare triple {4522#true} assume true; {4522#true} is VALID [2022-04-28 03:34:44,795 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4522#true} {4522#true} #682#return; {4522#true} is VALID [2022-04-28 03:34:44,795 INFO L272 TraceCheckUtils]: 4: Hoare triple {4522#true} call #t~ret187 := main(); {4522#true} is VALID [2022-04-28 03:34:44,795 INFO L290 TraceCheckUtils]: 5: Hoare triple {4522#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4522#true} is VALID [2022-04-28 03:34:44,795 INFO L272 TraceCheckUtils]: 6: Hoare triple {4522#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4522#true} is VALID [2022-04-28 03:34:44,795 INFO L290 TraceCheckUtils]: 7: Hoare triple {4522#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4522#true} is VALID [2022-04-28 03:34:44,795 INFO L290 TraceCheckUtils]: 8: Hoare triple {4522#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4522#true} is VALID [2022-04-28 03:34:44,796 INFO L290 TraceCheckUtils]: 9: Hoare triple {4522#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:44,796 INFO L290 TraceCheckUtils]: 10: Hoare triple {4522#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4522#true} is VALID [2022-04-28 03:34:44,796 INFO L290 TraceCheckUtils]: 11: Hoare triple {4522#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:44,796 INFO L290 TraceCheckUtils]: 12: Hoare triple {4522#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4522#true} is VALID [2022-04-28 03:34:44,796 INFO L290 TraceCheckUtils]: 13: Hoare triple {4522#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:44,796 INFO L290 TraceCheckUtils]: 14: Hoare triple {4522#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4522#true} is VALID [2022-04-28 03:34:44,796 INFO L290 TraceCheckUtils]: 15: Hoare triple {4522#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4522#true} is VALID [2022-04-28 03:34:44,796 INFO L272 TraceCheckUtils]: 16: Hoare triple {4522#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4522#true} is VALID [2022-04-28 03:34:44,797 INFO L290 TraceCheckUtils]: 17: Hoare triple {4522#true} #t~loopctr188 := 0; {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:44,798 INFO L290 TraceCheckUtils]: 18: Hoare triple {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4608#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:44,799 INFO L290 TraceCheckUtils]: 19: Hoare triple {4608#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4612#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:44,800 INFO L290 TraceCheckUtils]: 20: Hoare triple {4612#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4616#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:34:44,800 INFO L290 TraceCheckUtils]: 21: Hoare triple {4616#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:44,800 INFO L290 TraceCheckUtils]: 22: Hoare triple {4522#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4522#true} is VALID [2022-04-28 03:34:44,800 INFO L290 TraceCheckUtils]: 23: Hoare triple {4522#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4522#true} is VALID [2022-04-28 03:34:44,800 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4522#true} {4522#true} #672#return; {4522#true} is VALID [2022-04-28 03:34:44,800 INFO L290 TraceCheckUtils]: 25: Hoare triple {4522#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4522#true} is VALID [2022-04-28 03:34:44,800 INFO L290 TraceCheckUtils]: 26: Hoare triple {4522#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4522#true} is VALID [2022-04-28 03:34:44,800 INFO L290 TraceCheckUtils]: 27: Hoare triple {4522#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4522#true} is VALID [2022-04-28 03:34:44,801 INFO L290 TraceCheckUtils]: 28: Hoare triple {4522#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4522#true} is VALID [2022-04-28 03:34:44,801 INFO L290 TraceCheckUtils]: 29: Hoare triple {4522#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4522#true} is VALID [2022-04-28 03:34:44,801 INFO L290 TraceCheckUtils]: 30: Hoare triple {4522#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4522#true} is VALID [2022-04-28 03:34:44,801 INFO L290 TraceCheckUtils]: 31: Hoare triple {4522#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4522#true} is VALID [2022-04-28 03:34:44,801 INFO L290 TraceCheckUtils]: 32: Hoare triple {4522#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4522#true} is VALID [2022-04-28 03:34:44,801 INFO L290 TraceCheckUtils]: 33: Hoare triple {4522#true} assume #t~short172; {4522#true} is VALID [2022-04-28 03:34:44,802 INFO L290 TraceCheckUtils]: 34: Hoare triple {4522#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:44,802 INFO L290 TraceCheckUtils]: 35: Hoare triple {4522#true} assume 0 != #t~mem173;havoc #t~mem173; {4522#true} is VALID [2022-04-28 03:34:44,802 INFO L272 TraceCheckUtils]: 36: Hoare triple {4522#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4522#true} is VALID [2022-04-28 03:34:44,802 INFO L290 TraceCheckUtils]: 37: Hoare triple {4522#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4522#true} is VALID [2022-04-28 03:34:44,802 INFO L290 TraceCheckUtils]: 38: Hoare triple {4522#true} assume !(~len <= 0); {4522#true} is VALID [2022-04-28 03:34:44,802 INFO L272 TraceCheckUtils]: 39: Hoare triple {4522#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4522#true} is VALID [2022-04-28 03:34:44,803 INFO L290 TraceCheckUtils]: 40: Hoare triple {4522#true} #t~loopctr188 := 0; {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:44,804 INFO L290 TraceCheckUtils]: 41: Hoare triple {4545#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4608#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:44,805 INFO L290 TraceCheckUtils]: 42: Hoare triple {4608#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4612#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:44,806 INFO L290 TraceCheckUtils]: 43: Hoare triple {4612#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4616#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:34:44,807 INFO L290 TraceCheckUtils]: 44: Hoare triple {4616#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4689#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:44,809 INFO L290 TraceCheckUtils]: 45: Hoare triple {4689#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4693#(< (div (+ (- 4294967300) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967300) 4294967296) 1))} is VALID [2022-04-28 03:34:44,809 INFO L290 TraceCheckUtils]: 46: Hoare triple {4693#(< (div (+ (- 4294967300) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967300) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4693#(< (div (+ (- 4294967300) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967300) 4294967296) 1))} is VALID [2022-04-28 03:34:44,811 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4693#(< (div (+ (- 4294967300) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967300) 4294967296) 1))} {4522#true} #656#return; {4523#false} is VALID [2022-04-28 03:34:44,811 INFO L290 TraceCheckUtils]: 48: Hoare triple {4523#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4523#false} is VALID [2022-04-28 03:34:44,811 INFO L290 TraceCheckUtils]: 49: Hoare triple {4523#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4523#false} is VALID [2022-04-28 03:34:44,811 INFO L272 TraceCheckUtils]: 50: Hoare triple {4523#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4523#false} is VALID [2022-04-28 03:34:44,811 INFO L290 TraceCheckUtils]: 51: Hoare triple {4523#false} ~cond := #in~cond; {4523#false} is VALID [2022-04-28 03:34:44,811 INFO L290 TraceCheckUtils]: 52: Hoare triple {4523#false} assume 0 == ~cond; {4523#false} is VALID [2022-04-28 03:34:44,811 INFO L290 TraceCheckUtils]: 53: Hoare triple {4523#false} assume !false; {4523#false} is VALID [2022-04-28 03:34:44,812 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 7 proven. 36 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-04-28 03:34:44,812 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:45,287 INFO L290 TraceCheckUtils]: 53: Hoare triple {4523#false} assume !false; {4523#false} is VALID [2022-04-28 03:34:45,287 INFO L290 TraceCheckUtils]: 52: Hoare triple {4523#false} assume 0 == ~cond; {4523#false} is VALID [2022-04-28 03:34:45,287 INFO L290 TraceCheckUtils]: 51: Hoare triple {4523#false} ~cond := #in~cond; {4523#false} is VALID [2022-04-28 03:34:45,287 INFO L272 TraceCheckUtils]: 50: Hoare triple {4523#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4523#false} is VALID [2022-04-28 03:34:45,287 INFO L290 TraceCheckUtils]: 49: Hoare triple {4523#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4523#false} is VALID [2022-04-28 03:34:45,288 INFO L290 TraceCheckUtils]: 48: Hoare triple {4523#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4523#false} is VALID [2022-04-28 03:34:45,288 INFO L284 TraceCheckUtils]: 47: Hoare quadruple {4739#(not (= |#Ultimate.C_memset_#amount| 80))} {4522#true} #656#return; {4523#false} is VALID [2022-04-28 03:34:45,289 INFO L290 TraceCheckUtils]: 46: Hoare triple {4739#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4739#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:34:45,289 INFO L290 TraceCheckUtils]: 45: Hoare triple {4746#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4739#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:34:45,290 INFO L290 TraceCheckUtils]: 44: Hoare triple {4750#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4746#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:34:45,292 INFO L290 TraceCheckUtils]: 43: Hoare triple {4754#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4750#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:45,293 INFO L290 TraceCheckUtils]: 42: Hoare triple {4758#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4754#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:45,294 INFO L290 TraceCheckUtils]: 41: Hoare triple {4762#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4758#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:34:45,295 INFO L290 TraceCheckUtils]: 40: Hoare triple {4522#true} #t~loopctr188 := 0; {4762#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:34:45,295 INFO L272 TraceCheckUtils]: 39: Hoare triple {4522#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4522#true} is VALID [2022-04-28 03:34:45,295 INFO L290 TraceCheckUtils]: 38: Hoare triple {4522#true} assume !(~len <= 0); {4522#true} is VALID [2022-04-28 03:34:45,295 INFO L290 TraceCheckUtils]: 37: Hoare triple {4522#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4522#true} is VALID [2022-04-28 03:34:45,295 INFO L272 TraceCheckUtils]: 36: Hoare triple {4522#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4522#true} is VALID [2022-04-28 03:34:45,295 INFO L290 TraceCheckUtils]: 35: Hoare triple {4522#true} assume 0 != #t~mem173;havoc #t~mem173; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 34: Hoare triple {4522#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 33: Hoare triple {4522#true} assume #t~short172; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 32: Hoare triple {4522#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 31: Hoare triple {4522#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 30: Hoare triple {4522#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 29: Hoare triple {4522#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 28: Hoare triple {4522#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 27: Hoare triple {4522#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 26: Hoare triple {4522#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 25: Hoare triple {4522#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4522#true} {4522#true} #672#return; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 23: Hoare triple {4522#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 22: Hoare triple {4522#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 21: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 20: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 19: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:45,296 INFO L290 TraceCheckUtils]: 18: Hoare triple {4522#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 17: Hoare triple {4522#true} #t~loopctr188 := 0; {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L272 TraceCheckUtils]: 16: Hoare triple {4522#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 15: Hoare triple {4522#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 14: Hoare triple {4522#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 13: Hoare triple {4522#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 12: Hoare triple {4522#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 11: Hoare triple {4522#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 10: Hoare triple {4522#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 9: Hoare triple {4522#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 8: Hoare triple {4522#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 7: Hoare triple {4522#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L272 TraceCheckUtils]: 6: Hoare triple {4522#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L290 TraceCheckUtils]: 5: Hoare triple {4522#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L272 TraceCheckUtils]: 4: Hoare triple {4522#true} call #t~ret187 := main(); {4522#true} is VALID [2022-04-28 03:34:45,297 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4522#true} {4522#true} #682#return; {4522#true} is VALID [2022-04-28 03:34:45,298 INFO L290 TraceCheckUtils]: 2: Hoare triple {4522#true} assume true; {4522#true} is VALID [2022-04-28 03:34:45,298 INFO L290 TraceCheckUtils]: 1: Hoare triple {4522#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4522#true} is VALID [2022-04-28 03:34:45,298 INFO L272 TraceCheckUtils]: 0: Hoare triple {4522#true} call ULTIMATE.init(); {4522#true} is VALID [2022-04-28 03:34:45,298 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 27 proven. 10 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-28 03:34:45,298 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1981016771] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:45,298 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:45,299 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 21 [2022-04-28 03:34:45,299 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:45,299 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [179706925] [2022-04-28 03:34:45,299 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [179706925] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:45,299 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:45,299 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-28 03:34:45,299 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1484821648] [2022-04-28 03:34:45,299 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:45,300 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 54 [2022-04-28 03:34:45,300 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:45,300 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:45,354 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:45,354 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-28 03:34:45,355 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:45,355 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-28 03:34:45,355 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=311, Unknown=0, NotChecked=0, Total=420 [2022-04-28 03:34:45,355 INFO L87 Difference]: Start difference. First operand 80 states and 102 transitions. Second operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:47,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:47,111 INFO L93 Difference]: Finished difference Result 148 states and 192 transitions. [2022-04-28 03:34:47,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-28 03:34:47,111 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 54 [2022-04-28 03:34:47,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:47,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:47,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 186 transitions. [2022-04-28 03:34:47,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:47,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 186 transitions. [2022-04-28 03:34:47,118 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 186 transitions. [2022-04-28 03:34:47,292 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 186 edges. 186 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:47,294 INFO L225 Difference]: With dead ends: 148 [2022-04-28 03:34:47,294 INFO L226 Difference]: Without dead ends: 85 [2022-04-28 03:34:47,294 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=181, Invalid=575, Unknown=0, NotChecked=0, Total=756 [2022-04-28 03:34:47,295 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 587 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 626 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 587 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:47,295 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 194 Invalid, 626 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 587 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-28 03:34:47,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-28 03:34:47,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 81. [2022-04-28 03:34:47,319 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:47,319 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:47,320 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:47,320 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:47,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:47,323 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-28 03:34:47,323 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-28 03:34:47,323 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:47,323 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:47,324 INFO L74 IsIncluded]: Start isIncluded. First operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 85 states. [2022-04-28 03:34:47,324 INFO L87 Difference]: Start difference. First operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 85 states. [2022-04-28 03:34:47,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:47,327 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-28 03:34:47,327 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-28 03:34:47,327 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:47,328 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:47,328 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:47,328 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:47,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 63 states have internal predecessors, (80), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:47,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 103 transitions. [2022-04-28 03:34:47,331 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 103 transitions. Word has length 54 [2022-04-28 03:34:47,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:47,331 INFO L495 AbstractCegarLoop]: Abstraction has 81 states and 103 transitions. [2022-04-28 03:34:47,331 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 4.1) internal successors, (41), 8 states have internal predecessors, (41), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:47,331 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 81 states and 103 transitions. [2022-04-28 03:34:47,435 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:47,436 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 103 transitions. [2022-04-28 03:34:47,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-28 03:34:47,436 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:47,436 INFO L195 NwaCegarLoop]: trace histogram [10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:47,459 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:47,651 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:47,652 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:47,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:47,652 INFO L85 PathProgramCache]: Analyzing trace with hash -127655584, now seen corresponding path program 9 times [2022-04-28 03:34:47,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:47,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2132745848] [2022-04-28 03:34:47,653 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:47,653 INFO L85 PathProgramCache]: Analyzing trace with hash -127655584, now seen corresponding path program 10 times [2022-04-28 03:34:47,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:47,653 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47502304] [2022-04-28 03:34:47,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:47,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:47,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:47,735 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:47,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:47,745 INFO L290 TraceCheckUtils]: 0: Hoare triple {5551#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5528#true} is VALID [2022-04-28 03:34:47,745 INFO L290 TraceCheckUtils]: 1: Hoare triple {5528#true} assume true; {5528#true} is VALID [2022-04-28 03:34:47,745 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5528#true} {5528#true} #682#return; {5528#true} is VALID [2022-04-28 03:34:47,748 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:47,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:47,947 INFO L290 TraceCheckUtils]: 0: Hoare triple {5552#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:47,948 INFO L290 TraceCheckUtils]: 1: Hoare triple {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:47,949 INFO L290 TraceCheckUtils]: 2: Hoare triple {5554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5555#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:47,950 INFO L290 TraceCheckUtils]: 3: Hoare triple {5555#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5556#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:47,951 INFO L290 TraceCheckUtils]: 4: Hoare triple {5556#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5557#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:47,953 INFO L290 TraceCheckUtils]: 5: Hoare triple {5557#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5558#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 5)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:34:47,954 INFO L290 TraceCheckUtils]: 6: Hoare triple {5558#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 5)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-28 03:34:47,955 INFO L290 TraceCheckUtils]: 7: Hoare triple {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-28 03:34:47,956 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} {5528#true} #672#return; {5529#false} is VALID [2022-04-28 03:34:47,956 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-28 03:34:47,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:47,968 INFO L290 TraceCheckUtils]: 0: Hoare triple {5552#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5528#true} is VALID [2022-04-28 03:34:47,968 INFO L290 TraceCheckUtils]: 1: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,968 INFO L290 TraceCheckUtils]: 2: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,968 INFO L290 TraceCheckUtils]: 3: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,968 INFO L290 TraceCheckUtils]: 4: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,969 INFO L290 TraceCheckUtils]: 5: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,969 INFO L290 TraceCheckUtils]: 6: Hoare triple {5528#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5528#true} is VALID [2022-04-28 03:34:47,969 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5528#true} is VALID [2022-04-28 03:34:47,969 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {5528#true} {5529#false} #656#return; {5529#false} is VALID [2022-04-28 03:34:47,970 INFO L272 TraceCheckUtils]: 0: Hoare triple {5528#true} call ULTIMATE.init(); {5551#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:47,970 INFO L290 TraceCheckUtils]: 1: Hoare triple {5551#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5528#true} is VALID [2022-04-28 03:34:47,970 INFO L290 TraceCheckUtils]: 2: Hoare triple {5528#true} assume true; {5528#true} is VALID [2022-04-28 03:34:47,970 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5528#true} {5528#true} #682#return; {5528#true} is VALID [2022-04-28 03:34:47,970 INFO L272 TraceCheckUtils]: 4: Hoare triple {5528#true} call #t~ret187 := main(); {5528#true} is VALID [2022-04-28 03:34:47,970 INFO L290 TraceCheckUtils]: 5: Hoare triple {5528#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L272 TraceCheckUtils]: 6: Hoare triple {5528#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 8: Hoare triple {5528#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 9: Hoare triple {5528#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 10: Hoare triple {5528#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 11: Hoare triple {5528#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 12: Hoare triple {5528#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 13: Hoare triple {5528#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 14: Hoare triple {5528#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5528#true} is VALID [2022-04-28 03:34:47,971 INFO L290 TraceCheckUtils]: 15: Hoare triple {5528#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5528#true} is VALID [2022-04-28 03:34:47,972 INFO L272 TraceCheckUtils]: 16: Hoare triple {5528#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {5552#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:47,973 INFO L290 TraceCheckUtils]: 17: Hoare triple {5552#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:47,974 INFO L290 TraceCheckUtils]: 18: Hoare triple {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:47,976 INFO L290 TraceCheckUtils]: 19: Hoare triple {5554#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5555#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:47,977 INFO L290 TraceCheckUtils]: 20: Hoare triple {5555#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5556#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:47,979 INFO L290 TraceCheckUtils]: 21: Hoare triple {5556#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5557#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:47,980 INFO L290 TraceCheckUtils]: 22: Hoare triple {5557#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5558#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 5)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:34:47,981 INFO L290 TraceCheckUtils]: 23: Hoare triple {5558#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 5)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-28 03:34:47,982 INFO L290 TraceCheckUtils]: 24: Hoare triple {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} is VALID [2022-04-28 03:34:47,983 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5559#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 5))} {5528#true} #672#return; {5529#false} is VALID [2022-04-28 03:34:47,983 INFO L290 TraceCheckUtils]: 26: Hoare triple {5529#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 27: Hoare triple {5529#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 28: Hoare triple {5529#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 29: Hoare triple {5529#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 30: Hoare triple {5529#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 31: Hoare triple {5529#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 32: Hoare triple {5529#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 33: Hoare triple {5529#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 34: Hoare triple {5529#false} assume #t~short172; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 35: Hoare triple {5529#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L290 TraceCheckUtils]: 36: Hoare triple {5529#false} assume 0 != #t~mem173;havoc #t~mem173; {5529#false} is VALID [2022-04-28 03:34:47,984 INFO L272 TraceCheckUtils]: 37: Hoare triple {5529#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5529#false} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 38: Hoare triple {5529#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5529#false} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 39: Hoare triple {5529#false} assume !(~len <= 0); {5529#false} is VALID [2022-04-28 03:34:47,985 INFO L272 TraceCheckUtils]: 40: Hoare triple {5529#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5552#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 41: Hoare triple {5552#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5528#true} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 42: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 43: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 44: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 45: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 46: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 47: Hoare triple {5528#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5528#true} is VALID [2022-04-28 03:34:47,985 INFO L290 TraceCheckUtils]: 48: Hoare triple {5528#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5528#true} is VALID [2022-04-28 03:34:47,985 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5528#true} {5529#false} #656#return; {5529#false} is VALID [2022-04-28 03:34:47,986 INFO L290 TraceCheckUtils]: 50: Hoare triple {5529#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5529#false} is VALID [2022-04-28 03:34:47,986 INFO L290 TraceCheckUtils]: 51: Hoare triple {5529#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5529#false} is VALID [2022-04-28 03:34:47,986 INFO L272 TraceCheckUtils]: 52: Hoare triple {5529#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5529#false} is VALID [2022-04-28 03:34:47,986 INFO L290 TraceCheckUtils]: 53: Hoare triple {5529#false} ~cond := #in~cond; {5529#false} is VALID [2022-04-28 03:34:47,986 INFO L290 TraceCheckUtils]: 54: Hoare triple {5529#false} assume 0 == ~cond; {5529#false} is VALID [2022-04-28 03:34:47,986 INFO L290 TraceCheckUtils]: 55: Hoare triple {5529#false} assume !false; {5529#false} is VALID [2022-04-28 03:34:48,008 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 53 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-28 03:34:48,008 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:48,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47502304] [2022-04-28 03:34:48,008 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [47502304] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:48,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [143892351] [2022-04-28 03:34:48,008 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 03:34:48,008 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:48,008 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:48,012 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:48,040 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-28 03:34:48,251 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 03:34:48,252 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:34:48,256 INFO L263 TraceCheckSpWp]: Trace formula consists of 751 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-28 03:34:48,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:48,273 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:48,657 INFO L272 TraceCheckUtils]: 0: Hoare triple {5528#true} call ULTIMATE.init(); {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {5528#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 2: Hoare triple {5528#true} assume true; {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5528#true} {5528#true} #682#return; {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L272 TraceCheckUtils]: 4: Hoare triple {5528#true} call #t~ret187 := main(); {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 5: Hoare triple {5528#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L272 TraceCheckUtils]: 6: Hoare triple {5528#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 8: Hoare triple {5528#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 9: Hoare triple {5528#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 10: Hoare triple {5528#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 11: Hoare triple {5528#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 12: Hoare triple {5528#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5528#true} is VALID [2022-04-28 03:34:48,658 INFO L290 TraceCheckUtils]: 13: Hoare triple {5528#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:48,659 INFO L290 TraceCheckUtils]: 14: Hoare triple {5528#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5528#true} is VALID [2022-04-28 03:34:48,659 INFO L290 TraceCheckUtils]: 15: Hoare triple {5528#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5528#true} is VALID [2022-04-28 03:34:48,659 INFO L272 TraceCheckUtils]: 16: Hoare triple {5528#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {5528#true} is VALID [2022-04-28 03:34:48,659 INFO L290 TraceCheckUtils]: 17: Hoare triple {5528#true} #t~loopctr188 := 0; {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:48,660 INFO L290 TraceCheckUtils]: 18: Hoare triple {5553#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5617#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:48,667 INFO L290 TraceCheckUtils]: 19: Hoare triple {5617#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5621#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:48,668 INFO L290 TraceCheckUtils]: 20: Hoare triple {5621#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5625#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:34:48,669 INFO L290 TraceCheckUtils]: 21: Hoare triple {5625#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5629#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:48,670 INFO L290 TraceCheckUtils]: 22: Hoare triple {5629#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5633#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:34:48,671 INFO L290 TraceCheckUtils]: 23: Hoare triple {5633#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5637#(< 0 (+ (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-28 03:34:48,672 INFO L290 TraceCheckUtils]: 24: Hoare triple {5637#(< 0 (+ (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5637#(< 0 (+ (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-28 03:34:48,673 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5637#(< 0 (+ (div (+ 5 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} {5528#true} #672#return; {5529#false} is VALID [2022-04-28 03:34:48,673 INFO L290 TraceCheckUtils]: 26: Hoare triple {5529#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5529#false} is VALID [2022-04-28 03:34:48,673 INFO L290 TraceCheckUtils]: 27: Hoare triple {5529#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {5529#false} is VALID [2022-04-28 03:34:48,673 INFO L290 TraceCheckUtils]: 28: Hoare triple {5529#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5529#false} is VALID [2022-04-28 03:34:48,673 INFO L290 TraceCheckUtils]: 29: Hoare triple {5529#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5529#false} is VALID [2022-04-28 03:34:48,673 INFO L290 TraceCheckUtils]: 30: Hoare triple {5529#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5529#false} is VALID [2022-04-28 03:34:48,673 INFO L290 TraceCheckUtils]: 31: Hoare triple {5529#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5529#false} is VALID [2022-04-28 03:34:48,673 INFO L290 TraceCheckUtils]: 32: Hoare triple {5529#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 33: Hoare triple {5529#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 34: Hoare triple {5529#false} assume #t~short172; {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 35: Hoare triple {5529#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 36: Hoare triple {5529#false} assume 0 != #t~mem173;havoc #t~mem173; {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L272 TraceCheckUtils]: 37: Hoare triple {5529#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 38: Hoare triple {5529#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 39: Hoare triple {5529#false} assume !(~len <= 0); {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L272 TraceCheckUtils]: 40: Hoare triple {5529#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 41: Hoare triple {5529#false} #t~loopctr188 := 0; {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 42: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 43: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-28 03:34:48,674 INFO L290 TraceCheckUtils]: 44: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 45: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 46: Hoare triple {5529#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 47: Hoare triple {5529#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 48: Hoare triple {5529#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5529#false} {5529#false} #656#return; {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 50: Hoare triple {5529#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 51: Hoare triple {5529#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L272 TraceCheckUtils]: 52: Hoare triple {5529#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 53: Hoare triple {5529#false} ~cond := #in~cond; {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 54: Hoare triple {5529#false} assume 0 == ~cond; {5529#false} is VALID [2022-04-28 03:34:48,675 INFO L290 TraceCheckUtils]: 55: Hoare triple {5529#false} assume !false; {5529#false} is VALID [2022-04-28 03:34:48,676 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 39 proven. 15 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-28 03:34:48,676 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:49,101 INFO L290 TraceCheckUtils]: 55: Hoare triple {5529#false} assume !false; {5529#false} is VALID [2022-04-28 03:34:49,101 INFO L290 TraceCheckUtils]: 54: Hoare triple {5529#false} assume 0 == ~cond; {5529#false} is VALID [2022-04-28 03:34:49,101 INFO L290 TraceCheckUtils]: 53: Hoare triple {5529#false} ~cond := #in~cond; {5529#false} is VALID [2022-04-28 03:34:49,101 INFO L272 TraceCheckUtils]: 52: Hoare triple {5529#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5529#false} is VALID [2022-04-28 03:34:49,101 INFO L290 TraceCheckUtils]: 51: Hoare triple {5529#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5529#false} is VALID [2022-04-28 03:34:49,101 INFO L290 TraceCheckUtils]: 50: Hoare triple {5529#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5529#false} is VALID [2022-04-28 03:34:49,101 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {5528#true} {5529#false} #656#return; {5529#false} is VALID [2022-04-28 03:34:49,101 INFO L290 TraceCheckUtils]: 48: Hoare triple {5528#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 47: Hoare triple {5528#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 46: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 45: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 44: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 43: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 42: Hoare triple {5528#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 41: Hoare triple {5528#true} #t~loopctr188 := 0; {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L272 TraceCheckUtils]: 40: Hoare triple {5529#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5528#true} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 39: Hoare triple {5529#false} assume !(~len <= 0); {5529#false} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 38: Hoare triple {5529#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5529#false} is VALID [2022-04-28 03:34:49,102 INFO L272 TraceCheckUtils]: 37: Hoare triple {5529#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5529#false} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 36: Hoare triple {5529#false} assume 0 != #t~mem173;havoc #t~mem173; {5529#false} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 35: Hoare triple {5529#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5529#false} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 34: Hoare triple {5529#false} assume #t~short172; {5529#false} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 33: Hoare triple {5529#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5529#false} is VALID [2022-04-28 03:34:49,102 INFO L290 TraceCheckUtils]: 32: Hoare triple {5529#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5529#false} is VALID [2022-04-28 03:34:49,103 INFO L290 TraceCheckUtils]: 31: Hoare triple {5529#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5529#false} is VALID [2022-04-28 03:34:49,103 INFO L290 TraceCheckUtils]: 30: Hoare triple {5529#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5529#false} is VALID [2022-04-28 03:34:49,103 INFO L290 TraceCheckUtils]: 29: Hoare triple {5529#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5529#false} is VALID [2022-04-28 03:34:49,103 INFO L290 TraceCheckUtils]: 28: Hoare triple {5529#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5529#false} is VALID [2022-04-28 03:34:49,103 INFO L290 TraceCheckUtils]: 27: Hoare triple {5529#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {5529#false} is VALID [2022-04-28 03:34:49,103 INFO L290 TraceCheckUtils]: 26: Hoare triple {5529#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5529#false} is VALID [2022-04-28 03:34:49,104 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {5827#(not (= |#Ultimate.C_memset_#amount| 24))} {5528#true} #672#return; {5529#false} is VALID [2022-04-28 03:34:49,104 INFO L290 TraceCheckUtils]: 24: Hoare triple {5827#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5827#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:34:49,105 INFO L290 TraceCheckUtils]: 23: Hoare triple {5834#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5827#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:34:49,106 INFO L290 TraceCheckUtils]: 22: Hoare triple {5838#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5834#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:49,107 INFO L290 TraceCheckUtils]: 21: Hoare triple {5842#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5838#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:49,108 INFO L290 TraceCheckUtils]: 20: Hoare triple {5846#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5842#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:49,109 INFO L290 TraceCheckUtils]: 19: Hoare triple {5850#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5846#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:49,110 INFO L290 TraceCheckUtils]: 18: Hoare triple {5854#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5850#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 17: Hoare triple {5528#true} #t~loopctr188 := 0; {5854#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:49,111 INFO L272 TraceCheckUtils]: 16: Hoare triple {5528#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 15: Hoare triple {5528#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 14: Hoare triple {5528#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 13: Hoare triple {5528#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 12: Hoare triple {5528#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 11: Hoare triple {5528#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 10: Hoare triple {5528#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 9: Hoare triple {5528#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 8: Hoare triple {5528#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L272 TraceCheckUtils]: 6: Hoare triple {5528#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {5528#true} is VALID [2022-04-28 03:34:49,111 INFO L290 TraceCheckUtils]: 5: Hoare triple {5528#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5528#true} is VALID [2022-04-28 03:34:49,112 INFO L272 TraceCheckUtils]: 4: Hoare triple {5528#true} call #t~ret187 := main(); {5528#true} is VALID [2022-04-28 03:34:49,112 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5528#true} {5528#true} #682#return; {5528#true} is VALID [2022-04-28 03:34:49,112 INFO L290 TraceCheckUtils]: 2: Hoare triple {5528#true} assume true; {5528#true} is VALID [2022-04-28 03:34:49,112 INFO L290 TraceCheckUtils]: 1: Hoare triple {5528#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5528#true} is VALID [2022-04-28 03:34:49,112 INFO L272 TraceCheckUtils]: 0: Hoare triple {5528#true} call ULTIMATE.init(); {5528#true} is VALID [2022-04-28 03:34:49,112 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 53 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-28 03:34:49,112 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [143892351] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:49,112 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:49,112 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 24 [2022-04-28 03:34:49,112 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:49,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2132745848] [2022-04-28 03:34:49,113 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2132745848] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:49,113 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:49,113 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-04-28 03:34:49,113 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422269147] [2022-04-28 03:34:49,113 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:49,113 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 56 [2022-04-28 03:34:49,114 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:49,114 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:49,157 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:49,157 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-28 03:34:49,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:49,158 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-28 03:34:49,158 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=413, Unknown=0, NotChecked=0, Total=552 [2022-04-28 03:34:49,158 INFO L87 Difference]: Start difference. First operand 81 states and 103 transitions. Second operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:50,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:50,583 INFO L93 Difference]: Finished difference Result 150 states and 194 transitions. [2022-04-28 03:34:50,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-28 03:34:50,583 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 56 [2022-04-28 03:34:50,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:50,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:50,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 187 transitions. [2022-04-28 03:34:50,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:50,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 187 transitions. [2022-04-28 03:34:50,590 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 187 transitions. [2022-04-28 03:34:50,757 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 187 edges. 187 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:50,758 INFO L225 Difference]: With dead ends: 150 [2022-04-28 03:34:50,759 INFO L226 Difference]: Without dead ends: 86 [2022-04-28 03:34:50,759 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 103 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=230, Invalid=762, Unknown=0, NotChecked=0, Total=992 [2022-04-28 03:34:50,760 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 446 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 160 SdHoareTripleChecker+Invalid, 487 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 446 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:50,760 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 160 Invalid, 487 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 446 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-28 03:34:50,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-04-28 03:34:50,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 82. [2022-04-28 03:34:50,780 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:50,781 INFO L82 GeneralOperation]: Start isEquivalent. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:50,781 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:50,781 INFO L87 Difference]: Start difference. First operand 86 states. Second operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:50,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:50,784 INFO L93 Difference]: Finished difference Result 86 states and 110 transitions. [2022-04-28 03:34:50,784 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 110 transitions. [2022-04-28 03:34:50,786 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:50,786 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:50,786 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 86 states. [2022-04-28 03:34:50,787 INFO L87 Difference]: Start difference. First operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 86 states. [2022-04-28 03:34:50,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:50,790 INFO L93 Difference]: Finished difference Result 86 states and 110 transitions. [2022-04-28 03:34:50,790 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 110 transitions. [2022-04-28 03:34:50,790 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:50,790 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:50,790 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:50,790 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:50,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 64 states have (on average 1.265625) internal successors, (81), 64 states have internal predecessors, (81), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:50,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 104 transitions. [2022-04-28 03:34:50,793 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 104 transitions. Word has length 56 [2022-04-28 03:34:50,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:50,793 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 104 transitions. [2022-04-28 03:34:50,794 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 3.8181818181818183) internal successors, (42), 9 states have internal predecessors, (42), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:50,794 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 82 states and 104 transitions. [2022-04-28 03:34:50,909 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 104 edges. 104 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:50,909 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 104 transitions. [2022-04-28 03:34:50,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-04-28 03:34:50,910 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:50,910 INFO L195 NwaCegarLoop]: trace histogram [12, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:50,929 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:51,115 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:51,116 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:51,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:51,116 INFO L85 PathProgramCache]: Analyzing trace with hash -330196214, now seen corresponding path program 11 times [2022-04-28 03:34:51,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:51,116 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1557996356] [2022-04-28 03:34:51,116 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:51,116 INFO L85 PathProgramCache]: Analyzing trace with hash -330196214, now seen corresponding path program 12 times [2022-04-28 03:34:51,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:51,117 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648007558] [2022-04-28 03:34:51,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:51,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:51,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:51,246 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:51,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:51,259 INFO L290 TraceCheckUtils]: 0: Hoare triple {6586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6561#true} is VALID [2022-04-28 03:34:51,260 INFO L290 TraceCheckUtils]: 1: Hoare triple {6561#true} assume true; {6561#true} is VALID [2022-04-28 03:34:51,260 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6561#true} {6561#true} #682#return; {6561#true} is VALID [2022-04-28 03:34:51,262 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:51,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:51,476 INFO L290 TraceCheckUtils]: 0: Hoare triple {6587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:51,477 INFO L290 TraceCheckUtils]: 1: Hoare triple {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:51,478 INFO L290 TraceCheckUtils]: 2: Hoare triple {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:51,479 INFO L290 TraceCheckUtils]: 3: Hoare triple {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:51,480 INFO L290 TraceCheckUtils]: 4: Hoare triple {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:51,481 INFO L290 TraceCheckUtils]: 5: Hoare triple {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:34:51,482 INFO L290 TraceCheckUtils]: 6: Hoare triple {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6594#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} is VALID [2022-04-28 03:34:51,483 INFO L290 TraceCheckUtils]: 7: Hoare triple {6594#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:51,483 INFO L290 TraceCheckUtils]: 8: Hoare triple {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:51,484 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {6561#true} #672#return; {6562#false} is VALID [2022-04-28 03:34:51,484 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 41 [2022-04-28 03:34:51,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:51,498 INFO L290 TraceCheckUtils]: 0: Hoare triple {6587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L290 TraceCheckUtils]: 1: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L290 TraceCheckUtils]: 2: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L290 TraceCheckUtils]: 3: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L290 TraceCheckUtils]: 4: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L290 TraceCheckUtils]: 5: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L290 TraceCheckUtils]: 6: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L290 TraceCheckUtils]: 7: Hoare triple {6561#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L290 TraceCheckUtils]: 8: Hoare triple {6561#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6561#true} is VALID [2022-04-28 03:34:51,499 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {6561#true} {6562#false} #656#return; {6562#false} is VALID [2022-04-28 03:34:51,500 INFO L272 TraceCheckUtils]: 0: Hoare triple {6561#true} call ULTIMATE.init(); {6586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:51,500 INFO L290 TraceCheckUtils]: 1: Hoare triple {6586#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6561#true} is VALID [2022-04-28 03:34:51,500 INFO L290 TraceCheckUtils]: 2: Hoare triple {6561#true} assume true; {6561#true} is VALID [2022-04-28 03:34:51,500 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6561#true} {6561#true} #682#return; {6561#true} is VALID [2022-04-28 03:34:51,500 INFO L272 TraceCheckUtils]: 4: Hoare triple {6561#true} call #t~ret187 := main(); {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 5: Hoare triple {6561#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L272 TraceCheckUtils]: 6: Hoare triple {6561#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 7: Hoare triple {6561#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 8: Hoare triple {6561#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 9: Hoare triple {6561#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 10: Hoare triple {6561#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 11: Hoare triple {6561#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 12: Hoare triple {6561#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 13: Hoare triple {6561#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 14: Hoare triple {6561#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6561#true} is VALID [2022-04-28 03:34:51,501 INFO L290 TraceCheckUtils]: 15: Hoare triple {6561#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6561#true} is VALID [2022-04-28 03:34:51,502 INFO L272 TraceCheckUtils]: 16: Hoare triple {6561#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {6587#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:51,503 INFO L290 TraceCheckUtils]: 17: Hoare triple {6587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:51,504 INFO L290 TraceCheckUtils]: 18: Hoare triple {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:51,505 INFO L290 TraceCheckUtils]: 19: Hoare triple {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:51,507 INFO L290 TraceCheckUtils]: 20: Hoare triple {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:51,508 INFO L290 TraceCheckUtils]: 21: Hoare triple {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:51,509 INFO L290 TraceCheckUtils]: 22: Hoare triple {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:34:51,510 INFO L290 TraceCheckUtils]: 23: Hoare triple {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6594#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} is VALID [2022-04-28 03:34:51,511 INFO L290 TraceCheckUtils]: 24: Hoare triple {6594#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:51,512 INFO L290 TraceCheckUtils]: 25: Hoare triple {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:51,513 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6595#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {6561#true} #672#return; {6562#false} is VALID [2022-04-28 03:34:51,513 INFO L290 TraceCheckUtils]: 27: Hoare triple {6562#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6562#false} is VALID [2022-04-28 03:34:51,513 INFO L290 TraceCheckUtils]: 28: Hoare triple {6562#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {6562#false} is VALID [2022-04-28 03:34:51,513 INFO L290 TraceCheckUtils]: 29: Hoare triple {6562#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6562#false} is VALID [2022-04-28 03:34:51,513 INFO L290 TraceCheckUtils]: 30: Hoare triple {6562#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6562#false} is VALID [2022-04-28 03:34:51,513 INFO L290 TraceCheckUtils]: 31: Hoare triple {6562#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6562#false} is VALID [2022-04-28 03:34:51,513 INFO L290 TraceCheckUtils]: 32: Hoare triple {6562#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6562#false} is VALID [2022-04-28 03:34:51,513 INFO L290 TraceCheckUtils]: 33: Hoare triple {6562#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6562#false} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 34: Hoare triple {6562#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6562#false} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 35: Hoare triple {6562#false} assume #t~short172; {6562#false} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 36: Hoare triple {6562#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6562#false} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 37: Hoare triple {6562#false} assume 0 != #t~mem173;havoc #t~mem173; {6562#false} is VALID [2022-04-28 03:34:51,514 INFO L272 TraceCheckUtils]: 38: Hoare triple {6562#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6562#false} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 39: Hoare triple {6562#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6562#false} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 40: Hoare triple {6562#false} assume !(~len <= 0); {6562#false} is VALID [2022-04-28 03:34:51,514 INFO L272 TraceCheckUtils]: 41: Hoare triple {6562#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6587#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 42: Hoare triple {6587#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {6561#true} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 43: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 44: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 45: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,514 INFO L290 TraceCheckUtils]: 46: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 47: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 48: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 49: Hoare triple {6561#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6561#true} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 50: Hoare triple {6561#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6561#true} is VALID [2022-04-28 03:34:51,515 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6561#true} {6562#false} #656#return; {6562#false} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 52: Hoare triple {6562#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6562#false} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 53: Hoare triple {6562#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6562#false} is VALID [2022-04-28 03:34:51,515 INFO L272 TraceCheckUtils]: 54: Hoare triple {6562#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6562#false} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 55: Hoare triple {6562#false} ~cond := #in~cond; {6562#false} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 56: Hoare triple {6562#false} assume 0 == ~cond; {6562#false} is VALID [2022-04-28 03:34:51,515 INFO L290 TraceCheckUtils]: 57: Hoare triple {6562#false} assume !false; {6562#false} is VALID [2022-04-28 03:34:51,516 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-28 03:34:51,516 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:51,516 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648007558] [2022-04-28 03:34:51,516 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1648007558] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:51,516 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1885496646] [2022-04-28 03:34:51,516 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 03:34:51,516 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:51,517 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:51,520 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:51,549 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-28 03:34:55,758 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-28 03:34:55,758 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:34:55,773 INFO L263 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-28 03:34:55,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:55,791 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:34:56,200 INFO L272 TraceCheckUtils]: 0: Hoare triple {6561#true} call ULTIMATE.init(); {6561#true} is VALID [2022-04-28 03:34:56,200 INFO L290 TraceCheckUtils]: 1: Hoare triple {6561#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L290 TraceCheckUtils]: 2: Hoare triple {6561#true} assume true; {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6561#true} {6561#true} #682#return; {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L272 TraceCheckUtils]: 4: Hoare triple {6561#true} call #t~ret187 := main(); {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L290 TraceCheckUtils]: 5: Hoare triple {6561#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L272 TraceCheckUtils]: 6: Hoare triple {6561#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L290 TraceCheckUtils]: 7: Hoare triple {6561#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L290 TraceCheckUtils]: 8: Hoare triple {6561#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L290 TraceCheckUtils]: 9: Hoare triple {6561#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,201 INFO L290 TraceCheckUtils]: 10: Hoare triple {6561#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 11: Hoare triple {6561#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 12: Hoare triple {6561#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 13: Hoare triple {6561#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 14: Hoare triple {6561#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 15: Hoare triple {6561#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L272 TraceCheckUtils]: 16: Hoare triple {6561#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 17: Hoare triple {6561#true} #t~loopctr188 := 0; {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 18: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 19: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 20: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,202 INFO L290 TraceCheckUtils]: 21: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 22: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 23: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 24: Hoare triple {6561#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 25: Hoare triple {6561#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6561#true} {6561#true} #672#return; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 27: Hoare triple {6561#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 28: Hoare triple {6561#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 29: Hoare triple {6561#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 30: Hoare triple {6561#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 31: Hoare triple {6561#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 32: Hoare triple {6561#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 33: Hoare triple {6561#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 34: Hoare triple {6561#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 35: Hoare triple {6561#true} assume #t~short172; {6561#true} is VALID [2022-04-28 03:34:56,203 INFO L290 TraceCheckUtils]: 36: Hoare triple {6561#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,204 INFO L290 TraceCheckUtils]: 37: Hoare triple {6561#true} assume 0 != #t~mem173;havoc #t~mem173; {6561#true} is VALID [2022-04-28 03:34:56,204 INFO L272 TraceCheckUtils]: 38: Hoare triple {6561#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6561#true} is VALID [2022-04-28 03:34:56,204 INFO L290 TraceCheckUtils]: 39: Hoare triple {6561#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6716#(= |dStrHex_~#buff~0.offset| 0)} is VALID [2022-04-28 03:34:56,204 INFO L290 TraceCheckUtils]: 40: Hoare triple {6716#(= |dStrHex_~#buff~0.offset| 0)} assume !(~len <= 0); {6716#(= |dStrHex_~#buff~0.offset| 0)} is VALID [2022-04-28 03:34:56,204 INFO L272 TraceCheckUtils]: 41: Hoare triple {6716#(= |dStrHex_~#buff~0.offset| 0)} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6561#true} is VALID [2022-04-28 03:34:56,205 INFO L290 TraceCheckUtils]: 42: Hoare triple {6561#true} #t~loopctr188 := 0; {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:56,206 INFO L290 TraceCheckUtils]: 43: Hoare triple {6588#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:56,207 INFO L290 TraceCheckUtils]: 44: Hoare triple {6589#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:56,208 INFO L290 TraceCheckUtils]: 45: Hoare triple {6590#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:56,209 INFO L290 TraceCheckUtils]: 46: Hoare triple {6591#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:56,210 INFO L290 TraceCheckUtils]: 47: Hoare triple {6592#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:34:56,211 INFO L290 TraceCheckUtils]: 48: Hoare triple {6593#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6744#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:34:56,213 INFO L290 TraceCheckUtils]: 49: Hoare triple {6744#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6748#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1)))} is VALID [2022-04-28 03:34:56,213 INFO L290 TraceCheckUtils]: 50: Hoare triple {6748#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6748#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1)))} is VALID [2022-04-28 03:34:56,214 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6748#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (< 0 (+ (div (+ 6 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1)))} {6716#(= |dStrHex_~#buff~0.offset| 0)} #656#return; {6562#false} is VALID [2022-04-28 03:34:56,215 INFO L290 TraceCheckUtils]: 52: Hoare triple {6562#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6562#false} is VALID [2022-04-28 03:34:56,215 INFO L290 TraceCheckUtils]: 53: Hoare triple {6562#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6562#false} is VALID [2022-04-28 03:34:56,215 INFO L272 TraceCheckUtils]: 54: Hoare triple {6562#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6562#false} is VALID [2022-04-28 03:34:56,215 INFO L290 TraceCheckUtils]: 55: Hoare triple {6562#false} ~cond := #in~cond; {6562#false} is VALID [2022-04-28 03:34:56,215 INFO L290 TraceCheckUtils]: 56: Hoare triple {6562#false} assume 0 == ~cond; {6562#false} is VALID [2022-04-28 03:34:56,215 INFO L290 TraceCheckUtils]: 57: Hoare triple {6562#false} assume !false; {6562#false} is VALID [2022-04-28 03:34:56,215 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 51 proven. 21 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-28 03:34:56,215 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:34:56,633 INFO L290 TraceCheckUtils]: 57: Hoare triple {6562#false} assume !false; {6562#false} is VALID [2022-04-28 03:34:56,633 INFO L290 TraceCheckUtils]: 56: Hoare triple {6562#false} assume 0 == ~cond; {6562#false} is VALID [2022-04-28 03:34:56,633 INFO L290 TraceCheckUtils]: 55: Hoare triple {6562#false} ~cond := #in~cond; {6562#false} is VALID [2022-04-28 03:34:56,633 INFO L272 TraceCheckUtils]: 54: Hoare triple {6562#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {6562#false} is VALID [2022-04-28 03:34:56,633 INFO L290 TraceCheckUtils]: 53: Hoare triple {6562#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {6562#false} is VALID [2022-04-28 03:34:56,633 INFO L290 TraceCheckUtils]: 52: Hoare triple {6562#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {6562#false} is VALID [2022-04-28 03:34:56,634 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {6794#(not (= |#Ultimate.C_memset_#amount| 80))} {6561#true} #656#return; {6562#false} is VALID [2022-04-28 03:34:56,634 INFO L290 TraceCheckUtils]: 50: Hoare triple {6794#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6794#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:34:56,635 INFO L290 TraceCheckUtils]: 49: Hoare triple {6801#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6794#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:34:56,636 INFO L290 TraceCheckUtils]: 48: Hoare triple {6805#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6801#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:34:56,637 INFO L290 TraceCheckUtils]: 47: Hoare triple {6809#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6805#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:56,638 INFO L290 TraceCheckUtils]: 46: Hoare triple {6813#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6809#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:56,640 INFO L290 TraceCheckUtils]: 45: Hoare triple {6817#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6813#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:34:56,642 INFO L290 TraceCheckUtils]: 44: Hoare triple {6821#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6817#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:34:56,643 INFO L290 TraceCheckUtils]: 43: Hoare triple {6825#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6821#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:34:56,643 INFO L290 TraceCheckUtils]: 42: Hoare triple {6561#true} #t~loopctr188 := 0; {6825#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:34:56,644 INFO L272 TraceCheckUtils]: 41: Hoare triple {6561#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 40: Hoare triple {6561#true} assume !(~len <= 0); {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 39: Hoare triple {6561#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L272 TraceCheckUtils]: 38: Hoare triple {6561#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 37: Hoare triple {6561#true} assume 0 != #t~mem173;havoc #t~mem173; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 36: Hoare triple {6561#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 35: Hoare triple {6561#true} assume #t~short172; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 34: Hoare triple {6561#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 33: Hoare triple {6561#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 32: Hoare triple {6561#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 31: Hoare triple {6561#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 30: Hoare triple {6561#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 29: Hoare triple {6561#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 28: Hoare triple {6561#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L290 TraceCheckUtils]: 27: Hoare triple {6561#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {6561#true} is VALID [2022-04-28 03:34:56,644 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6561#true} {6561#true} #672#return; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 25: Hoare triple {6561#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 24: Hoare triple {6561#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 23: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 22: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 21: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 20: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 19: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 18: Hoare triple {6561#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 17: Hoare triple {6561#true} #t~loopctr188 := 0; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L272 TraceCheckUtils]: 16: Hoare triple {6561#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 15: Hoare triple {6561#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 14: Hoare triple {6561#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 13: Hoare triple {6561#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 12: Hoare triple {6561#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 11: Hoare triple {6561#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 10: Hoare triple {6561#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 9: Hoare triple {6561#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,645 INFO L290 TraceCheckUtils]: 8: Hoare triple {6561#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {6561#true} is VALID [2022-04-28 03:34:56,646 INFO L290 TraceCheckUtils]: 7: Hoare triple {6561#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {6561#true} is VALID [2022-04-28 03:34:56,646 INFO L272 TraceCheckUtils]: 6: Hoare triple {6561#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {6561#true} is VALID [2022-04-28 03:34:56,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {6561#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {6561#true} is VALID [2022-04-28 03:34:56,646 INFO L272 TraceCheckUtils]: 4: Hoare triple {6561#true} call #t~ret187 := main(); {6561#true} is VALID [2022-04-28 03:34:56,646 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6561#true} {6561#true} #682#return; {6561#true} is VALID [2022-04-28 03:34:56,646 INFO L290 TraceCheckUtils]: 2: Hoare triple {6561#true} assume true; {6561#true} is VALID [2022-04-28 03:34:56,646 INFO L290 TraceCheckUtils]: 1: Hoare triple {6561#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {6561#true} is VALID [2022-04-28 03:34:56,661 INFO L272 TraceCheckUtils]: 0: Hoare triple {6561#true} call ULTIMATE.init(); {6561#true} is VALID [2022-04-28 03:34:56,661 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 51 proven. 21 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-28 03:34:56,661 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1885496646] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:34:56,661 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:34:56,661 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 23 [2022-04-28 03:34:56,661 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:34:56,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1557996356] [2022-04-28 03:34:56,662 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1557996356] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:34:56,662 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:34:56,662 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2022-04-28 03:34:56,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891918141] [2022-04-28 03:34:56,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:34:56,662 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 58 [2022-04-28 03:34:56,663 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:34:56,663 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:56,709 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:56,709 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-28 03:34:56,709 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:56,710 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-28 03:34:56,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=377, Unknown=0, NotChecked=0, Total=506 [2022-04-28 03:34:56,710 INFO L87 Difference]: Start difference. First operand 82 states and 104 transitions. Second operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:58,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:58,680 INFO L93 Difference]: Finished difference Result 152 states and 196 transitions. [2022-04-28 03:34:58,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-28 03:34:58,680 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 58 [2022-04-28 03:34:58,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:34:58,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:58,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 188 transitions. [2022-04-28 03:34:58,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:58,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 188 transitions. [2022-04-28 03:34:58,686 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 188 transitions. [2022-04-28 03:34:58,871 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:58,873 INFO L225 Difference]: With dead ends: 152 [2022-04-28 03:34:58,873 INFO L226 Difference]: Without dead ends: 87 [2022-04-28 03:34:58,874 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=236, Invalid=756, Unknown=0, NotChecked=0, Total=992 [2022-04-28 03:34:58,875 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 615 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 658 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 615 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-28 03:34:58,875 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 194 Invalid, 658 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 615 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-28 03:34:58,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-04-28 03:34:58,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 83. [2022-04-28 03:34:58,894 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:34:58,895 INFO L82 GeneralOperation]: Start isEquivalent. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:58,895 INFO L74 IsIncluded]: Start isIncluded. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:58,895 INFO L87 Difference]: Start difference. First operand 87 states. Second operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:58,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:58,898 INFO L93 Difference]: Finished difference Result 87 states and 111 transitions. [2022-04-28 03:34:58,898 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 111 transitions. [2022-04-28 03:34:58,898 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:58,899 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:58,899 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 87 states. [2022-04-28 03:34:58,899 INFO L87 Difference]: Start difference. First operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 87 states. [2022-04-28 03:34:58,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:34:58,902 INFO L93 Difference]: Finished difference Result 87 states and 111 transitions. [2022-04-28 03:34:58,902 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 111 transitions. [2022-04-28 03:34:58,903 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:34:58,903 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:34:58,903 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:34:58,903 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:34:58,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 65 states have (on average 1.2615384615384615) internal successors, (82), 65 states have internal predecessors, (82), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:34:58,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 105 transitions. [2022-04-28 03:34:58,906 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 105 transitions. Word has length 58 [2022-04-28 03:34:58,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:34:58,906 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 105 transitions. [2022-04-28 03:34:58,906 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 10 states have internal predecessors, (43), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:34:58,906 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 83 states and 105 transitions. [2022-04-28 03:34:59,023 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:34:59,024 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 105 transitions. [2022-04-28 03:34:59,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-04-28 03:34:59,024 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:34:59,024 INFO L195 NwaCegarLoop]: trace histogram [14, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:34:59,031 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-28 03:34:59,225 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:59,225 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:34:59,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:34:59,226 INFO L85 PathProgramCache]: Analyzing trace with hash -1036407648, now seen corresponding path program 13 times [2022-04-28 03:34:59,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:34:59,226 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1638545882] [2022-04-28 03:34:59,226 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:34:59,226 INFO L85 PathProgramCache]: Analyzing trace with hash -1036407648, now seen corresponding path program 14 times [2022-04-28 03:34:59,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:34:59,226 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450734848] [2022-04-28 03:34:59,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:34:59,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:34:59,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:59,324 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:34:59,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:59,334 INFO L290 TraceCheckUtils]: 0: Hoare triple {7644#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7617#true} is VALID [2022-04-28 03:34:59,335 INFO L290 TraceCheckUtils]: 1: Hoare triple {7617#true} assume true; {7617#true} is VALID [2022-04-28 03:34:59,335 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7617#true} {7617#true} #682#return; {7617#true} is VALID [2022-04-28 03:34:59,337 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:34:59,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:59,603 INFO L290 TraceCheckUtils]: 0: Hoare triple {7645#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:59,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7647#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:59,606 INFO L290 TraceCheckUtils]: 2: Hoare triple {7647#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7648#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:59,607 INFO L290 TraceCheckUtils]: 3: Hoare triple {7648#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7649#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:59,609 INFO L290 TraceCheckUtils]: 4: Hoare triple {7649#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:59,610 INFO L290 TraceCheckUtils]: 5: Hoare triple {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7651#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:34:59,611 INFO L290 TraceCheckUtils]: 6: Hoare triple {7651#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7652#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:34:59,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {7652#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7653#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:34:59,614 INFO L290 TraceCheckUtils]: 8: Hoare triple {7653#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:59,615 INFO L290 TraceCheckUtils]: 9: Hoare triple {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:59,616 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {7617#true} #672#return; {7618#false} is VALID [2022-04-28 03:34:59,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-28 03:34:59,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 0: Hoare triple {7645#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7617#true} is VALID [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 1: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 2: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 3: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 4: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 5: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 6: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 7: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,629 INFO L290 TraceCheckUtils]: 8: Hoare triple {7617#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7617#true} is VALID [2022-04-28 03:34:59,630 INFO L290 TraceCheckUtils]: 9: Hoare triple {7617#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7617#true} is VALID [2022-04-28 03:34:59,630 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {7617#true} {7618#false} #656#return; {7618#false} is VALID [2022-04-28 03:34:59,631 INFO L272 TraceCheckUtils]: 0: Hoare triple {7617#true} call ULTIMATE.init(); {7644#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:34:59,631 INFO L290 TraceCheckUtils]: 1: Hoare triple {7644#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7617#true} is VALID [2022-04-28 03:34:59,631 INFO L290 TraceCheckUtils]: 2: Hoare triple {7617#true} assume true; {7617#true} is VALID [2022-04-28 03:34:59,631 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7617#true} {7617#true} #682#return; {7617#true} is VALID [2022-04-28 03:34:59,631 INFO L272 TraceCheckUtils]: 4: Hoare triple {7617#true} call #t~ret187 := main(); {7617#true} is VALID [2022-04-28 03:34:59,631 INFO L290 TraceCheckUtils]: 5: Hoare triple {7617#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7617#true} is VALID [2022-04-28 03:34:59,631 INFO L272 TraceCheckUtils]: 6: Hoare triple {7617#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {7617#true} is VALID [2022-04-28 03:34:59,631 INFO L290 TraceCheckUtils]: 7: Hoare triple {7617#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7617#true} is VALID [2022-04-28 03:34:59,631 INFO L290 TraceCheckUtils]: 8: Hoare triple {7617#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7617#true} is VALID [2022-04-28 03:34:59,631 INFO L290 TraceCheckUtils]: 9: Hoare triple {7617#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:34:59,632 INFO L290 TraceCheckUtils]: 10: Hoare triple {7617#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7617#true} is VALID [2022-04-28 03:34:59,632 INFO L290 TraceCheckUtils]: 11: Hoare triple {7617#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:34:59,632 INFO L290 TraceCheckUtils]: 12: Hoare triple {7617#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7617#true} is VALID [2022-04-28 03:34:59,632 INFO L290 TraceCheckUtils]: 13: Hoare triple {7617#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:34:59,632 INFO L290 TraceCheckUtils]: 14: Hoare triple {7617#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7617#true} is VALID [2022-04-28 03:34:59,632 INFO L290 TraceCheckUtils]: 15: Hoare triple {7617#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7617#true} is VALID [2022-04-28 03:34:59,633 INFO L272 TraceCheckUtils]: 16: Hoare triple {7617#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {7645#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:59,633 INFO L290 TraceCheckUtils]: 17: Hoare triple {7645#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:34:59,635 INFO L290 TraceCheckUtils]: 18: Hoare triple {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7647#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:59,637 INFO L290 TraceCheckUtils]: 19: Hoare triple {7647#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7648#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:34:59,638 INFO L290 TraceCheckUtils]: 20: Hoare triple {7648#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7649#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:59,640 INFO L290 TraceCheckUtils]: 21: Hoare triple {7649#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:34:59,641 INFO L290 TraceCheckUtils]: 22: Hoare triple {7650#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7651#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:34:59,643 INFO L290 TraceCheckUtils]: 23: Hoare triple {7651#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7652#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:34:59,644 INFO L290 TraceCheckUtils]: 24: Hoare triple {7652#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7653#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:34:59,646 INFO L290 TraceCheckUtils]: 25: Hoare triple {7653#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:59,646 INFO L290 TraceCheckUtils]: 26: Hoare triple {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:34:59,647 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7654#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {7617#true} #672#return; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 28: Hoare triple {7618#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 29: Hoare triple {7618#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 30: Hoare triple {7618#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 31: Hoare triple {7618#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 32: Hoare triple {7618#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 33: Hoare triple {7618#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 34: Hoare triple {7618#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 35: Hoare triple {7618#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 36: Hoare triple {7618#false} assume #t~short172; {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 37: Hoare triple {7618#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7618#false} is VALID [2022-04-28 03:34:59,648 INFO L290 TraceCheckUtils]: 38: Hoare triple {7618#false} assume 0 != #t~mem173;havoc #t~mem173; {7618#false} is VALID [2022-04-28 03:34:59,649 INFO L272 TraceCheckUtils]: 39: Hoare triple {7618#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7618#false} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 40: Hoare triple {7618#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7618#false} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 41: Hoare triple {7618#false} assume !(~len <= 0); {7618#false} is VALID [2022-04-28 03:34:59,649 INFO L272 TraceCheckUtils]: 42: Hoare triple {7618#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7645#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 43: Hoare triple {7645#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {7617#true} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 44: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 45: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 46: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 47: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 48: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 49: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 50: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:34:59,649 INFO L290 TraceCheckUtils]: 51: Hoare triple {7617#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7617#true} is VALID [2022-04-28 03:34:59,650 INFO L290 TraceCheckUtils]: 52: Hoare triple {7617#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7617#true} is VALID [2022-04-28 03:34:59,650 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7617#true} {7618#false} #656#return; {7618#false} is VALID [2022-04-28 03:34:59,650 INFO L290 TraceCheckUtils]: 54: Hoare triple {7618#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7618#false} is VALID [2022-04-28 03:34:59,650 INFO L290 TraceCheckUtils]: 55: Hoare triple {7618#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7618#false} is VALID [2022-04-28 03:34:59,650 INFO L272 TraceCheckUtils]: 56: Hoare triple {7618#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7618#false} is VALID [2022-04-28 03:34:59,650 INFO L290 TraceCheckUtils]: 57: Hoare triple {7618#false} ~cond := #in~cond; {7618#false} is VALID [2022-04-28 03:34:59,650 INFO L290 TraceCheckUtils]: 58: Hoare triple {7618#false} assume 0 == ~cond; {7618#false} is VALID [2022-04-28 03:34:59,650 INFO L290 TraceCheckUtils]: 59: Hoare triple {7618#false} assume !false; {7618#false} is VALID [2022-04-28 03:34:59,650 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-28 03:34:59,651 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:34:59,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450734848] [2022-04-28 03:34:59,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1450734848] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:34:59,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1936813629] [2022-04-28 03:34:59,651 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 03:34:59,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:34:59,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:34:59,656 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:34:59,657 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-28 03:35:00,300 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 03:35:00,301 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:35:00,306 INFO L263 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-28 03:35:00,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:00,324 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:01,026 INFO L272 TraceCheckUtils]: 0: Hoare triple {7617#true} call ULTIMATE.init(); {7617#true} is VALID [2022-04-28 03:35:01,027 INFO L290 TraceCheckUtils]: 1: Hoare triple {7617#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,027 INFO L290 TraceCheckUtils]: 2: Hoare triple {7617#true} assume true; {7617#true} is VALID [2022-04-28 03:35:01,027 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7617#true} {7617#true} #682#return; {7617#true} is VALID [2022-04-28 03:35:01,027 INFO L272 TraceCheckUtils]: 4: Hoare triple {7617#true} call #t~ret187 := main(); {7617#true} is VALID [2022-04-28 03:35:01,027 INFO L290 TraceCheckUtils]: 5: Hoare triple {7617#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7617#true} is VALID [2022-04-28 03:35:01,027 INFO L272 TraceCheckUtils]: 6: Hoare triple {7617#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {7617#true} is VALID [2022-04-28 03:35:01,027 INFO L290 TraceCheckUtils]: 7: Hoare triple {7617#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L290 TraceCheckUtils]: 8: Hoare triple {7617#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L290 TraceCheckUtils]: 9: Hoare triple {7617#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L290 TraceCheckUtils]: 10: Hoare triple {7617#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L290 TraceCheckUtils]: 11: Hoare triple {7617#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L290 TraceCheckUtils]: 12: Hoare triple {7617#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L290 TraceCheckUtils]: 13: Hoare triple {7617#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L290 TraceCheckUtils]: 14: Hoare triple {7617#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {7617#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7617#true} is VALID [2022-04-28 03:35:01,028 INFO L272 TraceCheckUtils]: 16: Hoare triple {7617#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {7617#true} is VALID [2022-04-28 03:35:01,029 INFO L290 TraceCheckUtils]: 17: Hoare triple {7617#true} #t~loopctr188 := 0; {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:01,030 INFO L290 TraceCheckUtils]: 18: Hoare triple {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7712#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:01,032 INFO L290 TraceCheckUtils]: 19: Hoare triple {7712#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7716#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:01,033 INFO L290 TraceCheckUtils]: 20: Hoare triple {7716#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7720#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:01,034 INFO L290 TraceCheckUtils]: 21: Hoare triple {7720#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7724#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:01,035 INFO L290 TraceCheckUtils]: 22: Hoare triple {7724#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7728#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:01,035 INFO L290 TraceCheckUtils]: 23: Hoare triple {7728#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7732#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 24: Hoare triple {7732#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 25: Hoare triple {7617#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 26: Hoare triple {7617#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7617#true} {7617#true} #672#return; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 28: Hoare triple {7617#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 29: Hoare triple {7617#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 30: Hoare triple {7617#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 31: Hoare triple {7617#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 32: Hoare triple {7617#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 33: Hoare triple {7617#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 34: Hoare triple {7617#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 35: Hoare triple {7617#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7617#true} is VALID [2022-04-28 03:35:01,036 INFO L290 TraceCheckUtils]: 36: Hoare triple {7617#true} assume #t~short172; {7617#true} is VALID [2022-04-28 03:35:01,037 INFO L290 TraceCheckUtils]: 37: Hoare triple {7617#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,037 INFO L290 TraceCheckUtils]: 38: Hoare triple {7617#true} assume 0 != #t~mem173;havoc #t~mem173; {7617#true} is VALID [2022-04-28 03:35:01,037 INFO L272 TraceCheckUtils]: 39: Hoare triple {7617#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7617#true} is VALID [2022-04-28 03:35:01,037 INFO L290 TraceCheckUtils]: 40: Hoare triple {7617#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7617#true} is VALID [2022-04-28 03:35:01,037 INFO L290 TraceCheckUtils]: 41: Hoare triple {7617#true} assume !(~len <= 0); {7617#true} is VALID [2022-04-28 03:35:01,037 INFO L272 TraceCheckUtils]: 42: Hoare triple {7617#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7617#true} is VALID [2022-04-28 03:35:01,038 INFO L290 TraceCheckUtils]: 43: Hoare triple {7617#true} #t~loopctr188 := 0; {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:01,039 INFO L290 TraceCheckUtils]: 44: Hoare triple {7646#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7712#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:01,040 INFO L290 TraceCheckUtils]: 45: Hoare triple {7712#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7716#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:01,041 INFO L290 TraceCheckUtils]: 46: Hoare triple {7716#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7720#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:01,043 INFO L290 TraceCheckUtils]: 47: Hoare triple {7720#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7724#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:01,044 INFO L290 TraceCheckUtils]: 48: Hoare triple {7724#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7728#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:01,046 INFO L290 TraceCheckUtils]: 49: Hoare triple {7728#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7811#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:01,048 INFO L290 TraceCheckUtils]: 50: Hoare triple {7811#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:01,053 INFO L290 TraceCheckUtils]: 51: Hoare triple {7815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7819#(< (div (+ (- 4294967302) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-28 03:35:01,053 INFO L290 TraceCheckUtils]: 52: Hoare triple {7819#(< (div (+ (- 4294967302) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7819#(< (div (+ (- 4294967302) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-28 03:35:01,055 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7819#(< (div (+ (- 4294967302) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 7 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} {7617#true} #656#return; {7618#false} is VALID [2022-04-28 03:35:01,055 INFO L290 TraceCheckUtils]: 54: Hoare triple {7618#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7618#false} is VALID [2022-04-28 03:35:01,055 INFO L290 TraceCheckUtils]: 55: Hoare triple {7618#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7618#false} is VALID [2022-04-28 03:35:01,055 INFO L272 TraceCheckUtils]: 56: Hoare triple {7618#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7618#false} is VALID [2022-04-28 03:35:01,055 INFO L290 TraceCheckUtils]: 57: Hoare triple {7618#false} ~cond := #in~cond; {7618#false} is VALID [2022-04-28 03:35:01,055 INFO L290 TraceCheckUtils]: 58: Hoare triple {7618#false} assume 0 == ~cond; {7618#false} is VALID [2022-04-28 03:35:01,055 INFO L290 TraceCheckUtils]: 59: Hoare triple {7618#false} assume !false; {7618#false} is VALID [2022-04-28 03:35:01,055 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 11 proven. 105 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-28 03:35:01,056 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:35:01,721 INFO L290 TraceCheckUtils]: 59: Hoare triple {7618#false} assume !false; {7618#false} is VALID [2022-04-28 03:35:01,721 INFO L290 TraceCheckUtils]: 58: Hoare triple {7618#false} assume 0 == ~cond; {7618#false} is VALID [2022-04-28 03:35:01,721 INFO L290 TraceCheckUtils]: 57: Hoare triple {7618#false} ~cond := #in~cond; {7618#false} is VALID [2022-04-28 03:35:01,721 INFO L272 TraceCheckUtils]: 56: Hoare triple {7618#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {7618#false} is VALID [2022-04-28 03:35:01,721 INFO L290 TraceCheckUtils]: 55: Hoare triple {7618#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {7618#false} is VALID [2022-04-28 03:35:01,721 INFO L290 TraceCheckUtils]: 54: Hoare triple {7618#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {7618#false} is VALID [2022-04-28 03:35:01,722 INFO L284 TraceCheckUtils]: 53: Hoare quadruple {7865#(not (= |#Ultimate.C_memset_#amount| 80))} {7617#true} #656#return; {7618#false} is VALID [2022-04-28 03:35:01,722 INFO L290 TraceCheckUtils]: 52: Hoare triple {7865#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7865#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:35:01,723 INFO L290 TraceCheckUtils]: 51: Hoare triple {7872#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7865#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:35:01,725 INFO L290 TraceCheckUtils]: 50: Hoare triple {7876#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7872#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:01,726 INFO L290 TraceCheckUtils]: 49: Hoare triple {7880#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7876#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:01,727 INFO L290 TraceCheckUtils]: 48: Hoare triple {7884#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7880#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:01,729 INFO L290 TraceCheckUtils]: 47: Hoare triple {7888#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7884#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:01,731 INFO L290 TraceCheckUtils]: 46: Hoare triple {7892#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7888#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:01,732 INFO L290 TraceCheckUtils]: 45: Hoare triple {7896#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7892#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:01,734 INFO L290 TraceCheckUtils]: 44: Hoare triple {7900#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7896#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:01,734 INFO L290 TraceCheckUtils]: 43: Hoare triple {7617#true} #t~loopctr188 := 0; {7900#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:01,734 INFO L272 TraceCheckUtils]: 42: Hoare triple {7617#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {7617#true} is VALID [2022-04-28 03:35:01,734 INFO L290 TraceCheckUtils]: 41: Hoare triple {7617#true} assume !(~len <= 0); {7617#true} is VALID [2022-04-28 03:35:01,734 INFO L290 TraceCheckUtils]: 40: Hoare triple {7617#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L272 TraceCheckUtils]: 39: Hoare triple {7617#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 38: Hoare triple {7617#true} assume 0 != #t~mem173;havoc #t~mem173; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 37: Hoare triple {7617#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 36: Hoare triple {7617#true} assume #t~short172; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 35: Hoare triple {7617#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 34: Hoare triple {7617#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 33: Hoare triple {7617#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 32: Hoare triple {7617#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 31: Hoare triple {7617#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 30: Hoare triple {7617#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 29: Hoare triple {7617#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,735 INFO L290 TraceCheckUtils]: 28: Hoare triple {7617#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {7617#true} {7617#true} #672#return; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 26: Hoare triple {7617#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 25: Hoare triple {7617#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 24: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 23: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 22: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 21: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 20: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 19: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 18: Hoare triple {7617#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 17: Hoare triple {7617#true} #t~loopctr188 := 0; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L272 TraceCheckUtils]: 16: Hoare triple {7617#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 15: Hoare triple {7617#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 14: Hoare triple {7617#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 13: Hoare triple {7617#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 12: Hoare triple {7617#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {7617#true} is VALID [2022-04-28 03:35:01,736 INFO L290 TraceCheckUtils]: 11: Hoare triple {7617#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L290 TraceCheckUtils]: 10: Hoare triple {7617#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L290 TraceCheckUtils]: 9: Hoare triple {7617#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L290 TraceCheckUtils]: 8: Hoare triple {7617#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L290 TraceCheckUtils]: 7: Hoare triple {7617#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L272 TraceCheckUtils]: 6: Hoare triple {7617#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L290 TraceCheckUtils]: 5: Hoare triple {7617#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L272 TraceCheckUtils]: 4: Hoare triple {7617#true} call #t~ret187 := main(); {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7617#true} {7617#true} #682#return; {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L290 TraceCheckUtils]: 2: Hoare triple {7617#true} assume true; {7617#true} is VALID [2022-04-28 03:35:01,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {7617#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {7617#true} is VALID [2022-04-28 03:35:01,738 INFO L272 TraceCheckUtils]: 0: Hoare triple {7617#true} call ULTIMATE.init(); {7617#true} is VALID [2022-04-28 03:35:01,738 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 66 proven. 28 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-28 03:35:01,738 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1936813629] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:35:01,738 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:35:01,738 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 11] total 31 [2022-04-28 03:35:01,739 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:35:01,739 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1638545882] [2022-04-28 03:35:01,739 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1638545882] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:35:01,739 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:35:01,739 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2022-04-28 03:35:01,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057938406] [2022-04-28 03:35:01,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:35:01,740 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 60 [2022-04-28 03:35:01,741 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:35:01,741 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:01,812 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:01,812 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-28 03:35:01,812 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:01,812 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-28 03:35:01,828 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=700, Unknown=0, NotChecked=0, Total=930 [2022-04-28 03:35:01,828 INFO L87 Difference]: Start difference. First operand 83 states and 105 transitions. Second operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:03,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:03,865 INFO L93 Difference]: Finished difference Result 154 states and 198 transitions. [2022-04-28 03:35:03,865 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-28 03:35:03,865 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 60 [2022-04-28 03:35:03,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:03,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:03,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 189 transitions. [2022-04-28 03:35:03,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:03,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 189 transitions. [2022-04-28 03:35:03,872 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 189 transitions. [2022-04-28 03:35:04,058 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:04,060 INFO L225 Difference]: With dead ends: 154 [2022-04-28 03:35:04,060 INFO L226 Difference]: Without dead ends: 88 [2022-04-28 03:35:04,061 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=365, Invalid=1275, Unknown=0, NotChecked=0, Total=1640 [2022-04-28 03:35:04,062 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 632 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 194 SdHoareTripleChecker+Invalid, 677 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 632 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:04,062 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 194 Invalid, 677 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 632 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-28 03:35:04,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-04-28 03:35:04,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 84. [2022-04-28 03:35:04,090 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:04,090 INFO L82 GeneralOperation]: Start isEquivalent. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:04,090 INFO L74 IsIncluded]: Start isIncluded. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:04,091 INFO L87 Difference]: Start difference. First operand 88 states. Second operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:04,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:04,093 INFO L93 Difference]: Finished difference Result 88 states and 112 transitions. [2022-04-28 03:35:04,093 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 112 transitions. [2022-04-28 03:35:04,093 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:04,094 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:04,094 INFO L74 IsIncluded]: Start isIncluded. First operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 88 states. [2022-04-28 03:35:04,094 INFO L87 Difference]: Start difference. First operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 88 states. [2022-04-28 03:35:04,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:04,096 INFO L93 Difference]: Finished difference Result 88 states and 112 transitions. [2022-04-28 03:35:04,096 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 112 transitions. [2022-04-28 03:35:04,097 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:04,097 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:04,097 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:04,097 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:04,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 66 states have (on average 1.2575757575757576) internal successors, (83), 66 states have internal predecessors, (83), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:04,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 106 transitions. [2022-04-28 03:35:04,099 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 106 transitions. Word has length 60 [2022-04-28 03:35:04,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:04,100 INFO L495 AbstractCegarLoop]: Abstraction has 84 states and 106 transitions. [2022-04-28 03:35:04,100 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 3.3846153846153846) internal successors, (44), 11 states have internal predecessors, (44), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:04,100 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 84 states and 106 transitions. [2022-04-28 03:35:04,225 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:04,226 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 106 transitions. [2022-04-28 03:35:04,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-04-28 03:35:04,226 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:04,226 INFO L195 NwaCegarLoop]: trace histogram [16, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:04,246 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-28 03:35:04,427 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2022-04-28 03:35:04,427 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:04,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:04,427 INFO L85 PathProgramCache]: Analyzing trace with hash -2059623478, now seen corresponding path program 15 times [2022-04-28 03:35:04,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:04,427 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1595512971] [2022-04-28 03:35:04,428 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:35:04,428 INFO L85 PathProgramCache]: Analyzing trace with hash -2059623478, now seen corresponding path program 16 times [2022-04-28 03:35:04,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:04,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299162963] [2022-04-28 03:35:04,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:04,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:04,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:04,529 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:04,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:04,538 INFO L290 TraceCheckUtils]: 0: Hoare triple {8734#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8705#true} is VALID [2022-04-28 03:35:04,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {8705#true} assume true; {8705#true} is VALID [2022-04-28 03:35:04,538 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8705#true} {8705#true} #682#return; {8705#true} is VALID [2022-04-28 03:35:04,541 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:35:04,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:04,836 INFO L290 TraceCheckUtils]: 0: Hoare triple {8735#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:04,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8737#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:04,840 INFO L290 TraceCheckUtils]: 2: Hoare triple {8737#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:04,842 INFO L290 TraceCheckUtils]: 3: Hoare triple {8738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8739#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:04,844 INFO L290 TraceCheckUtils]: 4: Hoare triple {8739#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8740#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:04,845 INFO L290 TraceCheckUtils]: 5: Hoare triple {8740#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8741#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:04,847 INFO L290 TraceCheckUtils]: 6: Hoare triple {8741#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8742#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:04,849 INFO L290 TraceCheckUtils]: 7: Hoare triple {8742#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:04,851 INFO L290 TraceCheckUtils]: 8: Hoare triple {8743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8744#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 8)))} is VALID [2022-04-28 03:35:04,853 INFO L290 TraceCheckUtils]: 9: Hoare triple {8744#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 8)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:04,853 INFO L290 TraceCheckUtils]: 10: Hoare triple {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:04,854 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {8705#true} #672#return; {8706#false} is VALID [2022-04-28 03:35:04,855 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2022-04-28 03:35:04,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:04,878 INFO L290 TraceCheckUtils]: 0: Hoare triple {8735#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8705#true} is VALID [2022-04-28 03:35:04,878 INFO L290 TraceCheckUtils]: 1: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,878 INFO L290 TraceCheckUtils]: 2: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,878 INFO L290 TraceCheckUtils]: 3: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,878 INFO L290 TraceCheckUtils]: 4: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,878 INFO L290 TraceCheckUtils]: 5: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,878 INFO L290 TraceCheckUtils]: 6: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,879 INFO L290 TraceCheckUtils]: 7: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,879 INFO L290 TraceCheckUtils]: 8: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,879 INFO L290 TraceCheckUtils]: 9: Hoare triple {8705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8705#true} is VALID [2022-04-28 03:35:04,879 INFO L290 TraceCheckUtils]: 10: Hoare triple {8705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8705#true} is VALID [2022-04-28 03:35:04,879 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {8705#true} {8706#false} #656#return; {8706#false} is VALID [2022-04-28 03:35:04,880 INFO L272 TraceCheckUtils]: 0: Hoare triple {8705#true} call ULTIMATE.init(); {8734#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:04,880 INFO L290 TraceCheckUtils]: 1: Hoare triple {8734#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8705#true} is VALID [2022-04-28 03:35:04,880 INFO L290 TraceCheckUtils]: 2: Hoare triple {8705#true} assume true; {8705#true} is VALID [2022-04-28 03:35:04,880 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8705#true} {8705#true} #682#return; {8705#true} is VALID [2022-04-28 03:35:04,880 INFO L272 TraceCheckUtils]: 4: Hoare triple {8705#true} call #t~ret187 := main(); {8705#true} is VALID [2022-04-28 03:35:04,880 INFO L290 TraceCheckUtils]: 5: Hoare triple {8705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8705#true} is VALID [2022-04-28 03:35:04,880 INFO L272 TraceCheckUtils]: 6: Hoare triple {8705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 7: Hoare triple {8705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 8: Hoare triple {8705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 9: Hoare triple {8705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 10: Hoare triple {8705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 11: Hoare triple {8705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 12: Hoare triple {8705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 13: Hoare triple {8705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 14: Hoare triple {8705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8705#true} is VALID [2022-04-28 03:35:04,881 INFO L290 TraceCheckUtils]: 15: Hoare triple {8705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8705#true} is VALID [2022-04-28 03:35:04,882 INFO L272 TraceCheckUtils]: 16: Hoare triple {8705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {8735#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:04,883 INFO L290 TraceCheckUtils]: 17: Hoare triple {8735#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:04,885 INFO L290 TraceCheckUtils]: 18: Hoare triple {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8737#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:04,887 INFO L290 TraceCheckUtils]: 19: Hoare triple {8737#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:04,888 INFO L290 TraceCheckUtils]: 20: Hoare triple {8738#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8739#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:04,890 INFO L290 TraceCheckUtils]: 21: Hoare triple {8739#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8740#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:04,892 INFO L290 TraceCheckUtils]: 22: Hoare triple {8740#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8741#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:04,894 INFO L290 TraceCheckUtils]: 23: Hoare triple {8741#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8742#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:04,896 INFO L290 TraceCheckUtils]: 24: Hoare triple {8742#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:04,898 INFO L290 TraceCheckUtils]: 25: Hoare triple {8743#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8744#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 8)))} is VALID [2022-04-28 03:35:04,900 INFO L290 TraceCheckUtils]: 26: Hoare triple {8744#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 8)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:04,900 INFO L290 TraceCheckUtils]: 27: Hoare triple {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:04,902 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8745#(or (<= |#Ultimate.C_memset_#amount| 8) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {8705#true} #672#return; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 29: Hoare triple {8706#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 30: Hoare triple {8706#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 31: Hoare triple {8706#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 32: Hoare triple {8706#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 33: Hoare triple {8706#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 34: Hoare triple {8706#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 35: Hoare triple {8706#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 36: Hoare triple {8706#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 37: Hoare triple {8706#false} assume #t~short172; {8706#false} is VALID [2022-04-28 03:35:04,902 INFO L290 TraceCheckUtils]: 38: Hoare triple {8706#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8706#false} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 39: Hoare triple {8706#false} assume 0 != #t~mem173;havoc #t~mem173; {8706#false} is VALID [2022-04-28 03:35:04,903 INFO L272 TraceCheckUtils]: 40: Hoare triple {8706#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8706#false} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 41: Hoare triple {8706#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8706#false} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 42: Hoare triple {8706#false} assume !(~len <= 0); {8706#false} is VALID [2022-04-28 03:35:04,903 INFO L272 TraceCheckUtils]: 43: Hoare triple {8706#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8735#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 44: Hoare triple {8735#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {8705#true} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 45: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 46: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 47: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 48: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 49: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 50: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,903 INFO L290 TraceCheckUtils]: 51: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,904 INFO L290 TraceCheckUtils]: 52: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:04,904 INFO L290 TraceCheckUtils]: 53: Hoare triple {8705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8705#true} is VALID [2022-04-28 03:35:04,904 INFO L290 TraceCheckUtils]: 54: Hoare triple {8705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8705#true} is VALID [2022-04-28 03:35:04,904 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8705#true} {8706#false} #656#return; {8706#false} is VALID [2022-04-28 03:35:04,904 INFO L290 TraceCheckUtils]: 56: Hoare triple {8706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8706#false} is VALID [2022-04-28 03:35:04,904 INFO L290 TraceCheckUtils]: 57: Hoare triple {8706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8706#false} is VALID [2022-04-28 03:35:04,904 INFO L272 TraceCheckUtils]: 58: Hoare triple {8706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8706#false} is VALID [2022-04-28 03:35:04,904 INFO L290 TraceCheckUtils]: 59: Hoare triple {8706#false} ~cond := #in~cond; {8706#false} is VALID [2022-04-28 03:35:04,904 INFO L290 TraceCheckUtils]: 60: Hoare triple {8706#false} assume 0 == ~cond; {8706#false} is VALID [2022-04-28 03:35:04,904 INFO L290 TraceCheckUtils]: 61: Hoare triple {8706#false} assume !false; {8706#false} is VALID [2022-04-28 03:35:04,905 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-28 03:35:04,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:04,905 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1299162963] [2022-04-28 03:35:04,905 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1299162963] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:04,905 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [815342613] [2022-04-28 03:35:04,905 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 03:35:04,905 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:04,905 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:04,908 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:04,918 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-28 03:35:05,294 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 03:35:05,295 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:35:05,300 INFO L263 TraceCheckSpWp]: Trace formula consists of 793 conjuncts, 40 conjunts are in the unsatisfiable core [2022-04-28 03:35:05,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:05,324 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:06,021 INFO L272 TraceCheckUtils]: 0: Hoare triple {8705#true} call ULTIMATE.init(); {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 1: Hoare triple {8705#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 2: Hoare triple {8705#true} assume true; {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8705#true} {8705#true} #682#return; {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L272 TraceCheckUtils]: 4: Hoare triple {8705#true} call #t~ret187 := main(); {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 5: Hoare triple {8705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L272 TraceCheckUtils]: 6: Hoare triple {8705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 7: Hoare triple {8705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 8: Hoare triple {8705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 9: Hoare triple {8705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 10: Hoare triple {8705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 11: Hoare triple {8705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 12: Hoare triple {8705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 13: Hoare triple {8705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 14: Hoare triple {8705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L290 TraceCheckUtils]: 15: Hoare triple {8705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8705#true} is VALID [2022-04-28 03:35:06,022 INFO L272 TraceCheckUtils]: 16: Hoare triple {8705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {8705#true} is VALID [2022-04-28 03:35:06,023 INFO L290 TraceCheckUtils]: 17: Hoare triple {8705#true} #t~loopctr188 := 0; {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:06,025 INFO L290 TraceCheckUtils]: 18: Hoare triple {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8803#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:06,026 INFO L290 TraceCheckUtils]: 19: Hoare triple {8803#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8807#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:06,027 INFO L290 TraceCheckUtils]: 20: Hoare triple {8807#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8811#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:06,028 INFO L290 TraceCheckUtils]: 21: Hoare triple {8811#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:06,029 INFO L290 TraceCheckUtils]: 22: Hoare triple {8815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8819#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:06,031 INFO L290 TraceCheckUtils]: 23: Hoare triple {8819#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8823#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 24: Hoare triple {8823#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8827#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 25: Hoare triple {8827#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 26: Hoare triple {8705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8705#true} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 27: Hoare triple {8705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8705#true} is VALID [2022-04-28 03:35:06,032 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8705#true} {8705#true} #672#return; {8705#true} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 29: Hoare triple {8705#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8705#true} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 30: Hoare triple {8705#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 31: Hoare triple {8705#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8705#true} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 32: Hoare triple {8705#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8705#true} is VALID [2022-04-28 03:35:06,032 INFO L290 TraceCheckUtils]: 33: Hoare triple {8705#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L290 TraceCheckUtils]: 34: Hoare triple {8705#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L290 TraceCheckUtils]: 35: Hoare triple {8705#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L290 TraceCheckUtils]: 36: Hoare triple {8705#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L290 TraceCheckUtils]: 37: Hoare triple {8705#true} assume #t~short172; {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L290 TraceCheckUtils]: 38: Hoare triple {8705#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L290 TraceCheckUtils]: 39: Hoare triple {8705#true} assume 0 != #t~mem173;havoc #t~mem173; {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L272 TraceCheckUtils]: 40: Hoare triple {8705#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L290 TraceCheckUtils]: 41: Hoare triple {8705#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L290 TraceCheckUtils]: 42: Hoare triple {8705#true} assume !(~len <= 0); {8705#true} is VALID [2022-04-28 03:35:06,033 INFO L272 TraceCheckUtils]: 43: Hoare triple {8705#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8705#true} is VALID [2022-04-28 03:35:06,034 INFO L290 TraceCheckUtils]: 44: Hoare triple {8705#true} #t~loopctr188 := 0; {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:06,036 INFO L290 TraceCheckUtils]: 45: Hoare triple {8736#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8803#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:06,037 INFO L290 TraceCheckUtils]: 46: Hoare triple {8803#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8807#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:06,039 INFO L290 TraceCheckUtils]: 47: Hoare triple {8807#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8811#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:06,040 INFO L290 TraceCheckUtils]: 48: Hoare triple {8811#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:06,042 INFO L290 TraceCheckUtils]: 49: Hoare triple {8815#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8819#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:06,043 INFO L290 TraceCheckUtils]: 50: Hoare triple {8819#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8823#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:06,044 INFO L290 TraceCheckUtils]: 51: Hoare triple {8823#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8827#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:06,045 INFO L290 TraceCheckUtils]: 52: Hoare triple {8827#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8912#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:06,047 INFO L290 TraceCheckUtils]: 53: Hoare triple {8912#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8916#(< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967304) 4294967296) 1))} is VALID [2022-04-28 03:35:06,048 INFO L290 TraceCheckUtils]: 54: Hoare triple {8916#(< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967304) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8916#(< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967304) 4294967296) 1))} is VALID [2022-04-28 03:35:06,049 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8916#(< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967304) 4294967296) 1))} {8705#true} #656#return; {8706#false} is VALID [2022-04-28 03:35:06,049 INFO L290 TraceCheckUtils]: 56: Hoare triple {8706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8706#false} is VALID [2022-04-28 03:35:06,049 INFO L290 TraceCheckUtils]: 57: Hoare triple {8706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8706#false} is VALID [2022-04-28 03:35:06,049 INFO L272 TraceCheckUtils]: 58: Hoare triple {8706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8706#false} is VALID [2022-04-28 03:35:06,049 INFO L290 TraceCheckUtils]: 59: Hoare triple {8706#false} ~cond := #in~cond; {8706#false} is VALID [2022-04-28 03:35:06,049 INFO L290 TraceCheckUtils]: 60: Hoare triple {8706#false} assume 0 == ~cond; {8706#false} is VALID [2022-04-28 03:35:06,049 INFO L290 TraceCheckUtils]: 61: Hoare triple {8706#false} assume !false; {8706#false} is VALID [2022-04-28 03:35:06,049 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 11 proven. 136 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-28 03:35:06,049 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:35:06,895 INFO L290 TraceCheckUtils]: 61: Hoare triple {8706#false} assume !false; {8706#false} is VALID [2022-04-28 03:35:06,895 INFO L290 TraceCheckUtils]: 60: Hoare triple {8706#false} assume 0 == ~cond; {8706#false} is VALID [2022-04-28 03:35:06,895 INFO L290 TraceCheckUtils]: 59: Hoare triple {8706#false} ~cond := #in~cond; {8706#false} is VALID [2022-04-28 03:35:06,895 INFO L272 TraceCheckUtils]: 58: Hoare triple {8706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {8706#false} is VALID [2022-04-28 03:35:06,895 INFO L290 TraceCheckUtils]: 57: Hoare triple {8706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {8706#false} is VALID [2022-04-28 03:35:06,896 INFO L290 TraceCheckUtils]: 56: Hoare triple {8706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {8706#false} is VALID [2022-04-28 03:35:06,896 INFO L284 TraceCheckUtils]: 55: Hoare quadruple {8962#(not (= |#Ultimate.C_memset_#amount| 80))} {8705#true} #656#return; {8706#false} is VALID [2022-04-28 03:35:06,897 INFO L290 TraceCheckUtils]: 54: Hoare triple {8962#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8962#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:35:06,897 INFO L290 TraceCheckUtils]: 53: Hoare triple {8969#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8962#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:35:06,899 INFO L290 TraceCheckUtils]: 52: Hoare triple {8973#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8969#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:06,901 INFO L290 TraceCheckUtils]: 51: Hoare triple {8977#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8973#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:06,902 INFO L290 TraceCheckUtils]: 50: Hoare triple {8981#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8977#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:06,904 INFO L290 TraceCheckUtils]: 49: Hoare triple {8985#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8981#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:06,906 INFO L290 TraceCheckUtils]: 48: Hoare triple {8989#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8985#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:06,908 INFO L290 TraceCheckUtils]: 47: Hoare triple {8993#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8989#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:06,909 INFO L290 TraceCheckUtils]: 46: Hoare triple {8997#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8993#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:06,911 INFO L290 TraceCheckUtils]: 45: Hoare triple {9001#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8997#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 44: Hoare triple {8705#true} #t~loopctr188 := 0; {9001#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:06,912 INFO L272 TraceCheckUtils]: 43: Hoare triple {8705#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 42: Hoare triple {8705#true} assume !(~len <= 0); {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 41: Hoare triple {8705#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L272 TraceCheckUtils]: 40: Hoare triple {8705#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 39: Hoare triple {8705#true} assume 0 != #t~mem173;havoc #t~mem173; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 38: Hoare triple {8705#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 37: Hoare triple {8705#true} assume #t~short172; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 36: Hoare triple {8705#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 35: Hoare triple {8705#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 34: Hoare triple {8705#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 33: Hoare triple {8705#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 32: Hoare triple {8705#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 31: Hoare triple {8705#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 30: Hoare triple {8705#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,912 INFO L290 TraceCheckUtils]: 29: Hoare triple {8705#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8705#true} {8705#true} #672#return; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 27: Hoare triple {8705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 26: Hoare triple {8705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 25: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 24: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 23: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 22: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 21: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 20: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 19: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 18: Hoare triple {8705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 17: Hoare triple {8705#true} #t~loopctr188 := 0; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L272 TraceCheckUtils]: 16: Hoare triple {8705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 15: Hoare triple {8705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 14: Hoare triple {8705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 13: Hoare triple {8705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 12: Hoare triple {8705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 11: Hoare triple {8705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,913 INFO L290 TraceCheckUtils]: 10: Hoare triple {8705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L290 TraceCheckUtils]: 9: Hoare triple {8705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L290 TraceCheckUtils]: 8: Hoare triple {8705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L290 TraceCheckUtils]: 7: Hoare triple {8705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L272 TraceCheckUtils]: 6: Hoare triple {8705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L290 TraceCheckUtils]: 5: Hoare triple {8705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L272 TraceCheckUtils]: 4: Hoare triple {8705#true} call #t~ret187 := main(); {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8705#true} {8705#true} #682#return; {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L290 TraceCheckUtils]: 2: Hoare triple {8705#true} assume true; {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L290 TraceCheckUtils]: 1: Hoare triple {8705#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L272 TraceCheckUtils]: 0: Hoare triple {8705#true} call ULTIMATE.init(); {8705#true} is VALID [2022-04-28 03:35:06,914 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 83 proven. 36 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-28 03:35:06,915 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [815342613] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:35:06,915 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:35:06,915 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12, 12] total 33 [2022-04-28 03:35:06,915 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:35:06,915 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1595512971] [2022-04-28 03:35:06,915 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1595512971] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:35:06,915 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:35:06,915 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2022-04-28 03:35:06,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429643396] [2022-04-28 03:35:06,915 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:35:06,916 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 62 [2022-04-28 03:35:06,916 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:35:06,916 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:06,974 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:06,975 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-28 03:35:06,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:06,975 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-28 03:35:06,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=261, Invalid=795, Unknown=0, NotChecked=0, Total=1056 [2022-04-28 03:35:06,977 INFO L87 Difference]: Start difference. First operand 84 states and 106 transitions. Second operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:08,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:08,680 INFO L93 Difference]: Finished difference Result 156 states and 200 transitions. [2022-04-28 03:35:08,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-28 03:35:08,680 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 62 [2022-04-28 03:35:08,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:08,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:08,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 190 transitions. [2022-04-28 03:35:08,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:08,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 190 transitions. [2022-04-28 03:35:08,685 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 190 transitions. [2022-04-28 03:35:08,900 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 190 edges. 190 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:08,902 INFO L225 Difference]: With dead ends: 156 [2022-04-28 03:35:08,902 INFO L226 Difference]: Without dead ends: 89 [2022-04-28 03:35:08,902 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=421, Invalid=1471, Unknown=0, NotChecked=0, Total=1892 [2022-04-28 03:35:08,903 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 420 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 420 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:08,903 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 420 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-28 03:35:08,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-04-28 03:35:08,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 85. [2022-04-28 03:35:08,931 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:08,931 INFO L82 GeneralOperation]: Start isEquivalent. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:08,931 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:08,932 INFO L87 Difference]: Start difference. First operand 89 states. Second operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:08,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:08,934 INFO L93 Difference]: Finished difference Result 89 states and 113 transitions. [2022-04-28 03:35:08,934 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 113 transitions. [2022-04-28 03:35:08,934 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:08,934 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:08,935 INFO L74 IsIncluded]: Start isIncluded. First operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 89 states. [2022-04-28 03:35:08,935 INFO L87 Difference]: Start difference. First operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 89 states. [2022-04-28 03:35:08,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:08,937 INFO L93 Difference]: Finished difference Result 89 states and 113 transitions. [2022-04-28 03:35:08,937 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 113 transitions. [2022-04-28 03:35:08,938 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:08,938 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:08,938 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:08,938 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:08,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 67 states have (on average 1.2537313432835822) internal successors, (84), 67 states have internal predecessors, (84), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:08,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 107 transitions. [2022-04-28 03:35:08,940 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 107 transitions. Word has length 62 [2022-04-28 03:35:08,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:08,940 INFO L495 AbstractCegarLoop]: Abstraction has 85 states and 107 transitions. [2022-04-28 03:35:08,941 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.2142857142857144) internal successors, (45), 12 states have internal predecessors, (45), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:08,941 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 85 states and 107 transitions. [2022-04-28 03:35:09,073 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:09,074 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 107 transitions. [2022-04-28 03:35:09,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-04-28 03:35:09,074 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:09,074 INFO L195 NwaCegarLoop]: trace histogram [18, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:09,094 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-28 03:35:09,276 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-28 03:35:09,276 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:09,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:09,276 INFO L85 PathProgramCache]: Analyzing trace with hash -1482430496, now seen corresponding path program 17 times [2022-04-28 03:35:09,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:09,277 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1140189896] [2022-04-28 03:35:09,277 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:35:09,277 INFO L85 PathProgramCache]: Analyzing trace with hash -1482430496, now seen corresponding path program 18 times [2022-04-28 03:35:09,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:09,277 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685179772] [2022-04-28 03:35:09,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:09,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:09,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:09,380 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:09,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:09,393 INFO L290 TraceCheckUtils]: 0: Hoare triple {9850#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9819#true} is VALID [2022-04-28 03:35:09,393 INFO L290 TraceCheckUtils]: 1: Hoare triple {9819#true} assume true; {9819#true} is VALID [2022-04-28 03:35:09,393 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9819#true} {9819#true} #682#return; {9819#true} is VALID [2022-04-28 03:35:09,396 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:35:09,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:09,735 INFO L290 TraceCheckUtils]: 0: Hoare triple {9851#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:09,738 INFO L290 TraceCheckUtils]: 1: Hoare triple {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9853#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:09,739 INFO L290 TraceCheckUtils]: 2: Hoare triple {9853#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9854#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:09,741 INFO L290 TraceCheckUtils]: 3: Hoare triple {9854#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9855#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:09,742 INFO L290 TraceCheckUtils]: 4: Hoare triple {9855#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9856#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:09,744 INFO L290 TraceCheckUtils]: 5: Hoare triple {9856#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9857#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:09,745 INFO L290 TraceCheckUtils]: 6: Hoare triple {9857#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9858#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:09,747 INFO L290 TraceCheckUtils]: 7: Hoare triple {9858#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9859#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:09,748 INFO L290 TraceCheckUtils]: 8: Hoare triple {9859#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9860#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:09,750 INFO L290 TraceCheckUtils]: 9: Hoare triple {9860#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9861#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 9)))} is VALID [2022-04-28 03:35:09,751 INFO L290 TraceCheckUtils]: 10: Hoare triple {9861#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 9)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} is VALID [2022-04-28 03:35:09,751 INFO L290 TraceCheckUtils]: 11: Hoare triple {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} is VALID [2022-04-28 03:35:09,752 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} {9819#true} #672#return; {9820#false} is VALID [2022-04-28 03:35:09,753 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-28 03:35:09,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:09,768 INFO L290 TraceCheckUtils]: 0: Hoare triple {9851#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 3: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 4: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 5: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 6: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 7: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 8: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 9: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 10: Hoare triple {9819#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L290 TraceCheckUtils]: 11: Hoare triple {9819#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9819#true} is VALID [2022-04-28 03:35:09,769 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {9819#true} {9820#false} #656#return; {9820#false} is VALID [2022-04-28 03:35:09,770 INFO L272 TraceCheckUtils]: 0: Hoare triple {9819#true} call ULTIMATE.init(); {9850#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:09,770 INFO L290 TraceCheckUtils]: 1: Hoare triple {9850#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9819#true} is VALID [2022-04-28 03:35:09,770 INFO L290 TraceCheckUtils]: 2: Hoare triple {9819#true} assume true; {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9819#true} {9819#true} #682#return; {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L272 TraceCheckUtils]: 4: Hoare triple {9819#true} call #t~ret187 := main(); {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L290 TraceCheckUtils]: 5: Hoare triple {9819#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L272 TraceCheckUtils]: 6: Hoare triple {9819#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L290 TraceCheckUtils]: 7: Hoare triple {9819#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L290 TraceCheckUtils]: 8: Hoare triple {9819#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L290 TraceCheckUtils]: 9: Hoare triple {9819#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L290 TraceCheckUtils]: 10: Hoare triple {9819#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L290 TraceCheckUtils]: 11: Hoare triple {9819#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L290 TraceCheckUtils]: 12: Hoare triple {9819#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9819#true} is VALID [2022-04-28 03:35:09,771 INFO L290 TraceCheckUtils]: 13: Hoare triple {9819#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:09,772 INFO L290 TraceCheckUtils]: 14: Hoare triple {9819#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9819#true} is VALID [2022-04-28 03:35:09,772 INFO L290 TraceCheckUtils]: 15: Hoare triple {9819#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9819#true} is VALID [2022-04-28 03:35:09,772 INFO L272 TraceCheckUtils]: 16: Hoare triple {9819#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {9851#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:09,773 INFO L290 TraceCheckUtils]: 17: Hoare triple {9851#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:09,775 INFO L290 TraceCheckUtils]: 18: Hoare triple {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9853#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:09,777 INFO L290 TraceCheckUtils]: 19: Hoare triple {9853#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9854#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:09,779 INFO L290 TraceCheckUtils]: 20: Hoare triple {9854#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9855#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:09,781 INFO L290 TraceCheckUtils]: 21: Hoare triple {9855#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9856#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:09,783 INFO L290 TraceCheckUtils]: 22: Hoare triple {9856#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9857#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:09,785 INFO L290 TraceCheckUtils]: 23: Hoare triple {9857#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9858#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:09,788 INFO L290 TraceCheckUtils]: 24: Hoare triple {9858#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9859#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:09,790 INFO L290 TraceCheckUtils]: 25: Hoare triple {9859#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9860#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:09,793 INFO L290 TraceCheckUtils]: 26: Hoare triple {9860#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9861#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 9)))} is VALID [2022-04-28 03:35:09,795 INFO L290 TraceCheckUtils]: 27: Hoare triple {9861#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 9)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} is VALID [2022-04-28 03:35:09,796 INFO L290 TraceCheckUtils]: 28: Hoare triple {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} is VALID [2022-04-28 03:35:09,797 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {9862#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 9))} {9819#true} #672#return; {9820#false} is VALID [2022-04-28 03:35:09,797 INFO L290 TraceCheckUtils]: 30: Hoare triple {9820#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9820#false} is VALID [2022-04-28 03:35:09,797 INFO L290 TraceCheckUtils]: 31: Hoare triple {9820#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {9820#false} is VALID [2022-04-28 03:35:09,797 INFO L290 TraceCheckUtils]: 32: Hoare triple {9820#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 33: Hoare triple {9820#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 34: Hoare triple {9820#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 35: Hoare triple {9820#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 36: Hoare triple {9820#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 37: Hoare triple {9820#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 38: Hoare triple {9820#false} assume #t~short172; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 39: Hoare triple {9820#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 40: Hoare triple {9820#false} assume 0 != #t~mem173;havoc #t~mem173; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L272 TraceCheckUtils]: 41: Hoare triple {9820#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 42: Hoare triple {9820#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9820#false} is VALID [2022-04-28 03:35:09,798 INFO L290 TraceCheckUtils]: 43: Hoare triple {9820#false} assume !(~len <= 0); {9820#false} is VALID [2022-04-28 03:35:09,799 INFO L272 TraceCheckUtils]: 44: Hoare triple {9820#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9851#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 45: Hoare triple {9851#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {9819#true} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 46: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 47: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 48: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 49: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 50: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 51: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 52: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,799 INFO L290 TraceCheckUtils]: 53: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,800 INFO L290 TraceCheckUtils]: 54: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:09,800 INFO L290 TraceCheckUtils]: 55: Hoare triple {9819#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9819#true} is VALID [2022-04-28 03:35:09,800 INFO L290 TraceCheckUtils]: 56: Hoare triple {9819#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9819#true} is VALID [2022-04-28 03:35:09,800 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9819#true} {9820#false} #656#return; {9820#false} is VALID [2022-04-28 03:35:09,800 INFO L290 TraceCheckUtils]: 58: Hoare triple {9820#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9820#false} is VALID [2022-04-28 03:35:09,800 INFO L290 TraceCheckUtils]: 59: Hoare triple {9820#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9820#false} is VALID [2022-04-28 03:35:09,800 INFO L272 TraceCheckUtils]: 60: Hoare triple {9820#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9820#false} is VALID [2022-04-28 03:35:09,800 INFO L290 TraceCheckUtils]: 61: Hoare triple {9820#false} ~cond := #in~cond; {9820#false} is VALID [2022-04-28 03:35:09,800 INFO L290 TraceCheckUtils]: 62: Hoare triple {9820#false} assume 0 == ~cond; {9820#false} is VALID [2022-04-28 03:35:09,800 INFO L290 TraceCheckUtils]: 63: Hoare triple {9820#false} assume !false; {9820#false} is VALID [2022-04-28 03:35:09,801 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2022-04-28 03:35:09,801 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:09,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [685179772] [2022-04-28 03:35:09,801 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [685179772] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:09,801 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1597994242] [2022-04-28 03:35:09,801 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 03:35:09,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:09,802 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:09,804 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:09,831 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-28 03:35:12,803 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-04-28 03:35:12,804 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:35:12,813 INFO L263 TraceCheckSpWp]: Trace formula consists of 807 conjuncts, 45 conjunts are in the unsatisfiable core [2022-04-28 03:35:12,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:12,834 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:13,322 INFO L272 TraceCheckUtils]: 0: Hoare triple {9819#true} call ULTIMATE.init(); {9819#true} is VALID [2022-04-28 03:35:13,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {9819#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9819#true} is VALID [2022-04-28 03:35:13,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {9819#true} assume true; {9819#true} is VALID [2022-04-28 03:35:13,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9819#true} {9819#true} #682#return; {9819#true} is VALID [2022-04-28 03:35:13,322 INFO L272 TraceCheckUtils]: 4: Hoare triple {9819#true} call #t~ret187 := main(); {9819#true} is VALID [2022-04-28 03:35:13,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {9819#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9819#true} is VALID [2022-04-28 03:35:13,322 INFO L272 TraceCheckUtils]: 6: Hoare triple {9819#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {9819#true} is VALID [2022-04-28 03:35:13,322 INFO L290 TraceCheckUtils]: 7: Hoare triple {9819#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L290 TraceCheckUtils]: 8: Hoare triple {9819#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L290 TraceCheckUtils]: 9: Hoare triple {9819#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L290 TraceCheckUtils]: 10: Hoare triple {9819#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L290 TraceCheckUtils]: 11: Hoare triple {9819#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L290 TraceCheckUtils]: 12: Hoare triple {9819#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L290 TraceCheckUtils]: 13: Hoare triple {9819#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L290 TraceCheckUtils]: 14: Hoare triple {9819#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L290 TraceCheckUtils]: 15: Hoare triple {9819#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9819#true} is VALID [2022-04-28 03:35:13,323 INFO L272 TraceCheckUtils]: 16: Hoare triple {9819#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {9819#true} is VALID [2022-04-28 03:35:13,332 INFO L290 TraceCheckUtils]: 17: Hoare triple {9819#true} #t~loopctr188 := 0; {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:13,334 INFO L290 TraceCheckUtils]: 18: Hoare triple {9852#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9920#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:13,336 INFO L290 TraceCheckUtils]: 19: Hoare triple {9920#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9924#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:13,337 INFO L290 TraceCheckUtils]: 20: Hoare triple {9924#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9928#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:13,338 INFO L290 TraceCheckUtils]: 21: Hoare triple {9928#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9932#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:13,339 INFO L290 TraceCheckUtils]: 22: Hoare triple {9932#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9936#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:13,340 INFO L290 TraceCheckUtils]: 23: Hoare triple {9936#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9940#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:13,341 INFO L290 TraceCheckUtils]: 24: Hoare triple {9940#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9944#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:13,342 INFO L290 TraceCheckUtils]: 25: Hoare triple {9944#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9948#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:13,343 INFO L290 TraceCheckUtils]: 26: Hoare triple {9948#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9952#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:13,344 INFO L290 TraceCheckUtils]: 27: Hoare triple {9952#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9956#(< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-28 03:35:13,344 INFO L290 TraceCheckUtils]: 28: Hoare triple {9956#(< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9956#(< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-28 03:35:13,345 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {9956#(< 0 (+ (div (+ 9 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} {9819#true} #672#return; {9820#false} is VALID [2022-04-28 03:35:13,345 INFO L290 TraceCheckUtils]: 30: Hoare triple {9820#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9820#false} is VALID [2022-04-28 03:35:13,345 INFO L290 TraceCheckUtils]: 31: Hoare triple {9820#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {9820#false} is VALID [2022-04-28 03:35:13,345 INFO L290 TraceCheckUtils]: 32: Hoare triple {9820#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9820#false} is VALID [2022-04-28 03:35:13,345 INFO L290 TraceCheckUtils]: 33: Hoare triple {9820#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9820#false} is VALID [2022-04-28 03:35:13,345 INFO L290 TraceCheckUtils]: 34: Hoare triple {9820#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9820#false} is VALID [2022-04-28 03:35:13,345 INFO L290 TraceCheckUtils]: 35: Hoare triple {9820#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9820#false} is VALID [2022-04-28 03:35:13,345 INFO L290 TraceCheckUtils]: 36: Hoare triple {9820#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9820#false} is VALID [2022-04-28 03:35:13,345 INFO L290 TraceCheckUtils]: 37: Hoare triple {9820#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 38: Hoare triple {9820#false} assume #t~short172; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 39: Hoare triple {9820#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 40: Hoare triple {9820#false} assume 0 != #t~mem173;havoc #t~mem173; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L272 TraceCheckUtils]: 41: Hoare triple {9820#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 42: Hoare triple {9820#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 43: Hoare triple {9820#false} assume !(~len <= 0); {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L272 TraceCheckUtils]: 44: Hoare triple {9820#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 45: Hoare triple {9820#false} #t~loopctr188 := 0; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 46: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 47: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 48: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 49: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 50: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 51: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 52: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 53: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 54: Hoare triple {9820#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9820#false} is VALID [2022-04-28 03:35:13,346 INFO L290 TraceCheckUtils]: 55: Hoare triple {9820#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L290 TraceCheckUtils]: 56: Hoare triple {9820#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9820#false} {9820#false} #656#return; {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L290 TraceCheckUtils]: 58: Hoare triple {9820#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L290 TraceCheckUtils]: 59: Hoare triple {9820#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L272 TraceCheckUtils]: 60: Hoare triple {9820#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L290 TraceCheckUtils]: 61: Hoare triple {9820#false} ~cond := #in~cond; {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L290 TraceCheckUtils]: 62: Hoare triple {9820#false} assume 0 == ~cond; {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L290 TraceCheckUtils]: 63: Hoare triple {9820#false} assume !false; {9820#false} is VALID [2022-04-28 03:35:13,347 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 103 proven. 45 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-28 03:35:13,347 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:35:14,062 INFO L290 TraceCheckUtils]: 63: Hoare triple {9820#false} assume !false; {9820#false} is VALID [2022-04-28 03:35:14,062 INFO L290 TraceCheckUtils]: 62: Hoare triple {9820#false} assume 0 == ~cond; {9820#false} is VALID [2022-04-28 03:35:14,062 INFO L290 TraceCheckUtils]: 61: Hoare triple {9820#false} ~cond := #in~cond; {9820#false} is VALID [2022-04-28 03:35:14,062 INFO L272 TraceCheckUtils]: 60: Hoare triple {9820#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {9820#false} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 59: Hoare triple {9820#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {9820#false} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 58: Hoare triple {9820#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {9820#false} is VALID [2022-04-28 03:35:14,063 INFO L284 TraceCheckUtils]: 57: Hoare quadruple {9819#true} {9820#false} #656#return; {9820#false} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 56: Hoare triple {9819#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {9819#true} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 55: Hoare triple {9819#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {9819#true} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 54: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 53: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 52: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 51: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 50: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,063 INFO L290 TraceCheckUtils]: 49: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 48: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 47: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 46: Hoare triple {9819#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {9819#true} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 45: Hoare triple {9819#true} #t~loopctr188 := 0; {9819#true} is VALID [2022-04-28 03:35:14,064 INFO L272 TraceCheckUtils]: 44: Hoare triple {9820#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {9819#true} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 43: Hoare triple {9820#false} assume !(~len <= 0); {9820#false} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 42: Hoare triple {9820#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {9820#false} is VALID [2022-04-28 03:35:14,064 INFO L272 TraceCheckUtils]: 41: Hoare triple {9820#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {9820#false} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 40: Hoare triple {9820#false} assume 0 != #t~mem173;havoc #t~mem173; {9820#false} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 39: Hoare triple {9820#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {9820#false} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 38: Hoare triple {9820#false} assume #t~short172; {9820#false} is VALID [2022-04-28 03:35:14,064 INFO L290 TraceCheckUtils]: 37: Hoare triple {9820#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {9820#false} is VALID [2022-04-28 03:35:14,065 INFO L290 TraceCheckUtils]: 36: Hoare triple {9820#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {9820#false} is VALID [2022-04-28 03:35:14,065 INFO L290 TraceCheckUtils]: 35: Hoare triple {9820#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {9820#false} is VALID [2022-04-28 03:35:14,065 INFO L290 TraceCheckUtils]: 34: Hoare triple {9820#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {9820#false} is VALID [2022-04-28 03:35:14,065 INFO L290 TraceCheckUtils]: 33: Hoare triple {9820#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {9820#false} is VALID [2022-04-28 03:35:14,065 INFO L290 TraceCheckUtils]: 32: Hoare triple {9820#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {9820#false} is VALID [2022-04-28 03:35:14,065 INFO L290 TraceCheckUtils]: 31: Hoare triple {9820#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {9820#false} is VALID [2022-04-28 03:35:14,065 INFO L290 TraceCheckUtils]: 30: Hoare triple {9820#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {9820#false} is VALID [2022-04-28 03:35:14,066 INFO L284 TraceCheckUtils]: 29: Hoare quadruple {10170#(not (= |#Ultimate.C_memset_#amount| 24))} {9819#true} #672#return; {9820#false} is VALID [2022-04-28 03:35:14,066 INFO L290 TraceCheckUtils]: 28: Hoare triple {10170#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10170#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:35:14,067 INFO L290 TraceCheckUtils]: 27: Hoare triple {10177#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10170#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:35:14,070 INFO L290 TraceCheckUtils]: 26: Hoare triple {10181#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10177#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:14,072 INFO L290 TraceCheckUtils]: 25: Hoare triple {10185#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10181#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:14,075 INFO L290 TraceCheckUtils]: 24: Hoare triple {10189#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10185#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:14,077 INFO L290 TraceCheckUtils]: 23: Hoare triple {10193#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10189#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:14,079 INFO L290 TraceCheckUtils]: 22: Hoare triple {10197#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10193#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:35:14,081 INFO L290 TraceCheckUtils]: 21: Hoare triple {10201#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10197#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:14,083 INFO L290 TraceCheckUtils]: 20: Hoare triple {10205#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10201#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:35:14,086 INFO L290 TraceCheckUtils]: 19: Hoare triple {10209#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10205#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:35:14,088 INFO L290 TraceCheckUtils]: 18: Hoare triple {10213#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10209#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:14,089 INFO L290 TraceCheckUtils]: 17: Hoare triple {9819#true} #t~loopctr188 := 0; {10213#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:14,089 INFO L272 TraceCheckUtils]: 16: Hoare triple {9819#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {9819#true} is VALID [2022-04-28 03:35:14,089 INFO L290 TraceCheckUtils]: 15: Hoare triple {9819#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {9819#true} is VALID [2022-04-28 03:35:14,089 INFO L290 TraceCheckUtils]: 14: Hoare triple {9819#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {9819#true} is VALID [2022-04-28 03:35:14,089 INFO L290 TraceCheckUtils]: 13: Hoare triple {9819#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:14,089 INFO L290 TraceCheckUtils]: 12: Hoare triple {9819#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {9819#true} is VALID [2022-04-28 03:35:14,089 INFO L290 TraceCheckUtils]: 11: Hoare triple {9819#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:14,089 INFO L290 TraceCheckUtils]: 10: Hoare triple {9819#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {9819#true} is VALID [2022-04-28 03:35:14,089 INFO L290 TraceCheckUtils]: 9: Hoare triple {9819#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L290 TraceCheckUtils]: 8: Hoare triple {9819#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L290 TraceCheckUtils]: 7: Hoare triple {9819#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L272 TraceCheckUtils]: 6: Hoare triple {9819#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L290 TraceCheckUtils]: 5: Hoare triple {9819#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L272 TraceCheckUtils]: 4: Hoare triple {9819#true} call #t~ret187 := main(); {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9819#true} {9819#true} #682#return; {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L290 TraceCheckUtils]: 2: Hoare triple {9819#true} assume true; {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {9819#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {9819#true} is VALID [2022-04-28 03:35:14,090 INFO L272 TraceCheckUtils]: 0: Hoare triple {9819#true} call ULTIMATE.init(); {9819#true} is VALID [2022-04-28 03:35:14,091 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2022-04-28 03:35:14,091 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1597994242] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:35:14,091 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:35:14,091 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13, 13] total 36 [2022-04-28 03:35:14,091 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:35:14,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1140189896] [2022-04-28 03:35:14,091 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1140189896] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:35:14,091 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:35:14,091 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2022-04-28 03:35:14,092 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [217714737] [2022-04-28 03:35:14,092 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:35:14,092 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 64 [2022-04-28 03:35:14,092 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:35:14,092 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:14,160 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:14,160 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-28 03:35:14,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:14,161 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-28 03:35:14,161 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=307, Invalid=953, Unknown=0, NotChecked=0, Total=1260 [2022-04-28 03:35:14,162 INFO L87 Difference]: Start difference. First operand 85 states and 107 transitions. Second operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:16,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:16,380 INFO L93 Difference]: Finished difference Result 158 states and 202 transitions. [2022-04-28 03:35:16,380 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-28 03:35:16,380 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 64 [2022-04-28 03:35:16,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:16,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:16,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 191 transitions. [2022-04-28 03:35:16,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:16,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 191 transitions. [2022-04-28 03:35:16,385 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 191 transitions. [2022-04-28 03:35:16,587 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 191 edges. 191 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:16,592 INFO L225 Difference]: With dead ends: 158 [2022-04-28 03:35:16,592 INFO L226 Difference]: Without dead ends: 90 [2022-04-28 03:35:16,593 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=494, Invalid=1762, Unknown=0, NotChecked=0, Total=2256 [2022-04-28 03:35:16,593 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 595 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 177 SdHoareTripleChecker+Invalid, 644 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 595 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:16,594 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 177 Invalid, 644 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 595 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-28 03:35:16,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-28 03:35:16,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 86. [2022-04-28 03:35:16,632 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:16,632 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:16,632 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:16,633 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:16,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:16,637 INFO L93 Difference]: Finished difference Result 90 states and 114 transitions. [2022-04-28 03:35:16,638 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 114 transitions. [2022-04-28 03:35:16,638 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:16,638 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:16,638 INFO L74 IsIncluded]: Start isIncluded. First operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 90 states. [2022-04-28 03:35:16,638 INFO L87 Difference]: Start difference. First operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 90 states. [2022-04-28 03:35:16,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:16,640 INFO L93 Difference]: Finished difference Result 90 states and 114 transitions. [2022-04-28 03:35:16,641 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 114 transitions. [2022-04-28 03:35:16,642 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:16,642 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:16,642 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:16,642 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:16,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 68 states have (on average 1.25) internal successors, (85), 68 states have internal predecessors, (85), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:16,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 108 transitions. [2022-04-28 03:35:16,644 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 108 transitions. Word has length 64 [2022-04-28 03:35:16,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:16,644 INFO L495 AbstractCegarLoop]: Abstraction has 86 states and 108 transitions. [2022-04-28 03:35:16,645 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 13 states have internal predecessors, (46), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:16,645 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 86 states and 108 transitions. [2022-04-28 03:35:16,812 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:16,812 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 108 transitions. [2022-04-28 03:35:16,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-04-28 03:35:16,812 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:16,813 INFO L195 NwaCegarLoop]: trace histogram [20, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:16,828 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-28 03:35:17,013 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-28 03:35:17,013 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:17,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:17,014 INFO L85 PathProgramCache]: Analyzing trace with hash 1102249098, now seen corresponding path program 19 times [2022-04-28 03:35:17,014 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:17,014 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1964966946] [2022-04-28 03:35:17,014 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:35:17,014 INFO L85 PathProgramCache]: Analyzing trace with hash 1102249098, now seen corresponding path program 20 times [2022-04-28 03:35:17,014 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:17,014 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376312530] [2022-04-28 03:35:17,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:17,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:17,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:17,123 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:17,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:17,137 INFO L290 TraceCheckUtils]: 0: Hoare triple {10993#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10960#true} is VALID [2022-04-28 03:35:17,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {10960#true} assume true; {10960#true} is VALID [2022-04-28 03:35:17,137 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10960#true} {10960#true} #682#return; {10960#true} is VALID [2022-04-28 03:35:17,140 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:35:17,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:17,589 INFO L290 TraceCheckUtils]: 0: Hoare triple {10994#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:17,592 INFO L290 TraceCheckUtils]: 1: Hoare triple {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10996#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:17,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {10996#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10997#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:17,598 INFO L290 TraceCheckUtils]: 3: Hoare triple {10997#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10998#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:17,600 INFO L290 TraceCheckUtils]: 4: Hoare triple {10998#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:17,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {10999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11000#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:17,607 INFO L290 TraceCheckUtils]: 6: Hoare triple {11000#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11001#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:17,611 INFO L290 TraceCheckUtils]: 7: Hoare triple {11001#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11002#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:17,615 INFO L290 TraceCheckUtils]: 8: Hoare triple {11002#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11003#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:17,618 INFO L290 TraceCheckUtils]: 9: Hoare triple {11003#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11004#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:17,621 INFO L290 TraceCheckUtils]: 10: Hoare triple {11004#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11005#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 10)))} is VALID [2022-04-28 03:35:17,623 INFO L290 TraceCheckUtils]: 11: Hoare triple {11005#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 10)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:17,623 INFO L290 TraceCheckUtils]: 12: Hoare triple {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:17,624 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {10960#true} #672#return; {10961#false} is VALID [2022-04-28 03:35:17,625 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2022-04-28 03:35:17,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:17,641 INFO L290 TraceCheckUtils]: 0: Hoare triple {10994#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10960#true} is VALID [2022-04-28 03:35:17,641 INFO L290 TraceCheckUtils]: 1: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,641 INFO L290 TraceCheckUtils]: 2: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,641 INFO L290 TraceCheckUtils]: 3: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 4: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 5: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 6: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 7: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 8: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 9: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 10: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 11: Hoare triple {10960#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L290 TraceCheckUtils]: 12: Hoare triple {10960#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10960#true} is VALID [2022-04-28 03:35:17,642 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {10960#true} {10961#false} #656#return; {10961#false} is VALID [2022-04-28 03:35:17,643 INFO L272 TraceCheckUtils]: 0: Hoare triple {10960#true} call ULTIMATE.init(); {10993#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {10993#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 2: Hoare triple {10960#true} assume true; {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10960#true} {10960#true} #682#return; {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L272 TraceCheckUtils]: 4: Hoare triple {10960#true} call #t~ret187 := main(); {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 5: Hoare triple {10960#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L272 TraceCheckUtils]: 6: Hoare triple {10960#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 7: Hoare triple {10960#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 8: Hoare triple {10960#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 9: Hoare triple {10960#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 10: Hoare triple {10960#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 11: Hoare triple {10960#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 12: Hoare triple {10960#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10960#true} is VALID [2022-04-28 03:35:17,644 INFO L290 TraceCheckUtils]: 13: Hoare triple {10960#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:17,645 INFO L290 TraceCheckUtils]: 14: Hoare triple {10960#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10960#true} is VALID [2022-04-28 03:35:17,645 INFO L290 TraceCheckUtils]: 15: Hoare triple {10960#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10960#true} is VALID [2022-04-28 03:35:17,646 INFO L272 TraceCheckUtils]: 16: Hoare triple {10960#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {10994#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:17,646 INFO L290 TraceCheckUtils]: 17: Hoare triple {10994#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:17,650 INFO L290 TraceCheckUtils]: 18: Hoare triple {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10996#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:17,654 INFO L290 TraceCheckUtils]: 19: Hoare triple {10996#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10997#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:17,658 INFO L290 TraceCheckUtils]: 20: Hoare triple {10997#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10998#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:17,662 INFO L290 TraceCheckUtils]: 21: Hoare triple {10998#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:17,666 INFO L290 TraceCheckUtils]: 22: Hoare triple {10999#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11000#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:17,670 INFO L290 TraceCheckUtils]: 23: Hoare triple {11000#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11001#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:17,675 INFO L290 TraceCheckUtils]: 24: Hoare triple {11001#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11002#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:17,679 INFO L290 TraceCheckUtils]: 25: Hoare triple {11002#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11003#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:17,683 INFO L290 TraceCheckUtils]: 26: Hoare triple {11003#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11004#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:17,687 INFO L290 TraceCheckUtils]: 27: Hoare triple {11004#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11005#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 10)))} is VALID [2022-04-28 03:35:17,709 INFO L290 TraceCheckUtils]: 28: Hoare triple {11005#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 10)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:17,709 INFO L290 TraceCheckUtils]: 29: Hoare triple {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:17,711 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {11006#(or (<= |#Ultimate.C_memset_#amount| 10) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {10960#true} #672#return; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 31: Hoare triple {10961#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 32: Hoare triple {10961#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 33: Hoare triple {10961#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 34: Hoare triple {10961#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 35: Hoare triple {10961#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 36: Hoare triple {10961#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 37: Hoare triple {10961#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 38: Hoare triple {10961#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 39: Hoare triple {10961#false} assume #t~short172; {10961#false} is VALID [2022-04-28 03:35:17,711 INFO L290 TraceCheckUtils]: 40: Hoare triple {10961#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10961#false} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 41: Hoare triple {10961#false} assume 0 != #t~mem173;havoc #t~mem173; {10961#false} is VALID [2022-04-28 03:35:17,712 INFO L272 TraceCheckUtils]: 42: Hoare triple {10961#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10961#false} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 43: Hoare triple {10961#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10961#false} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 44: Hoare triple {10961#false} assume !(~len <= 0); {10961#false} is VALID [2022-04-28 03:35:17,712 INFO L272 TraceCheckUtils]: 45: Hoare triple {10961#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10994#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 46: Hoare triple {10994#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {10960#true} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 47: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 48: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 49: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 50: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 51: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 52: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 53: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,712 INFO L290 TraceCheckUtils]: 54: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 55: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 56: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 57: Hoare triple {10960#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10960#true} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 58: Hoare triple {10960#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10960#true} is VALID [2022-04-28 03:35:17,713 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {10960#true} {10961#false} #656#return; {10961#false} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 60: Hoare triple {10961#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10961#false} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 61: Hoare triple {10961#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10961#false} is VALID [2022-04-28 03:35:17,713 INFO L272 TraceCheckUtils]: 62: Hoare triple {10961#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10961#false} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 63: Hoare triple {10961#false} ~cond := #in~cond; {10961#false} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 64: Hoare triple {10961#false} assume 0 == ~cond; {10961#false} is VALID [2022-04-28 03:35:17,713 INFO L290 TraceCheckUtils]: 65: Hoare triple {10961#false} assume !false; {10961#false} is VALID [2022-04-28 03:35:17,714 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 0 proven. 178 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2022-04-28 03:35:17,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:17,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1376312530] [2022-04-28 03:35:17,714 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1376312530] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:17,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [457418106] [2022-04-28 03:35:17,714 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 03:35:17,714 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:17,714 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:17,716 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:17,724 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-28 03:35:18,487 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 03:35:18,487 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:35:18,493 INFO L263 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-28 03:35:18,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:18,513 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:19,184 INFO L272 TraceCheckUtils]: 0: Hoare triple {10960#true} call ULTIMATE.init(); {10960#true} is VALID [2022-04-28 03:35:19,184 INFO L290 TraceCheckUtils]: 1: Hoare triple {10960#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L290 TraceCheckUtils]: 2: Hoare triple {10960#true} assume true; {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10960#true} {10960#true} #682#return; {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L272 TraceCheckUtils]: 4: Hoare triple {10960#true} call #t~ret187 := main(); {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L290 TraceCheckUtils]: 5: Hoare triple {10960#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L272 TraceCheckUtils]: 6: Hoare triple {10960#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L290 TraceCheckUtils]: 7: Hoare triple {10960#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L290 TraceCheckUtils]: 8: Hoare triple {10960#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L290 TraceCheckUtils]: 9: Hoare triple {10960#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L290 TraceCheckUtils]: 10: Hoare triple {10960#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L290 TraceCheckUtils]: 11: Hoare triple {10960#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:19,185 INFO L290 TraceCheckUtils]: 12: Hoare triple {10960#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10960#true} is VALID [2022-04-28 03:35:19,186 INFO L290 TraceCheckUtils]: 13: Hoare triple {10960#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:19,186 INFO L290 TraceCheckUtils]: 14: Hoare triple {10960#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10960#true} is VALID [2022-04-28 03:35:19,186 INFO L290 TraceCheckUtils]: 15: Hoare triple {10960#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10960#true} is VALID [2022-04-28 03:35:19,186 INFO L272 TraceCheckUtils]: 16: Hoare triple {10960#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {10960#true} is VALID [2022-04-28 03:35:19,186 INFO L290 TraceCheckUtils]: 17: Hoare triple {10960#true} #t~loopctr188 := 0; {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:19,189 INFO L290 TraceCheckUtils]: 18: Hoare triple {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11064#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,190 INFO L290 TraceCheckUtils]: 19: Hoare triple {11064#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11068#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:19,192 INFO L290 TraceCheckUtils]: 20: Hoare triple {11068#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11072#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:19,194 INFO L290 TraceCheckUtils]: 21: Hoare triple {11072#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11076#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,196 INFO L290 TraceCheckUtils]: 22: Hoare triple {11076#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11080#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:19,198 INFO L290 TraceCheckUtils]: 23: Hoare triple {11080#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11084#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:19,200 INFO L290 TraceCheckUtils]: 24: Hoare triple {11084#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11088#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,202 INFO L290 TraceCheckUtils]: 25: Hoare triple {11088#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11092#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:19,203 INFO L290 TraceCheckUtils]: 26: Hoare triple {11092#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11096#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,203 INFO L290 TraceCheckUtils]: 27: Hoare triple {11096#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:19,203 INFO L290 TraceCheckUtils]: 28: Hoare triple {10960#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10960#true} is VALID [2022-04-28 03:35:19,203 INFO L290 TraceCheckUtils]: 29: Hoare triple {10960#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10960#true} {10960#true} #672#return; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 31: Hoare triple {10960#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 32: Hoare triple {10960#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 33: Hoare triple {10960#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 34: Hoare triple {10960#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 35: Hoare triple {10960#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 36: Hoare triple {10960#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 37: Hoare triple {10960#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 38: Hoare triple {10960#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 39: Hoare triple {10960#true} assume #t~short172; {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 40: Hoare triple {10960#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:19,204 INFO L290 TraceCheckUtils]: 41: Hoare triple {10960#true} assume 0 != #t~mem173;havoc #t~mem173; {10960#true} is VALID [2022-04-28 03:35:19,205 INFO L272 TraceCheckUtils]: 42: Hoare triple {10960#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10960#true} is VALID [2022-04-28 03:35:19,205 INFO L290 TraceCheckUtils]: 43: Hoare triple {10960#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10960#true} is VALID [2022-04-28 03:35:19,205 INFO L290 TraceCheckUtils]: 44: Hoare triple {10960#true} assume !(~len <= 0); {10960#true} is VALID [2022-04-28 03:35:19,205 INFO L272 TraceCheckUtils]: 45: Hoare triple {10960#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10960#true} is VALID [2022-04-28 03:35:19,205 INFO L290 TraceCheckUtils]: 46: Hoare triple {10960#true} #t~loopctr188 := 0; {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:19,208 INFO L290 TraceCheckUtils]: 47: Hoare triple {10995#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11064#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,209 INFO L290 TraceCheckUtils]: 48: Hoare triple {11064#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11068#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:19,211 INFO L290 TraceCheckUtils]: 49: Hoare triple {11068#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11072#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:19,213 INFO L290 TraceCheckUtils]: 50: Hoare triple {11072#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11076#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,214 INFO L290 TraceCheckUtils]: 51: Hoare triple {11076#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11080#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:19,216 INFO L290 TraceCheckUtils]: 52: Hoare triple {11080#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11084#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:19,218 INFO L290 TraceCheckUtils]: 53: Hoare triple {11084#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11088#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,219 INFO L290 TraceCheckUtils]: 54: Hoare triple {11088#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11092#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:19,221 INFO L290 TraceCheckUtils]: 55: Hoare triple {11092#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11096#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,222 INFO L290 TraceCheckUtils]: 56: Hoare triple {11096#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11187#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:19,223 INFO L290 TraceCheckUtils]: 57: Hoare triple {11187#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {11191#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 10) 4294967296) 1))} is VALID [2022-04-28 03:35:19,224 INFO L290 TraceCheckUtils]: 58: Hoare triple {11191#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 10) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11191#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 10) 4294967296) 1))} is VALID [2022-04-28 03:35:19,225 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {11191#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 10) 4294967296) 1))} {10960#true} #656#return; {10961#false} is VALID [2022-04-28 03:35:19,225 INFO L290 TraceCheckUtils]: 60: Hoare triple {10961#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10961#false} is VALID [2022-04-28 03:35:19,225 INFO L290 TraceCheckUtils]: 61: Hoare triple {10961#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10961#false} is VALID [2022-04-28 03:35:19,225 INFO L272 TraceCheckUtils]: 62: Hoare triple {10961#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10961#false} is VALID [2022-04-28 03:35:19,225 INFO L290 TraceCheckUtils]: 63: Hoare triple {10961#false} ~cond := #in~cond; {10961#false} is VALID [2022-04-28 03:35:19,225 INFO L290 TraceCheckUtils]: 64: Hoare triple {10961#false} assume 0 == ~cond; {10961#false} is VALID [2022-04-28 03:35:19,225 INFO L290 TraceCheckUtils]: 65: Hoare triple {10961#false} assume !false; {10961#false} is VALID [2022-04-28 03:35:19,225 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 13 proven. 210 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-28 03:35:19,225 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:35:20,091 INFO L290 TraceCheckUtils]: 65: Hoare triple {10961#false} assume !false; {10961#false} is VALID [2022-04-28 03:35:20,091 INFO L290 TraceCheckUtils]: 64: Hoare triple {10961#false} assume 0 == ~cond; {10961#false} is VALID [2022-04-28 03:35:20,091 INFO L290 TraceCheckUtils]: 63: Hoare triple {10961#false} ~cond := #in~cond; {10961#false} is VALID [2022-04-28 03:35:20,091 INFO L272 TraceCheckUtils]: 62: Hoare triple {10961#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {10961#false} is VALID [2022-04-28 03:35:20,091 INFO L290 TraceCheckUtils]: 61: Hoare triple {10961#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {10961#false} is VALID [2022-04-28 03:35:20,091 INFO L290 TraceCheckUtils]: 60: Hoare triple {10961#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {10961#false} is VALID [2022-04-28 03:35:20,092 INFO L284 TraceCheckUtils]: 59: Hoare quadruple {11237#(not (= |#Ultimate.C_memset_#amount| 80))} {10960#true} #656#return; {10961#false} is VALID [2022-04-28 03:35:20,092 INFO L290 TraceCheckUtils]: 58: Hoare triple {11237#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {11237#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:35:20,093 INFO L290 TraceCheckUtils]: 57: Hoare triple {11244#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {11237#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:35:20,096 INFO L290 TraceCheckUtils]: 56: Hoare triple {11248#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11244#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:20,099 INFO L290 TraceCheckUtils]: 55: Hoare triple {11252#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11248#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:20,100 INFO L290 TraceCheckUtils]: 54: Hoare triple {11256#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11252#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:20,104 INFO L290 TraceCheckUtils]: 53: Hoare triple {11260#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11256#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:20,108 INFO L290 TraceCheckUtils]: 52: Hoare triple {11264#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11260#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:20,109 INFO L290 TraceCheckUtils]: 51: Hoare triple {11268#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11264#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:20,110 INFO L290 TraceCheckUtils]: 50: Hoare triple {11272#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11268#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:20,111 INFO L290 TraceCheckUtils]: 49: Hoare triple {11276#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11272#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:20,113 INFO L290 TraceCheckUtils]: 48: Hoare triple {11280#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11276#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:20,114 INFO L290 TraceCheckUtils]: 47: Hoare triple {11284#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {11280#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:20,114 INFO L290 TraceCheckUtils]: 46: Hoare triple {10960#true} #t~loopctr188 := 0; {11284#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:20,114 INFO L272 TraceCheckUtils]: 45: Hoare triple {10960#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {10960#true} is VALID [2022-04-28 03:35:20,114 INFO L290 TraceCheckUtils]: 44: Hoare triple {10960#true} assume !(~len <= 0); {10960#true} is VALID [2022-04-28 03:35:20,114 INFO L290 TraceCheckUtils]: 43: Hoare triple {10960#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {10960#true} is VALID [2022-04-28 03:35:20,114 INFO L272 TraceCheckUtils]: 42: Hoare triple {10960#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {10960#true} is VALID [2022-04-28 03:35:20,114 INFO L290 TraceCheckUtils]: 41: Hoare triple {10960#true} assume 0 != #t~mem173;havoc #t~mem173; {10960#true} is VALID [2022-04-28 03:35:20,114 INFO L290 TraceCheckUtils]: 40: Hoare triple {10960#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:20,114 INFO L290 TraceCheckUtils]: 39: Hoare triple {10960#true} assume #t~short172; {10960#true} is VALID [2022-04-28 03:35:20,114 INFO L290 TraceCheckUtils]: 38: Hoare triple {10960#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 37: Hoare triple {10960#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 36: Hoare triple {10960#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 35: Hoare triple {10960#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 34: Hoare triple {10960#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 33: Hoare triple {10960#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 32: Hoare triple {10960#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 31: Hoare triple {10960#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10960#true} {10960#true} #672#return; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 29: Hoare triple {10960#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 28: Hoare triple {10960#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 27: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 26: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 25: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 24: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 23: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 22: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 21: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 20: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,115 INFO L290 TraceCheckUtils]: 19: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 18: Hoare triple {10960#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 17: Hoare triple {10960#true} #t~loopctr188 := 0; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L272 TraceCheckUtils]: 16: Hoare triple {10960#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 15: Hoare triple {10960#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 14: Hoare triple {10960#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 13: Hoare triple {10960#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 12: Hoare triple {10960#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 11: Hoare triple {10960#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 10: Hoare triple {10960#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 9: Hoare triple {10960#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 8: Hoare triple {10960#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 7: Hoare triple {10960#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L272 TraceCheckUtils]: 6: Hoare triple {10960#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 5: Hoare triple {10960#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L272 TraceCheckUtils]: 4: Hoare triple {10960#true} call #t~ret187 := main(); {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10960#true} {10960#true} #682#return; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 2: Hoare triple {10960#true} assume true; {10960#true} is VALID [2022-04-28 03:35:20,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {10960#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {10960#true} is VALID [2022-04-28 03:35:20,117 INFO L272 TraceCheckUtils]: 0: Hoare triple {10960#true} call ULTIMATE.init(); {10960#true} is VALID [2022-04-28 03:35:20,117 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 123 proven. 55 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2022-04-28 03:35:20,117 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [457418106] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:35:20,117 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:35:20,117 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14] total 39 [2022-04-28 03:35:20,117 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:35:20,117 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1964966946] [2022-04-28 03:35:20,117 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1964966946] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:35:20,117 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:35:20,117 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2022-04-28 03:35:20,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643461078] [2022-04-28 03:35:20,118 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:35:20,118 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 66 [2022-04-28 03:35:20,118 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:35:20,118 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:20,176 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:20,176 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-28 03:35:20,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:20,177 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-28 03:35:20,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=359, Invalid=1123, Unknown=0, NotChecked=0, Total=1482 [2022-04-28 03:35:20,177 INFO L87 Difference]: Start difference. First operand 86 states and 108 transitions. Second operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:22,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:22,366 INFO L93 Difference]: Finished difference Result 160 states and 204 transitions. [2022-04-28 03:35:22,366 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-28 03:35:22,367 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 66 [2022-04-28 03:35:22,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:22,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:22,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 192 transitions. [2022-04-28 03:35:22,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:22,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 192 transitions. [2022-04-28 03:35:22,371 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 192 transitions. [2022-04-28 03:35:22,573 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 192 edges. 192 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:22,574 INFO L225 Difference]: With dead ends: 160 [2022-04-28 03:35:22,574 INFO L226 Difference]: Without dead ends: 91 [2022-04-28 03:35:22,576 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=575, Invalid=2077, Unknown=0, NotChecked=0, Total=2652 [2022-04-28 03:35:22,576 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 464 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 515 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 464 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:22,576 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 143 Invalid, 515 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 464 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-28 03:35:22,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-04-28 03:35:22,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 87. [2022-04-28 03:35:22,609 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:22,609 INFO L82 GeneralOperation]: Start isEquivalent. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:22,609 INFO L74 IsIncluded]: Start isIncluded. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:22,609 INFO L87 Difference]: Start difference. First operand 91 states. Second operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:22,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:22,612 INFO L93 Difference]: Finished difference Result 91 states and 115 transitions. [2022-04-28 03:35:22,612 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 115 transitions. [2022-04-28 03:35:22,612 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:22,612 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:22,612 INFO L74 IsIncluded]: Start isIncluded. First operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 91 states. [2022-04-28 03:35:22,613 INFO L87 Difference]: Start difference. First operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 91 states. [2022-04-28 03:35:22,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:22,615 INFO L93 Difference]: Finished difference Result 91 states and 115 transitions. [2022-04-28 03:35:22,615 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 115 transitions. [2022-04-28 03:35:22,615 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:22,615 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:22,615 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:22,615 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:22,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 69 states have (on average 1.2463768115942029) internal successors, (86), 69 states have internal predecessors, (86), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:22,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 109 transitions. [2022-04-28 03:35:22,618 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 109 transitions. Word has length 66 [2022-04-28 03:35:22,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:22,618 INFO L495 AbstractCegarLoop]: Abstraction has 87 states and 109 transitions. [2022-04-28 03:35:22,618 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.9375) internal successors, (47), 14 states have internal predecessors, (47), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:22,618 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 87 states and 109 transitions. [2022-04-28 03:35:22,772 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:22,773 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 109 transitions. [2022-04-28 03:35:22,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-28 03:35:22,773 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:22,773 INFO L195 NwaCegarLoop]: trace histogram [22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:22,793 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-04-28 03:35:22,979 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-28 03:35:22,979 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:22,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:22,980 INFO L85 PathProgramCache]: Analyzing trace with hash -1393110240, now seen corresponding path program 21 times [2022-04-28 03:35:22,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:22,980 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [11763107] [2022-04-28 03:35:22,980 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:35:22,980 INFO L85 PathProgramCache]: Analyzing trace with hash -1393110240, now seen corresponding path program 22 times [2022-04-28 03:35:22,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:22,981 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1281582333] [2022-04-28 03:35:22,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:22,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:23,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:23,106 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:23,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:23,116 INFO L290 TraceCheckUtils]: 0: Hoare triple {12163#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12128#true} is VALID [2022-04-28 03:35:23,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {12128#true} assume true; {12128#true} is VALID [2022-04-28 03:35:23,116 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12128#true} {12128#true} #682#return; {12128#true} is VALID [2022-04-28 03:35:23,120 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:35:23,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:23,651 INFO L290 TraceCheckUtils]: 0: Hoare triple {12164#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:23,655 INFO L290 TraceCheckUtils]: 1: Hoare triple {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12166#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:23,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {12166#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12167#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:23,663 INFO L290 TraceCheckUtils]: 3: Hoare triple {12167#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12168#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:23,666 INFO L290 TraceCheckUtils]: 4: Hoare triple {12168#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12169#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:23,670 INFO L290 TraceCheckUtils]: 5: Hoare triple {12169#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12170#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:23,673 INFO L290 TraceCheckUtils]: 6: Hoare triple {12170#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12171#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:23,677 INFO L290 TraceCheckUtils]: 7: Hoare triple {12171#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12172#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:23,681 INFO L290 TraceCheckUtils]: 8: Hoare triple {12172#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12173#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:23,684 INFO L290 TraceCheckUtils]: 9: Hoare triple {12173#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12174#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:23,687 INFO L290 TraceCheckUtils]: 10: Hoare triple {12174#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12175#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:23,690 INFO L290 TraceCheckUtils]: 11: Hoare triple {12175#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12176#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 11)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:35:23,693 INFO L290 TraceCheckUtils]: 12: Hoare triple {12176#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 11)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-28 03:35:23,693 INFO L290 TraceCheckUtils]: 13: Hoare triple {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-28 03:35:23,694 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} {12128#true} #672#return; {12129#false} is VALID [2022-04-28 03:35:23,695 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-28 03:35:23,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:23,717 INFO L290 TraceCheckUtils]: 0: Hoare triple {12164#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 1: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 2: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 3: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 4: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 5: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 6: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 7: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 8: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,718 INFO L290 TraceCheckUtils]: 9: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,719 INFO L290 TraceCheckUtils]: 10: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,719 INFO L290 TraceCheckUtils]: 11: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,719 INFO L290 TraceCheckUtils]: 12: Hoare triple {12128#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12128#true} is VALID [2022-04-28 03:35:23,719 INFO L290 TraceCheckUtils]: 13: Hoare triple {12128#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12128#true} is VALID [2022-04-28 03:35:23,719 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {12128#true} {12129#false} #656#return; {12129#false} is VALID [2022-04-28 03:35:23,720 INFO L272 TraceCheckUtils]: 0: Hoare triple {12128#true} call ULTIMATE.init(); {12163#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:23,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {12163#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12128#true} is VALID [2022-04-28 03:35:23,720 INFO L290 TraceCheckUtils]: 2: Hoare triple {12128#true} assume true; {12128#true} is VALID [2022-04-28 03:35:23,720 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12128#true} {12128#true} #682#return; {12128#true} is VALID [2022-04-28 03:35:23,720 INFO L272 TraceCheckUtils]: 4: Hoare triple {12128#true} call #t~ret187 := main(); {12128#true} is VALID [2022-04-28 03:35:23,720 INFO L290 TraceCheckUtils]: 5: Hoare triple {12128#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12128#true} is VALID [2022-04-28 03:35:23,720 INFO L272 TraceCheckUtils]: 6: Hoare triple {12128#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 7: Hoare triple {12128#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 8: Hoare triple {12128#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {12128#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 10: Hoare triple {12128#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 11: Hoare triple {12128#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 12: Hoare triple {12128#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 13: Hoare triple {12128#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 14: Hoare triple {12128#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12128#true} is VALID [2022-04-28 03:35:23,721 INFO L290 TraceCheckUtils]: 15: Hoare triple {12128#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12128#true} is VALID [2022-04-28 03:35:23,722 INFO L272 TraceCheckUtils]: 16: Hoare triple {12128#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {12164#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:23,722 INFO L290 TraceCheckUtils]: 17: Hoare triple {12164#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:23,726 INFO L290 TraceCheckUtils]: 18: Hoare triple {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12166#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:23,729 INFO L290 TraceCheckUtils]: 19: Hoare triple {12166#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12167#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:23,733 INFO L290 TraceCheckUtils]: 20: Hoare triple {12167#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12168#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:23,736 INFO L290 TraceCheckUtils]: 21: Hoare triple {12168#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12169#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:23,740 INFO L290 TraceCheckUtils]: 22: Hoare triple {12169#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12170#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:23,743 INFO L290 TraceCheckUtils]: 23: Hoare triple {12170#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12171#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:23,747 INFO L290 TraceCheckUtils]: 24: Hoare triple {12171#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12172#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:23,751 INFO L290 TraceCheckUtils]: 25: Hoare triple {12172#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12173#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:23,756 INFO L290 TraceCheckUtils]: 26: Hoare triple {12173#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12174#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:23,759 INFO L290 TraceCheckUtils]: 27: Hoare triple {12174#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12175#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:23,762 INFO L290 TraceCheckUtils]: 28: Hoare triple {12175#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12176#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 11)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:35:23,765 INFO L290 TraceCheckUtils]: 29: Hoare triple {12176#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 11)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-28 03:35:23,765 INFO L290 TraceCheckUtils]: 30: Hoare triple {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} is VALID [2022-04-28 03:35:23,766 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12177#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 11))} {12128#true} #672#return; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 32: Hoare triple {12129#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 33: Hoare triple {12129#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 34: Hoare triple {12129#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 35: Hoare triple {12129#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 36: Hoare triple {12129#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 37: Hoare triple {12129#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 38: Hoare triple {12129#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 39: Hoare triple {12129#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 40: Hoare triple {12129#false} assume #t~short172; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 41: Hoare triple {12129#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L290 TraceCheckUtils]: 42: Hoare triple {12129#false} assume 0 != #t~mem173;havoc #t~mem173; {12129#false} is VALID [2022-04-28 03:35:23,767 INFO L272 TraceCheckUtils]: 43: Hoare triple {12129#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12129#false} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 44: Hoare triple {12129#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12129#false} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 45: Hoare triple {12129#false} assume !(~len <= 0); {12129#false} is VALID [2022-04-28 03:35:23,768 INFO L272 TraceCheckUtils]: 46: Hoare triple {12129#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12164#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 47: Hoare triple {12164#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 48: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 49: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 50: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 51: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 52: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 53: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 54: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 55: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,768 INFO L290 TraceCheckUtils]: 56: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 57: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 58: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 59: Hoare triple {12128#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12128#true} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 60: Hoare triple {12128#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12128#true} is VALID [2022-04-28 03:35:23,769 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12128#true} {12129#false} #656#return; {12129#false} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 62: Hoare triple {12129#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12129#false} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 63: Hoare triple {12129#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12129#false} is VALID [2022-04-28 03:35:23,769 INFO L272 TraceCheckUtils]: 64: Hoare triple {12129#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12129#false} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 65: Hoare triple {12129#false} ~cond := #in~cond; {12129#false} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 66: Hoare triple {12129#false} assume 0 == ~cond; {12129#false} is VALID [2022-04-28 03:35:23,769 INFO L290 TraceCheckUtils]: 67: Hoare triple {12129#false} assume !false; {12129#false} is VALID [2022-04-28 03:35:23,770 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 0 proven. 212 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2022-04-28 03:35:23,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:23,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1281582333] [2022-04-28 03:35:23,770 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1281582333] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:23,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [759814882] [2022-04-28 03:35:23,770 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 03:35:23,770 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:23,770 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:23,772 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:23,780 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-28 03:35:24,292 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 03:35:24,293 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:35:24,297 INFO L263 TraceCheckSpWp]: Trace formula consists of 835 conjuncts, 52 conjunts are in the unsatisfiable core [2022-04-28 03:35:24,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:24,318 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:35:25,159 INFO L272 TraceCheckUtils]: 0: Hoare triple {12128#true} call ULTIMATE.init(); {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 1: Hoare triple {12128#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 2: Hoare triple {12128#true} assume true; {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12128#true} {12128#true} #682#return; {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L272 TraceCheckUtils]: 4: Hoare triple {12128#true} call #t~ret187 := main(); {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 5: Hoare triple {12128#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L272 TraceCheckUtils]: 6: Hoare triple {12128#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 7: Hoare triple {12128#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 8: Hoare triple {12128#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 9: Hoare triple {12128#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 10: Hoare triple {12128#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 11: Hoare triple {12128#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 12: Hoare triple {12128#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 13: Hoare triple {12128#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:25,160 INFO L290 TraceCheckUtils]: 14: Hoare triple {12128#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12128#true} is VALID [2022-04-28 03:35:25,161 INFO L290 TraceCheckUtils]: 15: Hoare triple {12128#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12128#true} is VALID [2022-04-28 03:35:25,161 INFO L272 TraceCheckUtils]: 16: Hoare triple {12128#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {12128#true} is VALID [2022-04-28 03:35:25,161 INFO L290 TraceCheckUtils]: 17: Hoare triple {12128#true} #t~loopctr188 := 0; {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:25,163 INFO L290 TraceCheckUtils]: 18: Hoare triple {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,164 INFO L290 TraceCheckUtils]: 19: Hoare triple {12235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:25,165 INFO L290 TraceCheckUtils]: 20: Hoare triple {12239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12243#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:25,166 INFO L290 TraceCheckUtils]: 21: Hoare triple {12243#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,167 INFO L290 TraceCheckUtils]: 22: Hoare triple {12247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12251#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:25,168 INFO L290 TraceCheckUtils]: 23: Hoare triple {12251#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12255#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:25,169 INFO L290 TraceCheckUtils]: 24: Hoare triple {12255#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12259#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,170 INFO L290 TraceCheckUtils]: 25: Hoare triple {12259#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12263#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:25,171 INFO L290 TraceCheckUtils]: 26: Hoare triple {12263#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12267#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,172 INFO L290 TraceCheckUtils]: 27: Hoare triple {12267#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12271#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,172 INFO L290 TraceCheckUtils]: 28: Hoare triple {12271#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:25,172 INFO L290 TraceCheckUtils]: 29: Hoare triple {12128#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12128#true} is VALID [2022-04-28 03:35:25,172 INFO L290 TraceCheckUtils]: 30: Hoare triple {12128#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12128#true} is VALID [2022-04-28 03:35:25,172 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12128#true} {12128#true} #672#return; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 32: Hoare triple {12128#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 33: Hoare triple {12128#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 34: Hoare triple {12128#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 35: Hoare triple {12128#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 36: Hoare triple {12128#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 37: Hoare triple {12128#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 38: Hoare triple {12128#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 39: Hoare triple {12128#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 40: Hoare triple {12128#true} assume #t~short172; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 41: Hoare triple {12128#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 42: Hoare triple {12128#true} assume 0 != #t~mem173;havoc #t~mem173; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L272 TraceCheckUtils]: 43: Hoare triple {12128#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 44: Hoare triple {12128#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L290 TraceCheckUtils]: 45: Hoare triple {12128#true} assume !(~len <= 0); {12128#true} is VALID [2022-04-28 03:35:25,173 INFO L272 TraceCheckUtils]: 46: Hoare triple {12128#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12128#true} is VALID [2022-04-28 03:35:25,174 INFO L290 TraceCheckUtils]: 47: Hoare triple {12128#true} #t~loopctr188 := 0; {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:25,175 INFO L290 TraceCheckUtils]: 48: Hoare triple {12165#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,176 INFO L290 TraceCheckUtils]: 49: Hoare triple {12235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:25,177 INFO L290 TraceCheckUtils]: 50: Hoare triple {12239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12243#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:35:25,178 INFO L290 TraceCheckUtils]: 51: Hoare triple {12243#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,179 INFO L290 TraceCheckUtils]: 52: Hoare triple {12247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12251#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:25,180 INFO L290 TraceCheckUtils]: 53: Hoare triple {12251#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12255#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:25,181 INFO L290 TraceCheckUtils]: 54: Hoare triple {12255#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12259#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,182 INFO L290 TraceCheckUtils]: 55: Hoare triple {12259#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12263#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:25,183 INFO L290 TraceCheckUtils]: 56: Hoare triple {12263#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12267#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,184 INFO L290 TraceCheckUtils]: 57: Hoare triple {12267#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12271#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,185 INFO L290 TraceCheckUtils]: 58: Hoare triple {12271#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12365#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:25,186 INFO L290 TraceCheckUtils]: 59: Hoare triple {12365#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12369#(and (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967307) 4294967296)) (< (div (+ (- 4294967307) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2))} is VALID [2022-04-28 03:35:25,187 INFO L290 TraceCheckUtils]: 60: Hoare triple {12369#(and (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967307) 4294967296)) (< (div (+ (- 4294967307) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12369#(and (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967307) 4294967296)) (< (div (+ (- 4294967307) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2))} is VALID [2022-04-28 03:35:25,188 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12369#(and (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967307) 4294967296)) (< (div (+ (- 4294967307) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2))} {12128#true} #656#return; {12129#false} is VALID [2022-04-28 03:35:25,188 INFO L290 TraceCheckUtils]: 62: Hoare triple {12129#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12129#false} is VALID [2022-04-28 03:35:25,188 INFO L290 TraceCheckUtils]: 63: Hoare triple {12129#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12129#false} is VALID [2022-04-28 03:35:25,188 INFO L272 TraceCheckUtils]: 64: Hoare triple {12129#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12129#false} is VALID [2022-04-28 03:35:25,188 INFO L290 TraceCheckUtils]: 65: Hoare triple {12129#false} ~cond := #in~cond; {12129#false} is VALID [2022-04-28 03:35:25,188 INFO L290 TraceCheckUtils]: 66: Hoare triple {12129#false} assume 0 == ~cond; {12129#false} is VALID [2022-04-28 03:35:25,188 INFO L290 TraceCheckUtils]: 67: Hoare triple {12129#false} assume !false; {12129#false} is VALID [2022-04-28 03:35:25,188 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 14 proven. 253 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-28 03:35:25,189 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:35:26,405 INFO L290 TraceCheckUtils]: 67: Hoare triple {12129#false} assume !false; {12129#false} is VALID [2022-04-28 03:35:26,406 INFO L290 TraceCheckUtils]: 66: Hoare triple {12129#false} assume 0 == ~cond; {12129#false} is VALID [2022-04-28 03:35:26,406 INFO L290 TraceCheckUtils]: 65: Hoare triple {12129#false} ~cond := #in~cond; {12129#false} is VALID [2022-04-28 03:35:26,406 INFO L272 TraceCheckUtils]: 64: Hoare triple {12129#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {12129#false} is VALID [2022-04-28 03:35:26,406 INFO L290 TraceCheckUtils]: 63: Hoare triple {12129#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {12129#false} is VALID [2022-04-28 03:35:26,406 INFO L290 TraceCheckUtils]: 62: Hoare triple {12129#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {12129#false} is VALID [2022-04-28 03:35:26,407 INFO L284 TraceCheckUtils]: 61: Hoare quadruple {12415#(not (= |#Ultimate.C_memset_#amount| 80))} {12128#true} #656#return; {12129#false} is VALID [2022-04-28 03:35:26,407 INFO L290 TraceCheckUtils]: 60: Hoare triple {12415#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12415#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:35:26,407 INFO L290 TraceCheckUtils]: 59: Hoare triple {12422#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12415#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-28 03:35:26,410 INFO L290 TraceCheckUtils]: 58: Hoare triple {12426#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12422#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:26,412 INFO L290 TraceCheckUtils]: 57: Hoare triple {12430#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12426#(or (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:26,414 INFO L290 TraceCheckUtils]: 56: Hoare triple {12434#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12430#(or (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:26,415 INFO L290 TraceCheckUtils]: 55: Hoare triple {12438#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12434#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:26,417 INFO L290 TraceCheckUtils]: 54: Hoare triple {12442#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12438#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:26,419 INFO L290 TraceCheckUtils]: 53: Hoare triple {12446#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12442#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:26,421 INFO L290 TraceCheckUtils]: 52: Hoare triple {12450#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12446#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:35:26,422 INFO L290 TraceCheckUtils]: 51: Hoare triple {12454#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12450#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:26,424 INFO L290 TraceCheckUtils]: 50: Hoare triple {12458#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12454#(or (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:35:26,425 INFO L290 TraceCheckUtils]: 49: Hoare triple {12462#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12458#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:26,427 INFO L290 TraceCheckUtils]: 48: Hoare triple {12466#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12462#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:26,427 INFO L290 TraceCheckUtils]: 47: Hoare triple {12128#true} #t~loopctr188 := 0; {12466#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-28 03:35:26,427 INFO L272 TraceCheckUtils]: 46: Hoare triple {12128#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {12128#true} is VALID [2022-04-28 03:35:26,427 INFO L290 TraceCheckUtils]: 45: Hoare triple {12128#true} assume !(~len <= 0); {12128#true} is VALID [2022-04-28 03:35:26,427 INFO L290 TraceCheckUtils]: 44: Hoare triple {12128#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {12128#true} is VALID [2022-04-28 03:35:26,427 INFO L272 TraceCheckUtils]: 43: Hoare triple {12128#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 42: Hoare triple {12128#true} assume 0 != #t~mem173;havoc #t~mem173; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 41: Hoare triple {12128#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 40: Hoare triple {12128#true} assume #t~short172; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 39: Hoare triple {12128#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 38: Hoare triple {12128#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 37: Hoare triple {12128#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 36: Hoare triple {12128#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 35: Hoare triple {12128#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 34: Hoare triple {12128#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 33: Hoare triple {12128#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 32: Hoare triple {12128#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {12128#true} {12128#true} #672#return; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 30: Hoare triple {12128#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 29: Hoare triple {12128#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 28: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 27: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 26: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,428 INFO L290 TraceCheckUtils]: 25: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 24: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 23: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 22: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 21: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 20: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 19: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 18: Hoare triple {12128#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 17: Hoare triple {12128#true} #t~loopctr188 := 0; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L272 TraceCheckUtils]: 16: Hoare triple {12128#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 15: Hoare triple {12128#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 14: Hoare triple {12128#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 13: Hoare triple {12128#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 12: Hoare triple {12128#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 11: Hoare triple {12128#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 10: Hoare triple {12128#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 9: Hoare triple {12128#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 8: Hoare triple {12128#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L290 TraceCheckUtils]: 7: Hoare triple {12128#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {12128#true} is VALID [2022-04-28 03:35:26,429 INFO L272 TraceCheckUtils]: 6: Hoare triple {12128#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {12128#true} is VALID [2022-04-28 03:35:26,430 INFO L290 TraceCheckUtils]: 5: Hoare triple {12128#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {12128#true} is VALID [2022-04-28 03:35:26,430 INFO L272 TraceCheckUtils]: 4: Hoare triple {12128#true} call #t~ret187 := main(); {12128#true} is VALID [2022-04-28 03:35:26,430 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12128#true} {12128#true} #682#return; {12128#true} is VALID [2022-04-28 03:35:26,430 INFO L290 TraceCheckUtils]: 2: Hoare triple {12128#true} assume true; {12128#true} is VALID [2022-04-28 03:35:26,430 INFO L290 TraceCheckUtils]: 1: Hoare triple {12128#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {12128#true} is VALID [2022-04-28 03:35:26,430 INFO L272 TraceCheckUtils]: 0: Hoare triple {12128#true} call ULTIMATE.init(); {12128#true} is VALID [2022-04-28 03:35:26,430 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 146 proven. 66 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2022-04-28 03:35:26,430 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [759814882] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:35:26,430 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:35:26,430 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15, 15] total 42 [2022-04-28 03:35:26,431 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:35:26,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [11763107] [2022-04-28 03:35:26,431 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [11763107] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:35:26,431 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:35:26,431 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-04-28 03:35:26,431 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [518880876] [2022-04-28 03:35:26,431 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:35:26,431 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 68 [2022-04-28 03:35:26,432 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:35:26,432 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:26,501 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:26,502 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-28 03:35:26,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:26,502 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-28 03:35:26,503 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=417, Invalid=1305, Unknown=0, NotChecked=0, Total=1722 [2022-04-28 03:35:26,503 INFO L87 Difference]: Start difference. First operand 87 states and 109 transitions. Second operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:28,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:28,838 INFO L93 Difference]: Finished difference Result 162 states and 206 transitions. [2022-04-28 03:35:28,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-28 03:35:28,839 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 68 [2022-04-28 03:35:28,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:35:28,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:28,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 193 transitions. [2022-04-28 03:35:28,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:28,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 193 transitions. [2022-04-28 03:35:28,843 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 193 transitions. [2022-04-28 03:35:29,093 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 193 edges. 193 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:29,095 INFO L225 Difference]: With dead ends: 162 [2022-04-28 03:35:29,095 INFO L226 Difference]: Without dead ends: 92 [2022-04-28 03:35:29,096 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=664, Invalid=2416, Unknown=0, NotChecked=0, Total=3080 [2022-04-28 03:35:29,096 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 643 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 177 SdHoareTripleChecker+Invalid, 696 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 643 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-28 03:35:29,096 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 177 Invalid, 696 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 643 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-28 03:35:29,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2022-04-28 03:35:29,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 88. [2022-04-28 03:35:29,138 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:35:29,139 INFO L82 GeneralOperation]: Start isEquivalent. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:29,139 INFO L74 IsIncluded]: Start isIncluded. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:29,139 INFO L87 Difference]: Start difference. First operand 92 states. Second operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:29,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:29,141 INFO L93 Difference]: Finished difference Result 92 states and 116 transitions. [2022-04-28 03:35:29,141 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 116 transitions. [2022-04-28 03:35:29,141 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:29,141 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:29,142 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 92 states. [2022-04-28 03:35:29,142 INFO L87 Difference]: Start difference. First operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 92 states. [2022-04-28 03:35:29,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:35:29,144 INFO L93 Difference]: Finished difference Result 92 states and 116 transitions. [2022-04-28 03:35:29,144 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 116 transitions. [2022-04-28 03:35:29,144 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:35:29,144 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:35:29,144 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:35:29,144 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:35:29,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 70 states have (on average 1.2428571428571429) internal successors, (87), 70 states have internal predecessors, (87), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:35:29,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 110 transitions. [2022-04-28 03:35:29,146 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 110 transitions. Word has length 68 [2022-04-28 03:35:29,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:35:29,146 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 110 transitions. [2022-04-28 03:35:29,147 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.823529411764706) internal successors, (48), 15 states have internal predecessors, (48), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:35:29,147 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 88 states and 110 transitions. [2022-04-28 03:35:29,318 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:35:29,318 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 110 transitions. [2022-04-28 03:35:29,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-04-28 03:35:29,318 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:35:29,318 INFO L195 NwaCegarLoop]: trace histogram [24, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:35:29,337 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-28 03:35:29,519 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-28 03:35:29,519 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:35:29,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:35:29,519 INFO L85 PathProgramCache]: Analyzing trace with hash 1390454090, now seen corresponding path program 23 times [2022-04-28 03:35:29,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:35:29,519 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [255072204] [2022-04-28 03:35:29,520 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:35:29,520 INFO L85 PathProgramCache]: Analyzing trace with hash 1390454090, now seen corresponding path program 24 times [2022-04-28 03:35:29,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:35:29,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918195015] [2022-04-28 03:35:29,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:35:29,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:35:29,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:29,648 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:35:29,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:29,659 INFO L290 TraceCheckUtils]: 0: Hoare triple {13360#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13323#true} is VALID [2022-04-28 03:35:29,660 INFO L290 TraceCheckUtils]: 1: Hoare triple {13323#true} assume true; {13323#true} is VALID [2022-04-28 03:35:29,660 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13323#true} {13323#true} #682#return; {13323#true} is VALID [2022-04-28 03:35:29,662 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:35:29,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:30,216 INFO L290 TraceCheckUtils]: 0: Hoare triple {13361#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:30,219 INFO L290 TraceCheckUtils]: 1: Hoare triple {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13363#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {13363#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13364#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:30,222 INFO L290 TraceCheckUtils]: 3: Hoare triple {13364#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13365#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:30,224 INFO L290 TraceCheckUtils]: 4: Hoare triple {13365#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13366#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,226 INFO L290 TraceCheckUtils]: 5: Hoare triple {13366#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13367#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:30,227 INFO L290 TraceCheckUtils]: 6: Hoare triple {13367#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13368#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:30,229 INFO L290 TraceCheckUtils]: 7: Hoare triple {13368#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13369#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:30,230 INFO L290 TraceCheckUtils]: 8: Hoare triple {13369#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13370#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:30,232 INFO L290 TraceCheckUtils]: 9: Hoare triple {13370#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13371#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,233 INFO L290 TraceCheckUtils]: 10: Hoare triple {13371#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13372#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,235 INFO L290 TraceCheckUtils]: 11: Hoare triple {13372#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13373#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,237 INFO L290 TraceCheckUtils]: 12: Hoare triple {13373#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13374#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:35:30,239 INFO L290 TraceCheckUtils]: 13: Hoare triple {13374#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-28 03:35:30,239 INFO L290 TraceCheckUtils]: 14: Hoare triple {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-28 03:35:30,240 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} {13323#true} #672#return; {13324#false} is VALID [2022-04-28 03:35:30,240 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-04-28 03:35:30,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 0: Hoare triple {13361#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13323#true} is VALID [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 1: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 2: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 3: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 4: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 5: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 6: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 7: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,258 INFO L290 TraceCheckUtils]: 8: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,259 INFO L290 TraceCheckUtils]: 9: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,259 INFO L290 TraceCheckUtils]: 10: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,259 INFO L290 TraceCheckUtils]: 11: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,259 INFO L290 TraceCheckUtils]: 12: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,259 INFO L290 TraceCheckUtils]: 13: Hoare triple {13323#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13323#true} is VALID [2022-04-28 03:35:30,259 INFO L290 TraceCheckUtils]: 14: Hoare triple {13323#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13323#true} is VALID [2022-04-28 03:35:30,259 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {13323#true} {13324#false} #656#return; {13324#false} is VALID [2022-04-28 03:35:30,260 INFO L272 TraceCheckUtils]: 0: Hoare triple {13323#true} call ULTIMATE.init(); {13360#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:35:30,260 INFO L290 TraceCheckUtils]: 1: Hoare triple {13360#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13323#true} is VALID [2022-04-28 03:35:30,260 INFO L290 TraceCheckUtils]: 2: Hoare triple {13323#true} assume true; {13323#true} is VALID [2022-04-28 03:35:30,260 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13323#true} {13323#true} #682#return; {13323#true} is VALID [2022-04-28 03:35:30,260 INFO L272 TraceCheckUtils]: 4: Hoare triple {13323#true} call #t~ret187 := main(); {13323#true} is VALID [2022-04-28 03:35:30,260 INFO L290 TraceCheckUtils]: 5: Hoare triple {13323#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13323#true} is VALID [2022-04-28 03:35:30,260 INFO L272 TraceCheckUtils]: 6: Hoare triple {13323#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {13323#true} is VALID [2022-04-28 03:35:30,260 INFO L290 TraceCheckUtils]: 7: Hoare triple {13323#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13323#true} is VALID [2022-04-28 03:35:30,260 INFO L290 TraceCheckUtils]: 8: Hoare triple {13323#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13323#true} is VALID [2022-04-28 03:35:30,261 INFO L290 TraceCheckUtils]: 9: Hoare triple {13323#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13323#true} is VALID [2022-04-28 03:35:30,261 INFO L290 TraceCheckUtils]: 10: Hoare triple {13323#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13323#true} is VALID [2022-04-28 03:35:30,261 INFO L290 TraceCheckUtils]: 11: Hoare triple {13323#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13323#true} is VALID [2022-04-28 03:35:30,261 INFO L290 TraceCheckUtils]: 12: Hoare triple {13323#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13323#true} is VALID [2022-04-28 03:35:30,261 INFO L290 TraceCheckUtils]: 13: Hoare triple {13323#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13323#true} is VALID [2022-04-28 03:35:30,261 INFO L290 TraceCheckUtils]: 14: Hoare triple {13323#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13323#true} is VALID [2022-04-28 03:35:30,261 INFO L290 TraceCheckUtils]: 15: Hoare triple {13323#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13323#true} is VALID [2022-04-28 03:35:30,262 INFO L272 TraceCheckUtils]: 16: Hoare triple {13323#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {13361#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:30,263 INFO L290 TraceCheckUtils]: 17: Hoare triple {13361#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:35:30,266 INFO L290 TraceCheckUtils]: 18: Hoare triple {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13363#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,268 INFO L290 TraceCheckUtils]: 19: Hoare triple {13363#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13364#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:35:30,270 INFO L290 TraceCheckUtils]: 20: Hoare triple {13364#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13365#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:30,272 INFO L290 TraceCheckUtils]: 21: Hoare triple {13365#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13366#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,274 INFO L290 TraceCheckUtils]: 22: Hoare triple {13366#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13367#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:35:30,275 INFO L290 TraceCheckUtils]: 23: Hoare triple {13367#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13368#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:35:30,277 INFO L290 TraceCheckUtils]: 24: Hoare triple {13368#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13369#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:35:30,279 INFO L290 TraceCheckUtils]: 25: Hoare triple {13369#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13370#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:35:30,281 INFO L290 TraceCheckUtils]: 26: Hoare triple {13370#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13371#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,283 INFO L290 TraceCheckUtils]: 27: Hoare triple {13371#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13372#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,285 INFO L290 TraceCheckUtils]: 28: Hoare triple {13372#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13373#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:35:30,287 INFO L290 TraceCheckUtils]: 29: Hoare triple {13373#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13374#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:35:30,288 INFO L290 TraceCheckUtils]: 30: Hoare triple {13374#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 12) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-28 03:35:30,289 INFO L290 TraceCheckUtils]: 31: Hoare triple {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} is VALID [2022-04-28 03:35:30,290 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13375#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 12))} {13323#true} #672#return; {13324#false} is VALID [2022-04-28 03:35:30,290 INFO L290 TraceCheckUtils]: 33: Hoare triple {13324#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13324#false} is VALID [2022-04-28 03:35:30,290 INFO L290 TraceCheckUtils]: 34: Hoare triple {13324#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {13324#false} is VALID [2022-04-28 03:35:30,290 INFO L290 TraceCheckUtils]: 35: Hoare triple {13324#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13324#false} is VALID [2022-04-28 03:35:30,290 INFO L290 TraceCheckUtils]: 36: Hoare triple {13324#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13324#false} is VALID [2022-04-28 03:35:30,290 INFO L290 TraceCheckUtils]: 37: Hoare triple {13324#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13324#false} is VALID [2022-04-28 03:35:30,290 INFO L290 TraceCheckUtils]: 38: Hoare triple {13324#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13324#false} is VALID [2022-04-28 03:35:30,290 INFO L290 TraceCheckUtils]: 39: Hoare triple {13324#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13324#false} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 40: Hoare triple {13324#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13324#false} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 41: Hoare triple {13324#false} assume #t~short172; {13324#false} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 42: Hoare triple {13324#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13324#false} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 43: Hoare triple {13324#false} assume 0 != #t~mem173;havoc #t~mem173; {13324#false} is VALID [2022-04-28 03:35:30,291 INFO L272 TraceCheckUtils]: 44: Hoare triple {13324#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13324#false} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 45: Hoare triple {13324#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13324#false} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 46: Hoare triple {13324#false} assume !(~len <= 0); {13324#false} is VALID [2022-04-28 03:35:30,291 INFO L272 TraceCheckUtils]: 47: Hoare triple {13324#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13361#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 48: Hoare triple {13361#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {13323#true} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 49: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 50: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,291 INFO L290 TraceCheckUtils]: 51: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 52: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 53: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 54: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 55: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 56: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 57: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 58: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 59: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 60: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 61: Hoare triple {13323#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 62: Hoare triple {13323#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13323#true} is VALID [2022-04-28 03:35:30,292 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13323#true} {13324#false} #656#return; {13324#false} is VALID [2022-04-28 03:35:30,292 INFO L290 TraceCheckUtils]: 64: Hoare triple {13324#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13324#false} is VALID [2022-04-28 03:35:30,293 INFO L290 TraceCheckUtils]: 65: Hoare triple {13324#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13324#false} is VALID [2022-04-28 03:35:30,293 INFO L272 TraceCheckUtils]: 66: Hoare triple {13324#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13324#false} is VALID [2022-04-28 03:35:30,293 INFO L290 TraceCheckUtils]: 67: Hoare triple {13324#false} ~cond := #in~cond; {13324#false} is VALID [2022-04-28 03:35:30,293 INFO L290 TraceCheckUtils]: 68: Hoare triple {13324#false} assume 0 == ~cond; {13324#false} is VALID [2022-04-28 03:35:30,293 INFO L290 TraceCheckUtils]: 69: Hoare triple {13324#false} assume !false; {13324#false} is VALID [2022-04-28 03:35:30,293 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 0 proven. 249 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-28 03:35:30,293 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:35:30,293 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1918195015] [2022-04-28 03:35:30,294 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1918195015] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:35:30,294 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1096208729] [2022-04-28 03:35:30,294 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 03:35:30,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:35:30,294 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:35:30,296 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:35:30,323 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-28 03:36:05,467 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-28 03:36:05,467 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:36:05,498 INFO L263 TraceCheckSpWp]: Trace formula consists of 849 conjuncts, 62 conjunts are in the unsatisfiable core [2022-04-28 03:36:05,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:05,519 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:36:06,543 INFO L272 TraceCheckUtils]: 0: Hoare triple {13323#true} call ULTIMATE.init(); {13323#true} is VALID [2022-04-28 03:36:06,543 INFO L290 TraceCheckUtils]: 1: Hoare triple {13323#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13323#true} is VALID [2022-04-28 03:36:06,543 INFO L290 TraceCheckUtils]: 2: Hoare triple {13323#true} assume true; {13323#true} is VALID [2022-04-28 03:36:06,543 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13323#true} {13323#true} #682#return; {13323#true} is VALID [2022-04-28 03:36:06,543 INFO L272 TraceCheckUtils]: 4: Hoare triple {13323#true} call #t~ret187 := main(); {13323#true} is VALID [2022-04-28 03:36:06,543 INFO L290 TraceCheckUtils]: 5: Hoare triple {13323#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13323#true} is VALID [2022-04-28 03:36:06,543 INFO L272 TraceCheckUtils]: 6: Hoare triple {13323#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {13323#true} is VALID [2022-04-28 03:36:06,543 INFO L290 TraceCheckUtils]: 7: Hoare triple {13323#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,544 INFO L290 TraceCheckUtils]: 8: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,544 INFO L290 TraceCheckUtils]: 9: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,544 INFO L290 TraceCheckUtils]: 10: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,544 INFO L290 TraceCheckUtils]: 11: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,555 INFO L290 TraceCheckUtils]: 12: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,556 INFO L290 TraceCheckUtils]: 13: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,556 INFO L290 TraceCheckUtils]: 14: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,556 INFO L290 TraceCheckUtils]: 15: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:36:06,557 INFO L272 TraceCheckUtils]: 16: Hoare triple {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {13323#true} is VALID [2022-04-28 03:36:06,557 INFO L290 TraceCheckUtils]: 17: Hoare triple {13323#true} #t~loopctr188 := 0; {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:06,560 INFO L290 TraceCheckUtils]: 18: Hoare triple {13362#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:06,562 INFO L290 TraceCheckUtils]: 19: Hoare triple {13434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13438#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:06,564 INFO L290 TraceCheckUtils]: 20: Hoare triple {13438#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13442#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:36:06,566 INFO L290 TraceCheckUtils]: 21: Hoare triple {13442#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13446#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:06,568 INFO L290 TraceCheckUtils]: 22: Hoare triple {13446#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13450#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:06,570 INFO L290 TraceCheckUtils]: 23: Hoare triple {13450#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13454#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:06,572 INFO L290 TraceCheckUtils]: 24: Hoare triple {13454#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13458#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:06,575 INFO L290 TraceCheckUtils]: 25: Hoare triple {13458#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13462#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:06,577 INFO L290 TraceCheckUtils]: 26: Hoare triple {13462#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13466#(and (< (mod (+ 4294967292 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:06,580 INFO L290 TraceCheckUtils]: 27: Hoare triple {13466#(and (< (mod (+ 4294967292 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13470#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967291) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:06,581 INFO L290 TraceCheckUtils]: 28: Hoare triple {13470#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967291) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13474#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 4294967290 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:06,584 INFO L290 TraceCheckUtils]: 29: Hoare triple {13474#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ 4294967290 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13478#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:06,586 INFO L290 TraceCheckUtils]: 30: Hoare triple {13478#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13482#(< (div (+ (- 4294967308) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 4294967308 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-28 03:36:06,587 INFO L290 TraceCheckUtils]: 31: Hoare triple {13482#(< (div (+ (- 4294967308) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 4294967308 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13482#(< (div (+ (- 4294967308) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 4294967308 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-28 03:36:06,588 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13482#(< (div (+ (- 4294967308) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ (div (+ 4294967308 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} {13400#(= |do_discover_list_~#smp_rr~0.offset| 0)} #672#return; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 33: Hoare triple {13324#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 34: Hoare triple {13324#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 35: Hoare triple {13324#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 36: Hoare triple {13324#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 37: Hoare triple {13324#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 38: Hoare triple {13324#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 39: Hoare triple {13324#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 40: Hoare triple {13324#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 41: Hoare triple {13324#false} assume #t~short172; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 42: Hoare triple {13324#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L290 TraceCheckUtils]: 43: Hoare triple {13324#false} assume 0 != #t~mem173;havoc #t~mem173; {13324#false} is VALID [2022-04-28 03:36:06,588 INFO L272 TraceCheckUtils]: 44: Hoare triple {13324#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 45: Hoare triple {13324#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 46: Hoare triple {13324#false} assume !(~len <= 0); {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L272 TraceCheckUtils]: 47: Hoare triple {13324#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 48: Hoare triple {13324#false} #t~loopctr188 := 0; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 49: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 50: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 51: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 52: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 53: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 54: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 55: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 56: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 57: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 58: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 59: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 60: Hoare triple {13324#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 61: Hoare triple {13324#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L290 TraceCheckUtils]: 62: Hoare triple {13324#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13324#false} is VALID [2022-04-28 03:36:06,589 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13324#false} {13324#false} #656#return; {13324#false} is VALID [2022-04-28 03:36:06,590 INFO L290 TraceCheckUtils]: 64: Hoare triple {13324#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13324#false} is VALID [2022-04-28 03:36:06,590 INFO L290 TraceCheckUtils]: 65: Hoare triple {13324#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13324#false} is VALID [2022-04-28 03:36:06,590 INFO L272 TraceCheckUtils]: 66: Hoare triple {13324#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13324#false} is VALID [2022-04-28 03:36:06,590 INFO L290 TraceCheckUtils]: 67: Hoare triple {13324#false} ~cond := #in~cond; {13324#false} is VALID [2022-04-28 03:36:06,590 INFO L290 TraceCheckUtils]: 68: Hoare triple {13324#false} assume 0 == ~cond; {13324#false} is VALID [2022-04-28 03:36:06,590 INFO L290 TraceCheckUtils]: 69: Hoare triple {13324#false} assume !false; {13324#false} is VALID [2022-04-28 03:36:06,590 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 172 proven. 78 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2022-04-28 03:36:06,590 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:36:08,339 INFO L290 TraceCheckUtils]: 69: Hoare triple {13324#false} assume !false; {13324#false} is VALID [2022-04-28 03:36:08,339 INFO L290 TraceCheckUtils]: 68: Hoare triple {13324#false} assume 0 == ~cond; {13324#false} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 67: Hoare triple {13324#false} ~cond := #in~cond; {13324#false} is VALID [2022-04-28 03:36:08,340 INFO L272 TraceCheckUtils]: 66: Hoare triple {13324#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {13324#false} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 65: Hoare triple {13324#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {13324#false} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 64: Hoare triple {13324#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {13324#false} is VALID [2022-04-28 03:36:08,340 INFO L284 TraceCheckUtils]: 63: Hoare quadruple {13323#true} {13324#false} #656#return; {13324#false} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 62: Hoare triple {13323#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 61: Hoare triple {13323#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 60: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 59: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 58: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 57: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 56: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 55: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 54: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 53: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 52: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 51: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,340 INFO L290 TraceCheckUtils]: 50: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 49: Hoare triple {13323#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13323#true} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 48: Hoare triple {13323#true} #t~loopctr188 := 0; {13323#true} is VALID [2022-04-28 03:36:08,341 INFO L272 TraceCheckUtils]: 47: Hoare triple {13324#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {13323#true} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 46: Hoare triple {13324#false} assume !(~len <= 0); {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 45: Hoare triple {13324#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L272 TraceCheckUtils]: 44: Hoare triple {13324#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 43: Hoare triple {13324#false} assume 0 != #t~mem173;havoc #t~mem173; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 42: Hoare triple {13324#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 41: Hoare triple {13324#false} assume #t~short172; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 40: Hoare triple {13324#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 39: Hoare triple {13324#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 38: Hoare triple {13324#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 37: Hoare triple {13324#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 36: Hoare triple {13324#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 35: Hoare triple {13324#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 34: Hoare triple {13324#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {13324#false} is VALID [2022-04-28 03:36:08,341 INFO L290 TraceCheckUtils]: 33: Hoare triple {13324#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {13324#false} is VALID [2022-04-28 03:36:08,342 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {13714#(not (= |#Ultimate.C_memset_#amount| 24))} {13323#true} #672#return; {13324#false} is VALID [2022-04-28 03:36:08,343 INFO L290 TraceCheckUtils]: 31: Hoare triple {13714#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {13714#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:36:08,343 INFO L290 TraceCheckUtils]: 30: Hoare triple {13721#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {13714#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:36:08,345 INFO L290 TraceCheckUtils]: 29: Hoare triple {13725#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13721#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:08,349 INFO L290 TraceCheckUtils]: 28: Hoare triple {13729#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13725#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:08,353 INFO L290 TraceCheckUtils]: 27: Hoare triple {13733#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13729#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:08,357 INFO L290 TraceCheckUtils]: 26: Hoare triple {13737#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13733#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:08,359 INFO L290 TraceCheckUtils]: 25: Hoare triple {13741#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13737#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:08,361 INFO L290 TraceCheckUtils]: 24: Hoare triple {13745#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13741#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:08,363 INFO L290 TraceCheckUtils]: 23: Hoare triple {13749#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13745#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:08,368 INFO L290 TraceCheckUtils]: 22: Hoare triple {13753#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13749#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296)))} is VALID [2022-04-28 03:36:08,370 INFO L290 TraceCheckUtils]: 21: Hoare triple {13757#(or (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13753#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:08,374 INFO L290 TraceCheckUtils]: 20: Hoare triple {13761#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13757#(or (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:08,376 INFO L290 TraceCheckUtils]: 19: Hoare triple {13765#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13761#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296)))} is VALID [2022-04-28 03:36:08,377 INFO L290 TraceCheckUtils]: 18: Hoare triple {13769#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {13765#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296)))} is VALID [2022-04-28 03:36:08,378 INFO L290 TraceCheckUtils]: 17: Hoare triple {13323#true} #t~loopctr188 := 0; {13769#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:08,378 INFO L272 TraceCheckUtils]: 16: Hoare triple {13323#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {13323#true} is VALID [2022-04-28 03:36:08,378 INFO L290 TraceCheckUtils]: 15: Hoare triple {13323#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {13323#true} is VALID [2022-04-28 03:36:08,378 INFO L290 TraceCheckUtils]: 14: Hoare triple {13323#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {13323#true} is VALID [2022-04-28 03:36:08,378 INFO L290 TraceCheckUtils]: 13: Hoare triple {13323#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {13323#true} is VALID [2022-04-28 03:36:08,378 INFO L290 TraceCheckUtils]: 12: Hoare triple {13323#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {13323#true} is VALID [2022-04-28 03:36:08,378 INFO L290 TraceCheckUtils]: 11: Hoare triple {13323#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {13323#true} is VALID [2022-04-28 03:36:08,378 INFO L290 TraceCheckUtils]: 10: Hoare triple {13323#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L290 TraceCheckUtils]: 9: Hoare triple {13323#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L290 TraceCheckUtils]: 8: Hoare triple {13323#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L290 TraceCheckUtils]: 7: Hoare triple {13323#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L272 TraceCheckUtils]: 6: Hoare triple {13323#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L290 TraceCheckUtils]: 5: Hoare triple {13323#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L272 TraceCheckUtils]: 4: Hoare triple {13323#true} call #t~ret187 := main(); {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13323#true} {13323#true} #682#return; {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L290 TraceCheckUtils]: 2: Hoare triple {13323#true} assume true; {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L290 TraceCheckUtils]: 1: Hoare triple {13323#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {13323#true} is VALID [2022-04-28 03:36:08,379 INFO L272 TraceCheckUtils]: 0: Hoare triple {13323#true} call ULTIMATE.init(); {13323#true} is VALID [2022-04-28 03:36:08,380 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 0 proven. 249 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-28 03:36:08,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1096208729] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:36:08,380 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:36:08,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 16] total 46 [2022-04-28 03:36:08,380 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:36:08,380 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [255072204] [2022-04-28 03:36:08,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [255072204] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:36:08,380 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:36:08,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-04-28 03:36:08,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1598466812] [2022-04-28 03:36:08,381 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:36:08,381 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 70 [2022-04-28 03:36:08,381 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:36:08,381 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:08,468 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:08,468 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-28 03:36:08,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:08,469 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-28 03:36:08,469 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=483, Invalid=1587, Unknown=0, NotChecked=0, Total=2070 [2022-04-28 03:36:08,469 INFO L87 Difference]: Start difference. First operand 88 states and 110 transitions. Second operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:12,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:12,203 INFO L93 Difference]: Finished difference Result 164 states and 208 transitions. [2022-04-28 03:36:12,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-28 03:36:12,204 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 70 [2022-04-28 03:36:12,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:36:12,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:12,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 194 transitions. [2022-04-28 03:36:12,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:12,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 194 transitions. [2022-04-28 03:36:12,208 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 194 transitions. [2022-04-28 03:36:12,435 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 194 edges. 194 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:12,437 INFO L225 Difference]: With dead ends: 164 [2022-04-28 03:36:12,437 INFO L226 Difference]: Without dead ends: 93 [2022-04-28 03:36:12,438 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 116 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 536 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=756, Invalid=2904, Unknown=0, NotChecked=0, Total=3660 [2022-04-28 03:36:12,438 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 1132 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 1187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 1132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:36:12,438 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 279 Invalid, 1187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 1132 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-28 03:36:12,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-04-28 03:36:12,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 89. [2022-04-28 03:36:12,482 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:36:12,483 INFO L82 GeneralOperation]: Start isEquivalent. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:12,483 INFO L74 IsIncluded]: Start isIncluded. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:12,483 INFO L87 Difference]: Start difference. First operand 93 states. Second operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:12,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:12,485 INFO L93 Difference]: Finished difference Result 93 states and 117 transitions. [2022-04-28 03:36:12,485 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 117 transitions. [2022-04-28 03:36:12,485 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:12,485 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:12,486 INFO L74 IsIncluded]: Start isIncluded. First operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 93 states. [2022-04-28 03:36:12,486 INFO L87 Difference]: Start difference. First operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 93 states. [2022-04-28 03:36:12,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:12,488 INFO L93 Difference]: Finished difference Result 93 states and 117 transitions. [2022-04-28 03:36:12,488 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 117 transitions. [2022-04-28 03:36:12,488 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:12,488 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:12,488 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:36:12,488 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:36:12,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 71 states have (on average 1.2394366197183098) internal successors, (88), 71 states have internal predecessors, (88), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:12,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 111 transitions. [2022-04-28 03:36:12,490 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 111 transitions. Word has length 70 [2022-04-28 03:36:12,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:36:12,490 INFO L495 AbstractCegarLoop]: Abstraction has 89 states and 111 transitions. [2022-04-28 03:36:12,490 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.7222222222222223) internal successors, (49), 16 states have internal predecessors, (49), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:12,490 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 89 states and 111 transitions. [2022-04-28 03:36:12,680 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:12,681 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 111 transitions. [2022-04-28 03:36:12,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2022-04-28 03:36:12,681 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:36:12,681 INFO L195 NwaCegarLoop]: trace histogram [26, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:36:12,699 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-28 03:36:12,882 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-28 03:36:12,882 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:36:12,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:36:12,882 INFO L85 PathProgramCache]: Analyzing trace with hash -1316589984, now seen corresponding path program 25 times [2022-04-28 03:36:12,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:12,882 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1347418334] [2022-04-28 03:36:12,883 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:36:12,883 INFO L85 PathProgramCache]: Analyzing trace with hash -1316589984, now seen corresponding path program 26 times [2022-04-28 03:36:12,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:36:12,883 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271191505] [2022-04-28 03:36:12,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:12,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:36:12,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:12,989 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:36:12,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:12,997 INFO L290 TraceCheckUtils]: 0: Hoare triple {14585#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14546#true} is VALID [2022-04-28 03:36:12,997 INFO L290 TraceCheckUtils]: 1: Hoare triple {14546#true} assume true; {14546#true} is VALID [2022-04-28 03:36:12,998 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14546#true} {14546#true} #682#return; {14546#true} is VALID [2022-04-28 03:36:13,000 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:36:13,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:13,620 INFO L290 TraceCheckUtils]: 0: Hoare triple {14586#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:13,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14588#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,625 INFO L290 TraceCheckUtils]: 2: Hoare triple {14588#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14589#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:13,626 INFO L290 TraceCheckUtils]: 3: Hoare triple {14589#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14590#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:13,628 INFO L290 TraceCheckUtils]: 4: Hoare triple {14590#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14591#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,630 INFO L290 TraceCheckUtils]: 5: Hoare triple {14591#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14592#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:13,631 INFO L290 TraceCheckUtils]: 6: Hoare triple {14592#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14593#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:13,633 INFO L290 TraceCheckUtils]: 7: Hoare triple {14593#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14594#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:13,635 INFO L290 TraceCheckUtils]: 8: Hoare triple {14594#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14595#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:13,637 INFO L290 TraceCheckUtils]: 9: Hoare triple {14595#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14596#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,638 INFO L290 TraceCheckUtils]: 10: Hoare triple {14596#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14597#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,640 INFO L290 TraceCheckUtils]: 11: Hoare triple {14597#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14598#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,642 INFO L290 TraceCheckUtils]: 12: Hoare triple {14598#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,644 INFO L290 TraceCheckUtils]: 13: Hoare triple {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14600#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 13)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:36:13,646 INFO L290 TraceCheckUtils]: 14: Hoare triple {14600#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 13)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-28 03:36:13,647 INFO L290 TraceCheckUtils]: 15: Hoare triple {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-28 03:36:13,647 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} {14546#true} #672#return; {14547#false} is VALID [2022-04-28 03:36:13,648 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-28 03:36:13,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:13,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {14586#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14546#true} is VALID [2022-04-28 03:36:13,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 3: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 4: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 5: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 6: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 7: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 8: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 9: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 10: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 11: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 12: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 13: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,666 INFO L290 TraceCheckUtils]: 14: Hoare triple {14546#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14546#true} is VALID [2022-04-28 03:36:13,667 INFO L290 TraceCheckUtils]: 15: Hoare triple {14546#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14546#true} is VALID [2022-04-28 03:36:13,667 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {14546#true} {14547#false} #656#return; {14547#false} is VALID [2022-04-28 03:36:13,667 INFO L272 TraceCheckUtils]: 0: Hoare triple {14546#true} call ULTIMATE.init(); {14585#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:36:13,667 INFO L290 TraceCheckUtils]: 1: Hoare triple {14585#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14546#true} is VALID [2022-04-28 03:36:13,667 INFO L290 TraceCheckUtils]: 2: Hoare triple {14546#true} assume true; {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14546#true} {14546#true} #682#return; {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L272 TraceCheckUtils]: 4: Hoare triple {14546#true} call #t~ret187 := main(); {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L290 TraceCheckUtils]: 5: Hoare triple {14546#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L272 TraceCheckUtils]: 6: Hoare triple {14546#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L290 TraceCheckUtils]: 7: Hoare triple {14546#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L290 TraceCheckUtils]: 8: Hoare triple {14546#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L290 TraceCheckUtils]: 9: Hoare triple {14546#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L290 TraceCheckUtils]: 10: Hoare triple {14546#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L290 TraceCheckUtils]: 11: Hoare triple {14546#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L290 TraceCheckUtils]: 12: Hoare triple {14546#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14546#true} is VALID [2022-04-28 03:36:13,668 INFO L290 TraceCheckUtils]: 13: Hoare triple {14546#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:13,669 INFO L290 TraceCheckUtils]: 14: Hoare triple {14546#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14546#true} is VALID [2022-04-28 03:36:13,669 INFO L290 TraceCheckUtils]: 15: Hoare triple {14546#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14546#true} is VALID [2022-04-28 03:36:13,669 INFO L272 TraceCheckUtils]: 16: Hoare triple {14546#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {14586#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:36:13,670 INFO L290 TraceCheckUtils]: 17: Hoare triple {14586#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:13,674 INFO L290 TraceCheckUtils]: 18: Hoare triple {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14588#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,676 INFO L290 TraceCheckUtils]: 19: Hoare triple {14588#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14589#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:13,679 INFO L290 TraceCheckUtils]: 20: Hoare triple {14589#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14590#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:13,681 INFO L290 TraceCheckUtils]: 21: Hoare triple {14590#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14591#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,684 INFO L290 TraceCheckUtils]: 22: Hoare triple {14591#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14592#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:13,686 INFO L290 TraceCheckUtils]: 23: Hoare triple {14592#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14593#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:13,689 INFO L290 TraceCheckUtils]: 24: Hoare triple {14593#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14594#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:13,691 INFO L290 TraceCheckUtils]: 25: Hoare triple {14594#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14595#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:13,693 INFO L290 TraceCheckUtils]: 26: Hoare triple {14595#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14596#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,695 INFO L290 TraceCheckUtils]: 27: Hoare triple {14596#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14597#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,697 INFO L290 TraceCheckUtils]: 28: Hoare triple {14597#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14598#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,700 INFO L290 TraceCheckUtils]: 29: Hoare triple {14598#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:13,703 INFO L290 TraceCheckUtils]: 30: Hoare triple {14599#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14600#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 13)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:36:13,705 INFO L290 TraceCheckUtils]: 31: Hoare triple {14600#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 13)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-28 03:36:13,706 INFO L290 TraceCheckUtils]: 32: Hoare triple {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} is VALID [2022-04-28 03:36:13,707 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14601#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 13))} {14546#true} #672#return; {14547#false} is VALID [2022-04-28 03:36:13,707 INFO L290 TraceCheckUtils]: 34: Hoare triple {14547#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14547#false} is VALID [2022-04-28 03:36:13,707 INFO L290 TraceCheckUtils]: 35: Hoare triple {14547#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {14547#false} is VALID [2022-04-28 03:36:13,707 INFO L290 TraceCheckUtils]: 36: Hoare triple {14547#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14547#false} is VALID [2022-04-28 03:36:13,707 INFO L290 TraceCheckUtils]: 37: Hoare triple {14547#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14547#false} is VALID [2022-04-28 03:36:13,707 INFO L290 TraceCheckUtils]: 38: Hoare triple {14547#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14547#false} is VALID [2022-04-28 03:36:13,707 INFO L290 TraceCheckUtils]: 39: Hoare triple {14547#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14547#false} is VALID [2022-04-28 03:36:13,707 INFO L290 TraceCheckUtils]: 40: Hoare triple {14547#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14547#false} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 41: Hoare triple {14547#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14547#false} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 42: Hoare triple {14547#false} assume #t~short172; {14547#false} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 43: Hoare triple {14547#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14547#false} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 44: Hoare triple {14547#false} assume 0 != #t~mem173;havoc #t~mem173; {14547#false} is VALID [2022-04-28 03:36:13,708 INFO L272 TraceCheckUtils]: 45: Hoare triple {14547#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14547#false} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 46: Hoare triple {14547#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14547#false} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 47: Hoare triple {14547#false} assume !(~len <= 0); {14547#false} is VALID [2022-04-28 03:36:13,708 INFO L272 TraceCheckUtils]: 48: Hoare triple {14547#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14586#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 49: Hoare triple {14586#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {14546#true} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 50: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,708 INFO L290 TraceCheckUtils]: 51: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 52: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 53: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 54: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 55: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 56: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 57: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 58: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 59: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 60: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 61: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 62: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 63: Hoare triple {14546#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14546#true} is VALID [2022-04-28 03:36:13,709 INFO L290 TraceCheckUtils]: 64: Hoare triple {14546#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14546#true} is VALID [2022-04-28 03:36:13,710 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14546#true} {14547#false} #656#return; {14547#false} is VALID [2022-04-28 03:36:13,710 INFO L290 TraceCheckUtils]: 66: Hoare triple {14547#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14547#false} is VALID [2022-04-28 03:36:13,710 INFO L290 TraceCheckUtils]: 67: Hoare triple {14547#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14547#false} is VALID [2022-04-28 03:36:13,710 INFO L272 TraceCheckUtils]: 68: Hoare triple {14547#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14547#false} is VALID [2022-04-28 03:36:13,710 INFO L290 TraceCheckUtils]: 69: Hoare triple {14547#false} ~cond := #in~cond; {14547#false} is VALID [2022-04-28 03:36:13,710 INFO L290 TraceCheckUtils]: 70: Hoare triple {14547#false} assume 0 == ~cond; {14547#false} is VALID [2022-04-28 03:36:13,710 INFO L290 TraceCheckUtils]: 71: Hoare triple {14547#false} assume !false; {14547#false} is VALID [2022-04-28 03:36:13,711 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 0 proven. 289 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2022-04-28 03:36:13,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:36:13,711 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271191505] [2022-04-28 03:36:13,711 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1271191505] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:36:13,711 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [216499814] [2022-04-28 03:36:13,711 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 03:36:13,711 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:36:13,711 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:36:13,712 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:36:13,721 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-28 03:36:14,568 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 03:36:14,569 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:36:14,574 INFO L263 TraceCheckSpWp]: Trace formula consists of 863 conjuncts, 59 conjunts are in the unsatisfiable core [2022-04-28 03:36:14,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:14,593 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:36:15,309 INFO L272 TraceCheckUtils]: 0: Hoare triple {14546#true} call ULTIMATE.init(); {14546#true} is VALID [2022-04-28 03:36:15,309 INFO L290 TraceCheckUtils]: 1: Hoare triple {14546#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14546#true} is VALID [2022-04-28 03:36:15,309 INFO L290 TraceCheckUtils]: 2: Hoare triple {14546#true} assume true; {14546#true} is VALID [2022-04-28 03:36:15,309 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14546#true} {14546#true} #682#return; {14546#true} is VALID [2022-04-28 03:36:15,309 INFO L272 TraceCheckUtils]: 4: Hoare triple {14546#true} call #t~ret187 := main(); {14546#true} is VALID [2022-04-28 03:36:15,309 INFO L290 TraceCheckUtils]: 5: Hoare triple {14546#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14546#true} is VALID [2022-04-28 03:36:15,309 INFO L272 TraceCheckUtils]: 6: Hoare triple {14546#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {14546#true} is VALID [2022-04-28 03:36:15,309 INFO L290 TraceCheckUtils]: 7: Hoare triple {14546#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L290 TraceCheckUtils]: 8: Hoare triple {14546#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L290 TraceCheckUtils]: 9: Hoare triple {14546#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L290 TraceCheckUtils]: 10: Hoare triple {14546#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L290 TraceCheckUtils]: 11: Hoare triple {14546#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L290 TraceCheckUtils]: 12: Hoare triple {14546#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L290 TraceCheckUtils]: 13: Hoare triple {14546#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L290 TraceCheckUtils]: 14: Hoare triple {14546#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L290 TraceCheckUtils]: 15: Hoare triple {14546#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14546#true} is VALID [2022-04-28 03:36:15,310 INFO L272 TraceCheckUtils]: 16: Hoare triple {14546#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {14546#true} is VALID [2022-04-28 03:36:15,314 INFO L290 TraceCheckUtils]: 17: Hoare triple {14546#true} #t~loopctr188 := 0; {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:15,317 INFO L290 TraceCheckUtils]: 18: Hoare triple {14587#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14659#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:15,319 INFO L290 TraceCheckUtils]: 19: Hoare triple {14659#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14663#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:15,320 INFO L290 TraceCheckUtils]: 20: Hoare triple {14663#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14667#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:36:15,321 INFO L290 TraceCheckUtils]: 21: Hoare triple {14667#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:15,322 INFO L290 TraceCheckUtils]: 22: Hoare triple {14671#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14675#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:15,324 INFO L290 TraceCheckUtils]: 23: Hoare triple {14675#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14679#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:15,325 INFO L290 TraceCheckUtils]: 24: Hoare triple {14679#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14683#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:15,326 INFO L290 TraceCheckUtils]: 25: Hoare triple {14683#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14687#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:15,328 INFO L290 TraceCheckUtils]: 26: Hoare triple {14687#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14691#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:15,329 INFO L290 TraceCheckUtils]: 27: Hoare triple {14691#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14695#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:15,330 INFO L290 TraceCheckUtils]: 28: Hoare triple {14695#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14699#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:15,332 INFO L290 TraceCheckUtils]: 29: Hoare triple {14699#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14703#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:15,333 INFO L290 TraceCheckUtils]: 30: Hoare triple {14703#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14707#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:36:15,334 INFO L290 TraceCheckUtils]: 31: Hoare triple {14707#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14711#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 13) 4294967296) 1))} is VALID [2022-04-28 03:36:15,334 INFO L290 TraceCheckUtils]: 32: Hoare triple {14711#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 13) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14711#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 13) 4294967296) 1))} is VALID [2022-04-28 03:36:15,335 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14711#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 13) 4294967296) 1))} {14546#true} #672#return; {14547#false} is VALID [2022-04-28 03:36:15,335 INFO L290 TraceCheckUtils]: 34: Hoare triple {14547#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14547#false} is VALID [2022-04-28 03:36:15,335 INFO L290 TraceCheckUtils]: 35: Hoare triple {14547#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {14547#false} is VALID [2022-04-28 03:36:15,335 INFO L290 TraceCheckUtils]: 36: Hoare triple {14547#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14547#false} is VALID [2022-04-28 03:36:15,335 INFO L290 TraceCheckUtils]: 37: Hoare triple {14547#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14547#false} is VALID [2022-04-28 03:36:15,335 INFO L290 TraceCheckUtils]: 38: Hoare triple {14547#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14547#false} is VALID [2022-04-28 03:36:15,335 INFO L290 TraceCheckUtils]: 39: Hoare triple {14547#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 40: Hoare triple {14547#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 41: Hoare triple {14547#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 42: Hoare triple {14547#false} assume #t~short172; {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 43: Hoare triple {14547#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 44: Hoare triple {14547#false} assume 0 != #t~mem173;havoc #t~mem173; {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L272 TraceCheckUtils]: 45: Hoare triple {14547#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 46: Hoare triple {14547#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 47: Hoare triple {14547#false} assume !(~len <= 0); {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L272 TraceCheckUtils]: 48: Hoare triple {14547#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 49: Hoare triple {14547#false} #t~loopctr188 := 0; {14547#false} is VALID [2022-04-28 03:36:15,336 INFO L290 TraceCheckUtils]: 50: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 51: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 52: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 53: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 54: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 55: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 56: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 57: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 58: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 59: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 60: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,337 INFO L290 TraceCheckUtils]: 61: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L290 TraceCheckUtils]: 62: Hoare triple {14547#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L290 TraceCheckUtils]: 63: Hoare triple {14547#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L290 TraceCheckUtils]: 64: Hoare triple {14547#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14547#false} {14547#false} #656#return; {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L290 TraceCheckUtils]: 66: Hoare triple {14547#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L290 TraceCheckUtils]: 67: Hoare triple {14547#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L272 TraceCheckUtils]: 68: Hoare triple {14547#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L290 TraceCheckUtils]: 69: Hoare triple {14547#false} ~cond := #in~cond; {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L290 TraceCheckUtils]: 70: Hoare triple {14547#false} assume 0 == ~cond; {14547#false} is VALID [2022-04-28 03:36:15,338 INFO L290 TraceCheckUtils]: 71: Hoare triple {14547#false} assume !false; {14547#false} is VALID [2022-04-28 03:36:15,339 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 199 proven. 91 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2022-04-28 03:36:15,339 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:36:16,515 INFO L290 TraceCheckUtils]: 71: Hoare triple {14547#false} assume !false; {14547#false} is VALID [2022-04-28 03:36:16,515 INFO L290 TraceCheckUtils]: 70: Hoare triple {14547#false} assume 0 == ~cond; {14547#false} is VALID [2022-04-28 03:36:16,515 INFO L290 TraceCheckUtils]: 69: Hoare triple {14547#false} ~cond := #in~cond; {14547#false} is VALID [2022-04-28 03:36:16,516 INFO L272 TraceCheckUtils]: 68: Hoare triple {14547#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {14547#false} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 67: Hoare triple {14547#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {14547#false} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 66: Hoare triple {14547#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {14547#false} is VALID [2022-04-28 03:36:16,516 INFO L284 TraceCheckUtils]: 65: Hoare quadruple {14546#true} {14547#false} #656#return; {14547#false} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 64: Hoare triple {14546#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 63: Hoare triple {14546#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 62: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 61: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 60: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 59: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 58: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 57: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 56: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 55: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 54: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 53: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 52: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,516 INFO L290 TraceCheckUtils]: 51: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 50: Hoare triple {14546#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14546#true} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 49: Hoare triple {14546#true} #t~loopctr188 := 0; {14546#true} is VALID [2022-04-28 03:36:16,517 INFO L272 TraceCheckUtils]: 48: Hoare triple {14547#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {14546#true} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 47: Hoare triple {14547#false} assume !(~len <= 0); {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 46: Hoare triple {14547#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L272 TraceCheckUtils]: 45: Hoare triple {14547#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 44: Hoare triple {14547#false} assume 0 != #t~mem173;havoc #t~mem173; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 43: Hoare triple {14547#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 42: Hoare triple {14547#false} assume #t~short172; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 41: Hoare triple {14547#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 40: Hoare triple {14547#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 39: Hoare triple {14547#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 38: Hoare triple {14547#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 37: Hoare triple {14547#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 36: Hoare triple {14547#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 35: Hoare triple {14547#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {14547#false} is VALID [2022-04-28 03:36:16,517 INFO L290 TraceCheckUtils]: 34: Hoare triple {14547#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {14547#false} is VALID [2022-04-28 03:36:16,518 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {14949#(not (= |#Ultimate.C_memset_#amount| 24))} {14546#true} #672#return; {14547#false} is VALID [2022-04-28 03:36:16,518 INFO L290 TraceCheckUtils]: 32: Hoare triple {14949#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {14949#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:36:16,519 INFO L290 TraceCheckUtils]: 31: Hoare triple {14956#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {14949#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:36:16,521 INFO L290 TraceCheckUtils]: 30: Hoare triple {14960#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14956#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,522 INFO L290 TraceCheckUtils]: 29: Hoare triple {14964#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14960#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,525 INFO L290 TraceCheckUtils]: 28: Hoare triple {14968#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14964#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,530 INFO L290 TraceCheckUtils]: 27: Hoare triple {14972#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14968#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,531 INFO L290 TraceCheckUtils]: 26: Hoare triple {14976#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14972#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:36:16,535 INFO L290 TraceCheckUtils]: 25: Hoare triple {14980#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14976#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,536 INFO L290 TraceCheckUtils]: 24: Hoare triple {14984#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14980#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:36:16,539 INFO L290 TraceCheckUtils]: 23: Hoare triple {14988#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14984#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:36:16,542 INFO L290 TraceCheckUtils]: 22: Hoare triple {14992#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14988#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,543 INFO L290 TraceCheckUtils]: 21: Hoare triple {14996#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14992#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,545 INFO L290 TraceCheckUtils]: 20: Hoare triple {15000#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {14996#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,546 INFO L290 TraceCheckUtils]: 19: Hoare triple {15004#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15000#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,549 INFO L290 TraceCheckUtils]: 18: Hoare triple {15008#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15004#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,549 INFO L290 TraceCheckUtils]: 17: Hoare triple {14546#true} #t~loopctr188 := 0; {15008#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:16,549 INFO L272 TraceCheckUtils]: 16: Hoare triple {14546#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 15: Hoare triple {14546#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 14: Hoare triple {14546#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 13: Hoare triple {14546#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 12: Hoare triple {14546#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 11: Hoare triple {14546#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 10: Hoare triple {14546#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 9: Hoare triple {14546#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 8: Hoare triple {14546#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 7: Hoare triple {14546#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L272 TraceCheckUtils]: 6: Hoare triple {14546#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 5: Hoare triple {14546#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L272 TraceCheckUtils]: 4: Hoare triple {14546#true} call #t~ret187 := main(); {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14546#true} {14546#true} #682#return; {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 2: Hoare triple {14546#true} assume true; {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L290 TraceCheckUtils]: 1: Hoare triple {14546#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {14546#true} is VALID [2022-04-28 03:36:16,550 INFO L272 TraceCheckUtils]: 0: Hoare triple {14546#true} call ULTIMATE.init(); {14546#true} is VALID [2022-04-28 03:36:16,551 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 0 proven. 289 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2022-04-28 03:36:16,551 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [216499814] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:36:16,551 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:36:16,551 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 17] total 48 [2022-04-28 03:36:16,551 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:36:16,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1347418334] [2022-04-28 03:36:16,551 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1347418334] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:36:16,551 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:36:16,551 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2022-04-28 03:36:16,551 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502513647] [2022-04-28 03:36:16,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:36:16,552 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 72 [2022-04-28 03:36:16,552 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:36:16,552 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:16,632 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:16,632 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-28 03:36:16,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:16,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-28 03:36:16,634 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=527, Invalid=1729, Unknown=0, NotChecked=0, Total=2256 [2022-04-28 03:36:16,634 INFO L87 Difference]: Start difference. First operand 89 states and 111 transitions. Second operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:21,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:21,155 INFO L93 Difference]: Finished difference Result 166 states and 210 transitions. [2022-04-28 03:36:21,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-28 03:36:21,155 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 72 [2022-04-28 03:36:21,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:36:21,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:21,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 195 transitions. [2022-04-28 03:36:21,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:21,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 195 transitions. [2022-04-28 03:36:21,160 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 195 transitions. [2022-04-28 03:36:21,422 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 195 edges. 195 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:21,424 INFO L225 Difference]: With dead ends: 166 [2022-04-28 03:36:21,424 INFO L226 Difference]: Without dead ends: 94 [2022-04-28 03:36:21,425 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 182 GetRequests, 119 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=836, Invalid=3196, Unknown=0, NotChecked=0, Total=4032 [2022-04-28 03:36:21,426 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 1161 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 1218 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 1161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-04-28 03:36:21,426 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 279 Invalid, 1218 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 1161 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2022-04-28 03:36:21,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-28 03:36:21,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 90. [2022-04-28 03:36:21,471 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:36:21,472 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:21,472 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:21,472 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:21,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:21,474 INFO L93 Difference]: Finished difference Result 94 states and 118 transitions. [2022-04-28 03:36:21,474 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 118 transitions. [2022-04-28 03:36:21,474 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:21,474 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:21,474 INFO L74 IsIncluded]: Start isIncluded. First operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 94 states. [2022-04-28 03:36:21,475 INFO L87 Difference]: Start difference. First operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 94 states. [2022-04-28 03:36:21,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:21,477 INFO L93 Difference]: Finished difference Result 94 states and 118 transitions. [2022-04-28 03:36:21,477 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 118 transitions. [2022-04-28 03:36:21,477 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:21,477 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:21,477 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:36:21,477 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:36:21,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 72 states have (on average 1.2361111111111112) internal successors, (89), 72 states have internal predecessors, (89), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:21,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 112 transitions. [2022-04-28 03:36:21,479 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 112 transitions. Word has length 72 [2022-04-28 03:36:21,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:36:21,480 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 112 transitions. [2022-04-28 03:36:21,480 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:21,480 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 90 states and 112 transitions. [2022-04-28 03:36:21,695 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:21,695 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 112 transitions. [2022-04-28 03:36:21,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-28 03:36:21,696 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:36:21,696 INFO L195 NwaCegarLoop]: trace histogram [28, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:36:21,726 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-28 03:36:21,896 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:36:21,896 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:36:21,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:36:21,897 INFO L85 PathProgramCache]: Analyzing trace with hash -286155254, now seen corresponding path program 27 times [2022-04-28 03:36:21,897 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:21,897 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [48657528] [2022-04-28 03:36:21,897 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:36:21,897 INFO L85 PathProgramCache]: Analyzing trace with hash -286155254, now seen corresponding path program 28 times [2022-04-28 03:36:21,897 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:36:21,897 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076670771] [2022-04-28 03:36:21,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:21,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:36:21,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:21,993 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:36:21,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:22,002 INFO L290 TraceCheckUtils]: 0: Hoare triple {15836#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15795#true} is VALID [2022-04-28 03:36:22,002 INFO L290 TraceCheckUtils]: 1: Hoare triple {15795#true} assume true; {15795#true} is VALID [2022-04-28 03:36:22,002 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15795#true} {15795#true} #682#return; {15795#true} is VALID [2022-04-28 03:36:22,005 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:36:22,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:22,884 INFO L290 TraceCheckUtils]: 0: Hoare triple {15837#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:22,891 INFO L290 TraceCheckUtils]: 1: Hoare triple {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15839#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:22,896 INFO L290 TraceCheckUtils]: 2: Hoare triple {15839#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15840#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:22,899 INFO L290 TraceCheckUtils]: 3: Hoare triple {15840#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15841#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:22,902 INFO L290 TraceCheckUtils]: 4: Hoare triple {15841#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:22,907 INFO L290 TraceCheckUtils]: 5: Hoare triple {15842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15843#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:22,910 INFO L290 TraceCheckUtils]: 6: Hoare triple {15843#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15844#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:22,915 INFO L290 TraceCheckUtils]: 7: Hoare triple {15844#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15845#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:22,920 INFO L290 TraceCheckUtils]: 8: Hoare triple {15845#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15846#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:22,925 INFO L290 TraceCheckUtils]: 9: Hoare triple {15846#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15847#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:22,928 INFO L290 TraceCheckUtils]: 10: Hoare triple {15847#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15848#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:22,932 INFO L290 TraceCheckUtils]: 11: Hoare triple {15848#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15849#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:22,935 INFO L290 TraceCheckUtils]: 12: Hoare triple {15849#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:22,939 INFO L290 TraceCheckUtils]: 13: Hoare triple {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15851#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:36:22,944 INFO L290 TraceCheckUtils]: 14: Hoare triple {15851#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15852#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 14)))} is VALID [2022-04-28 03:36:22,945 INFO L290 TraceCheckUtils]: 15: Hoare triple {15852#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 14)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-28 03:36:22,945 INFO L290 TraceCheckUtils]: 16: Hoare triple {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-28 03:36:22,947 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} {15795#true} #672#return; {15796#false} is VALID [2022-04-28 03:36:22,947 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 49 [2022-04-28 03:36:22,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:22,965 INFO L290 TraceCheckUtils]: 0: Hoare triple {15837#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15795#true} is VALID [2022-04-28 03:36:22,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,965 INFO L290 TraceCheckUtils]: 2: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,965 INFO L290 TraceCheckUtils]: 3: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 4: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 5: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 6: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 7: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 8: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 9: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 10: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 11: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 12: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 13: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,966 INFO L290 TraceCheckUtils]: 14: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:22,967 INFO L290 TraceCheckUtils]: 15: Hoare triple {15795#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15795#true} is VALID [2022-04-28 03:36:22,967 INFO L290 TraceCheckUtils]: 16: Hoare triple {15795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15795#true} is VALID [2022-04-28 03:36:22,967 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {15795#true} {15796#false} #656#return; {15796#false} is VALID [2022-04-28 03:36:22,968 INFO L272 TraceCheckUtils]: 0: Hoare triple {15795#true} call ULTIMATE.init(); {15836#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:36:22,968 INFO L290 TraceCheckUtils]: 1: Hoare triple {15836#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L290 TraceCheckUtils]: 2: Hoare triple {15795#true} assume true; {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15795#true} {15795#true} #682#return; {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L272 TraceCheckUtils]: 4: Hoare triple {15795#true} call #t~ret187 := main(); {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L290 TraceCheckUtils]: 5: Hoare triple {15795#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L272 TraceCheckUtils]: 6: Hoare triple {15795#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L290 TraceCheckUtils]: 7: Hoare triple {15795#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L290 TraceCheckUtils]: 8: Hoare triple {15795#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L290 TraceCheckUtils]: 9: Hoare triple {15795#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:22,968 INFO L290 TraceCheckUtils]: 10: Hoare triple {15795#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15795#true} is VALID [2022-04-28 03:36:22,969 INFO L290 TraceCheckUtils]: 11: Hoare triple {15795#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:22,969 INFO L290 TraceCheckUtils]: 12: Hoare triple {15795#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15795#true} is VALID [2022-04-28 03:36:22,969 INFO L290 TraceCheckUtils]: 13: Hoare triple {15795#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:22,969 INFO L290 TraceCheckUtils]: 14: Hoare triple {15795#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15795#true} is VALID [2022-04-28 03:36:22,969 INFO L290 TraceCheckUtils]: 15: Hoare triple {15795#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15795#true} is VALID [2022-04-28 03:36:22,970 INFO L272 TraceCheckUtils]: 16: Hoare triple {15795#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {15837#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:36:22,970 INFO L290 TraceCheckUtils]: 17: Hoare triple {15837#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:22,976 INFO L290 TraceCheckUtils]: 18: Hoare triple {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15839#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:22,981 INFO L290 TraceCheckUtils]: 19: Hoare triple {15839#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15840#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:22,984 INFO L290 TraceCheckUtils]: 20: Hoare triple {15840#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15841#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:22,988 INFO L290 TraceCheckUtils]: 21: Hoare triple {15841#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:22,992 INFO L290 TraceCheckUtils]: 22: Hoare triple {15842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15843#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:22,994 INFO L290 TraceCheckUtils]: 23: Hoare triple {15843#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15844#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:22,998 INFO L290 TraceCheckUtils]: 24: Hoare triple {15844#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15845#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:23,002 INFO L290 TraceCheckUtils]: 25: Hoare triple {15845#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15846#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:23,005 INFO L290 TraceCheckUtils]: 26: Hoare triple {15846#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15847#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:23,008 INFO L290 TraceCheckUtils]: 27: Hoare triple {15847#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15848#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:23,013 INFO L290 TraceCheckUtils]: 28: Hoare triple {15848#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15849#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:23,017 INFO L290 TraceCheckUtils]: 29: Hoare triple {15849#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:23,019 INFO L290 TraceCheckUtils]: 30: Hoare triple {15850#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15851#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:36:23,023 INFO L290 TraceCheckUtils]: 31: Hoare triple {15851#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15852#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 14)))} is VALID [2022-04-28 03:36:23,024 INFO L290 TraceCheckUtils]: 32: Hoare triple {15852#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 14)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-28 03:36:23,024 INFO L290 TraceCheckUtils]: 33: Hoare triple {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} is VALID [2022-04-28 03:36:23,025 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {15853#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 14))} {15795#true} #672#return; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 35: Hoare triple {15796#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 36: Hoare triple {15796#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 37: Hoare triple {15796#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 38: Hoare triple {15796#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 39: Hoare triple {15796#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 40: Hoare triple {15796#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 41: Hoare triple {15796#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 42: Hoare triple {15796#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 43: Hoare triple {15796#false} assume #t~short172; {15796#false} is VALID [2022-04-28 03:36:23,025 INFO L290 TraceCheckUtils]: 44: Hoare triple {15796#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15796#false} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 45: Hoare triple {15796#false} assume 0 != #t~mem173;havoc #t~mem173; {15796#false} is VALID [2022-04-28 03:36:23,026 INFO L272 TraceCheckUtils]: 46: Hoare triple {15796#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15796#false} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 47: Hoare triple {15796#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15796#false} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 48: Hoare triple {15796#false} assume !(~len <= 0); {15796#false} is VALID [2022-04-28 03:36:23,026 INFO L272 TraceCheckUtils]: 49: Hoare triple {15796#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15837#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 50: Hoare triple {15837#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 51: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 52: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 53: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 54: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 55: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 56: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 57: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 58: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 59: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 60: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 61: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 62: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,026 INFO L290 TraceCheckUtils]: 63: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,027 INFO L290 TraceCheckUtils]: 64: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:23,027 INFO L290 TraceCheckUtils]: 65: Hoare triple {15795#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15795#true} is VALID [2022-04-28 03:36:23,027 INFO L290 TraceCheckUtils]: 66: Hoare triple {15795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15795#true} is VALID [2022-04-28 03:36:23,027 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {15795#true} {15796#false} #656#return; {15796#false} is VALID [2022-04-28 03:36:23,027 INFO L290 TraceCheckUtils]: 68: Hoare triple {15796#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15796#false} is VALID [2022-04-28 03:36:23,027 INFO L290 TraceCheckUtils]: 69: Hoare triple {15796#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15796#false} is VALID [2022-04-28 03:36:23,027 INFO L272 TraceCheckUtils]: 70: Hoare triple {15796#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15796#false} is VALID [2022-04-28 03:36:23,027 INFO L290 TraceCheckUtils]: 71: Hoare triple {15796#false} ~cond := #in~cond; {15796#false} is VALID [2022-04-28 03:36:23,027 INFO L290 TraceCheckUtils]: 72: Hoare triple {15796#false} assume 0 == ~cond; {15796#false} is VALID [2022-04-28 03:36:23,027 INFO L290 TraceCheckUtils]: 73: Hoare triple {15796#false} assume !false; {15796#false} is VALID [2022-04-28 03:36:23,027 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 0 proven. 332 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2022-04-28 03:36:23,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:36:23,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076670771] [2022-04-28 03:36:23,028 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2076670771] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:36:23,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1589470404] [2022-04-28 03:36:23,028 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 03:36:23,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:36:23,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:36:23,029 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:36:23,030 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-28 03:36:23,581 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 03:36:23,581 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:36:23,586 INFO L263 TraceCheckSpWp]: Trace formula consists of 877 conjuncts, 60 conjunts are in the unsatisfiable core [2022-04-28 03:36:23,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:23,606 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:36:24,678 INFO L272 TraceCheckUtils]: 0: Hoare triple {15795#true} call ULTIMATE.init(); {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 1: Hoare triple {15795#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 2: Hoare triple {15795#true} assume true; {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15795#true} {15795#true} #682#return; {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L272 TraceCheckUtils]: 4: Hoare triple {15795#true} call #t~ret187 := main(); {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 5: Hoare triple {15795#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L272 TraceCheckUtils]: 6: Hoare triple {15795#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 7: Hoare triple {15795#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 8: Hoare triple {15795#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 9: Hoare triple {15795#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 10: Hoare triple {15795#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 11: Hoare triple {15795#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 12: Hoare triple {15795#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 13: Hoare triple {15795#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 14: Hoare triple {15795#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15795#true} is VALID [2022-04-28 03:36:24,679 INFO L290 TraceCheckUtils]: 15: Hoare triple {15795#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15795#true} is VALID [2022-04-28 03:36:24,680 INFO L272 TraceCheckUtils]: 16: Hoare triple {15795#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {15795#true} is VALID [2022-04-28 03:36:24,680 INFO L290 TraceCheckUtils]: 17: Hoare triple {15795#true} #t~loopctr188 := 0; {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:24,683 INFO L290 TraceCheckUtils]: 18: Hoare triple {15838#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15911#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:24,685 INFO L290 TraceCheckUtils]: 19: Hoare triple {15911#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15915#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:24,687 INFO L290 TraceCheckUtils]: 20: Hoare triple {15915#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15919#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:36:24,688 INFO L290 TraceCheckUtils]: 21: Hoare triple {15919#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15923#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:24,690 INFO L290 TraceCheckUtils]: 22: Hoare triple {15923#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15927#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:24,692 INFO L290 TraceCheckUtils]: 23: Hoare triple {15927#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15931#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:24,693 INFO L290 TraceCheckUtils]: 24: Hoare triple {15931#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15935#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:24,695 INFO L290 TraceCheckUtils]: 25: Hoare triple {15935#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15939#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:24,697 INFO L290 TraceCheckUtils]: 26: Hoare triple {15939#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15943#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:24,698 INFO L290 TraceCheckUtils]: 27: Hoare triple {15943#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15947#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:24,700 INFO L290 TraceCheckUtils]: 28: Hoare triple {15947#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15951#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:24,701 INFO L290 TraceCheckUtils]: 29: Hoare triple {15951#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15955#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:24,703 INFO L290 TraceCheckUtils]: 30: Hoare triple {15955#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15959#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:36:24,706 INFO L290 TraceCheckUtils]: 31: Hoare triple {15959#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15963#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:36:24,710 INFO L290 TraceCheckUtils]: 32: Hoare triple {15963#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15967#(< (div (+ (- 4294967309) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 14 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-28 03:36:24,711 INFO L290 TraceCheckUtils]: 33: Hoare triple {15967#(< (div (+ (- 4294967309) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 14 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15967#(< (div (+ (- 4294967309) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 14 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-28 03:36:24,712 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {15967#(< (div (+ (- 4294967309) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) (+ 2 (div (+ 14 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} {15795#true} #672#return; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 35: Hoare triple {15796#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 36: Hoare triple {15796#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 37: Hoare triple {15796#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 38: Hoare triple {15796#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 39: Hoare triple {15796#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 40: Hoare triple {15796#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 41: Hoare triple {15796#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 42: Hoare triple {15796#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 43: Hoare triple {15796#false} assume #t~short172; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 44: Hoare triple {15796#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 45: Hoare triple {15796#false} assume 0 != #t~mem173;havoc #t~mem173; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L272 TraceCheckUtils]: 46: Hoare triple {15796#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 47: Hoare triple {15796#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L290 TraceCheckUtils]: 48: Hoare triple {15796#false} assume !(~len <= 0); {15796#false} is VALID [2022-04-28 03:36:24,712 INFO L272 TraceCheckUtils]: 49: Hoare triple {15796#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 50: Hoare triple {15796#false} #t~loopctr188 := 0; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 51: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 52: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 53: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 54: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 55: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 56: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 57: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 58: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 59: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 60: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 61: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 62: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 63: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 64: Hoare triple {15796#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 65: Hoare triple {15796#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 66: Hoare triple {15796#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {15796#false} {15796#false} #656#return; {15796#false} is VALID [2022-04-28 03:36:24,713 INFO L290 TraceCheckUtils]: 68: Hoare triple {15796#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15796#false} is VALID [2022-04-28 03:36:24,714 INFO L290 TraceCheckUtils]: 69: Hoare triple {15796#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15796#false} is VALID [2022-04-28 03:36:24,714 INFO L272 TraceCheckUtils]: 70: Hoare triple {15796#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15796#false} is VALID [2022-04-28 03:36:24,714 INFO L290 TraceCheckUtils]: 71: Hoare triple {15796#false} ~cond := #in~cond; {15796#false} is VALID [2022-04-28 03:36:24,714 INFO L290 TraceCheckUtils]: 72: Hoare triple {15796#false} assume 0 == ~cond; {15796#false} is VALID [2022-04-28 03:36:24,714 INFO L290 TraceCheckUtils]: 73: Hoare triple {15796#false} assume !false; {15796#false} is VALID [2022-04-28 03:36:24,714 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 228 proven. 105 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2022-04-28 03:36:24,714 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 73: Hoare triple {15796#false} assume !false; {15796#false} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 72: Hoare triple {15796#false} assume 0 == ~cond; {15796#false} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 71: Hoare triple {15796#false} ~cond := #in~cond; {15796#false} is VALID [2022-04-28 03:36:26,617 INFO L272 TraceCheckUtils]: 70: Hoare triple {15796#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {15796#false} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 69: Hoare triple {15796#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {15796#false} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 68: Hoare triple {15796#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {15796#false} is VALID [2022-04-28 03:36:26,617 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {15795#true} {15796#false} #656#return; {15796#false} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 66: Hoare triple {15795#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {15795#true} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 65: Hoare triple {15795#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {15795#true} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 64: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 63: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,617 INFO L290 TraceCheckUtils]: 62: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 61: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 60: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 59: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 58: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 57: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 56: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 55: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 54: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 53: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 52: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 51: Hoare triple {15795#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 50: Hoare triple {15795#true} #t~loopctr188 := 0; {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L272 TraceCheckUtils]: 49: Hoare triple {15796#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {15795#true} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 48: Hoare triple {15796#false} assume !(~len <= 0); {15796#false} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 47: Hoare triple {15796#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {15796#false} is VALID [2022-04-28 03:36:26,618 INFO L272 TraceCheckUtils]: 46: Hoare triple {15796#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {15796#false} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 45: Hoare triple {15796#false} assume 0 != #t~mem173;havoc #t~mem173; {15796#false} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 44: Hoare triple {15796#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {15796#false} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 43: Hoare triple {15796#false} assume #t~short172; {15796#false} is VALID [2022-04-28 03:36:26,618 INFO L290 TraceCheckUtils]: 42: Hoare triple {15796#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {15796#false} is VALID [2022-04-28 03:36:26,619 INFO L290 TraceCheckUtils]: 41: Hoare triple {15796#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {15796#false} is VALID [2022-04-28 03:36:26,619 INFO L290 TraceCheckUtils]: 40: Hoare triple {15796#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {15796#false} is VALID [2022-04-28 03:36:26,619 INFO L290 TraceCheckUtils]: 39: Hoare triple {15796#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {15796#false} is VALID [2022-04-28 03:36:26,619 INFO L290 TraceCheckUtils]: 38: Hoare triple {15796#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {15796#false} is VALID [2022-04-28 03:36:26,619 INFO L290 TraceCheckUtils]: 37: Hoare triple {15796#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {15796#false} is VALID [2022-04-28 03:36:26,619 INFO L290 TraceCheckUtils]: 36: Hoare triple {15796#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {15796#false} is VALID [2022-04-28 03:36:26,619 INFO L290 TraceCheckUtils]: 35: Hoare triple {15796#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {15796#false} is VALID [2022-04-28 03:36:26,620 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {16211#(not (= |#Ultimate.C_memset_#amount| 24))} {15795#true} #672#return; {15796#false} is VALID [2022-04-28 03:36:26,620 INFO L290 TraceCheckUtils]: 33: Hoare triple {16211#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {16211#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:36:26,620 INFO L290 TraceCheckUtils]: 32: Hoare triple {16218#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {16211#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:36:26,622 INFO L290 TraceCheckUtils]: 31: Hoare triple {16222#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16218#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:26,623 INFO L290 TraceCheckUtils]: 30: Hoare triple {16226#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16222#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:26,625 INFO L290 TraceCheckUtils]: 29: Hoare triple {16230#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16226#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:26,627 INFO L290 TraceCheckUtils]: 28: Hoare triple {16234#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16230#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:26,628 INFO L290 TraceCheckUtils]: 27: Hoare triple {16238#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16234#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:26,632 INFO L290 TraceCheckUtils]: 26: Hoare triple {16242#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16238#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:26,634 INFO L290 TraceCheckUtils]: 25: Hoare triple {16246#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16242#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:36:26,636 INFO L290 TraceCheckUtils]: 24: Hoare triple {16250#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16246#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:26,637 INFO L290 TraceCheckUtils]: 23: Hoare triple {16254#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16250#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:26,639 INFO L290 TraceCheckUtils]: 22: Hoare triple {16258#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16254#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:26,643 INFO L290 TraceCheckUtils]: 21: Hoare triple {16262#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16258#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:26,644 INFO L290 TraceCheckUtils]: 20: Hoare triple {16266#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16262#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:36:26,646 INFO L290 TraceCheckUtils]: 19: Hoare triple {16270#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16266#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:26,649 INFO L290 TraceCheckUtils]: 18: Hoare triple {16274#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {16270#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:26,649 INFO L290 TraceCheckUtils]: 17: Hoare triple {15795#true} #t~loopctr188 := 0; {16274#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:36:26,649 INFO L272 TraceCheckUtils]: 16: Hoare triple {15795#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {15795#true} is VALID [2022-04-28 03:36:26,649 INFO L290 TraceCheckUtils]: 15: Hoare triple {15795#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {15795#true} is VALID [2022-04-28 03:36:26,649 INFO L290 TraceCheckUtils]: 14: Hoare triple {15795#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 13: Hoare triple {15795#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 12: Hoare triple {15795#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 11: Hoare triple {15795#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 10: Hoare triple {15795#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 9: Hoare triple {15795#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 8: Hoare triple {15795#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 7: Hoare triple {15795#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L272 TraceCheckUtils]: 6: Hoare triple {15795#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 5: Hoare triple {15795#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L272 TraceCheckUtils]: 4: Hoare triple {15795#true} call #t~ret187 := main(); {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15795#true} {15795#true} #682#return; {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 2: Hoare triple {15795#true} assume true; {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L290 TraceCheckUtils]: 1: Hoare triple {15795#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {15795#true} is VALID [2022-04-28 03:36:26,650 INFO L272 TraceCheckUtils]: 0: Hoare triple {15795#true} call ULTIMATE.init(); {15795#true} is VALID [2022-04-28 03:36:26,651 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 0 proven. 332 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2022-04-28 03:36:26,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1589470404] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:36:26,651 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:36:26,651 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18, 18] total 51 [2022-04-28 03:36:26,651 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:36:26,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [48657528] [2022-04-28 03:36:26,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [48657528] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:36:26,651 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:36:26,652 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2022-04-28 03:36:26,652 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1883323327] [2022-04-28 03:36:26,652 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:36:26,652 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 74 [2022-04-28 03:36:26,652 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:36:26,652 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:26,720 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:26,720 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-28 03:36:26,721 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:26,721 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-28 03:36:26,721 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=589, Invalid=1961, Unknown=0, NotChecked=0, Total=2550 [2022-04-28 03:36:26,722 INFO L87 Difference]: Start difference. First operand 90 states and 112 transitions. Second operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:30,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:30,910 INFO L93 Difference]: Finished difference Result 168 states and 212 transitions. [2022-04-28 03:36:30,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-28 03:36:30,910 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 74 [2022-04-28 03:36:30,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:36:30,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:30,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 196 transitions. [2022-04-28 03:36:30,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:30,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 196 transitions. [2022-04-28 03:36:30,916 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 196 transitions. [2022-04-28 03:36:31,196 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 196 edges. 196 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:31,198 INFO L225 Difference]: With dead ends: 168 [2022-04-28 03:36:31,198 INFO L226 Difference]: Without dead ends: 95 [2022-04-28 03:36:31,199 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 121 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 459 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=928, Invalid=3628, Unknown=0, NotChecked=0, Total=4556 [2022-04-28 03:36:31,199 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 961 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 228 SdHoareTripleChecker+Invalid, 1020 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 961 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-28 03:36:31,200 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 228 Invalid, 1020 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 961 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-28 03:36:31,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-04-28 03:36:31,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 91. [2022-04-28 03:36:31,246 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:36:31,247 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:31,247 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:31,247 INFO L87 Difference]: Start difference. First operand 95 states. Second operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:31,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:31,249 INFO L93 Difference]: Finished difference Result 95 states and 119 transitions. [2022-04-28 03:36:31,249 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 119 transitions. [2022-04-28 03:36:31,249 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:31,249 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:31,250 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 95 states. [2022-04-28 03:36:31,250 INFO L87 Difference]: Start difference. First operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 95 states. [2022-04-28 03:36:31,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:36:31,252 INFO L93 Difference]: Finished difference Result 95 states and 119 transitions. [2022-04-28 03:36:31,252 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 119 transitions. [2022-04-28 03:36:31,252 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:36:31,252 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:36:31,252 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:36:31,252 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:36:31,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 73 states have (on average 1.2328767123287672) internal successors, (90), 73 states have internal predecessors, (90), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:36:31,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 113 transitions. [2022-04-28 03:36:31,254 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 113 transitions. Word has length 74 [2022-04-28 03:36:31,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:36:31,255 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 113 transitions. [2022-04-28 03:36:31,255 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 2.55) internal successors, (51), 18 states have internal predecessors, (51), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:36:31,255 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 91 states and 113 transitions. [2022-04-28 03:36:31,451 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:36:31,451 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 113 transitions. [2022-04-28 03:36:31,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-04-28 03:36:31,452 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:36:31,452 INFO L195 NwaCegarLoop]: trace histogram [30, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:36:31,471 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-28 03:36:31,652 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-28 03:36:31,652 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:36:31,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:36:31,653 INFO L85 PathProgramCache]: Analyzing trace with hash -1348028000, now seen corresponding path program 29 times [2022-04-28 03:36:31,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:36:31,653 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [952361469] [2022-04-28 03:36:31,653 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:36:31,653 INFO L85 PathProgramCache]: Analyzing trace with hash -1348028000, now seen corresponding path program 30 times [2022-04-28 03:36:31,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:36:31,653 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648662909] [2022-04-28 03:36:31,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:36:31,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:36:31,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:31,764 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:36:31,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:31,773 INFO L290 TraceCheckUtils]: 0: Hoare triple {17114#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17071#true} is VALID [2022-04-28 03:36:31,774 INFO L290 TraceCheckUtils]: 1: Hoare triple {17071#true} assume true; {17071#true} is VALID [2022-04-28 03:36:31,774 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17071#true} {17071#true} #682#return; {17071#true} is VALID [2022-04-28 03:36:31,776 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:36:31,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:32,577 INFO L290 TraceCheckUtils]: 0: Hoare triple {17115#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:32,582 INFO L290 TraceCheckUtils]: 1: Hoare triple {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17117#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,585 INFO L290 TraceCheckUtils]: 2: Hoare triple {17117#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17118#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:32,587 INFO L290 TraceCheckUtils]: 3: Hoare triple {17118#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17119#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:32,590 INFO L290 TraceCheckUtils]: 4: Hoare triple {17119#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17120#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,592 INFO L290 TraceCheckUtils]: 5: Hoare triple {17120#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17121#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:32,594 INFO L290 TraceCheckUtils]: 6: Hoare triple {17121#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17122#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:32,597 INFO L290 TraceCheckUtils]: 7: Hoare triple {17122#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17123#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:32,600 INFO L290 TraceCheckUtils]: 8: Hoare triple {17123#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17124#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:32,602 INFO L290 TraceCheckUtils]: 9: Hoare triple {17124#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17125#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,604 INFO L290 TraceCheckUtils]: 10: Hoare triple {17125#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17126#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,607 INFO L290 TraceCheckUtils]: 11: Hoare triple {17126#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17127#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,609 INFO L290 TraceCheckUtils]: 12: Hoare triple {17127#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,612 INFO L290 TraceCheckUtils]: 13: Hoare triple {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17129#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:36:32,614 INFO L290 TraceCheckUtils]: 14: Hoare triple {17129#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17130#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:36:32,616 INFO L290 TraceCheckUtils]: 15: Hoare triple {17130#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17131#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-28 03:36:32,618 INFO L290 TraceCheckUtils]: 16: Hoare triple {17131#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:32,618 INFO L290 TraceCheckUtils]: 17: Hoare triple {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:32,619 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {17071#true} #672#return; {17072#false} is VALID [2022-04-28 03:36:32,619 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-28 03:36:32,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:36:32,639 INFO L290 TraceCheckUtils]: 0: Hoare triple {17115#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 1: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 2: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 3: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 4: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 5: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 6: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 7: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 8: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 9: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 10: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 11: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,640 INFO L290 TraceCheckUtils]: 12: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,641 INFO L290 TraceCheckUtils]: 13: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,641 INFO L290 TraceCheckUtils]: 14: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,641 INFO L290 TraceCheckUtils]: 15: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,641 INFO L290 TraceCheckUtils]: 16: Hoare triple {17071#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17071#true} is VALID [2022-04-28 03:36:32,641 INFO L290 TraceCheckUtils]: 17: Hoare triple {17071#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17071#true} is VALID [2022-04-28 03:36:32,641 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {17071#true} {17072#false} #656#return; {17072#false} is VALID [2022-04-28 03:36:32,642 INFO L272 TraceCheckUtils]: 0: Hoare triple {17071#true} call ULTIMATE.init(); {17114#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:36:32,642 INFO L290 TraceCheckUtils]: 1: Hoare triple {17114#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L290 TraceCheckUtils]: 2: Hoare triple {17071#true} assume true; {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17071#true} {17071#true} #682#return; {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L272 TraceCheckUtils]: 4: Hoare triple {17071#true} call #t~ret187 := main(); {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L290 TraceCheckUtils]: 5: Hoare triple {17071#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L272 TraceCheckUtils]: 6: Hoare triple {17071#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L290 TraceCheckUtils]: 7: Hoare triple {17071#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L290 TraceCheckUtils]: 8: Hoare triple {17071#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L290 TraceCheckUtils]: 9: Hoare triple {17071#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L290 TraceCheckUtils]: 10: Hoare triple {17071#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17071#true} is VALID [2022-04-28 03:36:32,642 INFO L290 TraceCheckUtils]: 11: Hoare triple {17071#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17071#true} is VALID [2022-04-28 03:36:32,643 INFO L290 TraceCheckUtils]: 12: Hoare triple {17071#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17071#true} is VALID [2022-04-28 03:36:32,643 INFO L290 TraceCheckUtils]: 13: Hoare triple {17071#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17071#true} is VALID [2022-04-28 03:36:32,643 INFO L290 TraceCheckUtils]: 14: Hoare triple {17071#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17071#true} is VALID [2022-04-28 03:36:32,643 INFO L290 TraceCheckUtils]: 15: Hoare triple {17071#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17071#true} is VALID [2022-04-28 03:36:32,643 INFO L272 TraceCheckUtils]: 16: Hoare triple {17071#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {17115#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:36:32,644 INFO L290 TraceCheckUtils]: 17: Hoare triple {17115#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:36:32,650 INFO L290 TraceCheckUtils]: 18: Hoare triple {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17117#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,653 INFO L290 TraceCheckUtils]: 19: Hoare triple {17117#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17118#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:36:32,657 INFO L290 TraceCheckUtils]: 20: Hoare triple {17118#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17119#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:32,660 INFO L290 TraceCheckUtils]: 21: Hoare triple {17119#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17120#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,663 INFO L290 TraceCheckUtils]: 22: Hoare triple {17120#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17121#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:36:32,667 INFO L290 TraceCheckUtils]: 23: Hoare triple {17121#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17122#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:36:32,671 INFO L290 TraceCheckUtils]: 24: Hoare triple {17122#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17123#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:32,674 INFO L290 TraceCheckUtils]: 25: Hoare triple {17123#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17124#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:36:32,679 INFO L290 TraceCheckUtils]: 26: Hoare triple {17124#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17125#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,683 INFO L290 TraceCheckUtils]: 27: Hoare triple {17125#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17126#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,686 INFO L290 TraceCheckUtils]: 28: Hoare triple {17126#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17127#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,689 INFO L290 TraceCheckUtils]: 29: Hoare triple {17127#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:36:32,693 INFO L290 TraceCheckUtils]: 30: Hoare triple {17128#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17129#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:36:32,697 INFO L290 TraceCheckUtils]: 31: Hoare triple {17129#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17130#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:36:32,699 INFO L290 TraceCheckUtils]: 32: Hoare triple {17130#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17131#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-28 03:36:32,702 INFO L290 TraceCheckUtils]: 33: Hoare triple {17131#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 15) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:32,702 INFO L290 TraceCheckUtils]: 34: Hoare triple {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:36:32,703 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17132#(or (<= |#Ultimate.C_memset_#amount| 15) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {17071#true} #672#return; {17072#false} is VALID [2022-04-28 03:36:32,703 INFO L290 TraceCheckUtils]: 36: Hoare triple {17072#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 37: Hoare triple {17072#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 38: Hoare triple {17072#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 39: Hoare triple {17072#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 40: Hoare triple {17072#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 41: Hoare triple {17072#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 42: Hoare triple {17072#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 43: Hoare triple {17072#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 44: Hoare triple {17072#false} assume #t~short172; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 45: Hoare triple {17072#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 46: Hoare triple {17072#false} assume 0 != #t~mem173;havoc #t~mem173; {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L272 TraceCheckUtils]: 47: Hoare triple {17072#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17072#false} is VALID [2022-04-28 03:36:32,704 INFO L290 TraceCheckUtils]: 48: Hoare triple {17072#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17072#false} is VALID [2022-04-28 03:36:32,705 INFO L290 TraceCheckUtils]: 49: Hoare triple {17072#false} assume !(~len <= 0); {17072#false} is VALID [2022-04-28 03:36:32,705 INFO L272 TraceCheckUtils]: 50: Hoare triple {17072#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17115#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:36:32,705 INFO L290 TraceCheckUtils]: 51: Hoare triple {17115#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {17071#true} is VALID [2022-04-28 03:36:32,705 INFO L290 TraceCheckUtils]: 52: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,705 INFO L290 TraceCheckUtils]: 53: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,705 INFO L290 TraceCheckUtils]: 54: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,705 INFO L290 TraceCheckUtils]: 55: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 56: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 57: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 58: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 59: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 60: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 61: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 62: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 63: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,713 INFO L290 TraceCheckUtils]: 64: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 65: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 66: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 67: Hoare triple {17071#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17071#true} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 68: Hoare triple {17071#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17071#true} is VALID [2022-04-28 03:36:32,714 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17071#true} {17072#false} #656#return; {17072#false} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 70: Hoare triple {17072#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17072#false} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 71: Hoare triple {17072#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17072#false} is VALID [2022-04-28 03:36:32,714 INFO L272 TraceCheckUtils]: 72: Hoare triple {17072#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17072#false} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 73: Hoare triple {17072#false} ~cond := #in~cond; {17072#false} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 74: Hoare triple {17072#false} assume 0 == ~cond; {17072#false} is VALID [2022-04-28 03:36:32,714 INFO L290 TraceCheckUtils]: 75: Hoare triple {17072#false} assume !false; {17072#false} is VALID [2022-04-28 03:36:32,715 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2022-04-28 03:36:32,715 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:36:32,715 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648662909] [2022-04-28 03:36:32,716 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [648662909] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:36:32,716 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1589460107] [2022-04-28 03:36:32,717 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 03:36:32,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:36:32,717 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:36:32,718 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:36:32,722 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-28 03:37:07,473 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2022-04-28 03:37:07,473 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:37:07,509 INFO L263 TraceCheckSpWp]: Trace formula consists of 891 conjuncts, 49 conjunts are in the unsatisfiable core [2022-04-28 03:37:07,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:07,542 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:37:09,104 INFO L272 TraceCheckUtils]: 0: Hoare triple {17071#true} call ULTIMATE.init(); {17071#true} is VALID [2022-04-28 03:37:09,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {17071#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17071#true} is VALID [2022-04-28 03:37:09,105 INFO L290 TraceCheckUtils]: 2: Hoare triple {17071#true} assume true; {17071#true} is VALID [2022-04-28 03:37:09,105 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17071#true} {17071#true} #682#return; {17071#true} is VALID [2022-04-28 03:37:09,105 INFO L272 TraceCheckUtils]: 4: Hoare triple {17071#true} call #t~ret187 := main(); {17071#true} is VALID [2022-04-28 03:37:09,105 INFO L290 TraceCheckUtils]: 5: Hoare triple {17071#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17071#true} is VALID [2022-04-28 03:37:09,105 INFO L272 TraceCheckUtils]: 6: Hoare triple {17071#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {17071#true} is VALID [2022-04-28 03:37:09,105 INFO L290 TraceCheckUtils]: 7: Hoare triple {17071#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,105 INFO L290 TraceCheckUtils]: 8: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,106 INFO L290 TraceCheckUtils]: 9: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,106 INFO L290 TraceCheckUtils]: 10: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,106 INFO L290 TraceCheckUtils]: 11: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,106 INFO L290 TraceCheckUtils]: 12: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,107 INFO L290 TraceCheckUtils]: 13: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,107 INFO L290 TraceCheckUtils]: 14: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,107 INFO L290 TraceCheckUtils]: 15: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} is VALID [2022-04-28 03:37:09,107 INFO L272 TraceCheckUtils]: 16: Hoare triple {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {17071#true} is VALID [2022-04-28 03:37:09,108 INFO L290 TraceCheckUtils]: 17: Hoare triple {17071#true} #t~loopctr188 := 0; {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:09,113 INFO L290 TraceCheckUtils]: 18: Hoare triple {17116#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17191#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:09,116 INFO L290 TraceCheckUtils]: 19: Hoare triple {17191#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17195#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:09,118 INFO L290 TraceCheckUtils]: 20: Hoare triple {17195#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17199#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:37:09,120 INFO L290 TraceCheckUtils]: 21: Hoare triple {17199#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17203#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:09,122 INFO L290 TraceCheckUtils]: 22: Hoare triple {17203#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17207#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:09,124 INFO L290 TraceCheckUtils]: 23: Hoare triple {17207#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17211#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:09,127 INFO L290 TraceCheckUtils]: 24: Hoare triple {17211#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17215#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:09,130 INFO L290 TraceCheckUtils]: 25: Hoare triple {17215#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17219#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:09,134 INFO L290 TraceCheckUtils]: 26: Hoare triple {17219#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17223#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:09,136 INFO L290 TraceCheckUtils]: 27: Hoare triple {17223#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17227#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:09,138 INFO L290 TraceCheckUtils]: 28: Hoare triple {17227#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17231#(and (< (mod (+ 4294967292 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:09,142 INFO L290 TraceCheckUtils]: 29: Hoare triple {17231#(and (< (mod (+ 4294967292 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967291) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:09,144 INFO L290 TraceCheckUtils]: 30: Hoare triple {17235#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967291) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17239#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13) (< (mod (+ 4294967290 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:09,145 INFO L290 TraceCheckUtils]: 31: Hoare triple {17239#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13) (< (mod (+ 4294967290 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17243#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967289) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:09,149 INFO L290 TraceCheckUtils]: 32: Hoare triple {17243#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967289) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (< (mod (+ 4294967288 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:09,151 INFO L290 TraceCheckUtils]: 33: Hoare triple {17247#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (< (mod (+ 4294967288 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17251#(and (< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 15) 4294967296) 1)))} is VALID [2022-04-28 03:37:09,152 INFO L290 TraceCheckUtils]: 34: Hoare triple {17251#(and (< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 15) 4294967296) 1)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17251#(and (< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 15) 4294967296) 1)))} is VALID [2022-04-28 03:37:09,153 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17251#(and (< (div (+ (- 4294967304) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 15) 4294967296) 1)))} {17157#(= |do_discover_list_~#smp_rr~0.offset| 0)} #672#return; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 36: Hoare triple {17072#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 37: Hoare triple {17072#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 38: Hoare triple {17072#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 39: Hoare triple {17072#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 40: Hoare triple {17072#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 41: Hoare triple {17072#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 42: Hoare triple {17072#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 43: Hoare triple {17072#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 44: Hoare triple {17072#false} assume #t~short172; {17072#false} is VALID [2022-04-28 03:37:09,153 INFO L290 TraceCheckUtils]: 45: Hoare triple {17072#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 46: Hoare triple {17072#false} assume 0 != #t~mem173;havoc #t~mem173; {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L272 TraceCheckUtils]: 47: Hoare triple {17072#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 48: Hoare triple {17072#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 49: Hoare triple {17072#false} assume !(~len <= 0); {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L272 TraceCheckUtils]: 50: Hoare triple {17072#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 51: Hoare triple {17072#false} #t~loopctr188 := 0; {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 52: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 53: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 54: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 55: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 56: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,154 INFO L290 TraceCheckUtils]: 57: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 58: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 59: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 60: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 61: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 62: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 63: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 64: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 65: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 66: Hoare triple {17072#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 67: Hoare triple {17072#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 68: Hoare triple {17072#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17072#false} {17072#false} #656#return; {17072#false} is VALID [2022-04-28 03:37:09,155 INFO L290 TraceCheckUtils]: 70: Hoare triple {17072#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17072#false} is VALID [2022-04-28 03:37:09,156 INFO L290 TraceCheckUtils]: 71: Hoare triple {17072#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17072#false} is VALID [2022-04-28 03:37:09,156 INFO L272 TraceCheckUtils]: 72: Hoare triple {17072#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17072#false} is VALID [2022-04-28 03:37:09,156 INFO L290 TraceCheckUtils]: 73: Hoare triple {17072#false} ~cond := #in~cond; {17072#false} is VALID [2022-04-28 03:37:09,156 INFO L290 TraceCheckUtils]: 74: Hoare triple {17072#false} assume 0 == ~cond; {17072#false} is VALID [2022-04-28 03:37:09,156 INFO L290 TraceCheckUtils]: 75: Hoare triple {17072#false} assume !false; {17072#false} is VALID [2022-04-28 03:37:09,156 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 259 proven. 120 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2022-04-28 03:37:09,156 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 75: Hoare triple {17072#false} assume !false; {17072#false} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 74: Hoare triple {17072#false} assume 0 == ~cond; {17072#false} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 73: Hoare triple {17072#false} ~cond := #in~cond; {17072#false} is VALID [2022-04-28 03:37:10,837 INFO L272 TraceCheckUtils]: 72: Hoare triple {17072#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {17072#false} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 71: Hoare triple {17072#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {17072#false} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 70: Hoare triple {17072#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {17072#false} is VALID [2022-04-28 03:37:10,837 INFO L284 TraceCheckUtils]: 69: Hoare quadruple {17071#true} {17072#false} #656#return; {17072#false} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 68: Hoare triple {17071#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17071#true} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 67: Hoare triple {17071#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17071#true} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 66: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 65: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 64: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,837 INFO L290 TraceCheckUtils]: 63: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 62: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 61: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 60: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 59: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 58: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 57: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 56: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 55: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 54: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 53: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 52: Hoare triple {17071#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 51: Hoare triple {17071#true} #t~loopctr188 := 0; {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L272 TraceCheckUtils]: 50: Hoare triple {17072#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {17071#true} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 49: Hoare triple {17072#false} assume !(~len <= 0); {17072#false} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 48: Hoare triple {17072#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {17072#false} is VALID [2022-04-28 03:37:10,838 INFO L272 TraceCheckUtils]: 47: Hoare triple {17072#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {17072#false} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 46: Hoare triple {17072#false} assume 0 != #t~mem173;havoc #t~mem173; {17072#false} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 45: Hoare triple {17072#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {17072#false} is VALID [2022-04-28 03:37:10,838 INFO L290 TraceCheckUtils]: 44: Hoare triple {17072#false} assume #t~short172; {17072#false} is VALID [2022-04-28 03:37:10,839 INFO L290 TraceCheckUtils]: 43: Hoare triple {17072#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {17072#false} is VALID [2022-04-28 03:37:10,839 INFO L290 TraceCheckUtils]: 42: Hoare triple {17072#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {17072#false} is VALID [2022-04-28 03:37:10,839 INFO L290 TraceCheckUtils]: 41: Hoare triple {17072#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {17072#false} is VALID [2022-04-28 03:37:10,839 INFO L290 TraceCheckUtils]: 40: Hoare triple {17072#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {17072#false} is VALID [2022-04-28 03:37:10,839 INFO L290 TraceCheckUtils]: 39: Hoare triple {17072#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {17072#false} is VALID [2022-04-28 03:37:10,839 INFO L290 TraceCheckUtils]: 38: Hoare triple {17072#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {17072#false} is VALID [2022-04-28 03:37:10,839 INFO L290 TraceCheckUtils]: 37: Hoare triple {17072#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {17072#false} is VALID [2022-04-28 03:37:10,839 INFO L290 TraceCheckUtils]: 36: Hoare triple {17072#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {17072#false} is VALID [2022-04-28 03:37:10,840 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {17501#(not (= |#Ultimate.C_memset_#amount| 24))} {17071#true} #672#return; {17072#false} is VALID [2022-04-28 03:37:10,840 INFO L290 TraceCheckUtils]: 34: Hoare triple {17501#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {17501#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:37:10,840 INFO L290 TraceCheckUtils]: 33: Hoare triple {17508#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {17501#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:37:10,843 INFO L290 TraceCheckUtils]: 32: Hoare triple {17512#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17508#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,845 INFO L290 TraceCheckUtils]: 31: Hoare triple {17516#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17512#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,849 INFO L290 TraceCheckUtils]: 30: Hoare triple {17520#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17516#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,851 INFO L290 TraceCheckUtils]: 29: Hoare triple {17524#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17520#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,853 INFO L290 TraceCheckUtils]: 28: Hoare triple {17528#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17524#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:37:10,856 INFO L290 TraceCheckUtils]: 27: Hoare triple {17532#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17528#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,858 INFO L290 TraceCheckUtils]: 26: Hoare triple {17536#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17532#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:37:10,861 INFO L290 TraceCheckUtils]: 25: Hoare triple {17540#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17536#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-28 03:37:10,865 INFO L290 TraceCheckUtils]: 24: Hoare triple {17544#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17540#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,867 INFO L290 TraceCheckUtils]: 23: Hoare triple {17548#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17544#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,869 INFO L290 TraceCheckUtils]: 22: Hoare triple {17552#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17548#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296)))} is VALID [2022-04-28 03:37:10,870 INFO L290 TraceCheckUtils]: 21: Hoare triple {17556#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17552#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296)))} is VALID [2022-04-28 03:37:10,874 INFO L290 TraceCheckUtils]: 20: Hoare triple {17560#(or (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17556#(or (not (= |#Ultimate.C_memset_#amount| 24)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,876 INFO L290 TraceCheckUtils]: 19: Hoare triple {17564#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17560#(or (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:10,878 INFO L290 TraceCheckUtils]: 18: Hoare triple {17568#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {17564#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296)))} is VALID [2022-04-28 03:37:10,878 INFO L290 TraceCheckUtils]: 17: Hoare triple {17071#true} #t~loopctr188 := 0; {17568#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= (mod |#Ultimate.C_memset_#amount| 4294967296) (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296)))} is VALID [2022-04-28 03:37:10,878 INFO L272 TraceCheckUtils]: 16: Hoare triple {17071#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {17071#true} is VALID [2022-04-28 03:37:10,878 INFO L290 TraceCheckUtils]: 15: Hoare triple {17071#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {17071#true} is VALID [2022-04-28 03:37:10,878 INFO L290 TraceCheckUtils]: 14: Hoare triple {17071#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {17071#true} is VALID [2022-04-28 03:37:10,878 INFO L290 TraceCheckUtils]: 13: Hoare triple {17071#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 12: Hoare triple {17071#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 11: Hoare triple {17071#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 10: Hoare triple {17071#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 9: Hoare triple {17071#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 8: Hoare triple {17071#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 7: Hoare triple {17071#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L272 TraceCheckUtils]: 6: Hoare triple {17071#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 5: Hoare triple {17071#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L272 TraceCheckUtils]: 4: Hoare triple {17071#true} call #t~ret187 := main(); {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17071#true} {17071#true} #682#return; {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 2: Hoare triple {17071#true} assume true; {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L290 TraceCheckUtils]: 1: Hoare triple {17071#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {17071#true} is VALID [2022-04-28 03:37:10,879 INFO L272 TraceCheckUtils]: 0: Hoare triple {17071#true} call ULTIMATE.init(); {17071#true} is VALID [2022-04-28 03:37:10,880 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2022-04-28 03:37:10,880 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1589460107] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:37:10,880 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:37:10,880 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 19] total 55 [2022-04-28 03:37:10,880 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:37:10,880 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [952361469] [2022-04-28 03:37:10,880 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [952361469] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:37:10,880 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:37:10,880 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2022-04-28 03:37:10,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326184369] [2022-04-28 03:37:10,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:37:10,881 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 76 [2022-04-28 03:37:10,881 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:37:10,881 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:10,960 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:10,960 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-28 03:37:10,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:10,961 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-28 03:37:10,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=636, Invalid=2334, Unknown=0, NotChecked=0, Total=2970 [2022-04-28 03:37:10,962 INFO L87 Difference]: Start difference. First operand 91 states and 113 transitions. Second operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:15,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:15,654 INFO L93 Difference]: Finished difference Result 170 states and 214 transitions. [2022-04-28 03:37:15,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-28 03:37:15,654 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 76 [2022-04-28 03:37:15,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:37:15,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:15,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 197 transitions. [2022-04-28 03:37:15,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:15,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 197 transitions. [2022-04-28 03:37:15,659 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 197 transitions. [2022-04-28 03:37:15,935 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 197 edges. 197 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:15,936 INFO L225 Difference]: With dead ends: 170 [2022-04-28 03:37:15,937 INFO L226 Difference]: Without dead ends: 96 [2022-04-28 03:37:15,938 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 122 SyntacticMatches, 1 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 902 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=990, Invalid=4266, Unknown=0, NotChecked=0, Total=5256 [2022-04-28 03:37:15,939 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 763 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 177 SdHoareTripleChecker+Invalid, 824 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 763 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-28 03:37:15,939 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 177 Invalid, 824 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 763 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-28 03:37:15,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-04-28 03:37:15,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 92. [2022-04-28 03:37:15,986 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:37:15,986 INFO L82 GeneralOperation]: Start isEquivalent. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:15,987 INFO L74 IsIncluded]: Start isIncluded. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:15,987 INFO L87 Difference]: Start difference. First operand 96 states. Second operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:15,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:15,989 INFO L93 Difference]: Finished difference Result 96 states and 120 transitions. [2022-04-28 03:37:15,989 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 120 transitions. [2022-04-28 03:37:15,989 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:15,989 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:15,989 INFO L74 IsIncluded]: Start isIncluded. First operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 96 states. [2022-04-28 03:37:15,990 INFO L87 Difference]: Start difference. First operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 96 states. [2022-04-28 03:37:15,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:15,995 INFO L93 Difference]: Finished difference Result 96 states and 120 transitions. [2022-04-28 03:37:15,995 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 120 transitions. [2022-04-28 03:37:15,995 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:15,995 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:15,995 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:37:15,996 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:37:15,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 74 states have (on average 1.2297297297297298) internal successors, (91), 74 states have internal predecessors, (91), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:15,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 114 transitions. [2022-04-28 03:37:15,997 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 114 transitions. Word has length 76 [2022-04-28 03:37:15,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:37:15,998 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 114 transitions. [2022-04-28 03:37:15,998 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.4761904761904763) internal successors, (52), 19 states have internal predecessors, (52), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:15,998 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 92 states and 114 transitions. [2022-04-28 03:37:16,224 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:16,224 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 114 transitions. [2022-04-28 03:37:16,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2022-04-28 03:37:16,225 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:37:16,225 INFO L195 NwaCegarLoop]: trace histogram [32, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:37:16,240 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-28 03:37:16,427 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-28 03:37:16,427 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:37:16,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:37:16,428 INFO L85 PathProgramCache]: Analyzing trace with hash 286385866, now seen corresponding path program 31 times [2022-04-28 03:37:16,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:16,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1258879277] [2022-04-28 03:37:16,428 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:37:16,428 INFO L85 PathProgramCache]: Analyzing trace with hash 286385866, now seen corresponding path program 32 times [2022-04-28 03:37:16,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:37:16,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627740738] [2022-04-28 03:37:16,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:16,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:37:16,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:16,538 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:37:16,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:16,547 INFO L290 TraceCheckUtils]: 0: Hoare triple {18420#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18375#true} is VALID [2022-04-28 03:37:16,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {18375#true} assume true; {18375#true} is VALID [2022-04-28 03:37:16,547 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18375#true} {18375#true} #682#return; {18375#true} is VALID [2022-04-28 03:37:16,550 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:37:16,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:17,698 INFO L290 TraceCheckUtils]: 0: Hoare triple {18421#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:17,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18423#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,707 INFO L290 TraceCheckUtils]: 2: Hoare triple {18423#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18424#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:17,710 INFO L290 TraceCheckUtils]: 3: Hoare triple {18424#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18425#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:17,713 INFO L290 TraceCheckUtils]: 4: Hoare triple {18425#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18426#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,717 INFO L290 TraceCheckUtils]: 5: Hoare triple {18426#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18427#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:17,721 INFO L290 TraceCheckUtils]: 6: Hoare triple {18427#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18428#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:17,725 INFO L290 TraceCheckUtils]: 7: Hoare triple {18428#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18429#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:17,730 INFO L290 TraceCheckUtils]: 8: Hoare triple {18429#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18430#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:17,735 INFO L290 TraceCheckUtils]: 9: Hoare triple {18430#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18431#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,739 INFO L290 TraceCheckUtils]: 10: Hoare triple {18431#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18432#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,744 INFO L290 TraceCheckUtils]: 11: Hoare triple {18432#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18433#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,749 INFO L290 TraceCheckUtils]: 12: Hoare triple {18433#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,755 INFO L290 TraceCheckUtils]: 13: Hoare triple {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18435#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:37:17,762 INFO L290 TraceCheckUtils]: 14: Hoare triple {18435#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18436#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:17,767 INFO L290 TraceCheckUtils]: 15: Hoare triple {18436#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18437#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,774 INFO L290 TraceCheckUtils]: 16: Hoare triple {18437#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18438#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:37:17,776 INFO L290 TraceCheckUtils]: 17: Hoare triple {18438#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:17,776 INFO L290 TraceCheckUtils]: 18: Hoare triple {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:17,777 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {18375#true} #672#return; {18376#false} is VALID [2022-04-28 03:37:17,777 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2022-04-28 03:37:17,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:17,802 INFO L290 TraceCheckUtils]: 0: Hoare triple {18421#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18375#true} is VALID [2022-04-28 03:37:17,802 INFO L290 TraceCheckUtils]: 1: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,802 INFO L290 TraceCheckUtils]: 2: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 3: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 4: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 5: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 6: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 7: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 8: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 9: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 10: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 11: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 12: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,803 INFO L290 TraceCheckUtils]: 13: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,804 INFO L290 TraceCheckUtils]: 14: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,804 INFO L290 TraceCheckUtils]: 15: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,804 INFO L290 TraceCheckUtils]: 16: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,804 INFO L290 TraceCheckUtils]: 17: Hoare triple {18375#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18375#true} is VALID [2022-04-28 03:37:17,804 INFO L290 TraceCheckUtils]: 18: Hoare triple {18375#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18375#true} is VALID [2022-04-28 03:37:17,804 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {18375#true} {18376#false} #656#return; {18376#false} is VALID [2022-04-28 03:37:17,805 INFO L272 TraceCheckUtils]: 0: Hoare triple {18375#true} call ULTIMATE.init(); {18420#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:37:17,805 INFO L290 TraceCheckUtils]: 1: Hoare triple {18420#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18375#true} is VALID [2022-04-28 03:37:17,805 INFO L290 TraceCheckUtils]: 2: Hoare triple {18375#true} assume true; {18375#true} is VALID [2022-04-28 03:37:17,805 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18375#true} {18375#true} #682#return; {18375#true} is VALID [2022-04-28 03:37:17,805 INFO L272 TraceCheckUtils]: 4: Hoare triple {18375#true} call #t~ret187 := main(); {18375#true} is VALID [2022-04-28 03:37:17,805 INFO L290 TraceCheckUtils]: 5: Hoare triple {18375#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18375#true} is VALID [2022-04-28 03:37:17,805 INFO L272 TraceCheckUtils]: 6: Hoare triple {18375#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 7: Hoare triple {18375#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 8: Hoare triple {18375#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 9: Hoare triple {18375#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 10: Hoare triple {18375#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 11: Hoare triple {18375#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {18375#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 13: Hoare triple {18375#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 14: Hoare triple {18375#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18375#true} is VALID [2022-04-28 03:37:17,806 INFO L290 TraceCheckUtils]: 15: Hoare triple {18375#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18375#true} is VALID [2022-04-28 03:37:17,807 INFO L272 TraceCheckUtils]: 16: Hoare triple {18375#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {18421#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:37:17,807 INFO L290 TraceCheckUtils]: 17: Hoare triple {18421#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:17,817 INFO L290 TraceCheckUtils]: 18: Hoare triple {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18423#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,826 INFO L290 TraceCheckUtils]: 19: Hoare triple {18423#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18424#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:17,835 INFO L290 TraceCheckUtils]: 20: Hoare triple {18424#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18425#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:17,843 INFO L290 TraceCheckUtils]: 21: Hoare triple {18425#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18426#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,852 INFO L290 TraceCheckUtils]: 22: Hoare triple {18426#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18427#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:17,861 INFO L290 TraceCheckUtils]: 23: Hoare triple {18427#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18428#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:17,871 INFO L290 TraceCheckUtils]: 24: Hoare triple {18428#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18429#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:17,880 INFO L290 TraceCheckUtils]: 25: Hoare triple {18429#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18430#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:17,890 INFO L290 TraceCheckUtils]: 26: Hoare triple {18430#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18431#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,898 INFO L290 TraceCheckUtils]: 27: Hoare triple {18431#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18432#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,907 INFO L290 TraceCheckUtils]: 28: Hoare triple {18432#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18433#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,916 INFO L290 TraceCheckUtils]: 29: Hoare triple {18433#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,925 INFO L290 TraceCheckUtils]: 30: Hoare triple {18434#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18435#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:37:17,935 INFO L290 TraceCheckUtils]: 31: Hoare triple {18435#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18436#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:17,943 INFO L290 TraceCheckUtils]: 32: Hoare triple {18436#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18437#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:17,953 INFO L290 TraceCheckUtils]: 33: Hoare triple {18437#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18438#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:37:17,956 INFO L290 TraceCheckUtils]: 34: Hoare triple {18438#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:17,956 INFO L290 TraceCheckUtils]: 35: Hoare triple {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:17,957 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18439#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {18375#true} #672#return; {18376#false} is VALID [2022-04-28 03:37:17,957 INFO L290 TraceCheckUtils]: 37: Hoare triple {18376#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18376#false} is VALID [2022-04-28 03:37:17,957 INFO L290 TraceCheckUtils]: 38: Hoare triple {18376#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {18376#false} is VALID [2022-04-28 03:37:17,957 INFO L290 TraceCheckUtils]: 39: Hoare triple {18376#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18376#false} is VALID [2022-04-28 03:37:17,957 INFO L290 TraceCheckUtils]: 40: Hoare triple {18376#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 41: Hoare triple {18376#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 42: Hoare triple {18376#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 43: Hoare triple {18376#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 44: Hoare triple {18376#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 45: Hoare triple {18376#false} assume #t~short172; {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 46: Hoare triple {18376#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 47: Hoare triple {18376#false} assume 0 != #t~mem173;havoc #t~mem173; {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L272 TraceCheckUtils]: 48: Hoare triple {18376#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 49: Hoare triple {18376#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 50: Hoare triple {18376#false} assume !(~len <= 0); {18376#false} is VALID [2022-04-28 03:37:17,958 INFO L272 TraceCheckUtils]: 51: Hoare triple {18376#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18421#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 52: Hoare triple {18421#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {18375#true} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 53: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,958 INFO L290 TraceCheckUtils]: 54: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 55: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 56: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 57: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 58: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 59: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 60: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 61: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 62: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 63: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 64: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 65: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 66: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 67: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,959 INFO L290 TraceCheckUtils]: 68: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:17,960 INFO L290 TraceCheckUtils]: 69: Hoare triple {18375#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18375#true} is VALID [2022-04-28 03:37:17,960 INFO L290 TraceCheckUtils]: 70: Hoare triple {18375#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18375#true} is VALID [2022-04-28 03:37:17,960 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18375#true} {18376#false} #656#return; {18376#false} is VALID [2022-04-28 03:37:17,960 INFO L290 TraceCheckUtils]: 72: Hoare triple {18376#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18376#false} is VALID [2022-04-28 03:37:17,960 INFO L290 TraceCheckUtils]: 73: Hoare triple {18376#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18376#false} is VALID [2022-04-28 03:37:17,960 INFO L272 TraceCheckUtils]: 74: Hoare triple {18376#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18376#false} is VALID [2022-04-28 03:37:17,960 INFO L290 TraceCheckUtils]: 75: Hoare triple {18376#false} ~cond := #in~cond; {18376#false} is VALID [2022-04-28 03:37:17,960 INFO L290 TraceCheckUtils]: 76: Hoare triple {18376#false} assume 0 == ~cond; {18376#false} is VALID [2022-04-28 03:37:17,960 INFO L290 TraceCheckUtils]: 77: Hoare triple {18376#false} assume !false; {18376#false} is VALID [2022-04-28 03:37:17,961 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 0 proven. 427 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2022-04-28 03:37:17,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:37:17,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1627740738] [2022-04-28 03:37:17,961 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1627740738] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:37:17,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1266763209] [2022-04-28 03:37:17,961 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 03:37:17,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:37:17,961 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:37:17,962 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:37:17,990 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-28 03:37:18,854 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-28 03:37:18,854 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:37:18,860 INFO L263 TraceCheckSpWp]: Trace formula consists of 905 conjuncts, 72 conjunts are in the unsatisfiable core [2022-04-28 03:37:18,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:18,888 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:37:20,357 INFO L272 TraceCheckUtils]: 0: Hoare triple {18375#true} call ULTIMATE.init(); {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L290 TraceCheckUtils]: 1: Hoare triple {18375#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L290 TraceCheckUtils]: 2: Hoare triple {18375#true} assume true; {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18375#true} {18375#true} #682#return; {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L272 TraceCheckUtils]: 4: Hoare triple {18375#true} call #t~ret187 := main(); {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L290 TraceCheckUtils]: 5: Hoare triple {18375#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L272 TraceCheckUtils]: 6: Hoare triple {18375#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L290 TraceCheckUtils]: 7: Hoare triple {18375#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L290 TraceCheckUtils]: 8: Hoare triple {18375#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L290 TraceCheckUtils]: 9: Hoare triple {18375#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:20,357 INFO L290 TraceCheckUtils]: 10: Hoare triple {18375#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18375#true} is VALID [2022-04-28 03:37:20,358 INFO L290 TraceCheckUtils]: 11: Hoare triple {18375#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:20,358 INFO L290 TraceCheckUtils]: 12: Hoare triple {18375#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18375#true} is VALID [2022-04-28 03:37:20,358 INFO L290 TraceCheckUtils]: 13: Hoare triple {18375#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:20,358 INFO L290 TraceCheckUtils]: 14: Hoare triple {18375#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18375#true} is VALID [2022-04-28 03:37:20,358 INFO L290 TraceCheckUtils]: 15: Hoare triple {18375#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18375#true} is VALID [2022-04-28 03:37:20,358 INFO L272 TraceCheckUtils]: 16: Hoare triple {18375#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {18375#true} is VALID [2022-04-28 03:37:20,358 INFO L290 TraceCheckUtils]: 17: Hoare triple {18375#true} #t~loopctr188 := 0; {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:20,364 INFO L290 TraceCheckUtils]: 18: Hoare triple {18422#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18497#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,367 INFO L290 TraceCheckUtils]: 19: Hoare triple {18497#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18501#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:20,370 INFO L290 TraceCheckUtils]: 20: Hoare triple {18501#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18505#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:37:20,372 INFO L290 TraceCheckUtils]: 21: Hoare triple {18505#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18509#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,375 INFO L290 TraceCheckUtils]: 22: Hoare triple {18509#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18513#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:20,379 INFO L290 TraceCheckUtils]: 23: Hoare triple {18513#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18517#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:20,382 INFO L290 TraceCheckUtils]: 24: Hoare triple {18517#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18521#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,386 INFO L290 TraceCheckUtils]: 25: Hoare triple {18521#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18525#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:20,389 INFO L290 TraceCheckUtils]: 26: Hoare triple {18525#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18529#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,392 INFO L290 TraceCheckUtils]: 27: Hoare triple {18529#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18533#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,395 INFO L290 TraceCheckUtils]: 28: Hoare triple {18533#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18537#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,399 INFO L290 TraceCheckUtils]: 29: Hoare triple {18537#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18541#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,402 INFO L290 TraceCheckUtils]: 30: Hoare triple {18541#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18545#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:37:20,407 INFO L290 TraceCheckUtils]: 31: Hoare triple {18545#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18549#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:20,413 INFO L290 TraceCheckUtils]: 32: Hoare triple {18549#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18553#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,415 INFO L290 TraceCheckUtils]: 33: Hoare triple {18553#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18557#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:20,417 INFO L290 TraceCheckUtils]: 34: Hoare triple {18557#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18561#(and (< (div (+ (- 4294967312) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967312) 4294967296)))} is VALID [2022-04-28 03:37:20,418 INFO L290 TraceCheckUtils]: 35: Hoare triple {18561#(and (< (div (+ (- 4294967312) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967312) 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18561#(and (< (div (+ (- 4294967312) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967312) 4294967296)))} is VALID [2022-04-28 03:37:20,419 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18561#(and (< (div (+ (- 4294967312) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967312) 4294967296)))} {18375#true} #672#return; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 37: Hoare triple {18376#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 38: Hoare triple {18376#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 39: Hoare triple {18376#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 40: Hoare triple {18376#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 41: Hoare triple {18376#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 42: Hoare triple {18376#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 43: Hoare triple {18376#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 44: Hoare triple {18376#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 45: Hoare triple {18376#false} assume #t~short172; {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 46: Hoare triple {18376#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18376#false} is VALID [2022-04-28 03:37:20,419 INFO L290 TraceCheckUtils]: 47: Hoare triple {18376#false} assume 0 != #t~mem173;havoc #t~mem173; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L272 TraceCheckUtils]: 48: Hoare triple {18376#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 49: Hoare triple {18376#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 50: Hoare triple {18376#false} assume !(~len <= 0); {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L272 TraceCheckUtils]: 51: Hoare triple {18376#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 52: Hoare triple {18376#false} #t~loopctr188 := 0; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 53: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 54: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 55: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 56: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 57: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 58: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 59: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 60: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 61: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 62: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 63: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 64: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 65: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 66: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,420 INFO L290 TraceCheckUtils]: 67: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L290 TraceCheckUtils]: 68: Hoare triple {18376#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L290 TraceCheckUtils]: 69: Hoare triple {18376#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L290 TraceCheckUtils]: 70: Hoare triple {18376#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18376#false} {18376#false} #656#return; {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L290 TraceCheckUtils]: 72: Hoare triple {18376#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L290 TraceCheckUtils]: 73: Hoare triple {18376#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L272 TraceCheckUtils]: 74: Hoare triple {18376#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L290 TraceCheckUtils]: 75: Hoare triple {18376#false} ~cond := #in~cond; {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L290 TraceCheckUtils]: 76: Hoare triple {18376#false} assume 0 == ~cond; {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L290 TraceCheckUtils]: 77: Hoare triple {18376#false} assume !false; {18376#false} is VALID [2022-04-28 03:37:20,421 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 292 proven. 136 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2022-04-28 03:37:20,422 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:37:23,138 INFO L290 TraceCheckUtils]: 77: Hoare triple {18376#false} assume !false; {18376#false} is VALID [2022-04-28 03:37:23,138 INFO L290 TraceCheckUtils]: 76: Hoare triple {18376#false} assume 0 == ~cond; {18376#false} is VALID [2022-04-28 03:37:23,138 INFO L290 TraceCheckUtils]: 75: Hoare triple {18376#false} ~cond := #in~cond; {18376#false} is VALID [2022-04-28 03:37:23,138 INFO L272 TraceCheckUtils]: 74: Hoare triple {18376#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {18376#false} is VALID [2022-04-28 03:37:23,138 INFO L290 TraceCheckUtils]: 73: Hoare triple {18376#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {18376#false} is VALID [2022-04-28 03:37:23,138 INFO L290 TraceCheckUtils]: 72: Hoare triple {18376#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {18376#false} is VALID [2022-04-28 03:37:23,138 INFO L284 TraceCheckUtils]: 71: Hoare quadruple {18375#true} {18376#false} #656#return; {18376#false} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 70: Hoare triple {18375#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 69: Hoare triple {18375#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 68: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 67: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 66: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 65: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 64: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 63: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 62: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 61: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 60: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 59: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 58: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 57: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 56: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 55: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 54: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 53: Hoare triple {18375#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18375#true} is VALID [2022-04-28 03:37:23,139 INFO L290 TraceCheckUtils]: 52: Hoare triple {18375#true} #t~loopctr188 := 0; {18375#true} is VALID [2022-04-28 03:37:23,140 INFO L272 TraceCheckUtils]: 51: Hoare triple {18376#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {18375#true} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 50: Hoare triple {18376#false} assume !(~len <= 0); {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 49: Hoare triple {18376#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L272 TraceCheckUtils]: 48: Hoare triple {18376#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 47: Hoare triple {18376#false} assume 0 != #t~mem173;havoc #t~mem173; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 46: Hoare triple {18376#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 45: Hoare triple {18376#false} assume #t~short172; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 44: Hoare triple {18376#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 43: Hoare triple {18376#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 42: Hoare triple {18376#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 41: Hoare triple {18376#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 40: Hoare triple {18376#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 39: Hoare triple {18376#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 38: Hoare triple {18376#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {18376#false} is VALID [2022-04-28 03:37:23,140 INFO L290 TraceCheckUtils]: 37: Hoare triple {18376#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {18376#false} is VALID [2022-04-28 03:37:23,141 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {18817#(not (= |#Ultimate.C_memset_#amount| 24))} {18375#true} #672#return; {18376#false} is VALID [2022-04-28 03:37:23,141 INFO L290 TraceCheckUtils]: 35: Hoare triple {18817#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {18817#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:37:23,142 INFO L290 TraceCheckUtils]: 34: Hoare triple {18824#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {18817#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-28 03:37:23,144 INFO L290 TraceCheckUtils]: 33: Hoare triple {18828#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18824#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:23,150 INFO L290 TraceCheckUtils]: 32: Hoare triple {18832#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18828#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:23,153 INFO L290 TraceCheckUtils]: 31: Hoare triple {18836#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18832#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:23,157 INFO L290 TraceCheckUtils]: 30: Hoare triple {18840#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18836#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,159 INFO L290 TraceCheckUtils]: 29: Hoare triple {18844#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18840#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,161 INFO L290 TraceCheckUtils]: 28: Hoare triple {18848#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18844#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:23,163 INFO L290 TraceCheckUtils]: 27: Hoare triple {18852#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18848#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,167 INFO L290 TraceCheckUtils]: 26: Hoare triple {18856#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18852#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,171 INFO L290 TraceCheckUtils]: 25: Hoare triple {18860#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18856#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:23,176 INFO L290 TraceCheckUtils]: 24: Hoare triple {18864#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18860#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 8) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,180 INFO L290 TraceCheckUtils]: 23: Hoare triple {18868#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18864#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 9) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,183 INFO L290 TraceCheckUtils]: 22: Hoare triple {18872#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18868#(or (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 10) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:23,187 INFO L290 TraceCheckUtils]: 21: Hoare triple {18876#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18872#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 11) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:23,188 INFO L290 TraceCheckUtils]: 20: Hoare triple {18880#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18876#(or (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 12) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-28 03:37:23,190 INFO L290 TraceCheckUtils]: 19: Hoare triple {18884#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18880#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 13) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,192 INFO L290 TraceCheckUtils]: 18: Hoare triple {18888#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 16) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {18884#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 14) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,192 INFO L290 TraceCheckUtils]: 17: Hoare triple {18375#true} #t~loopctr188 := 0; {18888#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 16) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 15) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-28 03:37:23,192 INFO L272 TraceCheckUtils]: 16: Hoare triple {18375#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 15: Hoare triple {18375#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 14: Hoare triple {18375#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 13: Hoare triple {18375#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 12: Hoare triple {18375#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 11: Hoare triple {18375#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 10: Hoare triple {18375#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 9: Hoare triple {18375#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 8: Hoare triple {18375#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 7: Hoare triple {18375#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L272 TraceCheckUtils]: 6: Hoare triple {18375#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 5: Hoare triple {18375#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L272 TraceCheckUtils]: 4: Hoare triple {18375#true} call #t~ret187 := main(); {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18375#true} {18375#true} #682#return; {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 2: Hoare triple {18375#true} assume true; {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {18375#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {18375#true} is VALID [2022-04-28 03:37:23,193 INFO L272 TraceCheckUtils]: 0: Hoare triple {18375#true} call ULTIMATE.init(); {18375#true} is VALID [2022-04-28 03:37:23,194 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 0 proven. 427 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2022-04-28 03:37:23,194 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1266763209] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:37:23,194 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:37:23,194 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20, 20] total 57 [2022-04-28 03:37:23,194 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:37:23,194 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1258879277] [2022-04-28 03:37:23,194 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1258879277] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:37:23,195 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:37:23,195 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2022-04-28 03:37:23,195 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119315491] [2022-04-28 03:37:23,195 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:37:23,195 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 78 [2022-04-28 03:37:23,195 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:37:23,196 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:23,278 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:23,278 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-28 03:37:23,279 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:23,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-28 03:37:23,280 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=731, Invalid=2461, Unknown=0, NotChecked=0, Total=3192 [2022-04-28 03:37:23,280 INFO L87 Difference]: Start difference. First operand 92 states and 114 transitions. Second operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:31,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:31,723 INFO L93 Difference]: Finished difference Result 172 states and 216 transitions. [2022-04-28 03:37:31,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-28 03:37:31,724 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 78 [2022-04-28 03:37:31,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:37:31,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:31,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 198 transitions. [2022-04-28 03:37:31,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:31,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 198 transitions. [2022-04-28 03:37:31,728 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 198 transitions. [2022-04-28 03:37:32,024 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 198 edges. 198 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:32,026 INFO L225 Difference]: With dead ends: 172 [2022-04-28 03:37:32,026 INFO L226 Difference]: Without dead ends: 97 [2022-04-28 03:37:32,027 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 125 SyntacticMatches, 1 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 545 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=1146, Invalid=4554, Unknown=0, NotChecked=0, Total=5700 [2022-04-28 03:37:32,028 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 281 mSDsCounter, 0 mSdLazyCounter, 1645 mSolverCounterSat, 63 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 364 SdHoareTripleChecker+Invalid, 1708 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 63 IncrementalHoareTripleChecker+Valid, 1645 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2022-04-28 03:37:32,028 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 364 Invalid, 1708 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [63 Valid, 1645 Invalid, 0 Unknown, 0 Unchecked, 2.9s Time] [2022-04-28 03:37:32,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-28 03:37:32,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 93. [2022-04-28 03:37:32,077 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:37:32,078 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:32,078 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:32,078 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:32,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:32,079 INFO L93 Difference]: Finished difference Result 97 states and 121 transitions. [2022-04-28 03:37:32,079 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 121 transitions. [2022-04-28 03:37:32,079 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:32,080 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:32,080 INFO L74 IsIncluded]: Start isIncluded. First operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 97 states. [2022-04-28 03:37:32,080 INFO L87 Difference]: Start difference. First operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 97 states. [2022-04-28 03:37:32,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:32,082 INFO L93 Difference]: Finished difference Result 97 states and 121 transitions. [2022-04-28 03:37:32,082 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 121 transitions. [2022-04-28 03:37:32,083 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:32,083 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:32,083 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:37:32,083 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:37:32,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 75 states have (on average 1.2266666666666666) internal successors, (92), 75 states have internal predecessors, (92), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:32,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 115 transitions. [2022-04-28 03:37:32,085 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 115 transitions. Word has length 78 [2022-04-28 03:37:32,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:37:32,086 INFO L495 AbstractCegarLoop]: Abstraction has 93 states and 115 transitions. [2022-04-28 03:37:32,086 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.409090909090909) internal successors, (53), 20 states have internal predecessors, (53), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:32,086 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 93 states and 115 transitions. [2022-04-28 03:37:32,304 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 115 edges. 115 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:32,305 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 115 transitions. [2022-04-28 03:37:32,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-04-28 03:37:32,309 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:37:32,309 INFO L195 NwaCegarLoop]: trace histogram [34, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:37:32,339 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-28 03:37:32,521 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-28 03:37:32,522 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:37:32,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:37:32,522 INFO L85 PathProgramCache]: Analyzing trace with hash -55855904, now seen corresponding path program 33 times [2022-04-28 03:37:32,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:32,522 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [656876786] [2022-04-28 03:37:32,522 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:37:32,522 INFO L85 PathProgramCache]: Analyzing trace with hash -55855904, now seen corresponding path program 34 times [2022-04-28 03:37:32,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:37:32,523 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839182589] [2022-04-28 03:37:32,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:32,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:37:32,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:32,633 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:37:32,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:32,641 INFO L290 TraceCheckUtils]: 0: Hoare triple {19752#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19705#true} is VALID [2022-04-28 03:37:32,641 INFO L290 TraceCheckUtils]: 1: Hoare triple {19705#true} assume true; {19705#true} is VALID [2022-04-28 03:37:32,641 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19705#true} {19705#true} #682#return; {19705#true} is VALID [2022-04-28 03:37:32,644 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:37:32,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:34,082 INFO L290 TraceCheckUtils]: 0: Hoare triple {19753#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:34,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19755#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,097 INFO L290 TraceCheckUtils]: 2: Hoare triple {19755#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19756#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:34,104 INFO L290 TraceCheckUtils]: 3: Hoare triple {19756#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19757#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:34,108 INFO L290 TraceCheckUtils]: 4: Hoare triple {19757#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19758#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,114 INFO L290 TraceCheckUtils]: 5: Hoare triple {19758#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19759#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:34,120 INFO L290 TraceCheckUtils]: 6: Hoare triple {19759#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19760#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:34,126 INFO L290 TraceCheckUtils]: 7: Hoare triple {19760#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19761#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:34,133 INFO L290 TraceCheckUtils]: 8: Hoare triple {19761#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19762#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:34,139 INFO L290 TraceCheckUtils]: 9: Hoare triple {19762#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19763#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,143 INFO L290 TraceCheckUtils]: 10: Hoare triple {19763#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19764#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,148 INFO L290 TraceCheckUtils]: 11: Hoare triple {19764#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19765#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,155 INFO L290 TraceCheckUtils]: 12: Hoare triple {19765#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,160 INFO L290 TraceCheckUtils]: 13: Hoare triple {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19767#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:37:34,167 INFO L290 TraceCheckUtils]: 14: Hoare triple {19767#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19768#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:34,173 INFO L290 TraceCheckUtils]: 15: Hoare triple {19768#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19769#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,180 INFO L290 TraceCheckUtils]: 16: Hoare triple {19769#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,183 INFO L290 TraceCheckUtils]: 17: Hoare triple {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19771#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 17)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-28 03:37:34,184 INFO L290 TraceCheckUtils]: 18: Hoare triple {19771#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 17)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-28 03:37:34,184 INFO L290 TraceCheckUtils]: 19: Hoare triple {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-28 03:37:34,185 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} {19705#true} #672#return; {19706#false} is VALID [2022-04-28 03:37:34,185 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-28 03:37:34,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:34,204 INFO L290 TraceCheckUtils]: 0: Hoare triple {19753#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19705#true} is VALID [2022-04-28 03:37:34,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,204 INFO L290 TraceCheckUtils]: 2: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,204 INFO L290 TraceCheckUtils]: 3: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 4: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 5: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 6: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 7: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 8: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 9: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 10: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 11: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 12: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 13: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 14: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,205 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,206 INFO L290 TraceCheckUtils]: 16: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,206 INFO L290 TraceCheckUtils]: 17: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,206 INFO L290 TraceCheckUtils]: 18: Hoare triple {19705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19705#true} is VALID [2022-04-28 03:37:34,206 INFO L290 TraceCheckUtils]: 19: Hoare triple {19705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19705#true} is VALID [2022-04-28 03:37:34,206 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {19705#true} {19706#false} #656#return; {19706#false} is VALID [2022-04-28 03:37:34,207 INFO L272 TraceCheckUtils]: 0: Hoare triple {19705#true} call ULTIMATE.init(); {19752#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:37:34,207 INFO L290 TraceCheckUtils]: 1: Hoare triple {19752#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L290 TraceCheckUtils]: 2: Hoare triple {19705#true} assume true; {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19705#true} {19705#true} #682#return; {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L272 TraceCheckUtils]: 4: Hoare triple {19705#true} call #t~ret187 := main(); {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L290 TraceCheckUtils]: 5: Hoare triple {19705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L272 TraceCheckUtils]: 6: Hoare triple {19705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L290 TraceCheckUtils]: 7: Hoare triple {19705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L290 TraceCheckUtils]: 8: Hoare triple {19705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L290 TraceCheckUtils]: 9: Hoare triple {19705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L290 TraceCheckUtils]: 10: Hoare triple {19705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19705#true} is VALID [2022-04-28 03:37:34,207 INFO L290 TraceCheckUtils]: 11: Hoare triple {19705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:34,208 INFO L290 TraceCheckUtils]: 12: Hoare triple {19705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19705#true} is VALID [2022-04-28 03:37:34,208 INFO L290 TraceCheckUtils]: 13: Hoare triple {19705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:34,208 INFO L290 TraceCheckUtils]: 14: Hoare triple {19705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19705#true} is VALID [2022-04-28 03:37:34,208 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19705#true} is VALID [2022-04-28 03:37:34,209 INFO L272 TraceCheckUtils]: 16: Hoare triple {19705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {19753#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:37:34,209 INFO L290 TraceCheckUtils]: 17: Hoare triple {19753#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:34,219 INFO L290 TraceCheckUtils]: 18: Hoare triple {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19755#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,227 INFO L290 TraceCheckUtils]: 19: Hoare triple {19755#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19756#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:34,236 INFO L290 TraceCheckUtils]: 20: Hoare triple {19756#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19757#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:34,243 INFO L290 TraceCheckUtils]: 21: Hoare triple {19757#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19758#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,252 INFO L290 TraceCheckUtils]: 22: Hoare triple {19758#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19759#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:34,262 INFO L290 TraceCheckUtils]: 23: Hoare triple {19759#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19760#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:34,272 INFO L290 TraceCheckUtils]: 24: Hoare triple {19760#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19761#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:34,281 INFO L290 TraceCheckUtils]: 25: Hoare triple {19761#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19762#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:34,289 INFO L290 TraceCheckUtils]: 26: Hoare triple {19762#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19763#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,296 INFO L290 TraceCheckUtils]: 27: Hoare triple {19763#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19764#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,303 INFO L290 TraceCheckUtils]: 28: Hoare triple {19764#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19765#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,309 INFO L290 TraceCheckUtils]: 29: Hoare triple {19765#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,316 INFO L290 TraceCheckUtils]: 30: Hoare triple {19766#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19767#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:37:34,322 INFO L290 TraceCheckUtils]: 31: Hoare triple {19767#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19768#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:34,329 INFO L290 TraceCheckUtils]: 32: Hoare triple {19768#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19769#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,335 INFO L290 TraceCheckUtils]: 33: Hoare triple {19769#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:34,337 INFO L290 TraceCheckUtils]: 34: Hoare triple {19770#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19771#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 17)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} is VALID [2022-04-28 03:37:34,338 INFO L290 TraceCheckUtils]: 35: Hoare triple {19771#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 17)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-28 03:37:34,339 INFO L290 TraceCheckUtils]: 36: Hoare triple {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} is VALID [2022-04-28 03:37:34,340 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {19772#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 17))} {19705#true} #672#return; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 38: Hoare triple {19706#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 39: Hoare triple {19706#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 40: Hoare triple {19706#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 41: Hoare triple {19706#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 42: Hoare triple {19706#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 43: Hoare triple {19706#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 44: Hoare triple {19706#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 45: Hoare triple {19706#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 46: Hoare triple {19706#false} assume #t~short172; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 47: Hoare triple {19706#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 48: Hoare triple {19706#false} assume 0 != #t~mem173;havoc #t~mem173; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L272 TraceCheckUtils]: 49: Hoare triple {19706#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 50: Hoare triple {19706#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 51: Hoare triple {19706#false} assume !(~len <= 0); {19706#false} is VALID [2022-04-28 03:37:34,340 INFO L272 TraceCheckUtils]: 52: Hoare triple {19706#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19753#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:37:34,340 INFO L290 TraceCheckUtils]: 53: Hoare triple {19753#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 54: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 55: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 56: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 57: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 58: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 59: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 60: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 61: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 62: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 63: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 64: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 65: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 66: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 67: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 68: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 69: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 70: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 71: Hoare triple {19705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L290 TraceCheckUtils]: 72: Hoare triple {19705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19705#true} is VALID [2022-04-28 03:37:34,341 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {19705#true} {19706#false} #656#return; {19706#false} is VALID [2022-04-28 03:37:34,342 INFO L290 TraceCheckUtils]: 74: Hoare triple {19706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19706#false} is VALID [2022-04-28 03:37:34,342 INFO L290 TraceCheckUtils]: 75: Hoare triple {19706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19706#false} is VALID [2022-04-28 03:37:34,342 INFO L272 TraceCheckUtils]: 76: Hoare triple {19706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19706#false} is VALID [2022-04-28 03:37:34,342 INFO L290 TraceCheckUtils]: 77: Hoare triple {19706#false} ~cond := #in~cond; {19706#false} is VALID [2022-04-28 03:37:34,342 INFO L290 TraceCheckUtils]: 78: Hoare triple {19706#false} assume 0 == ~cond; {19706#false} is VALID [2022-04-28 03:37:34,342 INFO L290 TraceCheckUtils]: 79: Hoare triple {19706#false} assume !false; {19706#false} is VALID [2022-04-28 03:37:34,342 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 0 proven. 479 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2022-04-28 03:37:34,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:37:34,342 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839182589] [2022-04-28 03:37:34,342 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1839182589] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:37:34,342 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [162959483] [2022-04-28 03:37:34,343 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-28 03:37:34,343 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:37:34,343 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:37:34,344 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:37:34,344 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-28 03:37:34,632 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-28 03:37:34,633 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 03:37:34,636 INFO L263 TraceCheckSpWp]: Trace formula consists of 919 conjuncts, 45 conjunts are in the unsatisfiable core [2022-04-28 03:37:34,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:34,659 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 03:37:35,867 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-28 03:37:36,658 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-04-28 03:37:36,658 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 10 [2022-04-28 03:37:36,862 INFO L272 TraceCheckUtils]: 0: Hoare triple {19705#true} call ULTIMATE.init(); {19705#true} is VALID [2022-04-28 03:37:36,862 INFO L290 TraceCheckUtils]: 1: Hoare triple {19705#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19705#true} is VALID [2022-04-28 03:37:36,862 INFO L290 TraceCheckUtils]: 2: Hoare triple {19705#true} assume true; {19705#true} is VALID [2022-04-28 03:37:36,862 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19705#true} {19705#true} #682#return; {19705#true} is VALID [2022-04-28 03:37:36,862 INFO L272 TraceCheckUtils]: 4: Hoare triple {19705#true} call #t~ret187 := main(); {19705#true} is VALID [2022-04-28 03:37:36,862 INFO L290 TraceCheckUtils]: 5: Hoare triple {19705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L272 TraceCheckUtils]: 6: Hoare triple {19705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 7: Hoare triple {19705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 8: Hoare triple {19705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 9: Hoare triple {19705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 10: Hoare triple {19705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 11: Hoare triple {19705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 12: Hoare triple {19705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 13: Hoare triple {19705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 14: Hoare triple {19705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L272 TraceCheckUtils]: 16: Hoare triple {19705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {19705#true} is VALID [2022-04-28 03:37:36,863 INFO L290 TraceCheckUtils]: 17: Hoare triple {19705#true} #t~loopctr188 := 0; {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:36,869 INFO L290 TraceCheckUtils]: 18: Hoare triple {19754#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19830#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,873 INFO L290 TraceCheckUtils]: 19: Hoare triple {19830#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19834#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:36,877 INFO L290 TraceCheckUtils]: 20: Hoare triple {19834#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19838#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-28 03:37:36,880 INFO L290 TraceCheckUtils]: 21: Hoare triple {19838#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,884 INFO L290 TraceCheckUtils]: 22: Hoare triple {19842#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19846#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:36,887 INFO L290 TraceCheckUtils]: 23: Hoare triple {19846#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19850#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:36,891 INFO L290 TraceCheckUtils]: 24: Hoare triple {19850#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19854#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,895 INFO L290 TraceCheckUtils]: 25: Hoare triple {19854#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19858#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:36,898 INFO L290 TraceCheckUtils]: 26: Hoare triple {19858#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19862#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,900 INFO L290 TraceCheckUtils]: 27: Hoare triple {19862#(and (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19866#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,905 INFO L290 TraceCheckUtils]: 28: Hoare triple {19866#(and (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19870#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,910 INFO L290 TraceCheckUtils]: 29: Hoare triple {19870#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19874#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,913 INFO L290 TraceCheckUtils]: 30: Hoare triple {19874#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19878#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:37:36,917 INFO L290 TraceCheckUtils]: 31: Hoare triple {19878#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19882#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:36,921 INFO L290 TraceCheckUtils]: 32: Hoare triple {19882#(and (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19886#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,924 INFO L290 TraceCheckUtils]: 33: Hoare triple {19886#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19890#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:36,930 INFO L290 TraceCheckUtils]: 34: Hoare triple {19890#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} is VALID [2022-04-28 03:37:36,932 INFO L290 TraceCheckUtils]: 35: Hoare triple {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} is VALID [2022-04-28 03:37:36,933 INFO L290 TraceCheckUtils]: 36: Hoare triple {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} is VALID [2022-04-28 03:37:36,935 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {19894#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|) (<= (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |#Ultimate.C_memset_#ptr.offset|)) |#Ultimate.C_memset_#value|)))} {19705#true} #672#return; {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} is VALID [2022-04-28 03:37:36,936 INFO L290 TraceCheckUtils]: 38: Hoare triple {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} is VALID [2022-04-28 03:37:36,936 INFO L290 TraceCheckUtils]: 39: Hoare triple {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} is VALID [2022-04-28 03:37:36,936 INFO L290 TraceCheckUtils]: 40: Hoare triple {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} is VALID [2022-04-28 03:37:36,937 INFO L290 TraceCheckUtils]: 41: Hoare triple {19904#(exists ((|v_#Ultimate.C_memset_#t~loopctr188_718| Int)) (and (<= |v_#Ultimate.C_memset_#t~loopctr188_718| 16) (<= (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |v_#Ultimate.C_memset_#t~loopctr188_718| |do_discover_list_~#smp_rr~0.offset|)) 0) (<= 16 |v_#Ultimate.C_memset_#t~loopctr188_718|)))} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19917#|do_discover_list_#t~short164|} is VALID [2022-04-28 03:37:36,937 INFO L290 TraceCheckUtils]: 42: Hoare triple {19917#|do_discover_list_#t~short164|} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19706#false} is VALID [2022-04-28 03:37:36,937 INFO L290 TraceCheckUtils]: 43: Hoare triple {19706#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19706#false} is VALID [2022-04-28 03:37:36,937 INFO L290 TraceCheckUtils]: 44: Hoare triple {19706#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19706#false} is VALID [2022-04-28 03:37:36,937 INFO L290 TraceCheckUtils]: 45: Hoare triple {19706#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19706#false} is VALID [2022-04-28 03:37:36,937 INFO L290 TraceCheckUtils]: 46: Hoare triple {19706#false} assume #t~short172; {19706#false} is VALID [2022-04-28 03:37:36,937 INFO L290 TraceCheckUtils]: 47: Hoare triple {19706#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19706#false} is VALID [2022-04-28 03:37:36,937 INFO L290 TraceCheckUtils]: 48: Hoare triple {19706#false} assume 0 != #t~mem173;havoc #t~mem173; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L272 TraceCheckUtils]: 49: Hoare triple {19706#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 50: Hoare triple {19706#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 51: Hoare triple {19706#false} assume !(~len <= 0); {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L272 TraceCheckUtils]: 52: Hoare triple {19706#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 53: Hoare triple {19706#false} #t~loopctr188 := 0; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 54: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 55: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 56: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 57: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 58: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 59: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 60: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 61: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 62: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 63: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 64: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 65: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 66: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,938 INFO L290 TraceCheckUtils]: 67: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 68: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 69: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 70: Hoare triple {19706#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 71: Hoare triple {19706#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 72: Hoare triple {19706#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {19706#false} {19706#false} #656#return; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 74: Hoare triple {19706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 75: Hoare triple {19706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L272 TraceCheckUtils]: 76: Hoare triple {19706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 77: Hoare triple {19706#false} ~cond := #in~cond; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 78: Hoare triple {19706#false} assume 0 == ~cond; {19706#false} is VALID [2022-04-28 03:37:36,939 INFO L290 TraceCheckUtils]: 79: Hoare triple {19706#false} assume !false; {19706#false} is VALID [2022-04-28 03:37:36,940 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 327 proven. 153 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2022-04-28 03:37:36,940 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-28 03:37:37,531 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-04-28 03:37:37,550 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-28 03:37:38,894 INFO L290 TraceCheckUtils]: 79: Hoare triple {19706#false} assume !false; {19706#false} is VALID [2022-04-28 03:37:38,894 INFO L290 TraceCheckUtils]: 78: Hoare triple {19706#false} assume 0 == ~cond; {19706#false} is VALID [2022-04-28 03:37:38,894 INFO L290 TraceCheckUtils]: 77: Hoare triple {19706#false} ~cond := #in~cond; {19706#false} is VALID [2022-04-28 03:37:38,895 INFO L272 TraceCheckUtils]: 76: Hoare triple {19706#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {19706#false} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 75: Hoare triple {19706#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {19706#false} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 74: Hoare triple {19706#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {19706#false} is VALID [2022-04-28 03:37:38,895 INFO L284 TraceCheckUtils]: 73: Hoare quadruple {19705#true} {19706#false} #656#return; {19706#false} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 72: Hoare triple {19705#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 71: Hoare triple {19705#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 70: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 69: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 68: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 67: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 66: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 65: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 64: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 63: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 62: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 61: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 60: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,895 INFO L290 TraceCheckUtils]: 59: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 58: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 57: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 56: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 55: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 54: Hoare triple {19705#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {19705#true} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 53: Hoare triple {19705#true} #t~loopctr188 := 0; {19705#true} is VALID [2022-04-28 03:37:38,896 INFO L272 TraceCheckUtils]: 52: Hoare triple {19706#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {19705#true} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 51: Hoare triple {19706#false} assume !(~len <= 0); {19706#false} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 50: Hoare triple {19706#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {19706#false} is VALID [2022-04-28 03:37:38,896 INFO L272 TraceCheckUtils]: 49: Hoare triple {19706#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {19706#false} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 48: Hoare triple {19706#false} assume 0 != #t~mem173;havoc #t~mem173; {19706#false} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 47: Hoare triple {19706#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {19706#false} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 46: Hoare triple {19706#false} assume #t~short172; {19706#false} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 45: Hoare triple {19706#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {19706#false} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 44: Hoare triple {19706#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {19706#false} is VALID [2022-04-28 03:37:38,896 INFO L290 TraceCheckUtils]: 43: Hoare triple {19706#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {19706#false} is VALID [2022-04-28 03:37:38,897 INFO L290 TraceCheckUtils]: 42: Hoare triple {19917#|do_discover_list_#t~short164|} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {19706#false} is VALID [2022-04-28 03:37:38,897 INFO L290 TraceCheckUtils]: 41: Hoare triple {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {19917#|do_discover_list_#t~short164|} is VALID [2022-04-28 03:37:38,897 INFO L290 TraceCheckUtils]: 40: Hoare triple {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} is VALID [2022-04-28 03:37:38,898 INFO L290 TraceCheckUtils]: 39: Hoare triple {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} is VALID [2022-04-28 03:37:38,898 INFO L290 TraceCheckUtils]: 38: Hoare triple {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} is VALID [2022-04-28 03:37:38,899 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} {19705#true} #672#return; {20146#(< (select (select |#memory_int| |do_discover_list_~#smp_rr~0.base|) (+ |do_discover_list_~#smp_rr~0.offset| 16)) 4)} is VALID [2022-04-28 03:37:38,899 INFO L290 TraceCheckUtils]: 36: Hoare triple {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,900 INFO L290 TraceCheckUtils]: 35: Hoare triple {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,901 INFO L290 TraceCheckUtils]: 34: Hoare triple {20172#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20162#(or (< (select (select |#memory_int| |#Ultimate.C_memset_#ptr.base|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) 4) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,901 INFO L290 TraceCheckUtils]: 33: Hoare triple {20176#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 1) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20172#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,902 INFO L290 TraceCheckUtils]: 32: Hoare triple {20180#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 2) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20176#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 1) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,902 INFO L290 TraceCheckUtils]: 31: Hoare triple {20184#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 3) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20180#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 2) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,903 INFO L290 TraceCheckUtils]: 30: Hoare triple {20188#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 4) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20184#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 3) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,903 INFO L290 TraceCheckUtils]: 29: Hoare triple {20192#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 5) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20188#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 4) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,904 INFO L290 TraceCheckUtils]: 28: Hoare triple {20196#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 6) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20192#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 5) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} is VALID [2022-04-28 03:37:38,904 INFO L290 TraceCheckUtils]: 27: Hoare triple {20200#(or (= (+ 7 |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20196#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 6) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,905 INFO L290 TraceCheckUtils]: 26: Hoare triple {20204#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 8) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20200#(or (= (+ 7 |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188|) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,905 INFO L290 TraceCheckUtils]: 25: Hoare triple {20208#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 9) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20204#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 8) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} is VALID [2022-04-28 03:37:38,906 INFO L290 TraceCheckUtils]: 24: Hoare triple {20212#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 10) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20208#(or (not (<= |#Ultimate.C_memset_#value| 0)) (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 9) (+ |#Ultimate.C_memset_#ptr.offset| 16)))} is VALID [2022-04-28 03:37:38,906 INFO L290 TraceCheckUtils]: 23: Hoare triple {20216#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 11) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20212#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 10) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,906 INFO L290 TraceCheckUtils]: 22: Hoare triple {20220#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 12) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20216#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 11) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,907 INFO L290 TraceCheckUtils]: 21: Hoare triple {20224#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 13) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20220#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 12) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,907 INFO L290 TraceCheckUtils]: 20: Hoare triple {20228#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 14) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20224#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 13) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,908 INFO L290 TraceCheckUtils]: 19: Hoare triple {20232#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 15) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20228#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 14) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,908 INFO L290 TraceCheckUtils]: 18: Hoare triple {20236#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 16) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {20232#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 15) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 17: Hoare triple {19705#true} #t~loopctr188 := 0; {20236#(or (= (+ |#Ultimate.C_memset_#ptr.offset| |#Ultimate.C_memset_#t~loopctr188| 16) (+ |#Ultimate.C_memset_#ptr.offset| 16)) (not (<= |#Ultimate.C_memset_#value| 0)))} is VALID [2022-04-28 03:37:38,909 INFO L272 TraceCheckUtils]: 16: Hoare triple {19705#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 14: Hoare triple {19705#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 13: Hoare triple {19705#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 12: Hoare triple {19705#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 11: Hoare triple {19705#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 10: Hoare triple {19705#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 9: Hoare triple {19705#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 8: Hoare triple {19705#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 7: Hoare triple {19705#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L272 TraceCheckUtils]: 6: Hoare triple {19705#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L290 TraceCheckUtils]: 5: Hoare triple {19705#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L272 TraceCheckUtils]: 4: Hoare triple {19705#true} call #t~ret187 := main(); {19705#true} is VALID [2022-04-28 03:37:38,909 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19705#true} {19705#true} #682#return; {19705#true} is VALID [2022-04-28 03:37:38,910 INFO L290 TraceCheckUtils]: 2: Hoare triple {19705#true} assume true; {19705#true} is VALID [2022-04-28 03:37:38,910 INFO L290 TraceCheckUtils]: 1: Hoare triple {19705#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {19705#true} is VALID [2022-04-28 03:37:38,910 INFO L272 TraceCheckUtils]: 0: Hoare triple {19705#true} call ULTIMATE.init(); {19705#true} is VALID [2022-04-28 03:37:38,910 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 0 proven. 479 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2022-04-28 03:37:38,910 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [162959483] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-28 03:37:38,910 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-28 03:37:38,910 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 22] total 61 [2022-04-28 03:37:38,911 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 03:37:38,911 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [656876786] [2022-04-28 03:37:38,911 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [656876786] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 03:37:38,911 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 03:37:38,911 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2022-04-28 03:37:38,911 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1153572113] [2022-04-28 03:37:38,911 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 03:37:38,911 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 80 [2022-04-28 03:37:38,912 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 03:37:38,912 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:39,035 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:39,035 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-28 03:37:39,035 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:39,035 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-28 03:37:39,036 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=3474, Unknown=0, NotChecked=0, Total=3660 [2022-04-28 03:37:39,036 INFO L87 Difference]: Start difference. First operand 93 states and 115 transitions. Second operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:50,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:50,063 INFO L93 Difference]: Finished difference Result 174 states and 218 transitions. [2022-04-28 03:37:50,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-28 03:37:50,063 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 80 [2022-04-28 03:37:50,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 03:37:50,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:50,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 199 transitions. [2022-04-28 03:37:50,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:50,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 199 transitions. [2022-04-28 03:37:50,066 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 199 transitions. [2022-04-28 03:37:50,314 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 199 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:50,316 INFO L225 Difference]: With dead ends: 174 [2022-04-28 03:37:50,316 INFO L226 Difference]: Without dead ends: 98 [2022-04-28 03:37:50,317 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 126 SyntacticMatches, 1 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 854 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=335, Invalid=6145, Unknown=0, NotChecked=0, Total=6480 [2022-04-28 03:37:50,317 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 83 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 1297 mSolverCounterSat, 65 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 279 SdHoareTripleChecker+Invalid, 1362 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 65 IncrementalHoareTripleChecker+Valid, 1297 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.2s IncrementalHoareTripleChecker+Time [2022-04-28 03:37:50,318 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 279 Invalid, 1362 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [65 Valid, 1297 Invalid, 0 Unknown, 0 Unchecked, 3.2s Time] [2022-04-28 03:37:50,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-28 03:37:50,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 94. [2022-04-28 03:37:50,384 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 03:37:50,384 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:50,384 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:50,384 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:50,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:50,386 INFO L93 Difference]: Finished difference Result 98 states and 122 transitions. [2022-04-28 03:37:50,386 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 122 transitions. [2022-04-28 03:37:50,386 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:50,386 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:50,386 INFO L74 IsIncluded]: Start isIncluded. First operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 98 states. [2022-04-28 03:37:50,387 INFO L87 Difference]: Start difference. First operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 98 states. [2022-04-28 03:37:50,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 03:37:50,388 INFO L93 Difference]: Finished difference Result 98 states and 122 transitions. [2022-04-28 03:37:50,388 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 122 transitions. [2022-04-28 03:37:50,389 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 03:37:50,389 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 03:37:50,389 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 03:37:50,389 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 03:37:50,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 76 states have (on average 1.2236842105263157) internal successors, (93), 76 states have internal predecessors, (93), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-28 03:37:50,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 116 transitions. [2022-04-28 03:37:50,390 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 116 transitions. Word has length 80 [2022-04-28 03:37:50,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 03:37:50,391 INFO L495 AbstractCegarLoop]: Abstraction has 94 states and 116 transitions. [2022-04-28 03:37:50,391 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 2.347826086956522) internal successors, (54), 21 states have internal predecessors, (54), 2 states have call successors, (7), 4 states have call predecessors, (7), 2 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-28 03:37:50,391 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 94 states and 116 transitions. [2022-04-28 03:37:50,639 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 116 edges. 116 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 03:37:50,639 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 116 transitions. [2022-04-28 03:37:50,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-04-28 03:37:50,639 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 03:37:50,639 INFO L195 NwaCegarLoop]: trace histogram [36, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 03:37:50,657 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-28 03:37:50,840 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:37:50,840 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 03:37:50,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 03:37:50,840 INFO L85 PathProgramCache]: Analyzing trace with hash 963477386, now seen corresponding path program 35 times [2022-04-28 03:37:50,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 03:37:50,840 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1755816178] [2022-04-28 03:37:50,841 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 03:37:50,841 INFO L85 PathProgramCache]: Analyzing trace with hash 963477386, now seen corresponding path program 36 times [2022-04-28 03:37:50,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 03:37:50,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584931332] [2022-04-28 03:37:50,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 03:37:50,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 03:37:50,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:50,959 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 03:37:50,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:50,968 INFO L290 TraceCheckUtils]: 0: Hoare triple {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {21063#true} is VALID [2022-04-28 03:37:50,968 INFO L290 TraceCheckUtils]: 1: Hoare triple {21063#true} assume true; {21063#true} is VALID [2022-04-28 03:37:50,968 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21063#true} {21063#true} #682#return; {21063#true} is VALID [2022-04-28 03:37:50,970 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 03:37:50,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:52,711 INFO L290 TraceCheckUtils]: 0: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:52,719 INFO L290 TraceCheckUtils]: 1: Hoare triple {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,726 INFO L290 TraceCheckUtils]: 2: Hoare triple {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:52,733 INFO L290 TraceCheckUtils]: 3: Hoare triple {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:52,738 INFO L290 TraceCheckUtils]: 4: Hoare triple {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,746 INFO L290 TraceCheckUtils]: 5: Hoare triple {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:52,753 INFO L290 TraceCheckUtils]: 6: Hoare triple {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:52,762 INFO L290 TraceCheckUtils]: 7: Hoare triple {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:52,771 INFO L290 TraceCheckUtils]: 8: Hoare triple {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:52,781 INFO L290 TraceCheckUtils]: 9: Hoare triple {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21123#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,787 INFO L290 TraceCheckUtils]: 10: Hoare triple {21123#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21124#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,795 INFO L290 TraceCheckUtils]: 11: Hoare triple {21124#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,802 INFO L290 TraceCheckUtils]: 12: Hoare triple {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,811 INFO L290 TraceCheckUtils]: 13: Hoare triple {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:37:52,820 INFO L290 TraceCheckUtils]: 14: Hoare triple {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21128#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:52,829 INFO L290 TraceCheckUtils]: 15: Hoare triple {21128#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,838 INFO L290 TraceCheckUtils]: 16: Hoare triple {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,846 INFO L290 TraceCheckUtils]: 17: Hoare triple {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} is VALID [2022-04-28 03:37:52,855 INFO L290 TraceCheckUtils]: 18: Hoare triple {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:37:52,857 INFO L290 TraceCheckUtils]: 19: Hoare triple {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-28 03:37:52,857 INFO L290 TraceCheckUtils]: 20: Hoare triple {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-28 03:37:52,858 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} {21063#true} #672#return; {21064#false} is VALID [2022-04-28 03:37:52,858 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 53 [2022-04-28 03:37:52,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 0: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 1: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 2: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 3: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 4: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 5: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 6: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 7: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 8: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 9: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 10: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 11: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 12: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,894 INFO L290 TraceCheckUtils]: 13: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,895 INFO L290 TraceCheckUtils]: 14: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,895 INFO L290 TraceCheckUtils]: 15: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,895 INFO L290 TraceCheckUtils]: 16: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,895 INFO L290 TraceCheckUtils]: 17: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,895 INFO L290 TraceCheckUtils]: 18: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:52,895 INFO L290 TraceCheckUtils]: 19: Hoare triple {21063#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {21063#true} is VALID [2022-04-28 03:37:52,895 INFO L290 TraceCheckUtils]: 20: Hoare triple {21063#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21063#true} is VALID [2022-04-28 03:37:52,895 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {21063#true} {21064#false} #656#return; {21064#false} is VALID [2022-04-28 03:37:52,896 INFO L272 TraceCheckUtils]: 0: Hoare triple {21063#true} call ULTIMATE.init(); {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 1: Hoare triple {21112#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 2: Hoare triple {21063#true} assume true; {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21063#true} {21063#true} #682#return; {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L272 TraceCheckUtils]: 4: Hoare triple {21063#true} call #t~ret187 := main(); {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 5: Hoare triple {21063#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L272 TraceCheckUtils]: 6: Hoare triple {21063#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 7: Hoare triple {21063#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 8: Hoare triple {21063#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 9: Hoare triple {21063#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 10: Hoare triple {21063#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 11: Hoare triple {21063#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 12: Hoare triple {21063#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 13: Hoare triple {21063#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 14: Hoare triple {21063#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {21063#true} is VALID [2022-04-28 03:37:52,896 INFO L290 TraceCheckUtils]: 15: Hoare triple {21063#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {21063#true} is VALID [2022-04-28 03:37:52,897 INFO L272 TraceCheckUtils]: 16: Hoare triple {21063#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {21113#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:37:52,897 INFO L290 TraceCheckUtils]: 17: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-28 03:37:52,907 INFO L290 TraceCheckUtils]: 18: Hoare triple {21114#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,914 INFO L290 TraceCheckUtils]: 19: Hoare triple {21115#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-28 03:37:52,921 INFO L290 TraceCheckUtils]: 20: Hoare triple {21116#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:52,927 INFO L290 TraceCheckUtils]: 21: Hoare triple {21117#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,934 INFO L290 TraceCheckUtils]: 22: Hoare triple {21118#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-28 03:37:52,941 INFO L290 TraceCheckUtils]: 23: Hoare triple {21119#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-28 03:37:52,950 INFO L290 TraceCheckUtils]: 24: Hoare triple {21120#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-28 03:37:52,957 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-28 03:37:52,965 INFO L290 TraceCheckUtils]: 26: Hoare triple {21122#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21123#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,972 INFO L290 TraceCheckUtils]: 27: Hoare triple {21123#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21124#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,980 INFO L290 TraceCheckUtils]: 28: Hoare triple {21124#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,988 INFO L290 TraceCheckUtils]: 29: Hoare triple {21125#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:52,995 INFO L290 TraceCheckUtils]: 30: Hoare triple {21126#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-28 03:37:53,004 INFO L290 TraceCheckUtils]: 31: Hoare triple {21127#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21128#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-28 03:37:53,014 INFO L290 TraceCheckUtils]: 32: Hoare triple {21128#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:53,022 INFO L290 TraceCheckUtils]: 33: Hoare triple {21129#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-28 03:37:53,030 INFO L290 TraceCheckUtils]: 34: Hoare triple {21130#(and (<= |#Ultimate.C_memset_#t~loopctr188| 16) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 16 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} is VALID [2022-04-28 03:37:53,039 INFO L290 TraceCheckUtils]: 35: Hoare triple {21131#(and (<= 17 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 17))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-28 03:37:53,041 INFO L290 TraceCheckUtils]: 36: Hoare triple {21132#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 18) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-28 03:37:53,042 INFO L290 TraceCheckUtils]: 37: Hoare triple {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} is VALID [2022-04-28 03:37:53,043 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {21133#(or (<= 4294967297 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 18))} {21063#true} #672#return; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 39: Hoare triple {21064#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 40: Hoare triple {21064#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 41: Hoare triple {21064#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 42: Hoare triple {21064#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 43: Hoare triple {21064#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 44: Hoare triple {21064#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 45: Hoare triple {21064#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 46: Hoare triple {21064#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 47: Hoare triple {21064#false} assume #t~short172; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 48: Hoare triple {21064#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 49: Hoare triple {21064#false} assume 0 != #t~mem173;havoc #t~mem173; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L272 TraceCheckUtils]: 50: Hoare triple {21064#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 51: Hoare triple {21064#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {21064#false} is VALID [2022-04-28 03:37:53,043 INFO L290 TraceCheckUtils]: 52: Hoare triple {21064#false} assume !(~len <= 0); {21064#false} is VALID [2022-04-28 03:37:53,044 INFO L272 TraceCheckUtils]: 53: Hoare triple {21064#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {21113#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 54: Hoare triple {21113#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 55: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 56: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 57: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 58: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 59: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 60: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 61: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 62: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 63: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 64: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 65: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 66: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 67: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 68: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 69: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 70: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 71: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,044 INFO L290 TraceCheckUtils]: 72: Hoare triple {21063#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {21063#true} is VALID [2022-04-28 03:37:53,045 INFO L290 TraceCheckUtils]: 73: Hoare triple {21063#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {21063#true} is VALID [2022-04-28 03:37:53,045 INFO L290 TraceCheckUtils]: 74: Hoare triple {21063#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {21063#true} is VALID [2022-04-28 03:37:53,045 INFO L284 TraceCheckUtils]: 75: Hoare quadruple {21063#true} {21064#false} #656#return; {21064#false} is VALID [2022-04-28 03:37:53,045 INFO L290 TraceCheckUtils]: 76: Hoare triple {21064#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {21064#false} is VALID [2022-04-28 03:37:53,045 INFO L290 TraceCheckUtils]: 77: Hoare triple {21064#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {21064#false} is VALID [2022-04-28 03:37:53,045 INFO L272 TraceCheckUtils]: 78: Hoare triple {21064#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {21064#false} is VALID [2022-04-28 03:37:53,045 INFO L290 TraceCheckUtils]: 79: Hoare triple {21064#false} ~cond := #in~cond; {21064#false} is VALID [2022-04-28 03:37:53,045 INFO L290 TraceCheckUtils]: 80: Hoare triple {21064#false} assume 0 == ~cond; {21064#false} is VALID [2022-04-28 03:37:53,045 INFO L290 TraceCheckUtils]: 81: Hoare triple {21064#false} assume !false; {21064#false} is VALID [2022-04-28 03:37:53,045 INFO L134 CoverageAnalysis]: Checked inductivity of 706 backedges. 0 proven. 534 refuted. 0 times theorem prover too weak. 172 trivial. 0 not checked. [2022-04-28 03:37:53,045 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 03:37:53,046 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584931332] [2022-04-28 03:37:53,046 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [584931332] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 03:37:53,046 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1017132088] [2022-04-28 03:37:53,046 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-28 03:37:53,046 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 03:37:53,046 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 03:37:53,047 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 03:37:53,050 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process