/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf -i ../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-28 08:30:15,604 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-28 08:30:15,605 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-28 08:30:15,652 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-28 08:30:15,652 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-28 08:30:15,653 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-28 08:30:15,655 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-28 08:30:15,658 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-28 08:30:15,659 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-28 08:30:15,662 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-28 08:30:15,663 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-28 08:30:15,663 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-28 08:30:15,663 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-28 08:30:15,664 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-28 08:30:15,664 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-28 08:30:15,665 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-28 08:30:15,665 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-28 08:30:15,666 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-28 08:30:15,667 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-28 08:30:15,668 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-28 08:30:15,668 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-28 08:30:15,669 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-28 08:30:15,669 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-28 08:30:15,670 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-28 08:30:15,670 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-28 08:30:15,672 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-28 08:30:15,672 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-28 08:30:15,672 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-28 08:30:15,673 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-28 08:30:15,673 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-28 08:30:15,674 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... 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[2022-04-28 08:30:15,677 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-28 08:30:15,677 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-28 08:30:15,684 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-28 08:30:15,685 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf [2022-04-28 08:30:15,694 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-28 08:30:15,695 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-28 08:30:15,696 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-28 08:30:15,696 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-28 08:30:15,696 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-28 08:30:15,696 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-28 08:30:15,696 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-28 08:30:15,696 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-28 08:30:15,696 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-28 08:30:15,697 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-28 08:30:15,697 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-28 08:30:15,697 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-28 08:30:15,697 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-28 08:30:15,697 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-28 08:30:15,697 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-28 08:30:15,697 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-28 08:30:15,697 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-28 08:30:15,698 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-28 08:30:15,698 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 08:30:15,698 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-28 08:30:15,698 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-28 08:30:15,698 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-28 08:30:15,698 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-28 08:30:15,698 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-28 08:30:15,698 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=JORDAN [2022-04-28 08:30:15,698 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-28 08:30:15,872 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-28 08:30:15,888 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-28 08:30:15,889 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-28 08:30:15,890 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-28 08:30:15,892 INFO L275 PluginConnector]: CDTParser initialized [2022-04-28 08:30:15,892 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-28 08:30:15,940 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dcc3b3c66/cc519e80bce940f18659c9c1ff6b6012/FLAGca512c0b7 [2022-04-28 08:30:16,487 INFO L306 CDTParser]: Found 1 translation units. [2022-04-28 08:30:16,488 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-28 08:30:16,536 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dcc3b3c66/cc519e80bce940f18659c9c1ff6b6012/FLAGca512c0b7 [2022-04-28 08:30:16,670 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dcc3b3c66/cc519e80bce940f18659c9c1ff6b6012 [2022-04-28 08:30:16,672 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-28 08:30:16,673 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-28 08:30:16,675 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-28 08:30:16,675 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-28 08:30:16,677 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-28 08:30:16,678 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 08:30:16" (1/1) ... [2022-04-28 08:30:16,679 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7c15841 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:16, skipping insertion in model container [2022-04-28 08:30:16,679 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 08:30:16" (1/1) ... [2022-04-28 08:30:16,683 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-28 08:30:16,778 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-28 08:30:17,274 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-28 08:30:17,795 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 08:30:17,810 INFO L203 MainTranslator]: Completed pre-run [2022-04-28 08:30:17,863 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-28 08:30:18,032 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 08:30:18,110 INFO L208 MainTranslator]: Completed translation [2022-04-28 08:30:18,111 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18 WrapperNode [2022-04-28 08:30:18,111 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-28 08:30:18,112 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-28 08:30:18,112 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-28 08:30:18,112 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-28 08:30:18,118 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (1/1) ... [2022-04-28 08:30:18,118 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (1/1) ... [2022-04-28 08:30:18,196 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (1/1) ... [2022-04-28 08:30:18,197 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (1/1) ... [2022-04-28 08:30:18,311 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (1/1) ... [2022-04-28 08:30:18,336 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (1/1) ... [2022-04-28 08:30:18,356 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (1/1) ... [2022-04-28 08:30:18,382 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-28 08:30:18,382 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-28 08:30:18,383 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-28 08:30:18,383 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-28 08:30:18,383 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (1/1) ... [2022-04-28 08:30:18,387 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 08:30:18,394 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:30:18,402 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-28 08:30:18,422 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-28 08:30:18,444 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-28 08:30:18,444 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-28 08:30:18,445 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-28 08:30:18,445 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-28 08:30:18,445 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~TO~VOID [2022-04-28 08:30:18,445 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-28 08:30:18,445 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-28 08:30:18,445 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_guard [2022-04-28 08:30:18,445 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlIntegerToUnicodeString [2022-04-28 08:30:18,445 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlUnicodeStringToInteger [2022-04-28 08:30:18,446 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareUnicodeString [2022-04-28 08:30:18,446 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAppendUnicodeStringToString [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure READ_PORT_UCHAR [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure WRITE_PORT_UCHAR [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedIncrement [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedDecrement [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedExchange [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeDpc [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInsertQueueDpc [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSynchronizeExecution [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTimeIncrement [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireCancelSpinLock [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateErrorLogEntry [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure IoConnectInterrupt [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReportResourceUsage [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure IoInitializeRemoveLockEx [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockEx [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockAndWaitEx [2022-04-28 08:30:18,447 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWriteErrorLogEntry [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWMIRegistrationControl [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure IoOpenDeviceRegistryKey [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure KeStallExecutionProcessor [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PoRequestPowerIrp [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PoSetPowerState [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfReferenceObject [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwQueryValueKey [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwSetValueKey [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiCompleteRequest [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure errorFn [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCleanup [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpPnpIrpInfo [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLock [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLock [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLockAndWait [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceList [2022-04-28 08:30:18,448 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceRequirementsList [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLogError [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure DriverEntry [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptUnload [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCleanRemovalRelationsList [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAddPptRemovalRelation [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRemovePptRemovalRelation [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpRemovalRelationsList [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpPptRemovalRelationsStruct [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchInternalDeviceControl [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsNecR98Machine [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCreate [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchClose [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitiate1284_3 [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectDevice [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectDevice [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure Ppt1284_3AssignAddress [2022-04-28 08:30:18,449 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfNon1284_3Present [2022-04-28 08:30:18,450 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStl1284_3 [2022-04-28 08:30:18,450 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStlProductId [2022-04-28 08:30:18,450 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSend1284_3Command [2022-04-28 08:30:18,450 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectChipFilter [2022-04-28 08:30:18,450 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortType [2022-04-28 08:30:18,450 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortCapabilities [2022-04-28 08:30:18,450 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEcpPort [2022-04-28 08:30:18,450 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfUserRequested [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPort [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectBytePort [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoDepth [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoWidth [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetChipMode [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearChipMode [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrSetMode [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetByteMode [2022-04-28 08:30:18,451 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearByteMode [2022-04-28 08:30:18,452 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckByteMode [2022-04-28 08:30:18,452 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrClearMode [2022-04-28 08:30:18,452 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFindNatChip [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildResourceList [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBuildRemovalRelations [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanPciCardCmResourceList [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsPci [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCompleteRequest [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpInitDispatchFunctionTable [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpAddDevice [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPnp [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartDevice [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanCmResourceList [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartValidateResources [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterResourceRequirements [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-28 08:30:18,453 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryDeviceRelations [2022-04-28 08:30:18,454 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryStopDevice [2022-04-28 08:30:18,454 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelStopDevice [2022-04-28 08:30:18,454 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStopDevice [2022-04-28 08:30:18,454 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryRemoveDevice [2022-04-28 08:30:18,454 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelRemoveDevice [2022-04-28 08:30:18,454 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpRemoveDevice [2022-04-28 08:30:18,454 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpSurpriseRemoval [2022-04-28 08:30:18,454 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-28 08:30:18,455 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBounceAndCatchPnpIrp [2022-04-28 08:30:18,455 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-28 08:30:18,455 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpUnhandledIrp [2022-04-28 08:30:18,455 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPowerComplete [2022-04-28 08:30:18,455 INFO L138 BoogieDeclarations]: Found implementation of procedure InitNEC_98 [2022-04-28 08:30:18,455 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPower [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockDiskModeByte [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockPrtModeByte [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipSetDiskMode [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipCheckDevice [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectLegacyZip [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectLegacyZip [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegInitDriverSettings [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegGetDeviceParameterDword [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegSetDeviceParameterDword [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFailRequest [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLockOrFailIrp [2022-04-28 08:30:18,456 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPreProcessIrp [2022-04-28 08:30:18,457 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPostProcessIrp [2022-04-28 08:30:18,457 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchCompletionRoutine [2022-04-28 08:30:18,457 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-28 08:30:18,457 INFO L138 BoogieDeclarations]: Found implementation of procedure PptConnectInterrupt [2022-04-28 08:30:18,457 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDisconnectInterrupt [2022-04-28 08:30:18,457 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedIncrement [2022-04-28 08:30:18,457 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDecrement [2022-04-28 08:30:18,457 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedRead [2022-04-28 08:30:18,458 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedQueue [2022-04-28 08:30:18,458 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDisconnect [2022-04-28 08:30:18,460 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCancelRoutine [2022-04-28 08:30:18,460 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortDpc [2022-04-28 08:30:18,464 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePortAtInterruptLevel [2022-04-28 08:30:18,464 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortFromInterruptLevel [2022-04-28 08:30:18,464 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInterruptService [2022-04-28 08:30:18,464 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePort [2022-04-28 08:30:18,464 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTraversePortCheckList [2022-04-28 08:30:18,464 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePort [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptQueryNumWaiters [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetCancelRoutine [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTickCount [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure CheckPort [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildParallelPortDeviceName [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitializeDeviceExtension [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNumberFromLptName [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildDeviceObject [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiInitWmi [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchSystemControl [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiRegInfo [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiDataBlock [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure _BLAST_init [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure stub_driver_init [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAcquireFastMutex [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ExReleaseFastMutex [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAllocatePoolWithTag [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ExFreePool [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertHeadList [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertTailList [2022-04-28 08:30:18,465 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedRemoveHeadList [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateMdl [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAttachDeviceToDeviceStack [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildAsynchronousFsdRequest [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildDeviceIoControlRequest [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateDevice [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateSymbolicLink [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteDevice [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteSymbolicLink [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDetachDevice [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeIrp [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeMdl [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoGetConfigurationInformation [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoQueryDeviceDescription [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoRegisterDeviceInterface [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseCancelSpinLock [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetDeviceInterfaceState [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetHardErrorOrVerifyDevice [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure stubMoreProcessingRequired [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCallDriver [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCompleteRequest [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure KeAcquireSpinLockRaiseToDpc [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure KeDelayExecutionThread [2022-04-28 08:30:18,466 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeEvent [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSemaphore [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSpinLock [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure KeReleaseSemaphore [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure KfReleaseSpinLock [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSetEvent [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure KeWaitForSingleObject [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure MmAllocateContiguousMemory [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure MmFreeContiguousMemory [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure MmMapLockedPagesSpecifyCache [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure MmPageEntireDriver [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure MmResetDriverPaging [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure MmUnlockPages [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure ObReferenceObjectByHandle [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfDereferenceObject [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure PoCallDriver [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure PoStartNextPowerIrp [2022-04-28 08:30:18,467 INFO L138 BoogieDeclarations]: Found implementation of procedure PsCreateSystemThread [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure PsTerminateSystemThread [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAnsiStringToUnicodeString [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareMemory [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCopyUnicodeString [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlDeleteRegistryValue [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlFreeUnicodeString [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitString [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitUnicodeString [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlQueryRegistryValues [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwClose [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiSystemControl [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireRemoveLockEx [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-04-28 08:30:18,468 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memmove [2022-04-28 08:30:18,468 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-28 08:30:18,468 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-28 08:30:18,468 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_short [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_long [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_guard [2022-04-28 08:30:18,469 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure memmove [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlQueryRegistryValues [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlDeleteRegistryValue [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlIntegerToUnicodeString [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlUnicodeStringToInteger [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitString [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitUnicodeString [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAnsiStringToUnicodeString [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareUnicodeString [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCopyUnicodeString [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAppendUnicodeStringToString [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlFreeUnicodeString [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareMemory [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure READ_PORT_UCHAR [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure WRITE_PORT_UCHAR [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedIncrement [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedDecrement [2022-04-28 08:30:18,470 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedExchange [2022-04-28 08:30:18,471 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeDpc [2022-04-28 08:30:18,471 INFO L130 BoogieDeclarations]: Found specification of procedure KeInsertQueueDpc [2022-04-28 08:30:18,471 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-04-28 08:30:18,471 INFO L130 BoogieDeclarations]: Found specification of procedure KeSynchronizeExecution [2022-04-28 08:30:18,471 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeEvent [2022-04-28 08:30:18,471 INFO L130 BoogieDeclarations]: Found specification of procedure KeSetEvent [2022-04-28 08:30:18,471 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSemaphore [2022-04-28 08:30:18,471 INFO L130 BoogieDeclarations]: Found specification of procedure KeReleaseSemaphore [2022-04-28 08:30:18,473 INFO L130 BoogieDeclarations]: Found specification of procedure KeDelayExecutionThread [2022-04-28 08:30:18,473 INFO L130 BoogieDeclarations]: Found specification of procedure KeWaitForSingleObject [2022-04-28 08:30:18,474 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSpinLock [2022-04-28 08:30:18,474 INFO L130 BoogieDeclarations]: Found specification of procedure KfReleaseSpinLock [2022-04-28 08:30:18,474 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTimeIncrement [2022-04-28 08:30:18,474 INFO L130 BoogieDeclarations]: Found specification of procedure ExAllocatePoolWithTag [2022-04-28 08:30:18,474 INFO L130 BoogieDeclarations]: Found specification of procedure ExFreePool [2022-04-28 08:30:18,474 INFO L130 BoogieDeclarations]: Found specification of procedure ExAcquireFastMutex [2022-04-28 08:30:18,474 INFO L130 BoogieDeclarations]: Found specification of procedure ExReleaseFastMutex [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertHeadList [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertTailList [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedRemoveHeadList [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure MmUnlockPages [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure MmMapLockedPagesSpecifyCache [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure MmAllocateContiguousMemory [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure MmFreeContiguousMemory [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure MmResetDriverPaging [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure MmPageEntireDriver [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure PsCreateSystemThread [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure PsTerminateSystemThread [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireCancelSpinLock [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateErrorLogEntry [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateMdl [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IoAttachDeviceToDeviceStack [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildAsynchronousFsdRequest [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildDeviceIoControlRequest [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IofCallDriver [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IofCompleteRequest [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure IoConnectInterrupt [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-28 08:30:18,475 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateDevice [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateSymbolicLink [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteDevice [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteSymbolicLink [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoDetachDevice [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeIrp [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeMdl [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoGetConfigurationInformation [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoQueryDeviceDescription [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseCancelSpinLock [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoReportResourceUsage [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetHardErrorOrVerifyDevice [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoInitializeRemoveLockEx [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireRemoveLockEx [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockEx [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockAndWaitEx [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoWriteErrorLogEntry [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoWMIRegistrationControl [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoOpenDeviceRegistryKey [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoRegisterDeviceInterface [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetDeviceInterfaceState [2022-04-28 08:30:18,476 INFO L130 BoogieDeclarations]: Found specification of procedure KeStallExecutionProcessor [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PoRequestPowerIrp [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PoSetPowerState [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PoCallDriver [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PoStartNextPowerIrp [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure ObReferenceObjectByHandle [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure ObfReferenceObject [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure ObfDereferenceObject [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure ZwClose [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure ZwQueryValueKey [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure ZwSetValueKey [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure WmiCompleteRequest [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure WmiSystemControl [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PptCompleteRequest [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure errorFn [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiInitWmi [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchSystemControl [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpInitDispatchFunctionTable [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpAddDevice [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPnp [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PptFailRequest [2022-04-28 08:30:18,477 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPreProcessIrp [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPostProcessIrp [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure DriverEntry [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptUnload [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchCompletionRoutine [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptLogError [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptConnectInterrupt [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptDisconnectInterrupt [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCreate [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchClose [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedIncrement [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDecrement [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedRead [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedQueue [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDisconnect [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptCancelRoutine [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortDpc [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePortAtInterruptLevel [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortFromInterruptLevel [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptInterruptService [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePort [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptTraversePortCheckList [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePort [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptQueryNumWaiters [2022-04-28 08:30:18,478 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchInternalDeviceControl [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCleanup [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsNecR98Machine [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPower [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegInitDriverSettings [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetCancelRoutine [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLockOrFailIrp [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpPnpIrpInfo [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLock [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLock [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLockAndWait [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceList [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceRequirementsList [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectChipFilter [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortType [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetChipMode [2022-04-28 08:30:18,479 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearChipMode [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitiate1284_3 [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectDevice [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectDevice [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure Ppt1284_3AssignAddress [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptSend1284_3Command [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectLegacyZip [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectLegacyZip [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpRemovalRelationsList [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegGetDeviceParameterDword [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegSetDeviceParameterDword [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildParallelPortDeviceName [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitializeDeviceExtension [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNumberFromLptName [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildDeviceObject [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPort [2022-04-28 08:30:18,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptCleanRemovalRelationsList [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure CheckPort [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memmove [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptAddPptRemovalRelation [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptRemovePptRemovalRelation [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpPptRemovalRelationsStruct [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStl1284_3 [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfNon1284_3Present [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStlProductId [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortCapabilities [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEcpPort [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfUserRequested [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectBytePort [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoDepth [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoWidth [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrSetMode [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrClearMode [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptFindNatChip [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildResourceList [2022-04-28 08:30:18,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetByteMode [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearByteMode [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckByteMode [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterResourceRequirements [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryDeviceRelations [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryStopDevice [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelStopDevice [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStopDevice [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryRemoveDevice [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelRemoveDevice [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpRemoveDevice [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpSurpriseRemoval [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpUnhandledIrp [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartDevice [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartValidateResources [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanCmResourceList [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-28 08:30:18,506 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBounceAndCatchPnpIrp [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBuildRemovalRelations [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanPciCardCmResourceList [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsPci [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptPowerComplete [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure InitNEC_98 [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockDiskModeByte [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockPrtModeByte [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipSetDiskMode [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipCheckDevice [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~TO~VOID [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTickCount [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiRegInfo [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiDataBlock [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure _BLAST_init [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure stub_driver_init [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure stubMoreProcessingRequired [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure KeAcquireSpinLockRaiseToDpc [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-28 08:30:18,507 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-04-28 08:30:18,508 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-04-28 08:30:18,508 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-04-28 08:30:18,508 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-04-28 08:30:19,251 INFO L234 CfgBuilder]: Building ICFG [2022-04-28 08:30:19,256 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-28 08:30:19,285 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:19,302 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:19,302 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:19,512 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:19,600 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##8: assume !false; [2022-04-28 08:30:19,600 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##7: assume false; [2022-04-28 08:30:19,617 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:19,657 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-28 08:30:19,657 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-28 08:30:19,657 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:19,674 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:19,674 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:19,771 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:19,810 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##9: assume false; [2022-04-28 08:30:19,810 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##10: assume !false; [2022-04-28 08:30:19,810 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:19,816 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:19,817 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:20,073 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:20,087 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:20,088 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:20,174 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:20,192 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-28 08:30:20,192 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-28 08:30:20,232 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:20,276 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-28 08:30:20,277 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-28 08:30:20,277 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:20,294 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-28 08:30:20,294 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-28 08:30:20,313 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:20,317 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:20,317 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:20,472 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:23,812 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##39: assume !false; [2022-04-28 08:30:23,812 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##38: assume false; [2022-04-28 08:30:25,935 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:25,939 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:25,939 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:26,026 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:26,026 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:26,652 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume !false; [2022-04-28 08:30:26,653 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume !false; [2022-04-28 08:30:26,653 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##25: assume false; [2022-04-28 08:30:26,653 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##19: assume false; [2022-04-28 08:30:26,884 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:26,889 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:26,890 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,042 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,051 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,052 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,351 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,356 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,356 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,356 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,368 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,369 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,393 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,399 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,399 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,399 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,404 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,404 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,404 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,414 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,414 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,556 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,560 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,560 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,566 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,570 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,570 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,635 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,640 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,640 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:27,656 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:27,661 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:27,661 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:28,037 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:28,041 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:28,041 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:28,050 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:28,081 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##6: assume !false; [2022-04-28 08:30:28,081 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##5: assume false; [2022-04-28 08:30:28,085 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:28,240 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##31: assume !false; [2022-04-28 08:30:28,241 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##30: assume false; [2022-04-28 08:30:28,827 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:28,831 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:28,831 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:28,931 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:28,968 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##21: assume !false; [2022-04-28 08:30:28,968 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume false; [2022-04-28 08:30:29,043 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:31,469 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-28 08:30:31,470 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-28 08:30:31,512 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:31,542 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-28 08:30:31,542 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-28 08:30:31,542 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:31,560 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-28 08:30:31,560 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-28 08:30:31,602 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:31,612 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-28 08:30:31,612 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-28 08:30:31,744 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:31,749 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-28 08:30:31,749 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-28 08:30:31,925 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-28 08:30:31,947 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##12: assume !false; [2022-04-28 08:30:31,948 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##11: assume false; [2022-04-28 08:30:31,994 INFO L275 CfgBuilder]: Performing block encoding [2022-04-28 08:30:32,007 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-28 08:30:32,008 INFO L299 CfgBuilder]: Removed 38 assume(true) statements. [2022-04-28 08:30:32,010 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 08:30:32 BoogieIcfgContainer [2022-04-28 08:30:32,010 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-28 08:30:32,011 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-28 08:30:32,011 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-28 08:30:32,013 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-28 08:30:32,013 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.04 08:30:16" (1/3) ... [2022-04-28 08:30:32,013 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@591da7ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 08:30:32, skipping insertion in model container [2022-04-28 08:30:32,014 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 08:30:18" (2/3) ... [2022-04-28 08:30:32,014 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@591da7ad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 08:30:32, skipping insertion in model container [2022-04-28 08:30:32,014 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 08:30:32" (3/3) ... [2022-04-28 08:30:32,014 INFO L111 eAbstractionObserver]: Analyzing ICFG parport.i.cil-2.c [2022-04-28 08:30:32,023 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-28 08:30:32,023 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-28 08:30:32,066 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-28 08:30:32,070 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@5d99d6d5, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@7e923e74 [2022-04-28 08:30:32,070 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-28 08:30:32,085 INFO L276 IsEmpty]: Start isEmpty. Operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) [2022-04-28 08:30:32,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-28 08:30:32,090 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:30:32,090 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:30:32,090 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:30:32,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:30:32,093 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 1 times [2022-04-28 08:30:32,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:30:32,098 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1899147] [2022-04-28 08:30:32,104 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-28 08:30:32,104 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 2 times [2022-04-28 08:30:32,106 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:30:32,106 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030994608] [2022-04-28 08:30:32,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:30:32,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:30:32,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:30:32,576 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:30:32,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:30:32,605 INFO L290 TraceCheckUtils]: 0: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-28 08:30:32,606 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-28 08:30:32,606 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-28 08:30:32,634 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-28 08:30:32,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:30:32,649 INFO L290 TraceCheckUtils]: 0: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-28 08:30:32,649 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-28 08:30:32,650 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-28 08:30:32,653 INFO L272 TraceCheckUtils]: 0: Hoare triple {2253#true} call ULTIMATE.init(); {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:30:32,654 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-28 08:30:32,654 INFO L290 TraceCheckUtils]: 2: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-28 08:30:32,654 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-28 08:30:32,654 INFO L272 TraceCheckUtils]: 4: Hoare triple {2253#true} call #t~ret1155 := main(); {2253#true} is VALID [2022-04-28 08:30:32,658 INFO L290 TraceCheckUtils]: 5: Hoare triple {2253#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {2258#(= main_~i~24 0)} is VALID [2022-04-28 08:30:32,658 INFO L290 TraceCheckUtils]: 6: Hoare triple {2258#(= main_~i~24 0)} assume !(~i~24 < 4); {2254#false} is VALID [2022-04-28 08:30:32,658 INFO L290 TraceCheckUtils]: 7: Hoare triple {2254#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {2254#false} is VALID [2022-04-28 08:30:32,659 INFO L272 TraceCheckUtils]: 8: Hoare triple {2254#false} call _BLAST_init(); {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:30:32,659 INFO L290 TraceCheckUtils]: 9: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-28 08:30:32,659 INFO L290 TraceCheckUtils]: 10: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-28 08:30:32,659 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-28 08:30:32,659 INFO L290 TraceCheckUtils]: 12: Hoare triple {2254#false} assume !(~status~31 >= 0); {2254#false} is VALID [2022-04-28 08:30:32,659 INFO L290 TraceCheckUtils]: 13: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-28 08:30:32,660 INFO L290 TraceCheckUtils]: 14: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-28 08:30:32,660 INFO L290 TraceCheckUtils]: 15: Hoare triple {2254#false} assume !(~s~0 == ~UNLOADED~0); {2254#false} is VALID [2022-04-28 08:30:32,661 INFO L290 TraceCheckUtils]: 16: Hoare triple {2254#false} assume !(-1 == ~status~31); {2254#false} is VALID [2022-04-28 08:30:32,661 INFO L290 TraceCheckUtils]: 17: Hoare triple {2254#false} assume !(~s~0 != ~SKIP2~0); {2254#false} is VALID [2022-04-28 08:30:32,661 INFO L290 TraceCheckUtils]: 18: Hoare triple {2254#false} assume 1 == ~pended~0; {2254#false} is VALID [2022-04-28 08:30:32,661 INFO L290 TraceCheckUtils]: 19: Hoare triple {2254#false} assume 259 != ~status~31; {2254#false} is VALID [2022-04-28 08:30:32,661 INFO L272 TraceCheckUtils]: 20: Hoare triple {2254#false} call errorFn(); {2254#false} is VALID [2022-04-28 08:30:32,661 INFO L290 TraceCheckUtils]: 21: Hoare triple {2254#false} assume !false; {2254#false} is VALID [2022-04-28 08:30:32,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:30:32,663 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:30:32,663 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030994608] [2022-04-28 08:30:32,663 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030994608] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:30:32,664 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:30:32,664 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 08:30:32,665 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:30:32,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1899147] [2022-04-28 08:30:32,666 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1899147] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:30:32,666 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:30:32,666 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 08:30:32,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285919069] [2022-04-28 08:30:32,666 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:30:32,670 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-28 08:30:32,704 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:30:32,706 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-28 08:30:32,736 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:30:32,736 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-28 08:30:32,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:30:32,752 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-28 08:30:32,753 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-28 08:30:32,760 INFO L87 Difference]: Start difference. First operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-28 08:30:46,968 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-28 08:30:56,017 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-28 08:31:11,970 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.07s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-28 08:31:33,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:31:33,195 INFO L93 Difference]: Finished difference Result 4216 states and 6551 transitions. [2022-04-28 08:31:33,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-28 08:31:33,195 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-28 08:31:33,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:31:33,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-28 08:31:33,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-28 08:31:33,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-28 08:31:33,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-28 08:31:33,786 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 6551 transitions. [2022-04-28 08:31:44,654 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6551 edges. 6551 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:31:44,949 INFO L225 Difference]: With dead ends: 4216 [2022-04-28 08:31:44,949 INFO L226 Difference]: Without dead ends: 2226 [2022-04-28 08:31:44,960 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-28 08:31:44,963 INFO L413 NwaCegarLoop]: 2421 mSDtfsCounter, 3234 mSDsluCounter, 361 mSDsCounter, 0 mSdLazyCounter, 3764 mSolverCounterSat, 1561 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 23.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3637 SdHoareTripleChecker+Valid, 2782 SdHoareTripleChecker+Invalid, 5327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1561 IncrementalHoareTripleChecker+Valid, 3764 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 24.0s IncrementalHoareTripleChecker+Time [2022-04-28 08:31:44,966 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3637 Valid, 2782 Invalid, 5327 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1561 Valid, 3764 Invalid, 2 Unknown, 0 Unchecked, 24.0s Time] [2022-04-28 08:31:44,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2226 states. [2022-04-28 08:31:45,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2226 to 1985. [2022-04-28 08:31:45,369 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:31:45,376 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-28 08:31:45,380 INFO L74 IsIncluded]: Start isIncluded. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-28 08:31:45,383 INFO L87 Difference]: Start difference. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-28 08:31:45,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:31:45,546 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-28 08:31:45,546 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-28 08:31:45,561 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:31:45,561 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:31:45,567 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-28 08:31:45,570 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-28 08:31:45,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:31:45,730 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-28 08:31:45,730 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-28 08:31:45,736 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:31:45,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:31:45,736 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:31:45,736 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:31:45,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-28 08:31:45,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2849 transitions. [2022-04-28 08:31:45,978 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2849 transitions. Word has length 22 [2022-04-28 08:31:45,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:31:45,978 INFO L495 AbstractCegarLoop]: Abstraction has 1985 states and 2849 transitions. [2022-04-28 08:31:45,979 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-28 08:31:45,979 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 1985 states and 2849 transitions. [2022-04-28 08:31:53,106 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2849 edges. 2849 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:31:53,113 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2849 transitions. [2022-04-28 08:31:53,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-28 08:31:53,114 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:31:53,114 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:31:53,114 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-28 08:31:53,114 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:31:53,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:31:53,121 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 1 times [2022-04-28 08:31:53,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:31:53,122 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [478983064] [2022-04-28 08:31:53,138 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:31:53,139 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:31:53,139 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:31:53,139 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 2 times [2022-04-28 08:31:53,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:31:53,139 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301411686] [2022-04-28 08:31:53,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:31:53,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:31:53,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:31:53,422 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:31:53,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:31:53,444 INFO L290 TraceCheckUtils]: 0: Hoare triple {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-28 08:31:53,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-28 08:31:53,445 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-28 08:31:53,465 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:31:53,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:31:53,475 INFO L290 TraceCheckUtils]: 0: Hoare triple {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19120#true} is VALID [2022-04-28 08:31:53,476 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-28 08:31:53,476 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19120#true} {19121#false} #6457#return; {19121#false} is VALID [2022-04-28 08:31:53,478 INFO L272 TraceCheckUtils]: 0: Hoare triple {19120#true} call ULTIMATE.init(); {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:31:53,478 INFO L290 TraceCheckUtils]: 1: Hoare triple {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-28 08:31:53,478 INFO L290 TraceCheckUtils]: 2: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-28 08:31:53,478 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-28 08:31:53,479 INFO L272 TraceCheckUtils]: 4: Hoare triple {19120#true} call #t~ret1155 := main(); {19120#true} is VALID [2022-04-28 08:31:53,479 INFO L290 TraceCheckUtils]: 5: Hoare triple {19120#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {19125#(= main_~i~24 0)} is VALID [2022-04-28 08:31:53,479 INFO L290 TraceCheckUtils]: 6: Hoare triple {19125#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {19125#(= main_~i~24 0)} is VALID [2022-04-28 08:31:53,480 INFO L290 TraceCheckUtils]: 7: Hoare triple {19125#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {19126#(<= main_~i~24 1)} is VALID [2022-04-28 08:31:53,480 INFO L290 TraceCheckUtils]: 8: Hoare triple {19126#(<= main_~i~24 1)} assume !(~i~24 < 4); {19121#false} is VALID [2022-04-28 08:31:53,480 INFO L290 TraceCheckUtils]: 9: Hoare triple {19121#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {19121#false} is VALID [2022-04-28 08:31:53,480 INFO L272 TraceCheckUtils]: 10: Hoare triple {19121#false} call _BLAST_init(); {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:31:53,481 INFO L290 TraceCheckUtils]: 11: Hoare triple {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19120#true} is VALID [2022-04-28 08:31:53,481 INFO L290 TraceCheckUtils]: 12: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-28 08:31:53,481 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {19120#true} {19121#false} #6457#return; {19121#false} is VALID [2022-04-28 08:31:53,481 INFO L290 TraceCheckUtils]: 14: Hoare triple {19121#false} assume !(~status~31 >= 0); {19121#false} is VALID [2022-04-28 08:31:53,481 INFO L290 TraceCheckUtils]: 15: Hoare triple {19121#false} assume !(1 == ~pended~0); {19121#false} is VALID [2022-04-28 08:31:53,481 INFO L290 TraceCheckUtils]: 16: Hoare triple {19121#false} assume !(1 == ~pended~0); {19121#false} is VALID [2022-04-28 08:31:53,481 INFO L290 TraceCheckUtils]: 17: Hoare triple {19121#false} assume !(~s~0 == ~UNLOADED~0); {19121#false} is VALID [2022-04-28 08:31:53,481 INFO L290 TraceCheckUtils]: 18: Hoare triple {19121#false} assume !(-1 == ~status~31); {19121#false} is VALID [2022-04-28 08:31:53,482 INFO L290 TraceCheckUtils]: 19: Hoare triple {19121#false} assume !(~s~0 != ~SKIP2~0); {19121#false} is VALID [2022-04-28 08:31:53,482 INFO L290 TraceCheckUtils]: 20: Hoare triple {19121#false} assume 1 == ~pended~0; {19121#false} is VALID [2022-04-28 08:31:53,482 INFO L290 TraceCheckUtils]: 21: Hoare triple {19121#false} assume 259 != ~status~31; {19121#false} is VALID [2022-04-28 08:31:53,482 INFO L272 TraceCheckUtils]: 22: Hoare triple {19121#false} call errorFn(); {19121#false} is VALID [2022-04-28 08:31:53,482 INFO L290 TraceCheckUtils]: 23: Hoare triple {19121#false} assume !false; {19121#false} is VALID [2022-04-28 08:31:53,482 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:31:53,483 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:31:53,483 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301411686] [2022-04-28 08:31:53,483 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [301411686] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:31:53,483 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1940290044] [2022-04-28 08:31:53,483 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:31:53,483 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:31:53,484 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:31:53,488 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:31:53,503 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-28 08:31:54,244 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:31:54,244 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:31:54,249 INFO L263 TraceCheckSpWp]: Trace formula consists of 1266 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-28 08:31:54,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:31:54,281 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:31:54,368 INFO L272 TraceCheckUtils]: 0: Hoare triple {19120#true} call ULTIMATE.init(); {19120#true} is VALID [2022-04-28 08:31:54,368 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-28 08:31:54,369 INFO L290 TraceCheckUtils]: 2: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-28 08:31:54,369 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-28 08:31:54,369 INFO L272 TraceCheckUtils]: 4: Hoare triple {19120#true} call #t~ret1155 := main(); {19120#true} is VALID [2022-04-28 08:31:54,369 INFO L290 TraceCheckUtils]: 5: Hoare triple {19120#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {19120#true} is VALID [2022-04-28 08:31:54,369 INFO L290 TraceCheckUtils]: 6: Hoare triple {19120#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {19120#true} is VALID [2022-04-28 08:31:54,369 INFO L290 TraceCheckUtils]: 7: Hoare triple {19120#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {19120#true} is VALID [2022-04-28 08:31:54,369 INFO L290 TraceCheckUtils]: 8: Hoare triple {19120#true} assume !(~i~24 < 4); {19120#true} is VALID [2022-04-28 08:31:54,370 INFO L290 TraceCheckUtils]: 9: Hoare triple {19120#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {19120#true} is VALID [2022-04-28 08:31:54,370 INFO L272 TraceCheckUtils]: 10: Hoare triple {19120#true} call _BLAST_init(); {19120#true} is VALID [2022-04-28 08:31:54,370 INFO L290 TraceCheckUtils]: 11: Hoare triple {19120#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-28 08:31:54,371 INFO L290 TraceCheckUtils]: 12: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume true; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-28 08:31:54,371 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {19168#(= ~s~0 ~UNLOADED~0)} {19120#true} #6457#return; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-28 08:31:54,371 INFO L290 TraceCheckUtils]: 14: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(~status~31 >= 0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-28 08:31:54,372 INFO L290 TraceCheckUtils]: 15: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-28 08:31:54,372 INFO L290 TraceCheckUtils]: 16: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-28 08:31:54,372 INFO L290 TraceCheckUtils]: 17: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(~s~0 == ~UNLOADED~0); {19121#false} is VALID [2022-04-28 08:31:54,372 INFO L290 TraceCheckUtils]: 18: Hoare triple {19121#false} assume !(-1 == ~status~31); {19121#false} is VALID [2022-04-28 08:31:54,373 INFO L290 TraceCheckUtils]: 19: Hoare triple {19121#false} assume !(~s~0 != ~SKIP2~0); {19121#false} is VALID [2022-04-28 08:31:54,373 INFO L290 TraceCheckUtils]: 20: Hoare triple {19121#false} assume 1 == ~pended~0; {19121#false} is VALID [2022-04-28 08:31:54,373 INFO L290 TraceCheckUtils]: 21: Hoare triple {19121#false} assume 259 != ~status~31; {19121#false} is VALID [2022-04-28 08:31:54,373 INFO L272 TraceCheckUtils]: 22: Hoare triple {19121#false} call errorFn(); {19121#false} is VALID [2022-04-28 08:31:54,373 INFO L290 TraceCheckUtils]: 23: Hoare triple {19121#false} assume !false; {19121#false} is VALID [2022-04-28 08:31:54,374 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:31:54,374 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:31:54,374 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1940290044] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:31:54,374 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:31:54,374 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-04-28 08:31:54,375 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:31:54,375 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [478983064] [2022-04-28 08:31:54,375 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [478983064] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:31:54,375 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:31:54,375 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-28 08:31:54,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901436059] [2022-04-28 08:31:54,376 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:31:54,376 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-28 08:31:54,376 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:31:54,376 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-28 08:31:54,400 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:31:54,400 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-28 08:31:54,400 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:31:54,401 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-28 08:31:54,401 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-28 08:31:54,401 INFO L87 Difference]: Start difference. First operand 1985 states and 2849 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-28 08:32:10,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:32:10,970 INFO L93 Difference]: Finished difference Result 2005 states and 2875 transitions. [2022-04-28 08:32:10,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-28 08:32:10,970 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-28 08:32:10,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:32:10,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-28 08:32:11,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-28 08:32:11,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-28 08:32:11,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-28 08:32:11,168 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2874 transitions. [2022-04-28 08:32:13,135 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2874 edges. 2874 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:32:13,324 INFO L225 Difference]: With dead ends: 2005 [2022-04-28 08:32:13,324 INFO L226 Difference]: Without dead ends: 1985 [2022-04-28 08:32:13,325 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-28 08:32:13,326 INFO L413 NwaCegarLoop]: 2846 mSDtfsCounter, 7 mSDsluCounter, 2787 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 5633 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-28 08:32:13,326 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 5633 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-28 08:32:13,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1985 states. [2022-04-28 08:32:13,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1985 to 1985. [2022-04-28 08:32:13,604 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:32:13,627 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-28 08:32:13,630 INFO L74 IsIncluded]: Start isIncluded. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-28 08:32:13,634 INFO L87 Difference]: Start difference. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-28 08:32:13,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:32:13,778 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-28 08:32:13,778 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-28 08:32:13,783 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:32:13,783 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:32:13,792 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-28 08:32:13,796 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-28 08:32:13,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:32:13,923 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-28 08:32:13,923 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-28 08:32:13,929 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:32:13,930 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:32:13,930 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:32:13,930 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:32:13,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-28 08:32:14,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2848 transitions. [2022-04-28 08:32:14,139 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2848 transitions. Word has length 24 [2022-04-28 08:32:14,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:32:14,139 INFO L495 AbstractCegarLoop]: Abstraction has 1985 states and 2848 transitions. [2022-04-28 08:32:14,140 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-28 08:32:14,140 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 1985 states and 2848 transitions. [2022-04-28 08:32:21,213 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2848 edges. 2848 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:32:21,214 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-28 08:32:21,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-28 08:32:21,214 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:32:21,214 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:32:21,236 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-28 08:32:21,419 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:32:21,419 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:32:21,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:32:21,420 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 1 times [2022-04-28 08:32:21,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:32:21,420 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1610543240] [2022-04-28 08:32:21,426 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:32:21,426 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:32:21,426 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:32:21,426 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 2 times [2022-04-28 08:32:21,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:32:21,427 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96934169] [2022-04-28 08:32:21,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:32:21,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:32:21,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:32:21,712 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:32:21,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:32:21,733 INFO L290 TraceCheckUtils]: 0: Hoare triple {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-28 08:32:21,733 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-28 08:32:21,733 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-28 08:32:21,765 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:32:21,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:32:21,776 INFO L290 TraceCheckUtils]: 0: Hoare triple {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-28 08:32:21,776 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-28 08:32:21,777 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31155#false} #6457#return; {31155#false} is VALID [2022-04-28 08:32:21,792 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:32:21,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:32:21,806 INFO L290 TraceCheckUtils]: 0: Hoare triple {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31154#true} is VALID [2022-04-28 08:32:21,806 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-28 08:32:21,807 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31155#false} #6459#return; {31155#false} is VALID [2022-04-28 08:32:21,809 INFO L272 TraceCheckUtils]: 0: Hoare triple {31154#true} call ULTIMATE.init(); {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:32:21,810 INFO L290 TraceCheckUtils]: 1: Hoare triple {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-28 08:32:21,810 INFO L290 TraceCheckUtils]: 2: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-28 08:32:21,810 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-28 08:32:21,810 INFO L272 TraceCheckUtils]: 4: Hoare triple {31154#true} call #t~ret1155 := main(); {31154#true} is VALID [2022-04-28 08:32:21,810 INFO L290 TraceCheckUtils]: 5: Hoare triple {31154#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {31159#(= main_~i~24 0)} is VALID [2022-04-28 08:32:21,811 INFO L290 TraceCheckUtils]: 6: Hoare triple {31159#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {31159#(= main_~i~24 0)} is VALID [2022-04-28 08:32:21,811 INFO L290 TraceCheckUtils]: 7: Hoare triple {31159#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {31160#(<= main_~i~24 1)} is VALID [2022-04-28 08:32:21,812 INFO L290 TraceCheckUtils]: 8: Hoare triple {31160#(<= main_~i~24 1)} assume !(~i~24 < 4); {31155#false} is VALID [2022-04-28 08:32:21,812 INFO L290 TraceCheckUtils]: 9: Hoare triple {31155#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {31155#false} is VALID [2022-04-28 08:32:21,812 INFO L272 TraceCheckUtils]: 10: Hoare triple {31155#false} call _BLAST_init(); {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:32:21,813 INFO L290 TraceCheckUtils]: 11: Hoare triple {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-28 08:32:21,813 INFO L290 TraceCheckUtils]: 12: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-28 08:32:21,814 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {31154#true} {31155#false} #6457#return; {31155#false} is VALID [2022-04-28 08:32:21,814 INFO L290 TraceCheckUtils]: 14: Hoare triple {31155#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {31155#false} is VALID [2022-04-28 08:32:21,814 INFO L290 TraceCheckUtils]: 15: Hoare triple {31155#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {31155#false} is VALID [2022-04-28 08:32:21,814 INFO L272 TraceCheckUtils]: 16: Hoare triple {31155#false} call stub_driver_init(); {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:32:21,814 INFO L290 TraceCheckUtils]: 17: Hoare triple {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31154#true} is VALID [2022-04-28 08:32:21,814 INFO L290 TraceCheckUtils]: 18: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-28 08:32:21,814 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {31154#true} {31155#false} #6459#return; {31155#false} is VALID [2022-04-28 08:32:21,814 INFO L290 TraceCheckUtils]: 20: Hoare triple {31155#false} assume !!(~status~31 >= 0); {31155#false} is VALID [2022-04-28 08:32:21,814 INFO L290 TraceCheckUtils]: 21: Hoare triple {31155#false} assume !(0 == ~__BLAST_NONDET~3); {31155#false} is VALID [2022-04-28 08:32:21,815 INFO L290 TraceCheckUtils]: 22: Hoare triple {31155#false} assume 1 == ~__BLAST_NONDET~3; {31155#false} is VALID [2022-04-28 08:32:21,815 INFO L272 TraceCheckUtils]: 23: Hoare triple {31155#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {31155#false} is VALID [2022-04-28 08:32:21,815 INFO L290 TraceCheckUtils]: 24: Hoare triple {31155#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {31155#false} is VALID [2022-04-28 08:32:21,815 INFO L290 TraceCheckUtils]: 25: Hoare triple {31155#false} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {31155#false} is VALID [2022-04-28 08:32:21,816 INFO L272 TraceCheckUtils]: 26: Hoare triple {31155#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {31155#false} is VALID [2022-04-28 08:32:21,816 INFO L290 TraceCheckUtils]: 27: Hoare triple {31155#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31155#false} is VALID [2022-04-28 08:32:21,816 INFO L272 TraceCheckUtils]: 28: Hoare triple {31155#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {31155#false} is VALID [2022-04-28 08:32:21,817 INFO L290 TraceCheckUtils]: 29: Hoare triple {31155#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31155#false} is VALID [2022-04-28 08:32:21,817 INFO L290 TraceCheckUtils]: 30: Hoare triple {31155#false} assume !(~s~0 == ~NP~0); {31155#false} is VALID [2022-04-28 08:32:21,823 INFO L272 TraceCheckUtils]: 31: Hoare triple {31155#false} call errorFn(); {31155#false} is VALID [2022-04-28 08:32:21,825 INFO L290 TraceCheckUtils]: 32: Hoare triple {31155#false} assume !false; {31155#false} is VALID [2022-04-28 08:32:21,826 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:32:21,826 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:32:21,826 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96934169] [2022-04-28 08:32:21,826 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96934169] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:32:21,826 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [218396785] [2022-04-28 08:32:21,826 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:32:21,826 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:32:21,826 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:32:21,827 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:32:21,828 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-28 08:32:22,422 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:32:22,423 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:32:22,427 INFO L263 TraceCheckSpWp]: Trace formula consists of 1452 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-28 08:32:22,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:32:22,454 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:32:22,564 INFO L272 TraceCheckUtils]: 0: Hoare triple {31154#true} call ULTIMATE.init(); {31154#true} is VALID [2022-04-28 08:32:22,564 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-28 08:32:22,564 INFO L290 TraceCheckUtils]: 2: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-28 08:32:22,564 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-28 08:32:22,564 INFO L272 TraceCheckUtils]: 4: Hoare triple {31154#true} call #t~ret1155 := main(); {31154#true} is VALID [2022-04-28 08:32:22,564 INFO L290 TraceCheckUtils]: 5: Hoare triple {31154#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L290 TraceCheckUtils]: 6: Hoare triple {31154#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L290 TraceCheckUtils]: 7: Hoare triple {31154#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L290 TraceCheckUtils]: 8: Hoare triple {31154#true} assume !(~i~24 < 4); {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L290 TraceCheckUtils]: 9: Hoare triple {31154#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L272 TraceCheckUtils]: 10: Hoare triple {31154#true} call _BLAST_init(); {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L290 TraceCheckUtils]: 11: Hoare triple {31154#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L290 TraceCheckUtils]: 12: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {31154#true} {31154#true} #6457#return; {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L290 TraceCheckUtils]: 14: Hoare triple {31154#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {31154#true} is VALID [2022-04-28 08:32:22,565 INFO L290 TraceCheckUtils]: 15: Hoare triple {31154#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {31154#true} is VALID [2022-04-28 08:32:22,566 INFO L272 TraceCheckUtils]: 16: Hoare triple {31154#true} call stub_driver_init(); {31154#true} is VALID [2022-04-28 08:32:22,566 INFO L290 TraceCheckUtils]: 17: Hoare triple {31154#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,566 INFO L290 TraceCheckUtils]: 18: Hoare triple {31224#(= ~s~0 ~NP~0)} assume true; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,567 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {31224#(= ~s~0 ~NP~0)} {31154#true} #6459#return; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,567 INFO L290 TraceCheckUtils]: 20: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !!(~status~31 >= 0); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,567 INFO L290 TraceCheckUtils]: 21: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !(0 == ~__BLAST_NONDET~3); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,568 INFO L290 TraceCheckUtils]: 22: Hoare triple {31224#(= ~s~0 ~NP~0)} assume 1 == ~__BLAST_NONDET~3; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,569 INFO L272 TraceCheckUtils]: 23: Hoare triple {31224#(= ~s~0 ~NP~0)} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,569 INFO L290 TraceCheckUtils]: 24: Hoare triple {31224#(= ~s~0 ~NP~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,569 INFO L290 TraceCheckUtils]: 25: Hoare triple {31224#(= ~s~0 ~NP~0)} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,570 INFO L272 TraceCheckUtils]: 26: Hoare triple {31224#(= ~s~0 ~NP~0)} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,571 INFO L290 TraceCheckUtils]: 27: Hoare triple {31224#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,571 INFO L272 TraceCheckUtils]: 28: Hoare triple {31224#(= ~s~0 ~NP~0)} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,572 INFO L290 TraceCheckUtils]: 29: Hoare triple {31224#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-28 08:32:22,572 INFO L290 TraceCheckUtils]: 30: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !(~s~0 == ~NP~0); {31155#false} is VALID [2022-04-28 08:32:22,572 INFO L272 TraceCheckUtils]: 31: Hoare triple {31155#false} call errorFn(); {31155#false} is VALID [2022-04-28 08:32:22,572 INFO L290 TraceCheckUtils]: 32: Hoare triple {31155#false} assume !false; {31155#false} is VALID [2022-04-28 08:32:22,572 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:32:22,572 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:32:22,573 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [218396785] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:32:22,573 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:32:22,573 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-28 08:32:22,573 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:32:22,573 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1610543240] [2022-04-28 08:32:22,573 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1610543240] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:32:22,573 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:32:22,573 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-28 08:32:22,573 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1127499022] [2022-04-28 08:32:22,573 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:32:22,574 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 33 [2022-04-28 08:32:22,574 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:32:22,574 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 08:32:22,610 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:32:22,610 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-28 08:32:22,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:32:22,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-28 08:32:22,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-28 08:32:22,611 INFO L87 Difference]: Start difference. First operand 1985 states and 2848 transitions. Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 08:32:43,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:32:43,195 INFO L93 Difference]: Finished difference Result 5045 states and 7333 transitions. [2022-04-28 08:32:43,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-28 08:32:43,195 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 33 [2022-04-28 08:32:43,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:32:43,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 08:32:43,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7332 transitions. [2022-04-28 08:32:43,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 08:32:43,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7332 transitions. [2022-04-28 08:32:43,741 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 7332 transitions. [2022-04-28 08:32:48,991 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 7332 edges. 7332 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:32:49,677 INFO L225 Difference]: With dead ends: 5045 [2022-04-28 08:32:49,678 INFO L226 Difference]: Without dead ends: 3732 [2022-04-28 08:32:49,681 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-28 08:32:49,682 INFO L413 NwaCegarLoop]: 3639 mSDtfsCounter, 2726 mSDsluCounter, 2556 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2726 SdHoareTripleChecker+Valid, 6195 SdHoareTripleChecker+Invalid, 147 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-28 08:32:49,682 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2726 Valid, 6195 Invalid, 147 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-28 08:32:49,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3732 states. [2022-04-28 08:32:50,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3732 to 3711. [2022-04-28 08:32:50,283 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:32:50,290 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-28 08:32:50,295 INFO L74 IsIncluded]: Start isIncluded. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-28 08:32:50,300 INFO L87 Difference]: Start difference. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-28 08:32:50,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:32:50,739 INFO L93 Difference]: Finished difference Result 3732 states and 5412 transitions. [2022-04-28 08:32:50,739 INFO L276 IsEmpty]: Start isEmpty. Operand 3732 states and 5412 transitions. [2022-04-28 08:32:50,749 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:32:50,749 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:32:50,755 INFO L74 IsIncluded]: Start isIncluded. First operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) Second operand 3732 states. [2022-04-28 08:32:50,759 INFO L87 Difference]: Start difference. First operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) Second operand 3732 states. [2022-04-28 08:32:51,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:32:51,276 INFO L93 Difference]: Finished difference Result 3732 states and 5412 transitions. [2022-04-28 08:32:51,276 INFO L276 IsEmpty]: Start isEmpty. Operand 3732 states and 5412 transitions. [2022-04-28 08:32:51,287 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:32:51,287 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:32:51,287 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:32:51,287 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:32:51,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-28 08:32:52,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3711 states to 3711 states and 5386 transitions. [2022-04-28 08:32:52,036 INFO L78 Accepts]: Start accepts. Automaton has 3711 states and 5386 transitions. Word has length 33 [2022-04-28 08:32:52,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:32:52,037 INFO L495 AbstractCegarLoop]: Abstraction has 3711 states and 5386 transitions. [2022-04-28 08:32:52,037 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-28 08:32:52,037 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3711 states and 5386 transitions. [2022-04-28 08:33:06,215 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5386 edges. 5386 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:33:06,215 INFO L276 IsEmpty]: Start isEmpty. Operand 3711 states and 5386 transitions. [2022-04-28 08:33:06,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-28 08:33:06,217 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:33:06,217 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:33:06,237 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-28 08:33:06,435 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-28 08:33:06,435 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:33:06,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:33:06,436 INFO L85 PathProgramCache]: Analyzing trace with hash -1905624997, now seen corresponding path program 1 times [2022-04-28 08:33:06,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:33:06,436 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1020935347] [2022-04-28 08:33:06,442 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:33:06,442 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:33:06,442 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:33:06,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1905624997, now seen corresponding path program 2 times [2022-04-28 08:33:06,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:33:06,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750197147] [2022-04-28 08:33:06,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:33:06,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:33:06,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:06,703 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:33:06,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:06,722 INFO L290 TraceCheckUtils]: 0: Hoare triple {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-28 08:33:06,722 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,723 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-28 08:33:06,745 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:33:06,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:06,753 INFO L290 TraceCheckUtils]: 0: Hoare triple {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-28 08:33:06,754 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,754 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56246#false} #6457#return; {56246#false} is VALID [2022-04-28 08:33:06,766 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:33:06,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:06,781 INFO L290 TraceCheckUtils]: 0: Hoare triple {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-28 08:33:06,782 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,782 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56246#false} #6459#return; {56246#false} is VALID [2022-04-28 08:33:06,792 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-28 08:33:06,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:06,821 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-28 08:33:06,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:06,829 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:33:06,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:06,837 INFO L290 TraceCheckUtils]: 0: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:06,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-28 08:33:06,837 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,838 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-28 08:33:06,838 INFO L290 TraceCheckUtils]: 0: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:06,838 INFO L272 TraceCheckUtils]: 1: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:06,838 INFO L290 TraceCheckUtils]: 2: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:06,838 INFO L290 TraceCheckUtils]: 3: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-28 08:33:06,838 INFO L290 TraceCheckUtils]: 4: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,839 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-28 08:33:06,839 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,839 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-28 08:33:06,840 INFO L290 TraceCheckUtils]: 0: Hoare triple {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-28 08:33:06,840 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-28 08:33:06,840 INFO L272 TraceCheckUtils]: 2: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:06,840 INFO L290 TraceCheckUtils]: 3: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:06,841 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:06,841 INFO L290 TraceCheckUtils]: 5: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:06,841 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-28 08:33:06,841 INFO L290 TraceCheckUtils]: 7: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,841 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-28 08:33:06,841 INFO L290 TraceCheckUtils]: 9: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,841 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-28 08:33:06,841 INFO L290 TraceCheckUtils]: 11: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-28 08:33:06,842 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,842 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56246#false} #6463#return; {56246#false} is VALID [2022-04-28 08:33:06,844 INFO L272 TraceCheckUtils]: 0: Hoare triple {56245#true} call ULTIMATE.init(); {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:33:06,844 INFO L290 TraceCheckUtils]: 1: Hoare triple {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-28 08:33:06,844 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,844 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-28 08:33:06,844 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call #t~ret1155 := main(); {56245#true} is VALID [2022-04-28 08:33:06,845 INFO L290 TraceCheckUtils]: 5: Hoare triple {56245#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {56250#(= main_~i~24 0)} is VALID [2022-04-28 08:33:06,847 INFO L290 TraceCheckUtils]: 6: Hoare triple {56250#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {56250#(= main_~i~24 0)} is VALID [2022-04-28 08:33:06,848 INFO L290 TraceCheckUtils]: 7: Hoare triple {56250#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {56251#(<= main_~i~24 1)} is VALID [2022-04-28 08:33:06,848 INFO L290 TraceCheckUtils]: 8: Hoare triple {56251#(<= main_~i~24 1)} assume !(~i~24 < 4); {56246#false} is VALID [2022-04-28 08:33:06,848 INFO L290 TraceCheckUtils]: 9: Hoare triple {56246#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {56246#false} is VALID [2022-04-28 08:33:06,848 INFO L272 TraceCheckUtils]: 10: Hoare triple {56246#false} call _BLAST_init(); {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:33:06,849 INFO L290 TraceCheckUtils]: 11: Hoare triple {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-28 08:33:06,849 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,849 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56246#false} #6457#return; {56246#false} is VALID [2022-04-28 08:33:06,849 INFO L290 TraceCheckUtils]: 14: Hoare triple {56246#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {56246#false} is VALID [2022-04-28 08:33:06,849 INFO L290 TraceCheckUtils]: 15: Hoare triple {56246#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {56246#false} is VALID [2022-04-28 08:33:06,849 INFO L272 TraceCheckUtils]: 16: Hoare triple {56246#false} call stub_driver_init(); {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:33:06,849 INFO L290 TraceCheckUtils]: 17: Hoare triple {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-28 08:33:06,849 INFO L290 TraceCheckUtils]: 18: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,849 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {56245#true} {56246#false} #6459#return; {56246#false} is VALID [2022-04-28 08:33:06,849 INFO L290 TraceCheckUtils]: 20: Hoare triple {56246#false} assume !!(~status~31 >= 0); {56246#false} is VALID [2022-04-28 08:33:06,849 INFO L290 TraceCheckUtils]: 21: Hoare triple {56246#false} assume !(0 == ~__BLAST_NONDET~3); {56246#false} is VALID [2022-04-28 08:33:06,850 INFO L290 TraceCheckUtils]: 22: Hoare triple {56246#false} assume 1 == ~__BLAST_NONDET~3; {56246#false} is VALID [2022-04-28 08:33:06,850 INFO L272 TraceCheckUtils]: 23: Hoare triple {56246#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:33:06,850 INFO L290 TraceCheckUtils]: 24: Hoare triple {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-28 08:33:06,850 INFO L290 TraceCheckUtils]: 25: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-28 08:33:06,850 INFO L272 TraceCheckUtils]: 26: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:06,851 INFO L290 TraceCheckUtils]: 27: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:06,851 INFO L272 TraceCheckUtils]: 28: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:06,851 INFO L290 TraceCheckUtils]: 29: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:06,851 INFO L290 TraceCheckUtils]: 30: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-28 08:33:06,851 INFO L290 TraceCheckUtils]: 31: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,851 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-28 08:33:06,851 INFO L290 TraceCheckUtils]: 33: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,852 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-28 08:33:06,852 INFO L290 TraceCheckUtils]: 35: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-28 08:33:06,852 INFO L290 TraceCheckUtils]: 36: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:06,852 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {56245#true} {56246#false} #6463#return; {56246#false} is VALID [2022-04-28 08:33:06,855 INFO L290 TraceCheckUtils]: 38: Hoare triple {56246#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {56246#false} is VALID [2022-04-28 08:33:06,856 INFO L290 TraceCheckUtils]: 39: Hoare triple {56246#false} assume !(0 != ~we_should_unload~0); {56246#false} is VALID [2022-04-28 08:33:06,856 INFO L290 TraceCheckUtils]: 40: Hoare triple {56246#false} assume !(1 == ~pended~0); {56246#false} is VALID [2022-04-28 08:33:06,856 INFO L290 TraceCheckUtils]: 41: Hoare triple {56246#false} assume !(1 == ~pended~0); {56246#false} is VALID [2022-04-28 08:33:06,856 INFO L290 TraceCheckUtils]: 42: Hoare triple {56246#false} assume !(~s~0 == ~UNLOADED~0); {56246#false} is VALID [2022-04-28 08:33:06,856 INFO L290 TraceCheckUtils]: 43: Hoare triple {56246#false} assume !(-1 == ~status~31); {56246#false} is VALID [2022-04-28 08:33:06,856 INFO L290 TraceCheckUtils]: 44: Hoare triple {56246#false} assume !(~s~0 != ~SKIP2~0); {56246#false} is VALID [2022-04-28 08:33:06,856 INFO L290 TraceCheckUtils]: 45: Hoare triple {56246#false} assume 1 == ~pended~0; {56246#false} is VALID [2022-04-28 08:33:06,856 INFO L290 TraceCheckUtils]: 46: Hoare triple {56246#false} assume 259 != ~status~31; {56246#false} is VALID [2022-04-28 08:33:06,857 INFO L272 TraceCheckUtils]: 47: Hoare triple {56246#false} call errorFn(); {56246#false} is VALID [2022-04-28 08:33:06,857 INFO L290 TraceCheckUtils]: 48: Hoare triple {56246#false} assume !false; {56246#false} is VALID [2022-04-28 08:33:06,857 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:33:06,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:33:06,857 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750197147] [2022-04-28 08:33:06,857 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [750197147] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:33:06,858 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [911607033] [2022-04-28 08:33:06,858 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:33:06,858 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:33:06,858 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:33:06,859 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:33:06,860 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-28 08:33:07,543 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:33:07,543 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:33:07,547 INFO L263 TraceCheckSpWp]: Trace formula consists of 1479 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-28 08:33:07,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:07,578 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:33:07,671 INFO L272 TraceCheckUtils]: 0: Hoare triple {56245#true} call ULTIMATE.init(); {56245#true} is VALID [2022-04-28 08:33:07,671 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-28 08:33:07,671 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call #t~ret1155 := main(); {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L290 TraceCheckUtils]: 5: Hoare triple {56245#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L290 TraceCheckUtils]: 7: Hoare triple {56245#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L290 TraceCheckUtils]: 8: Hoare triple {56245#true} assume !(~i~24 < 4); {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L290 TraceCheckUtils]: 9: Hoare triple {56245#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L272 TraceCheckUtils]: 10: Hoare triple {56245#true} call _BLAST_init(); {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L290 TraceCheckUtils]: 11: Hoare triple {56245#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-28 08:33:07,672 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56245#true} #6457#return; {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L290 TraceCheckUtils]: 14: Hoare triple {56245#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L290 TraceCheckUtils]: 15: Hoare triple {56245#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L272 TraceCheckUtils]: 16: Hoare triple {56245#true} call stub_driver_init(); {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L290 TraceCheckUtils]: 17: Hoare triple {56245#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L290 TraceCheckUtils]: 18: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {56245#true} {56245#true} #6459#return; {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L290 TraceCheckUtils]: 20: Hoare triple {56245#true} assume !!(~status~31 >= 0); {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L290 TraceCheckUtils]: 21: Hoare triple {56245#true} assume !(0 == ~__BLAST_NONDET~3); {56245#true} is VALID [2022-04-28 08:33:07,673 INFO L290 TraceCheckUtils]: 22: Hoare triple {56245#true} assume 1 == ~__BLAST_NONDET~3; {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L272 TraceCheckUtils]: 23: Hoare triple {56245#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L290 TraceCheckUtils]: 24: Hoare triple {56245#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L290 TraceCheckUtils]: 25: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L272 TraceCheckUtils]: 26: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L290 TraceCheckUtils]: 27: Hoare triple {56245#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L272 TraceCheckUtils]: 28: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L290 TraceCheckUtils]: 29: Hoare triple {56245#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L290 TraceCheckUtils]: 30: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L290 TraceCheckUtils]: 31: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-28 08:33:07,674 INFO L290 TraceCheckUtils]: 33: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:07,675 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-28 08:33:07,675 INFO L290 TraceCheckUtils]: 35: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-28 08:33:07,675 INFO L290 TraceCheckUtils]: 36: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-28 08:33:07,675 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {56245#true} {56245#true} #6463#return; {56245#true} is VALID [2022-04-28 08:33:07,675 INFO L290 TraceCheckUtils]: 38: Hoare triple {56245#true} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {56245#true} is VALID [2022-04-28 08:33:07,675 INFO L290 TraceCheckUtils]: 39: Hoare triple {56245#true} assume !(0 != ~we_should_unload~0); {56245#true} is VALID [2022-04-28 08:33:07,680 INFO L290 TraceCheckUtils]: 40: Hoare triple {56245#true} assume !(1 == ~pended~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-28 08:33:07,680 INFO L290 TraceCheckUtils]: 41: Hoare triple {56412#(not (= ~pended~0 1))} assume !(1 == ~pended~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-28 08:33:07,680 INFO L290 TraceCheckUtils]: 42: Hoare triple {56412#(not (= ~pended~0 1))} assume !(~s~0 == ~UNLOADED~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-28 08:33:07,680 INFO L290 TraceCheckUtils]: 43: Hoare triple {56412#(not (= ~pended~0 1))} assume !(-1 == ~status~31); {56412#(not (= ~pended~0 1))} is VALID [2022-04-28 08:33:07,681 INFO L290 TraceCheckUtils]: 44: Hoare triple {56412#(not (= ~pended~0 1))} assume !(~s~0 != ~SKIP2~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-28 08:33:07,681 INFO L290 TraceCheckUtils]: 45: Hoare triple {56412#(not (= ~pended~0 1))} assume 1 == ~pended~0; {56246#false} is VALID [2022-04-28 08:33:07,681 INFO L290 TraceCheckUtils]: 46: Hoare triple {56246#false} assume 259 != ~status~31; {56246#false} is VALID [2022-04-28 08:33:07,681 INFO L272 TraceCheckUtils]: 47: Hoare triple {56246#false} call errorFn(); {56246#false} is VALID [2022-04-28 08:33:07,681 INFO L290 TraceCheckUtils]: 48: Hoare triple {56246#false} assume !false; {56246#false} is VALID [2022-04-28 08:33:07,682 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:33:07,682 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:33:07,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [911607033] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:33:07,682 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:33:07,682 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2022-04-28 08:33:07,682 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:33:07,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1020935347] [2022-04-28 08:33:07,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1020935347] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:33:07,682 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:33:07,682 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-28 08:33:07,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119178176] [2022-04-28 08:33:07,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:33:07,683 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-28 08:33:07,683 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:33:07,683 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:33:07,725 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:33:07,726 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-28 08:33:07,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:33:07,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-28 08:33:07,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-28 08:33:07,726 INFO L87 Difference]: Start difference. First operand 3711 states and 5386 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:33:17,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:33:17,656 INFO L93 Difference]: Finished difference Result 3829 states and 5529 transitions. [2022-04-28 08:33:17,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-28 08:33:17,656 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-28 08:33:17,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:33:17,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:33:17,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2934 transitions. [2022-04-28 08:33:17,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:33:17,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2934 transitions. [2022-04-28 08:33:17,874 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2934 transitions. [2022-04-28 08:33:20,094 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2934 edges. 2934 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:33:20,797 INFO L225 Difference]: With dead ends: 3829 [2022-04-28 08:33:20,797 INFO L226 Difference]: Without dead ends: 3810 [2022-04-28 08:33:20,798 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-28 08:33:20,800 INFO L413 NwaCegarLoop]: 2842 mSDtfsCounter, 2820 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2820 SdHoareTripleChecker+Valid, 2912 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 08:33:20,800 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2820 Valid, 2912 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 08:33:20,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3810 states. [2022-04-28 08:33:21,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3810 to 3804. [2022-04-28 08:33:21,474 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:33:21,481 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-28 08:33:21,486 INFO L74 IsIncluded]: Start isIncluded. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-28 08:33:21,490 INFO L87 Difference]: Start difference. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-28 08:33:21,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:33:21,917 INFO L93 Difference]: Finished difference Result 3810 states and 5502 transitions. [2022-04-28 08:33:21,917 INFO L276 IsEmpty]: Start isEmpty. Operand 3810 states and 5502 transitions. [2022-04-28 08:33:21,928 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:33:21,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:33:21,934 INFO L74 IsIncluded]: Start isIncluded. First operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) Second operand 3810 states. [2022-04-28 08:33:21,937 INFO L87 Difference]: Start difference. First operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) Second operand 3810 states. [2022-04-28 08:33:22,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:33:22,372 INFO L93 Difference]: Finished difference Result 3810 states and 5502 transitions. [2022-04-28 08:33:22,372 INFO L276 IsEmpty]: Start isEmpty. Operand 3810 states and 5502 transitions. [2022-04-28 08:33:22,380 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:33:22,381 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:33:22,381 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:33:22,381 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:33:22,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-28 08:33:23,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3804 states to 3804 states and 5497 transitions. [2022-04-28 08:33:23,123 INFO L78 Accepts]: Start accepts. Automaton has 3804 states and 5497 transitions. Word has length 49 [2022-04-28 08:33:23,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:33:23,124 INFO L495 AbstractCegarLoop]: Abstraction has 3804 states and 5497 transitions. [2022-04-28 08:33:23,124 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:33:23,124 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3804 states and 5497 transitions. [2022-04-28 08:33:37,928 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5497 edges. 5497 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:33:37,929 INFO L276 IsEmpty]: Start isEmpty. Operand 3804 states and 5497 transitions. [2022-04-28 08:33:37,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-28 08:33:37,935 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:33:37,935 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:33:37,962 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-28 08:33:38,155 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:33:38,155 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:33:38,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:33:38,156 INFO L85 PathProgramCache]: Analyzing trace with hash -1919969906, now seen corresponding path program 1 times [2022-04-28 08:33:38,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:33:38,156 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [533399467] [2022-04-28 08:33:38,162 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:33:38,162 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:33:38,162 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:33:38,162 INFO L85 PathProgramCache]: Analyzing trace with hash -1919969906, now seen corresponding path program 2 times [2022-04-28 08:33:38,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:33:38,162 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1377067555] [2022-04-28 08:33:38,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:33:38,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:33:38,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:38,400 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:33:38,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:38,434 INFO L290 TraceCheckUtils]: 0: Hoare triple {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-28 08:33:38,435 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,435 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-28 08:33:38,462 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:33:38,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:38,470 INFO L290 TraceCheckUtils]: 0: Hoare triple {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-28 08:33:38,470 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,470 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79323#false} #6457#return; {79323#false} is VALID [2022-04-28 08:33:38,485 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:33:38,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:38,493 INFO L290 TraceCheckUtils]: 0: Hoare triple {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-28 08:33:38,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,493 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79323#false} #6459#return; {79323#false} is VALID [2022-04-28 08:33:38,509 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-28 08:33:38,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:38,539 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-28 08:33:38,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:38,547 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:33:38,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:38,555 INFO L290 TraceCheckUtils]: 0: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:38,555 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-28 08:33:38,556 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,556 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-28 08:33:38,556 INFO L290 TraceCheckUtils]: 0: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:38,556 INFO L272 TraceCheckUtils]: 1: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:38,557 INFO L290 TraceCheckUtils]: 2: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:38,557 INFO L290 TraceCheckUtils]: 3: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-28 08:33:38,557 INFO L290 TraceCheckUtils]: 4: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,557 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-28 08:33:38,557 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,557 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-28 08:33:38,557 INFO L290 TraceCheckUtils]: 0: Hoare triple {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-28 08:33:38,557 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-28 08:33:38,559 INFO L272 TraceCheckUtils]: 2: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:38,559 INFO L290 TraceCheckUtils]: 3: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:38,560 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:38,560 INFO L290 TraceCheckUtils]: 5: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:38,560 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-28 08:33:38,560 INFO L290 TraceCheckUtils]: 7: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,560 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-28 08:33:38,560 INFO L290 TraceCheckUtils]: 9: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,561 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-28 08:33:38,561 INFO L290 TraceCheckUtils]: 11: Hoare triple {79322#true} #res := 0; {79322#true} is VALID [2022-04-28 08:33:38,561 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,561 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79323#false} #6463#return; {79323#false} is VALID [2022-04-28 08:33:38,564 INFO L272 TraceCheckUtils]: 0: Hoare triple {79322#true} call ULTIMATE.init(); {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:33:38,564 INFO L290 TraceCheckUtils]: 1: Hoare triple {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-28 08:33:38,564 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,568 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-28 08:33:38,569 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call #t~ret1155 := main(); {79322#true} is VALID [2022-04-28 08:33:38,569 INFO L290 TraceCheckUtils]: 5: Hoare triple {79322#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {79327#(= main_~i~24 0)} is VALID [2022-04-28 08:33:38,569 INFO L290 TraceCheckUtils]: 6: Hoare triple {79327#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {79327#(= main_~i~24 0)} is VALID [2022-04-28 08:33:38,570 INFO L290 TraceCheckUtils]: 7: Hoare triple {79327#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {79328#(<= main_~i~24 1)} is VALID [2022-04-28 08:33:38,570 INFO L290 TraceCheckUtils]: 8: Hoare triple {79328#(<= main_~i~24 1)} assume !(~i~24 < 4); {79323#false} is VALID [2022-04-28 08:33:38,570 INFO L290 TraceCheckUtils]: 9: Hoare triple {79323#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {79323#false} is VALID [2022-04-28 08:33:38,570 INFO L272 TraceCheckUtils]: 10: Hoare triple {79323#false} call _BLAST_init(); {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:33:38,570 INFO L290 TraceCheckUtils]: 11: Hoare triple {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-28 08:33:38,570 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,571 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79323#false} #6457#return; {79323#false} is VALID [2022-04-28 08:33:38,571 INFO L290 TraceCheckUtils]: 14: Hoare triple {79323#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {79323#false} is VALID [2022-04-28 08:33:38,571 INFO L290 TraceCheckUtils]: 15: Hoare triple {79323#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {79323#false} is VALID [2022-04-28 08:33:38,571 INFO L272 TraceCheckUtils]: 16: Hoare triple {79323#false} call stub_driver_init(); {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:33:38,571 INFO L290 TraceCheckUtils]: 17: Hoare triple {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-28 08:33:38,571 INFO L290 TraceCheckUtils]: 18: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,571 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {79322#true} {79323#false} #6459#return; {79323#false} is VALID [2022-04-28 08:33:38,571 INFO L290 TraceCheckUtils]: 20: Hoare triple {79323#false} assume !!(~status~31 >= 0); {79323#false} is VALID [2022-04-28 08:33:38,571 INFO L290 TraceCheckUtils]: 21: Hoare triple {79323#false} assume !(0 == ~__BLAST_NONDET~3); {79323#false} is VALID [2022-04-28 08:33:38,571 INFO L290 TraceCheckUtils]: 22: Hoare triple {79323#false} assume 1 == ~__BLAST_NONDET~3; {79323#false} is VALID [2022-04-28 08:33:38,571 INFO L272 TraceCheckUtils]: 23: Hoare triple {79323#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:33:38,572 INFO L290 TraceCheckUtils]: 24: Hoare triple {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-28 08:33:38,572 INFO L290 TraceCheckUtils]: 25: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-28 08:33:38,572 INFO L272 TraceCheckUtils]: 26: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:38,572 INFO L290 TraceCheckUtils]: 27: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:38,573 INFO L272 TraceCheckUtils]: 28: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:33:38,573 INFO L290 TraceCheckUtils]: 29: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:38,573 INFO L290 TraceCheckUtils]: 30: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-28 08:33:38,573 INFO L290 TraceCheckUtils]: 31: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,573 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-28 08:33:38,573 INFO L290 TraceCheckUtils]: 33: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,573 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-28 08:33:38,573 INFO L290 TraceCheckUtils]: 35: Hoare triple {79322#true} #res := 0; {79322#true} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 36: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:38,574 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {79322#true} {79323#false} #6463#return; {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 38: Hoare triple {79323#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 39: Hoare triple {79323#false} assume !(0 != ~we_should_unload~0); {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 40: Hoare triple {79323#false} assume !(1 == ~pended~0); {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 41: Hoare triple {79323#false} assume !(1 == ~pended~0); {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 42: Hoare triple {79323#false} assume !(~s~0 == ~UNLOADED~0); {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 43: Hoare triple {79323#false} assume !(-1 == ~status~31); {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 44: Hoare triple {79323#false} assume ~s~0 != ~SKIP2~0; {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 45: Hoare triple {79323#false} assume ~s~0 != ~IPC~0; {79323#false} is VALID [2022-04-28 08:33:38,574 INFO L290 TraceCheckUtils]: 46: Hoare triple {79323#false} assume ~s~0 != ~DC~0; {79323#false} is VALID [2022-04-28 08:33:38,575 INFO L272 TraceCheckUtils]: 47: Hoare triple {79323#false} call errorFn(); {79323#false} is VALID [2022-04-28 08:33:38,575 INFO L290 TraceCheckUtils]: 48: Hoare triple {79323#false} assume !false; {79323#false} is VALID [2022-04-28 08:33:38,575 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:33:38,575 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:33:38,577 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1377067555] [2022-04-28 08:33:38,577 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1377067555] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:33:38,577 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1068036868] [2022-04-28 08:33:38,577 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:33:38,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:33:38,577 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:33:38,578 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:33:38,580 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-28 08:33:39,200 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:33:39,200 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:33:39,205 INFO L263 TraceCheckSpWp]: Trace formula consists of 1477 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-28 08:33:39,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:33:39,249 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:33:39,355 INFO L272 TraceCheckUtils]: 0: Hoare triple {79322#true} call ULTIMATE.init(); {79322#true} is VALID [2022-04-28 08:33:39,355 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-28 08:33:39,355 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:39,357 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-28 08:33:39,357 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call #t~ret1155 := main(); {79322#true} is VALID [2022-04-28 08:33:39,357 INFO L290 TraceCheckUtils]: 5: Hoare triple {79322#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 7: Hoare triple {79322#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 8: Hoare triple {79322#true} assume !(~i~24 < 4); {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 9: Hoare triple {79322#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L272 TraceCheckUtils]: 10: Hoare triple {79322#true} call _BLAST_init(); {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 11: Hoare triple {79322#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79322#true} #6457#return; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 14: Hoare triple {79322#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 15: Hoare triple {79322#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L272 TraceCheckUtils]: 16: Hoare triple {79322#true} call stub_driver_init(); {79322#true} is VALID [2022-04-28 08:33:39,358 INFO L290 TraceCheckUtils]: 17: Hoare triple {79322#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L290 TraceCheckUtils]: 18: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {79322#true} {79322#true} #6459#return; {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L290 TraceCheckUtils]: 20: Hoare triple {79322#true} assume !!(~status~31 >= 0); {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L290 TraceCheckUtils]: 21: Hoare triple {79322#true} assume !(0 == ~__BLAST_NONDET~3); {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L290 TraceCheckUtils]: 22: Hoare triple {79322#true} assume 1 == ~__BLAST_NONDET~3; {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L272 TraceCheckUtils]: 23: Hoare triple {79322#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L290 TraceCheckUtils]: 24: Hoare triple {79322#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L290 TraceCheckUtils]: 25: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L272 TraceCheckUtils]: 26: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L290 TraceCheckUtils]: 27: Hoare triple {79322#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:39,359 INFO L272 TraceCheckUtils]: 28: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79322#true} is VALID [2022-04-28 08:33:39,360 INFO L290 TraceCheckUtils]: 29: Hoare triple {79322#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-28 08:33:39,364 INFO L290 TraceCheckUtils]: 30: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,364 INFO L290 TraceCheckUtils]: 31: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,365 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #6659#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,365 INFO L290 TraceCheckUtils]: 33: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,365 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #5919#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,366 INFO L290 TraceCheckUtils]: 35: Hoare triple {79459#(= ~s~0 ~DC~0)} #res := 0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,366 INFO L290 TraceCheckUtils]: 36: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,366 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #6463#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,367 INFO L290 TraceCheckUtils]: 38: Hoare triple {79459#(= ~s~0 ~DC~0)} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,367 INFO L290 TraceCheckUtils]: 39: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(0 != ~we_should_unload~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,367 INFO L290 TraceCheckUtils]: 40: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(1 == ~pended~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,368 INFO L290 TraceCheckUtils]: 41: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(1 == ~pended~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,368 INFO L290 TraceCheckUtils]: 42: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(~s~0 == ~UNLOADED~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,368 INFO L290 TraceCheckUtils]: 43: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(-1 == ~status~31); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,368 INFO L290 TraceCheckUtils]: 44: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~SKIP2~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,369 INFO L290 TraceCheckUtils]: 45: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~IPC~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-28 08:33:39,369 INFO L290 TraceCheckUtils]: 46: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~DC~0; {79323#false} is VALID [2022-04-28 08:33:39,369 INFO L272 TraceCheckUtils]: 47: Hoare triple {79323#false} call errorFn(); {79323#false} is VALID [2022-04-28 08:33:39,369 INFO L290 TraceCheckUtils]: 48: Hoare triple {79323#false} assume !false; {79323#false} is VALID [2022-04-28 08:33:39,369 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:33:39,369 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:33:39,369 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1068036868] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:33:39,370 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:33:39,370 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2022-04-28 08:33:39,370 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:33:39,370 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [533399467] [2022-04-28 08:33:39,370 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [533399467] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:33:39,370 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:33:39,370 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-28 08:33:39,370 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625624113] [2022-04-28 08:33:39,370 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:33:39,370 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-28 08:33:39,371 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:33:39,371 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:33:39,413 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:33:39,413 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-28 08:33:39,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:33:39,414 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-28 08:33:39,414 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-28 08:33:39,414 INFO L87 Difference]: Start difference. First operand 3804 states and 5497 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:34:03,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:34:03,539 INFO L93 Difference]: Finished difference Result 4627 states and 6683 transitions. [2022-04-28 08:34:03,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-28 08:34:03,539 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-28 08:34:03,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:34:03,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:34:03,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4532 transitions. [2022-04-28 08:34:03,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:34:03,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4532 transitions. [2022-04-28 08:34:03,846 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 4532 transitions. [2022-04-28 08:34:07,299 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4532 edges. 4532 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:34:08,278 INFO L225 Difference]: With dead ends: 4627 [2022-04-28 08:34:08,279 INFO L226 Difference]: Without dead ends: 4622 [2022-04-28 08:34:08,280 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-28 08:34:08,280 INFO L413 NwaCegarLoop]: 4145 mSDtfsCounter, 1721 mSDsluCounter, 2715 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1721 SdHoareTripleChecker+Valid, 6860 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 08:34:08,281 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1721 Valid, 6860 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 08:34:08,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4622 states. [2022-04-28 08:34:09,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4622 to 4578. [2022-04-28 08:34:09,049 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:34:09,055 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-28 08:34:09,058 INFO L74 IsIncluded]: Start isIncluded. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-28 08:34:09,061 INFO L87 Difference]: Start difference. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-28 08:34:09,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:34:09,658 INFO L93 Difference]: Finished difference Result 4622 states and 6676 transitions. [2022-04-28 08:34:09,658 INFO L276 IsEmpty]: Start isEmpty. Operand 4622 states and 6676 transitions. [2022-04-28 08:34:09,668 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:34:09,668 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:34:09,673 INFO L74 IsIncluded]: Start isIncluded. First operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) Second operand 4622 states. [2022-04-28 08:34:09,677 INFO L87 Difference]: Start difference. First operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) Second operand 4622 states. [2022-04-28 08:34:10,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:34:10,318 INFO L93 Difference]: Finished difference Result 4622 states and 6676 transitions. [2022-04-28 08:34:10,318 INFO L276 IsEmpty]: Start isEmpty. Operand 4622 states and 6676 transitions. [2022-04-28 08:34:10,326 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:34:10,326 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:34:10,326 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:34:10,326 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:34:10,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-28 08:34:11,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4578 states to 4578 states and 6622 transitions. [2022-04-28 08:34:11,375 INFO L78 Accepts]: Start accepts. Automaton has 4578 states and 6622 transitions. Word has length 49 [2022-04-28 08:34:11,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:34:11,375 INFO L495 AbstractCegarLoop]: Abstraction has 4578 states and 6622 transitions. [2022-04-28 08:34:11,376 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:34:11,376 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4578 states and 6622 transitions. [2022-04-28 08:34:30,032 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6622 edges. 6622 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:34:30,033 INFO L276 IsEmpty]: Start isEmpty. Operand 4578 states and 6622 transitions. [2022-04-28 08:34:30,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-28 08:34:30,034 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:34:30,034 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:34:30,056 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-28 08:34:30,255 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:34:30,255 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:34:30,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:34:30,256 INFO L85 PathProgramCache]: Analyzing trace with hash 1061683448, now seen corresponding path program 1 times [2022-04-28 08:34:30,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:34:30,256 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2080471776] [2022-04-28 08:34:30,261 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:34:30,261 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:34:30,262 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:34:30,262 INFO L85 PathProgramCache]: Analyzing trace with hash 1061683448, now seen corresponding path program 2 times [2022-04-28 08:34:30,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:34:30,262 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950164956] [2022-04-28 08:34:30,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:34:30,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:34:30,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:34:30,527 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:34:30,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:34:30,550 INFO L290 TraceCheckUtils]: 0: Hoare triple {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-28 08:34:30,551 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,551 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-28 08:34:30,572 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:34:30,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:34:30,582 INFO L290 TraceCheckUtils]: 0: Hoare triple {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-28 08:34:30,583 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,583 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107168#false} #6457#return; {107168#false} is VALID [2022-04-28 08:34:30,595 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:34:30,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:34:30,604 INFO L290 TraceCheckUtils]: 0: Hoare triple {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-28 08:34:30,604 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,605 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107168#false} #6459#return; {107168#false} is VALID [2022-04-28 08:34:30,615 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-28 08:34:30,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:34:30,635 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-28 08:34:30,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:34:30,643 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:34:30,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:34:30,653 INFO L290 TraceCheckUtils]: 0: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:30,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-28 08:34:30,653 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,653 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-28 08:34:30,653 INFO L290 TraceCheckUtils]: 0: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:30,654 INFO L272 TraceCheckUtils]: 1: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:34:30,654 INFO L290 TraceCheckUtils]: 2: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:30,654 INFO L290 TraceCheckUtils]: 3: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-28 08:34:30,654 INFO L290 TraceCheckUtils]: 4: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,654 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-28 08:34:30,654 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,655 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-28 08:34:30,655 INFO L290 TraceCheckUtils]: 0: Hoare triple {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-28 08:34:30,655 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-28 08:34:30,655 INFO L272 TraceCheckUtils]: 2: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:34:30,656 INFO L290 TraceCheckUtils]: 3: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:30,656 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:34:30,656 INFO L290 TraceCheckUtils]: 5: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:30,656 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-28 08:34:30,656 INFO L290 TraceCheckUtils]: 7: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,656 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-28 08:34:30,656 INFO L290 TraceCheckUtils]: 9: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,657 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-28 08:34:30,657 INFO L290 TraceCheckUtils]: 11: Hoare triple {107167#true} #res := 0; {107167#true} is VALID [2022-04-28 08:34:30,657 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,657 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107168#false} #6463#return; {107168#false} is VALID [2022-04-28 08:34:30,659 INFO L272 TraceCheckUtils]: 0: Hoare triple {107167#true} call ULTIMATE.init(); {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:34:30,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-28 08:34:30,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,659 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-28 08:34:30,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call #t~ret1155 := main(); {107167#true} is VALID [2022-04-28 08:34:30,660 INFO L290 TraceCheckUtils]: 5: Hoare triple {107167#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {107172#(= main_~i~24 0)} is VALID [2022-04-28 08:34:30,660 INFO L290 TraceCheckUtils]: 6: Hoare triple {107172#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {107172#(= main_~i~24 0)} is VALID [2022-04-28 08:34:30,660 INFO L290 TraceCheckUtils]: 7: Hoare triple {107172#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {107173#(<= main_~i~24 1)} is VALID [2022-04-28 08:34:30,661 INFO L290 TraceCheckUtils]: 8: Hoare triple {107173#(<= main_~i~24 1)} assume !(~i~24 < 4); {107168#false} is VALID [2022-04-28 08:34:30,661 INFO L290 TraceCheckUtils]: 9: Hoare triple {107168#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {107168#false} is VALID [2022-04-28 08:34:30,661 INFO L272 TraceCheckUtils]: 10: Hoare triple {107168#false} call _BLAST_init(); {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:34:30,661 INFO L290 TraceCheckUtils]: 11: Hoare triple {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-28 08:34:30,661 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,661 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107168#false} #6457#return; {107168#false} is VALID [2022-04-28 08:34:30,661 INFO L290 TraceCheckUtils]: 14: Hoare triple {107168#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {107168#false} is VALID [2022-04-28 08:34:30,661 INFO L290 TraceCheckUtils]: 15: Hoare triple {107168#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {107168#false} is VALID [2022-04-28 08:34:30,661 INFO L272 TraceCheckUtils]: 16: Hoare triple {107168#false} call stub_driver_init(); {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:34:30,661 INFO L290 TraceCheckUtils]: 17: Hoare triple {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-28 08:34:30,661 INFO L290 TraceCheckUtils]: 18: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,661 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {107167#true} {107168#false} #6459#return; {107168#false} is VALID [2022-04-28 08:34:30,662 INFO L290 TraceCheckUtils]: 20: Hoare triple {107168#false} assume !!(~status~31 >= 0); {107168#false} is VALID [2022-04-28 08:34:30,662 INFO L290 TraceCheckUtils]: 21: Hoare triple {107168#false} assume !(0 == ~__BLAST_NONDET~3); {107168#false} is VALID [2022-04-28 08:34:30,662 INFO L290 TraceCheckUtils]: 22: Hoare triple {107168#false} assume 1 == ~__BLAST_NONDET~3; {107168#false} is VALID [2022-04-28 08:34:30,662 INFO L272 TraceCheckUtils]: 23: Hoare triple {107168#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:34:30,662 INFO L290 TraceCheckUtils]: 24: Hoare triple {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-28 08:34:30,662 INFO L290 TraceCheckUtils]: 25: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-28 08:34:30,662 INFO L272 TraceCheckUtils]: 26: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:34:30,662 INFO L290 TraceCheckUtils]: 27: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:30,663 INFO L272 TraceCheckUtils]: 28: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:34:30,663 INFO L290 TraceCheckUtils]: 29: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:30,663 INFO L290 TraceCheckUtils]: 30: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-28 08:34:30,663 INFO L290 TraceCheckUtils]: 31: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,663 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-28 08:34:30,663 INFO L290 TraceCheckUtils]: 33: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,663 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 35: Hoare triple {107167#true} #res := 0; {107167#true} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 36: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:30,664 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {107167#true} {107168#false} #6463#return; {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 38: Hoare triple {107168#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 39: Hoare triple {107168#false} assume !(0 != ~we_should_unload~0); {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 40: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 41: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 42: Hoare triple {107168#false} assume !(~s~0 == ~UNLOADED~0); {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 43: Hoare triple {107168#false} assume !(-1 == ~status~31); {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 44: Hoare triple {107168#false} assume !(~s~0 != ~SKIP2~0); {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 45: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-28 08:34:30,664 INFO L290 TraceCheckUtils]: 46: Hoare triple {107168#false} assume ~s~0 == ~DC~0; {107168#false} is VALID [2022-04-28 08:34:30,665 INFO L290 TraceCheckUtils]: 47: Hoare triple {107168#false} assume 259 == ~status~31; {107168#false} is VALID [2022-04-28 08:34:30,665 INFO L272 TraceCheckUtils]: 48: Hoare triple {107168#false} call errorFn(); {107168#false} is VALID [2022-04-28 08:34:30,669 INFO L290 TraceCheckUtils]: 49: Hoare triple {107168#false} assume !false; {107168#false} is VALID [2022-04-28 08:34:30,670 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:34:30,670 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:34:30,670 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950164956] [2022-04-28 08:34:30,670 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1950164956] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:34:30,670 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2081819246] [2022-04-28 08:34:30,670 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:34:30,670 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:34:30,670 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:34:30,671 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:34:30,716 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-28 08:34:31,345 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:34:31,345 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:34:31,349 INFO L263 TraceCheckSpWp]: Trace formula consists of 1481 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-28 08:34:31,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:34:31,410 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:34:31,561 INFO L272 TraceCheckUtils]: 0: Hoare triple {107167#true} call ULTIMATE.init(); {107167#true} is VALID [2022-04-28 08:34:31,561 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-28 08:34:31,561 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:31,561 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call #t~ret1155 := main(); {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 5: Hoare triple {107167#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 7: Hoare triple {107167#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 8: Hoare triple {107167#true} assume !(~i~24 < 4); {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 9: Hoare triple {107167#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L272 TraceCheckUtils]: 10: Hoare triple {107167#true} call _BLAST_init(); {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 11: Hoare triple {107167#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107167#true} #6457#return; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 14: Hoare triple {107167#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L290 TraceCheckUtils]: 15: Hoare triple {107167#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {107167#true} is VALID [2022-04-28 08:34:31,562 INFO L272 TraceCheckUtils]: 16: Hoare triple {107167#true} call stub_driver_init(); {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L290 TraceCheckUtils]: 17: Hoare triple {107167#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L290 TraceCheckUtils]: 18: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {107167#true} {107167#true} #6459#return; {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L290 TraceCheckUtils]: 20: Hoare triple {107167#true} assume !!(~status~31 >= 0); {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L290 TraceCheckUtils]: 21: Hoare triple {107167#true} assume !(0 == ~__BLAST_NONDET~3); {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L290 TraceCheckUtils]: 22: Hoare triple {107167#true} assume 1 == ~__BLAST_NONDET~3; {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L272 TraceCheckUtils]: 23: Hoare triple {107167#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L290 TraceCheckUtils]: 24: Hoare triple {107167#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L290 TraceCheckUtils]: 25: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L272 TraceCheckUtils]: 26: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L290 TraceCheckUtils]: 27: Hoare triple {107167#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:31,563 INFO L272 TraceCheckUtils]: 28: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107167#true} is VALID [2022-04-28 08:34:31,564 INFO L290 TraceCheckUtils]: 29: Hoare triple {107167#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-28 08:34:31,564 INFO L290 TraceCheckUtils]: 30: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-28 08:34:31,564 INFO L290 TraceCheckUtils]: 31: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:31,564 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-28 08:34:31,564 INFO L290 TraceCheckUtils]: 33: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-28 08:34:31,564 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-28 08:34:31,564 INFO L290 TraceCheckUtils]: 35: Hoare triple {107167#true} #res := 0; {107319#(<= |PptDispatchClose_#res| 0)} is VALID [2022-04-28 08:34:31,564 INFO L290 TraceCheckUtils]: 36: Hoare triple {107319#(<= |PptDispatchClose_#res| 0)} assume true; {107319#(<= |PptDispatchClose_#res| 0)} is VALID [2022-04-28 08:34:31,566 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {107319#(<= |PptDispatchClose_#res| 0)} {107167#true} #6463#return; {107326#(<= |main_#t~ret1110| 0)} is VALID [2022-04-28 08:34:31,566 INFO L290 TraceCheckUtils]: 38: Hoare triple {107326#(<= |main_#t~ret1110| 0)} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,566 INFO L290 TraceCheckUtils]: 39: Hoare triple {107330#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,567 INFO L290 TraceCheckUtils]: 40: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,567 INFO L290 TraceCheckUtils]: 41: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,567 INFO L290 TraceCheckUtils]: 42: Hoare triple {107330#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,567 INFO L290 TraceCheckUtils]: 43: Hoare triple {107330#(<= main_~status~31 0)} assume !(-1 == ~status~31); {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,568 INFO L290 TraceCheckUtils]: 44: Hoare triple {107330#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,568 INFO L290 TraceCheckUtils]: 45: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,568 INFO L290 TraceCheckUtils]: 46: Hoare triple {107330#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {107330#(<= main_~status~31 0)} is VALID [2022-04-28 08:34:31,568 INFO L290 TraceCheckUtils]: 47: Hoare triple {107330#(<= main_~status~31 0)} assume 259 == ~status~31; {107168#false} is VALID [2022-04-28 08:34:31,569 INFO L272 TraceCheckUtils]: 48: Hoare triple {107168#false} call errorFn(); {107168#false} is VALID [2022-04-28 08:34:31,569 INFO L290 TraceCheckUtils]: 49: Hoare triple {107168#false} assume !false; {107168#false} is VALID [2022-04-28 08:34:31,569 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:34:31,569 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:34:31,569 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2081819246] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:34:31,569 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:34:31,569 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-28 08:34:31,569 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:34:31,569 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2080471776] [2022-04-28 08:34:31,569 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2080471776] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:34:31,569 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:34:31,570 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 08:34:31,570 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1634919953] [2022-04-28 08:34:31,570 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:34:31,570 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 50 [2022-04-28 08:34:31,570 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:34:31,570 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:34:31,614 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:34:31,614 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-28 08:34:31,614 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:34:31,614 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-28 08:34:31,615 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-28 08:34:31,615 INFO L87 Difference]: Start difference. First operand 4578 states and 6622 transitions. Second operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:35:06,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:35:06,050 INFO L93 Difference]: Finished difference Result 4593 states and 6640 transitions. [2022-04-28 08:35:06,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-28 08:35:06,050 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 50 [2022-04-28 08:35:06,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:35:06,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:35:06,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2859 transitions. [2022-04-28 08:35:06,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:35:06,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2859 transitions. [2022-04-28 08:35:06,290 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2859 transitions. [2022-04-28 08:35:08,590 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2859 edges. 2859 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:35:09,720 INFO L225 Difference]: With dead ends: 4593 [2022-04-28 08:35:09,720 INFO L226 Difference]: Without dead ends: 4552 [2022-04-28 08:35:09,721 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-28 08:35:09,722 INFO L413 NwaCegarLoop]: 2840 mSDtfsCounter, 5 mSDsluCounter, 8500 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11340 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 08:35:09,722 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 11340 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 08:35:09,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4552 states. [2022-04-28 08:35:10,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4552 to 4552. [2022-04-28 08:35:10,579 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:35:10,584 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-28 08:35:10,590 INFO L74 IsIncluded]: Start isIncluded. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-28 08:35:10,595 INFO L87 Difference]: Start difference. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-28 08:35:11,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:35:11,190 INFO L93 Difference]: Finished difference Result 4552 states and 6585 transitions. [2022-04-28 08:35:11,190 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-28 08:35:11,198 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:35:11,198 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:35:11,204 INFO L74 IsIncluded]: Start isIncluded. First operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) Second operand 4552 states. [2022-04-28 08:35:11,208 INFO L87 Difference]: Start difference. First operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) Second operand 4552 states. [2022-04-28 08:35:11,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:35:11,801 INFO L93 Difference]: Finished difference Result 4552 states and 6585 transitions. [2022-04-28 08:35:11,801 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-28 08:35:11,808 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:35:11,808 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:35:11,808 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:35:11,808 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:35:11,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-28 08:35:12,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4552 states to 4552 states and 6585 transitions. [2022-04-28 08:35:12,875 INFO L78 Accepts]: Start accepts. Automaton has 4552 states and 6585 transitions. Word has length 50 [2022-04-28 08:35:12,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:35:12,876 INFO L495 AbstractCegarLoop]: Abstraction has 4552 states and 6585 transitions. [2022-04-28 08:35:12,876 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:35:12,876 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4552 states and 6585 transitions. [2022-04-28 08:35:32,553 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6585 edges. 6585 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:35:32,553 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-28 08:35:32,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-04-28 08:35:32,554 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:35:32,554 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:35:32,576 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-28 08:35:32,770 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:35:32,771 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:35:32,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:35:32,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1755528464, now seen corresponding path program 1 times [2022-04-28 08:35:32,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:35:32,771 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [847193632] [2022-04-28 08:35:32,780 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:35:32,780 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:35:32,780 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:35:32,780 INFO L85 PathProgramCache]: Analyzing trace with hash -1755528464, now seen corresponding path program 2 times [2022-04-28 08:35:32,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:35:32,780 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697063513] [2022-04-28 08:35:32,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:35:32,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:35:32,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:35:33,032 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:35:33,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:35:33,049 INFO L290 TraceCheckUtils]: 0: Hoare triple {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134757#true} is VALID [2022-04-28 08:35:33,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-28 08:35:33,049 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134757#true} #6857#return; {134757#true} is VALID [2022-04-28 08:35:33,076 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:35:33,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:35:33,084 INFO L290 TraceCheckUtils]: 0: Hoare triple {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134757#true} is VALID [2022-04-28 08:35:33,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-28 08:35:33,084 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134758#false} #6457#return; {134758#false} is VALID [2022-04-28 08:35:33,099 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:35:33,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:35:33,109 INFO L290 TraceCheckUtils]: 0: Hoare triple {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134757#true} is VALID [2022-04-28 08:35:33,109 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-28 08:35:33,109 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134758#false} #6459#return; {134758#false} is VALID [2022-04-28 08:35:33,109 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-28 08:35:33,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:35:33,118 INFO L290 TraceCheckUtils]: 0: Hoare triple {134757#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134757#true} is VALID [2022-04-28 08:35:33,118 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume 0 == ~__BLAST_NONDET~26; {134757#true} is VALID [2022-04-28 08:35:33,118 INFO L290 TraceCheckUtils]: 2: Hoare triple {134757#true} #res := 0; {134757#true} is VALID [2022-04-28 08:35:33,118 INFO L290 TraceCheckUtils]: 3: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-28 08:35:33,118 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {134757#true} {134758#false} #5849#return; {134758#false} is VALID [2022-04-28 08:35:33,121 INFO L272 TraceCheckUtils]: 0: Hoare triple {134757#true} call ULTIMATE.init(); {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:35:33,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134757#true} is VALID [2022-04-28 08:35:33,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-28 08:35:33,121 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134757#true} {134757#true} #6857#return; {134757#true} is VALID [2022-04-28 08:35:33,121 INFO L272 TraceCheckUtils]: 4: Hoare triple {134757#true} call #t~ret1155 := main(); {134757#true} is VALID [2022-04-28 08:35:33,122 INFO L290 TraceCheckUtils]: 5: Hoare triple {134757#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {134762#(= main_~i~24 0)} is VALID [2022-04-28 08:35:33,122 INFO L290 TraceCheckUtils]: 6: Hoare triple {134762#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {134762#(= main_~i~24 0)} is VALID [2022-04-28 08:35:33,122 INFO L290 TraceCheckUtils]: 7: Hoare triple {134762#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {134763#(<= main_~i~24 1)} is VALID [2022-04-28 08:35:33,123 INFO L290 TraceCheckUtils]: 8: Hoare triple {134763#(<= main_~i~24 1)} assume !(~i~24 < 4); {134758#false} is VALID [2022-04-28 08:35:33,123 INFO L290 TraceCheckUtils]: 9: Hoare triple {134758#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {134758#false} is VALID [2022-04-28 08:35:33,123 INFO L272 TraceCheckUtils]: 10: Hoare triple {134758#false} call _BLAST_init(); {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:35:33,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134757#true} is VALID [2022-04-28 08:35:33,123 INFO L290 TraceCheckUtils]: 12: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-28 08:35:33,123 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {134757#true} {134758#false} #6457#return; {134758#false} is VALID [2022-04-28 08:35:33,123 INFO L290 TraceCheckUtils]: 14: Hoare triple {134758#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 15: Hoare triple {134758#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L272 TraceCheckUtils]: 16: Hoare triple {134758#false} call stub_driver_init(); {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 17: Hoare triple {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134757#true} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 18: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-28 08:35:33,124 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {134757#true} {134758#false} #6459#return; {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 20: Hoare triple {134758#false} assume !!(~status~31 >= 0); {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 21: Hoare triple {134758#false} assume !(0 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 22: Hoare triple {134758#false} assume !(1 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 23: Hoare triple {134758#false} assume !(3 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 24: Hoare triple {134758#false} assume !(4 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 25: Hoare triple {134758#false} assume !(5 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L290 TraceCheckUtils]: 26: Hoare triple {134758#false} assume 6 == ~__BLAST_NONDET~3; {134758#false} is VALID [2022-04-28 08:35:33,124 INFO L272 TraceCheckUtils]: 27: Hoare triple {134758#false} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {134758#false} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 28: Hoare triple {134758#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {134758#false} is VALID [2022-04-28 08:35:33,125 INFO L272 TraceCheckUtils]: 29: Hoare triple {134758#false} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {134757#true} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 30: Hoare triple {134757#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134757#true} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 31: Hoare triple {134757#true} assume 0 == ~__BLAST_NONDET~26; {134757#true} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 32: Hoare triple {134757#true} #res := 0; {134757#true} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 33: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-28 08:35:33,125 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {134757#true} {134758#false} #5849#return; {134758#false} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 35: Hoare triple {134758#false} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 36: Hoare triple {134758#false} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 37: Hoare triple {134758#false} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 38: Hoare triple {134758#false} assume 3 == #t~mem1080;havoc #t~mem1080; {134758#false} is VALID [2022-04-28 08:35:33,125 INFO L290 TraceCheckUtils]: 39: Hoare triple {134758#false} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L290 TraceCheckUtils]: 40: Hoare triple {134758#false} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L272 TraceCheckUtils]: 41: Hoare triple {134758#false} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L290 TraceCheckUtils]: 42: Hoare triple {134758#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L290 TraceCheckUtils]: 43: Hoare triple {134758#false} assume 0 != ~compRegistered~0; {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L290 TraceCheckUtils]: 44: Hoare triple {134758#false} assume !(0 == ~routine~0); {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L290 TraceCheckUtils]: 45: Hoare triple {134758#false} assume !(1 == ~routine~0); {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L290 TraceCheckUtils]: 46: Hoare triple {134758#false} assume -1073741802 == ~compRetStatus~0; {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L272 TraceCheckUtils]: 47: Hoare triple {134758#false} call stubMoreProcessingRequired(); {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L290 TraceCheckUtils]: 48: Hoare triple {134758#false} assume !(~s~0 == ~NP~0); {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L272 TraceCheckUtils]: 49: Hoare triple {134758#false} call errorFn(); {134758#false} is VALID [2022-04-28 08:35:33,126 INFO L290 TraceCheckUtils]: 50: Hoare triple {134758#false} assume !false; {134758#false} is VALID [2022-04-28 08:35:33,127 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:35:33,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:35:33,127 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [697063513] [2022-04-28 08:35:33,127 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [697063513] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:35:33,127 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2145975650] [2022-04-28 08:35:33,127 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:35:33,127 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:35:33,127 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:35:33,128 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:35:33,129 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-28 08:35:33,857 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:35:33,857 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:35:33,862 INFO L263 TraceCheckSpWp]: Trace formula consists of 1578 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-28 08:35:33,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:35:33,893 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:35:34,020 INFO L272 TraceCheckUtils]: 0: Hoare triple {134757#true} call ULTIMATE.init(); {134757#true} is VALID [2022-04-28 08:35:34,023 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,023 INFO L290 TraceCheckUtils]: 2: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,024 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134784#(= ~routine~0 0)} {134757#true} #6857#return; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,024 INFO L272 TraceCheckUtils]: 4: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1155 := main(); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,024 INFO L290 TraceCheckUtils]: 5: Hoare triple {134784#(= ~routine~0 0)} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,025 INFO L290 TraceCheckUtils]: 6: Hoare triple {134784#(= ~routine~0 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,025 INFO L290 TraceCheckUtils]: 7: Hoare triple {134784#(= ~routine~0 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,025 INFO L290 TraceCheckUtils]: 8: Hoare triple {134784#(= ~routine~0 0)} assume !(~i~24 < 4); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,026 INFO L290 TraceCheckUtils]: 9: Hoare triple {134784#(= ~routine~0 0)} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,026 INFO L272 TraceCheckUtils]: 10: Hoare triple {134784#(= ~routine~0 0)} call _BLAST_init(); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,026 INFO L290 TraceCheckUtils]: 11: Hoare triple {134784#(= ~routine~0 0)} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,027 INFO L290 TraceCheckUtils]: 12: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,028 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #6457#return; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,028 INFO L290 TraceCheckUtils]: 14: Hoare triple {134784#(= ~routine~0 0)} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {134784#(= ~routine~0 0)} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,028 INFO L272 TraceCheckUtils]: 16: Hoare triple {134784#(= ~routine~0 0)} call stub_driver_init(); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,029 INFO L290 TraceCheckUtils]: 17: Hoare triple {134784#(= ~routine~0 0)} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,029 INFO L290 TraceCheckUtils]: 18: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,029 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #6459#return; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,029 INFO L290 TraceCheckUtils]: 20: Hoare triple {134784#(= ~routine~0 0)} assume !!(~status~31 >= 0); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,030 INFO L290 TraceCheckUtils]: 21: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,030 INFO L290 TraceCheckUtils]: 22: Hoare triple {134784#(= ~routine~0 0)} assume !(1 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,030 INFO L290 TraceCheckUtils]: 23: Hoare triple {134784#(= ~routine~0 0)} assume !(3 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,031 INFO L290 TraceCheckUtils]: 24: Hoare triple {134784#(= ~routine~0 0)} assume !(4 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,031 INFO L290 TraceCheckUtils]: 25: Hoare triple {134784#(= ~routine~0 0)} assume !(5 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,031 INFO L290 TraceCheckUtils]: 26: Hoare triple {134784#(= ~routine~0 0)} assume 6 == ~__BLAST_NONDET~3; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,032 INFO L272 TraceCheckUtils]: 27: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,032 INFO L290 TraceCheckUtils]: 28: Hoare triple {134784#(= ~routine~0 0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,034 INFO L272 TraceCheckUtils]: 29: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,034 INFO L290 TraceCheckUtils]: 30: Hoare triple {134784#(= ~routine~0 0)} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,035 INFO L290 TraceCheckUtils]: 31: Hoare triple {134784#(= ~routine~0 0)} assume 0 == ~__BLAST_NONDET~26; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,035 INFO L290 TraceCheckUtils]: 32: Hoare triple {134784#(= ~routine~0 0)} #res := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,035 INFO L290 TraceCheckUtils]: 33: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,037 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #5849#return; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,037 INFO L290 TraceCheckUtils]: 35: Hoare triple {134784#(= ~routine~0 0)} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,037 INFO L290 TraceCheckUtils]: 36: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,037 INFO L290 TraceCheckUtils]: 37: Hoare triple {134784#(= ~routine~0 0)} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,038 INFO L290 TraceCheckUtils]: 38: Hoare triple {134784#(= ~routine~0 0)} assume 3 == #t~mem1080;havoc #t~mem1080; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,038 INFO L290 TraceCheckUtils]: 39: Hoare triple {134784#(= ~routine~0 0)} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,038 INFO L290 TraceCheckUtils]: 40: Hoare triple {134784#(= ~routine~0 0)} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,039 INFO L272 TraceCheckUtils]: 41: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,039 INFO L290 TraceCheckUtils]: 42: Hoare triple {134784#(= ~routine~0 0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,039 INFO L290 TraceCheckUtils]: 43: Hoare triple {134784#(= ~routine~0 0)} assume 0 != ~compRegistered~0; {134784#(= ~routine~0 0)} is VALID [2022-04-28 08:35:34,040 INFO L290 TraceCheckUtils]: 44: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == ~routine~0); {134758#false} is VALID [2022-04-28 08:35:34,040 INFO L290 TraceCheckUtils]: 45: Hoare triple {134758#false} assume !(1 == ~routine~0); {134758#false} is VALID [2022-04-28 08:35:34,040 INFO L290 TraceCheckUtils]: 46: Hoare triple {134758#false} assume -1073741802 == ~compRetStatus~0; {134758#false} is VALID [2022-04-28 08:35:34,040 INFO L272 TraceCheckUtils]: 47: Hoare triple {134758#false} call stubMoreProcessingRequired(); {134758#false} is VALID [2022-04-28 08:35:34,040 INFO L290 TraceCheckUtils]: 48: Hoare triple {134758#false} assume !(~s~0 == ~NP~0); {134758#false} is VALID [2022-04-28 08:35:34,040 INFO L272 TraceCheckUtils]: 49: Hoare triple {134758#false} call errorFn(); {134758#false} is VALID [2022-04-28 08:35:34,040 INFO L290 TraceCheckUtils]: 50: Hoare triple {134758#false} assume !false; {134758#false} is VALID [2022-04-28 08:35:34,040 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:35:34,040 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:35:34,040 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2145975650] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:35:34,041 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:35:34,041 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-28 08:35:34,041 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:35:34,041 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [847193632] [2022-04-28 08:35:34,041 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [847193632] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:35:34,041 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:35:34,041 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-28 08:35:34,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826270355] [2022-04-28 08:35:34,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:35:34,041 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) Word has length 51 [2022-04-28 08:35:34,042 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:35:34,042 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-28 08:35:34,092 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:35:34,093 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-28 08:35:34,093 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:35:34,093 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-28 08:35:34,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-28 08:35:34,093 INFO L87 Difference]: Start difference. First operand 4552 states and 6585 transitions. Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-28 08:35:47,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:35:47,929 INFO L93 Difference]: Finished difference Result 7500 states and 10838 transitions. [2022-04-28 08:35:47,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-28 08:35:47,929 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) Word has length 51 [2022-04-28 08:35:47,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:35:47,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-28 08:35:48,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4966 transitions. [2022-04-28 08:35:48,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-28 08:35:48,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4966 transitions. [2022-04-28 08:35:48,274 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 4966 transitions. [2022-04-28 08:35:52,556 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4966 edges. 4966 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:35:53,521 INFO L225 Difference]: With dead ends: 7500 [2022-04-28 08:35:53,521 INFO L226 Difference]: Without dead ends: 4606 [2022-04-28 08:35:53,528 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-28 08:35:53,529 INFO L413 NwaCegarLoop]: 2819 mSDtfsCounter, 2710 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2710 SdHoareTripleChecker+Valid, 2964 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 08:35:53,529 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2710 Valid, 2964 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 08:35:53,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4606 states. [2022-04-28 08:35:54,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4606 to 4521. [2022-04-28 08:35:54,273 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:35:54,279 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-28 08:35:54,284 INFO L74 IsIncluded]: Start isIncluded. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-28 08:35:54,288 INFO L87 Difference]: Start difference. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-28 08:35:54,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:35:54,951 INFO L93 Difference]: Finished difference Result 4606 states and 6629 transitions. [2022-04-28 08:35:54,951 INFO L276 IsEmpty]: Start isEmpty. Operand 4606 states and 6629 transitions. [2022-04-28 08:35:54,958 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:35:54,958 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:35:54,964 INFO L74 IsIncluded]: Start isIncluded. First operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) Second operand 4606 states. [2022-04-28 08:35:54,967 INFO L87 Difference]: Start difference. First operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) Second operand 4606 states. [2022-04-28 08:35:55,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:35:55,574 INFO L93 Difference]: Finished difference Result 4606 states and 6629 transitions. [2022-04-28 08:35:55,574 INFO L276 IsEmpty]: Start isEmpty. Operand 4606 states and 6629 transitions. [2022-04-28 08:35:55,581 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:35:55,582 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:35:55,582 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:35:55,582 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:35:55,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-28 08:35:56,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4521 states to 4521 states and 6531 transitions. [2022-04-28 08:35:56,686 INFO L78 Accepts]: Start accepts. Automaton has 4521 states and 6531 transitions. Word has length 51 [2022-04-28 08:35:56,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:35:56,686 INFO L495 AbstractCegarLoop]: Abstraction has 4521 states and 6531 transitions. [2022-04-28 08:35:56,686 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-28 08:35:56,686 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4521 states and 6531 transitions. [2022-04-28 08:36:16,549 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6531 edges. 6531 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:36:16,549 INFO L276 IsEmpty]: Start isEmpty. Operand 4521 states and 6531 transitions. [2022-04-28 08:36:16,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-28 08:36:16,550 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:36:16,550 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:36:16,571 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-28 08:36:16,751 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:36:16,751 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:36:16,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:36:16,752 INFO L85 PathProgramCache]: Analyzing trace with hash 111621356, now seen corresponding path program 1 times [2022-04-28 08:36:16,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:36:16,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [616183067] [2022-04-28 08:36:16,757 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:36:16,757 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:36:16,757 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:36:16,757 INFO L85 PathProgramCache]: Analyzing trace with hash 111621356, now seen corresponding path program 2 times [2022-04-28 08:36:16,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:36:16,757 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564125300] [2022-04-28 08:36:16,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:36:16,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:36:16,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:36:16,975 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:36:16,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:36:16,993 INFO L290 TraceCheckUtils]: 0: Hoare triple {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-28 08:36:16,993 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:16,993 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-28 08:36:17,013 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:36:17,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:36:17,021 INFO L290 TraceCheckUtils]: 0: Hoare triple {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-28 08:36:17,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,021 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168186#false} #6457#return; {168186#false} is VALID [2022-04-28 08:36:17,033 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:36:17,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:36:17,045 INFO L290 TraceCheckUtils]: 0: Hoare triple {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-28 08:36:17,045 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,045 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168186#false} #6459#return; {168186#false} is VALID [2022-04-28 08:36:17,055 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-28 08:36:17,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:36:17,076 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-04-28 08:36:17,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:36:17,084 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:36:17,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:36:17,090 INFO L290 TraceCheckUtils]: 0: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-28 08:36:17,090 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-28 08:36:17,090 INFO L290 TraceCheckUtils]: 0: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L272 TraceCheckUtils]: 1: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:36:17,091 INFO L290 TraceCheckUtils]: 2: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L290 TraceCheckUtils]: 3: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L290 TraceCheckUtils]: 4: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L290 TraceCheckUtils]: 6: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L290 TraceCheckUtils]: 0: Hoare triple {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-28 08:36:17,091 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-28 08:36:17,092 INFO L272 TraceCheckUtils]: 3: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:36:17,092 INFO L290 TraceCheckUtils]: 4: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,093 INFO L272 TraceCheckUtils]: 5: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:36:17,093 INFO L290 TraceCheckUtils]: 6: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,093 INFO L290 TraceCheckUtils]: 7: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-28 08:36:17,093 INFO L290 TraceCheckUtils]: 8: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,093 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-28 08:36:17,093 INFO L290 TraceCheckUtils]: 10: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,093 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-28 08:36:17,093 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} #res := 0; {168185#true} is VALID [2022-04-28 08:36:17,103 INFO L290 TraceCheckUtils]: 13: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,103 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {168185#true} {168186#false} #6469#return; {168186#false} is VALID [2022-04-28 08:36:17,115 INFO L272 TraceCheckUtils]: 0: Hoare triple {168185#true} call ULTIMATE.init(); {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:36:17,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-28 08:36:17,116 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,116 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-28 08:36:17,116 INFO L272 TraceCheckUtils]: 4: Hoare triple {168185#true} call #t~ret1155 := main(); {168185#true} is VALID [2022-04-28 08:36:17,116 INFO L290 TraceCheckUtils]: 5: Hoare triple {168185#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {168190#(= main_~i~24 0)} is VALID [2022-04-28 08:36:17,116 INFO L290 TraceCheckUtils]: 6: Hoare triple {168190#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {168190#(= main_~i~24 0)} is VALID [2022-04-28 08:36:17,117 INFO L290 TraceCheckUtils]: 7: Hoare triple {168190#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {168191#(<= main_~i~24 1)} is VALID [2022-04-28 08:36:17,117 INFO L290 TraceCheckUtils]: 8: Hoare triple {168191#(<= main_~i~24 1)} assume !(~i~24 < 4); {168186#false} is VALID [2022-04-28 08:36:17,117 INFO L290 TraceCheckUtils]: 9: Hoare triple {168186#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {168186#false} is VALID [2022-04-28 08:36:17,117 INFO L272 TraceCheckUtils]: 10: Hoare triple {168186#false} call _BLAST_init(); {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:36:17,117 INFO L290 TraceCheckUtils]: 11: Hoare triple {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-28 08:36:17,117 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,118 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {168185#true} {168186#false} #6457#return; {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 14: Hoare triple {168186#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 15: Hoare triple {168186#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L272 TraceCheckUtils]: 16: Hoare triple {168186#false} call stub_driver_init(); {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 17: Hoare triple {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 18: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,118 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {168185#true} {168186#false} #6459#return; {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 20: Hoare triple {168186#false} assume !!(~status~31 >= 0); {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 21: Hoare triple {168186#false} assume !(0 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 22: Hoare triple {168186#false} assume !(1 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 23: Hoare triple {168186#false} assume !(3 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 24: Hoare triple {168186#false} assume !(4 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L290 TraceCheckUtils]: 25: Hoare triple {168186#false} assume 5 == ~__BLAST_NONDET~3; {168186#false} is VALID [2022-04-28 08:36:17,118 INFO L272 TraceCheckUtils]: 26: Hoare triple {168186#false} call #t~ret1113 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:36:17,119 INFO L290 TraceCheckUtils]: 27: Hoare triple {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-28 08:36:17,119 INFO L290 TraceCheckUtils]: 28: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-28 08:36:17,119 INFO L290 TraceCheckUtils]: 29: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-28 08:36:17,119 INFO L272 TraceCheckUtils]: 30: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:36:17,119 INFO L290 TraceCheckUtils]: 31: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,120 INFO L272 TraceCheckUtils]: 32: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:36:17,120 INFO L290 TraceCheckUtils]: 33: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,120 INFO L290 TraceCheckUtils]: 34: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-28 08:36:17,120 INFO L290 TraceCheckUtils]: 35: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,120 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-28 08:36:17,120 INFO L290 TraceCheckUtils]: 37: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,120 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-28 08:36:17,120 INFO L290 TraceCheckUtils]: 39: Hoare triple {168185#true} #res := 0; {168185#true} is VALID [2022-04-28 08:36:17,120 INFO L290 TraceCheckUtils]: 40: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,121 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {168185#true} {168186#false} #6469#return; {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 42: Hoare triple {168186#false} assume -2147483648 <= #t~ret1113 && #t~ret1113 <= 2147483647;~status~31 := #t~ret1113;havoc #t~ret1113; {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 43: Hoare triple {168186#false} assume !(0 != ~we_should_unload~0); {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 44: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 45: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 46: Hoare triple {168186#false} assume !(~s~0 == ~UNLOADED~0); {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 47: Hoare triple {168186#false} assume !(-1 == ~status~31); {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 48: Hoare triple {168186#false} assume !(~s~0 != ~SKIP2~0); {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 49: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 50: Hoare triple {168186#false} assume ~s~0 == ~DC~0; {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 51: Hoare triple {168186#false} assume 259 == ~status~31; {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L272 TraceCheckUtils]: 52: Hoare triple {168186#false} call errorFn(); {168186#false} is VALID [2022-04-28 08:36:17,121 INFO L290 TraceCheckUtils]: 53: Hoare triple {168186#false} assume !false; {168186#false} is VALID [2022-04-28 08:36:17,122 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:36:17,122 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:36:17,122 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564125300] [2022-04-28 08:36:17,122 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564125300] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:36:17,122 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1098270739] [2022-04-28 08:36:17,122 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:36:17,122 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:36:17,122 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:36:17,123 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:36:17,124 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-28 08:36:17,776 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:36:17,776 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:36:17,780 INFO L263 TraceCheckSpWp]: Trace formula consists of 1484 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-28 08:36:17,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:36:17,812 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:36:17,951 INFO L272 TraceCheckUtils]: 0: Hoare triple {168185#true} call ULTIMATE.init(); {168185#true} is VALID [2022-04-28 08:36:17,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-28 08:36:17,951 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,951 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-28 08:36:17,951 INFO L272 TraceCheckUtils]: 4: Hoare triple {168185#true} call #t~ret1155 := main(); {168185#true} is VALID [2022-04-28 08:36:17,951 INFO L290 TraceCheckUtils]: 5: Hoare triple {168185#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {168185#true} is VALID [2022-04-28 08:36:17,951 INFO L290 TraceCheckUtils]: 6: Hoare triple {168185#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {168185#true} is VALID [2022-04-28 08:36:17,951 INFO L290 TraceCheckUtils]: 7: Hoare triple {168185#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L290 TraceCheckUtils]: 8: Hoare triple {168185#true} assume !(~i~24 < 4); {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L290 TraceCheckUtils]: 9: Hoare triple {168185#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L272 TraceCheckUtils]: 10: Hoare triple {168185#true} call _BLAST_init(); {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L290 TraceCheckUtils]: 11: Hoare triple {168185#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {168185#true} {168185#true} #6457#return; {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L290 TraceCheckUtils]: 14: Hoare triple {168185#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L290 TraceCheckUtils]: 15: Hoare triple {168185#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {168185#true} is VALID [2022-04-28 08:36:17,952 INFO L272 TraceCheckUtils]: 16: Hoare triple {168185#true} call stub_driver_init(); {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L290 TraceCheckUtils]: 17: Hoare triple {168185#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L290 TraceCheckUtils]: 18: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {168185#true} {168185#true} #6459#return; {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L290 TraceCheckUtils]: 20: Hoare triple {168185#true} assume !!(~status~31 >= 0); {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L290 TraceCheckUtils]: 21: Hoare triple {168185#true} assume !(0 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L290 TraceCheckUtils]: 22: Hoare triple {168185#true} assume !(1 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L290 TraceCheckUtils]: 23: Hoare triple {168185#true} assume !(3 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L290 TraceCheckUtils]: 24: Hoare triple {168185#true} assume !(4 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-28 08:36:17,953 INFO L290 TraceCheckUtils]: 25: Hoare triple {168185#true} assume 5 == ~__BLAST_NONDET~3; {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L272 TraceCheckUtils]: 26: Hoare triple {168185#true} call #t~ret1113 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L290 TraceCheckUtils]: 27: Hoare triple {168185#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L290 TraceCheckUtils]: 28: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L290 TraceCheckUtils]: 29: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L272 TraceCheckUtils]: 30: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L290 TraceCheckUtils]: 31: Hoare triple {168185#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L272 TraceCheckUtils]: 32: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L290 TraceCheckUtils]: 33: Hoare triple {168185#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-28 08:36:17,954 INFO L290 TraceCheckUtils]: 34: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-28 08:36:17,955 INFO L290 TraceCheckUtils]: 35: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,955 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-28 08:36:17,955 INFO L290 TraceCheckUtils]: 37: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-28 08:36:17,955 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-28 08:36:17,955 INFO L290 TraceCheckUtils]: 39: Hoare triple {168185#true} #res := 0; {168350#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-28 08:36:17,955 INFO L290 TraceCheckUtils]: 40: Hoare triple {168350#(<= |PptDispatchCleanup_#res| 0)} assume true; {168350#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-28 08:36:17,956 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {168350#(<= |PptDispatchCleanup_#res| 0)} {168185#true} #6469#return; {168357#(<= |main_#t~ret1113| 0)} is VALID [2022-04-28 08:36:17,957 INFO L290 TraceCheckUtils]: 42: Hoare triple {168357#(<= |main_#t~ret1113| 0)} assume -2147483648 <= #t~ret1113 && #t~ret1113 <= 2147483647;~status~31 := #t~ret1113;havoc #t~ret1113; {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,957 INFO L290 TraceCheckUtils]: 43: Hoare triple {168361#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,957 INFO L290 TraceCheckUtils]: 44: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,957 INFO L290 TraceCheckUtils]: 45: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,958 INFO L290 TraceCheckUtils]: 46: Hoare triple {168361#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,958 INFO L290 TraceCheckUtils]: 47: Hoare triple {168361#(<= main_~status~31 0)} assume !(-1 == ~status~31); {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,958 INFO L290 TraceCheckUtils]: 48: Hoare triple {168361#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,959 INFO L290 TraceCheckUtils]: 49: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,959 INFO L290 TraceCheckUtils]: 50: Hoare triple {168361#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {168361#(<= main_~status~31 0)} is VALID [2022-04-28 08:36:17,959 INFO L290 TraceCheckUtils]: 51: Hoare triple {168361#(<= main_~status~31 0)} assume 259 == ~status~31; {168186#false} is VALID [2022-04-28 08:36:17,959 INFO L272 TraceCheckUtils]: 52: Hoare triple {168186#false} call errorFn(); {168186#false} is VALID [2022-04-28 08:36:17,959 INFO L290 TraceCheckUtils]: 53: Hoare triple {168186#false} assume !false; {168186#false} is VALID [2022-04-28 08:36:17,959 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:36:17,960 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:36:17,960 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1098270739] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:36:17,960 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:36:17,960 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-28 08:36:17,960 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:36:17,960 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [616183067] [2022-04-28 08:36:17,960 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [616183067] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:36:17,960 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:36:17,960 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 08:36:17,960 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388214842] [2022-04-28 08:36:17,960 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:36:17,961 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 54 [2022-04-28 08:36:17,961 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:36:17,961 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:36:18,010 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:36:18,010 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-28 08:36:18,010 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:36:18,010 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-28 08:36:18,010 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-28 08:36:18,010 INFO L87 Difference]: Start difference. First operand 4521 states and 6531 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:36:54,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:36:54,645 INFO L93 Difference]: Finished difference Result 4536 states and 6549 transitions. [2022-04-28 08:36:54,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-28 08:36:54,645 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 54 [2022-04-28 08:36:54,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:36:54,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:36:54,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2816 transitions. [2022-04-28 08:36:54,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:36:54,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2816 transitions. [2022-04-28 08:36:54,869 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2816 transitions. [2022-04-28 08:36:57,209 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2816 edges. 2816 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:36:58,239 INFO L225 Difference]: With dead ends: 4536 [2022-04-28 08:36:58,240 INFO L226 Difference]: Without dead ends: 4519 [2022-04-28 08:36:58,241 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-28 08:36:58,241 INFO L413 NwaCegarLoop]: 2811 mSDtfsCounter, 5 mSDsluCounter, 8402 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11213 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 08:36:58,242 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 11213 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 08:36:58,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4519 states. [2022-04-28 08:36:59,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4519 to 4519. [2022-04-28 08:36:59,021 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:36:59,027 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-28 08:36:59,031 INFO L74 IsIncluded]: Start isIncluded. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-28 08:36:59,035 INFO L87 Difference]: Start difference. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-28 08:36:59,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:36:59,627 INFO L93 Difference]: Finished difference Result 4519 states and 6527 transitions. [2022-04-28 08:36:59,627 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-28 08:36:59,634 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:36:59,634 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:36:59,640 INFO L74 IsIncluded]: Start isIncluded. First operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4519 states. [2022-04-28 08:36:59,644 INFO L87 Difference]: Start difference. First operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4519 states. [2022-04-28 08:37:00,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:37:00,252 INFO L93 Difference]: Finished difference Result 4519 states and 6527 transitions. [2022-04-28 08:37:00,252 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-28 08:37:00,259 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:37:00,259 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:37:00,259 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:37:00,259 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:37:00,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-28 08:37:01,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4519 states to 4519 states and 6527 transitions. [2022-04-28 08:37:01,285 INFO L78 Accepts]: Start accepts. Automaton has 4519 states and 6527 transitions. Word has length 54 [2022-04-28 08:37:01,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:37:01,285 INFO L495 AbstractCegarLoop]: Abstraction has 4519 states and 6527 transitions. [2022-04-28 08:37:01,285 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:37:01,285 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4519 states and 6527 transitions. [2022-04-28 08:37:21,239 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6527 edges. 6527 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:37:21,240 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-28 08:37:21,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-04-28 08:37:21,241 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:37:21,241 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:37:21,266 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-28 08:37:21,441 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:37:21,442 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:37:21,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:37:21,442 INFO L85 PathProgramCache]: Analyzing trace with hash -851908546, now seen corresponding path program 1 times [2022-04-28 08:37:21,443 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:37:21,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [926091092] [2022-04-28 08:37:21,449 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:37:21,449 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:37:21,449 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:37:21,449 INFO L85 PathProgramCache]: Analyzing trace with hash -851908546, now seen corresponding path program 2 times [2022-04-28 08:37:21,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:37:21,449 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047603965] [2022-04-28 08:37:21,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:37:21,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:37:21,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:37:21,693 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:37:21,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:37:21,710 INFO L290 TraceCheckUtils]: 0: Hoare triple {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-28 08:37:21,710 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:21,710 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-28 08:37:21,738 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:37:21,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:37:21,746 INFO L290 TraceCheckUtils]: 0: Hoare triple {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-28 08:37:21,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:21,747 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195543#false} #6457#return; {195543#false} is VALID [2022-04-28 08:37:21,763 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:37:21,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:37:21,771 INFO L290 TraceCheckUtils]: 0: Hoare triple {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-28 08:37:21,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:21,771 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195543#false} #6459#return; {195543#false} is VALID [2022-04-28 08:37:21,772 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-28 08:37:21,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:37:21,780 INFO L290 TraceCheckUtils]: 0: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-28 08:37:21,780 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-28 08:37:21,780 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-28 08:37:21,780 INFO L290 TraceCheckUtils]: 3: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:21,780 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {195542#true} {195543#false} #5849#return; {195543#false} is VALID [2022-04-28 08:37:21,783 INFO L272 TraceCheckUtils]: 0: Hoare triple {195542#true} call ULTIMATE.init(); {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:37:21,783 INFO L290 TraceCheckUtils]: 1: Hoare triple {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-28 08:37:21,783 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:21,783 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-28 08:37:21,784 INFO L272 TraceCheckUtils]: 4: Hoare triple {195542#true} call #t~ret1155 := main(); {195542#true} is VALID [2022-04-28 08:37:21,784 INFO L290 TraceCheckUtils]: 5: Hoare triple {195542#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {195547#(= main_~i~24 0)} is VALID [2022-04-28 08:37:21,784 INFO L290 TraceCheckUtils]: 6: Hoare triple {195547#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {195547#(= main_~i~24 0)} is VALID [2022-04-28 08:37:21,784 INFO L290 TraceCheckUtils]: 7: Hoare triple {195547#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {195548#(<= main_~i~24 1)} is VALID [2022-04-28 08:37:21,785 INFO L290 TraceCheckUtils]: 8: Hoare triple {195548#(<= main_~i~24 1)} assume !(~i~24 < 4); {195543#false} is VALID [2022-04-28 08:37:21,785 INFO L290 TraceCheckUtils]: 9: Hoare triple {195543#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {195543#false} is VALID [2022-04-28 08:37:21,785 INFO L272 TraceCheckUtils]: 10: Hoare triple {195543#false} call _BLAST_init(); {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:37:21,785 INFO L290 TraceCheckUtils]: 11: Hoare triple {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-28 08:37:21,785 INFO L290 TraceCheckUtils]: 12: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:21,785 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {195542#true} {195543#false} #6457#return; {195543#false} is VALID [2022-04-28 08:37:21,785 INFO L290 TraceCheckUtils]: 14: Hoare triple {195543#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {195543#false} is VALID [2022-04-28 08:37:21,785 INFO L290 TraceCheckUtils]: 15: Hoare triple {195543#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {195543#false} is VALID [2022-04-28 08:37:21,785 INFO L272 TraceCheckUtils]: 16: Hoare triple {195543#false} call stub_driver_init(); {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 17: Hoare triple {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 18: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:21,786 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {195542#true} {195543#false} #6459#return; {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 20: Hoare triple {195543#false} assume !!(~status~31 >= 0); {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 21: Hoare triple {195543#false} assume !(0 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 22: Hoare triple {195543#false} assume !(1 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 23: Hoare triple {195543#false} assume !(3 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 24: Hoare triple {195543#false} assume !(4 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 25: Hoare triple {195543#false} assume !(5 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 26: Hoare triple {195543#false} assume 6 == ~__BLAST_NONDET~3; {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L272 TraceCheckUtils]: 27: Hoare triple {195543#false} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 28: Hoare triple {195543#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {195543#false} is VALID [2022-04-28 08:37:21,786 INFO L272 TraceCheckUtils]: 29: Hoare triple {195543#false} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {195542#true} is VALID [2022-04-28 08:37:21,786 INFO L290 TraceCheckUtils]: 30: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 31: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 32: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 33: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:21,787 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {195542#true} {195543#false} #5849#return; {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 35: Hoare triple {195543#false} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 36: Hoare triple {195543#false} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 37: Hoare triple {195543#false} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 38: Hoare triple {195543#false} assume 3 == #t~mem1080;havoc #t~mem1080; {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 39: Hoare triple {195543#false} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 40: Hoare triple {195543#false} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L272 TraceCheckUtils]: 41: Hoare triple {195543#false} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 42: Hoare triple {195543#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 43: Hoare triple {195543#false} assume !(0 != ~compRegistered~0); {195543#false} is VALID [2022-04-28 08:37:21,787 INFO L290 TraceCheckUtils]: 44: Hoare triple {195543#false} assume 0 == ~__BLAST_NONDET~14; {195543#false} is VALID [2022-04-28 08:37:21,788 INFO L290 TraceCheckUtils]: 45: Hoare triple {195543#false} ~returnVal2~0 := 0; {195543#false} is VALID [2022-04-28 08:37:21,788 INFO L290 TraceCheckUtils]: 46: Hoare triple {195543#false} assume !(~s~0 == ~NP~0); {195543#false} is VALID [2022-04-28 08:37:21,788 INFO L290 TraceCheckUtils]: 47: Hoare triple {195543#false} assume !(~s~0 == ~MPR1~0); {195543#false} is VALID [2022-04-28 08:37:21,788 INFO L290 TraceCheckUtils]: 48: Hoare triple {195543#false} assume !(~s~0 == ~SKIP1~0); {195543#false} is VALID [2022-04-28 08:37:21,788 INFO L272 TraceCheckUtils]: 49: Hoare triple {195543#false} call errorFn(); {195543#false} is VALID [2022-04-28 08:37:21,788 INFO L290 TraceCheckUtils]: 50: Hoare triple {195543#false} assume !false; {195543#false} is VALID [2022-04-28 08:37:21,788 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:37:21,788 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:37:21,788 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047603965] [2022-04-28 08:37:21,788 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1047603965] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:37:21,788 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1456214276] [2022-04-28 08:37:21,789 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:37:21,789 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:37:21,789 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:37:21,790 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:37:21,835 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-28 08:37:22,561 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:37:22,561 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:37:22,565 INFO L263 TraceCheckSpWp]: Trace formula consists of 1576 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-28 08:37:22,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:37:22,598 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:37:22,694 INFO L272 TraceCheckUtils]: 0: Hoare triple {195542#true} call ULTIMATE.init(); {195542#true} is VALID [2022-04-28 08:37:22,694 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-28 08:37:22,694 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:22,694 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-28 08:37:22,694 INFO L272 TraceCheckUtils]: 4: Hoare triple {195542#true} call #t~ret1155 := main(); {195542#true} is VALID [2022-04-28 08:37:22,694 INFO L290 TraceCheckUtils]: 5: Hoare triple {195542#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {195542#true} is VALID [2022-04-28 08:37:22,694 INFO L290 TraceCheckUtils]: 6: Hoare triple {195542#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 7: Hoare triple {195542#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 8: Hoare triple {195542#true} assume !(~i~24 < 4); {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 9: Hoare triple {195542#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L272 TraceCheckUtils]: 10: Hoare triple {195542#true} call _BLAST_init(); {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 11: Hoare triple {195542#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 12: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {195542#true} {195542#true} #6457#return; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 14: Hoare triple {195542#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 15: Hoare triple {195542#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L272 TraceCheckUtils]: 16: Hoare triple {195542#true} call stub_driver_init(); {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 17: Hoare triple {195542#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L290 TraceCheckUtils]: 18: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:22,695 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {195542#true} {195542#true} #6459#return; {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 20: Hoare triple {195542#true} assume !!(~status~31 >= 0); {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 21: Hoare triple {195542#true} assume !(0 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 22: Hoare triple {195542#true} assume !(1 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 23: Hoare triple {195542#true} assume !(3 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 24: Hoare triple {195542#true} assume !(4 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 25: Hoare triple {195542#true} assume !(5 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 26: Hoare triple {195542#true} assume 6 == ~__BLAST_NONDET~3; {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L272 TraceCheckUtils]: 27: Hoare triple {195542#true} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 28: Hoare triple {195542#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L272 TraceCheckUtils]: 29: Hoare triple {195542#true} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 30: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 31: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-28 08:37:22,696 INFO L290 TraceCheckUtils]: 32: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-28 08:37:22,697 INFO L290 TraceCheckUtils]: 33: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-28 08:37:22,697 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {195542#true} {195542#true} #5849#return; {195542#true} is VALID [2022-04-28 08:37:22,697 INFO L290 TraceCheckUtils]: 35: Hoare triple {195542#true} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-28 08:37:22,697 INFO L290 TraceCheckUtils]: 36: Hoare triple {195542#true} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-28 08:37:22,697 INFO L290 TraceCheckUtils]: 37: Hoare triple {195542#true} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-28 08:37:22,697 INFO L290 TraceCheckUtils]: 38: Hoare triple {195542#true} assume 3 == #t~mem1080;havoc #t~mem1080; {195542#true} is VALID [2022-04-28 08:37:22,697 INFO L290 TraceCheckUtils]: 39: Hoare triple {195542#true} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,698 INFO L290 TraceCheckUtils]: 40: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,699 INFO L272 TraceCheckUtils]: 41: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,699 INFO L290 TraceCheckUtils]: 42: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,699 INFO L290 TraceCheckUtils]: 43: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(0 != ~compRegistered~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,700 INFO L290 TraceCheckUtils]: 44: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume 0 == ~__BLAST_NONDET~14; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,700 INFO L290 TraceCheckUtils]: 45: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} ~returnVal2~0 := 0; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,700 INFO L290 TraceCheckUtils]: 46: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~NP~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,700 INFO L290 TraceCheckUtils]: 47: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~MPR1~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-28 08:37:22,701 INFO L290 TraceCheckUtils]: 48: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~SKIP1~0); {195543#false} is VALID [2022-04-28 08:37:22,701 INFO L272 TraceCheckUtils]: 49: Hoare triple {195543#false} call errorFn(); {195543#false} is VALID [2022-04-28 08:37:22,701 INFO L290 TraceCheckUtils]: 50: Hoare triple {195543#false} assume !false; {195543#false} is VALID [2022-04-28 08:37:22,701 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:37:22,701 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:37:22,701 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1456214276] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:37:22,701 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:37:22,701 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-28 08:37:22,702 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:37:22,702 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [926091092] [2022-04-28 08:37:22,702 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [926091092] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:37:22,702 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:37:22,702 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-28 08:37:22,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2006913633] [2022-04-28 08:37:22,702 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:37:22,702 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 51 [2022-04-28 08:37:22,702 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:37:22,703 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-28 08:37:22,751 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:37:22,751 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-28 08:37:22,751 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:37:22,752 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-28 08:37:22,752 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-28 08:37:22,754 INFO L87 Difference]: Start difference. First operand 4519 states and 6527 transitions. Second operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-28 08:37:42,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:37:42,994 INFO L93 Difference]: Finished difference Result 4533 states and 6545 transitions. [2022-04-28 08:37:42,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-28 08:37:42,995 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 51 [2022-04-28 08:37:42,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:37:42,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-28 08:37:43,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2831 transitions. [2022-04-28 08:37:43,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-28 08:37:43,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2831 transitions. [2022-04-28 08:37:43,206 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2831 transitions. [2022-04-28 08:37:45,654 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2831 edges. 2831 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:37:46,603 INFO L225 Difference]: With dead ends: 4533 [2022-04-28 08:37:46,604 INFO L226 Difference]: Without dead ends: 4530 [2022-04-28 08:37:46,605 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-28 08:37:46,609 INFO L413 NwaCegarLoop]: 2791 mSDtfsCounter, 33 mSDsluCounter, 2726 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 5517 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 08:37:46,609 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 5517 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 08:37:46,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4530 states. [2022-04-28 08:37:47,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4530 to 4527. [2022-04-28 08:37:47,381 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:37:47,386 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-28 08:37:47,389 INFO L74 IsIncluded]: Start isIncluded. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-28 08:37:47,393 INFO L87 Difference]: Start difference. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-28 08:37:47,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:37:47,995 INFO L93 Difference]: Finished difference Result 4530 states and 6542 transitions. [2022-04-28 08:37:47,995 INFO L276 IsEmpty]: Start isEmpty. Operand 4530 states and 6542 transitions. [2022-04-28 08:37:48,001 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:37:48,001 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:37:48,007 INFO L74 IsIncluded]: Start isIncluded. First operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4530 states. [2022-04-28 08:37:48,011 INFO L87 Difference]: Start difference. First operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4530 states. [2022-04-28 08:37:48,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:37:48,629 INFO L93 Difference]: Finished difference Result 4530 states and 6542 transitions. [2022-04-28 08:37:48,629 INFO L276 IsEmpty]: Start isEmpty. Operand 4530 states and 6542 transitions. [2022-04-28 08:37:48,636 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:37:48,636 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:37:48,636 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:37:48,636 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:37:48,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-28 08:37:49,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4527 states to 4527 states and 6539 transitions. [2022-04-28 08:37:49,703 INFO L78 Accepts]: Start accepts. Automaton has 4527 states and 6539 transitions. Word has length 51 [2022-04-28 08:37:49,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:37:49,703 INFO L495 AbstractCegarLoop]: Abstraction has 4527 states and 6539 transitions. [2022-04-28 08:37:49,703 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-28 08:37:49,703 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4527 states and 6539 transitions. [2022-04-28 08:38:09,114 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6539 edges. 6539 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:38:09,115 INFO L276 IsEmpty]: Start isEmpty. Operand 4527 states and 6539 transitions. [2022-04-28 08:38:09,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-28 08:38:09,116 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:38:09,116 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:38:09,136 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-04-28 08:38:09,316 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2022-04-28 08:38:09,316 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:38:09,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:38:09,317 INFO L85 PathProgramCache]: Analyzing trace with hash -1656471014, now seen corresponding path program 1 times [2022-04-28 08:38:09,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:38:09,317 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [885753114] [2022-04-28 08:38:09,322 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:38:09,322 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:38:09,322 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:38:09,322 INFO L85 PathProgramCache]: Analyzing trace with hash -1656471014, now seen corresponding path program 2 times [2022-04-28 08:38:09,322 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:38:09,323 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224910424] [2022-04-28 08:38:09,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:38:09,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:38:09,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,549 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:38:09,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,565 INFO L290 TraceCheckUtils]: 0: Hoare triple {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-28 08:38:09,565 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,565 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-28 08:38:09,593 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:38:09,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,604 INFO L290 TraceCheckUtils]: 0: Hoare triple {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-28 08:38:09,604 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,604 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222897#false} #6457#return; {222897#false} is VALID [2022-04-28 08:38:09,620 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:38:09,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,627 INFO L290 TraceCheckUtils]: 0: Hoare triple {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-28 08:38:09,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,628 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222897#false} #6459#return; {222897#false} is VALID [2022-04-28 08:38:09,628 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-28 08:38:09,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,637 INFO L290 TraceCheckUtils]: 0: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-28 08:38:09,638 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-28 08:38:09,638 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,638 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222897#false} #5941#return; {222897#false} is VALID [2022-04-28 08:38:09,650 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-28 08:38:09,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,705 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:38:09,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,745 INFO L290 TraceCheckUtils]: 0: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-28 08:38:09,746 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-28 08:38:09,746 INFO L290 TraceCheckUtils]: 2: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-28 08:38:09,747 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-28 08:38:09,747 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-28 08:38:09,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,801 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:38:09,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,808 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:38:09,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:09,815 INFO L290 TraceCheckUtils]: 0: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,815 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-28 08:38:09,815 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,815 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-28 08:38:09,815 INFO L290 TraceCheckUtils]: 0: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,815 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:38:09,816 INFO L290 TraceCheckUtils]: 2: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,816 INFO L290 TraceCheckUtils]: 3: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-28 08:38:09,816 INFO L290 TraceCheckUtils]: 4: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,816 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-28 08:38:09,816 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,816 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-28 08:38:09,816 INFO L290 TraceCheckUtils]: 0: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-28 08:38:09,817 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:38:09,817 INFO L290 TraceCheckUtils]: 2: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,817 INFO L272 TraceCheckUtils]: 3: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:38:09,817 INFO L290 TraceCheckUtils]: 4: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,817 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-28 08:38:09,817 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,817 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-28 08:38:09,818 INFO L290 TraceCheckUtils]: 8: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,818 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-28 08:38:09,818 INFO L290 TraceCheckUtils]: 10: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-28 08:38:09,818 INFO L290 TraceCheckUtils]: 11: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,818 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-28 08:38:09,818 INFO L290 TraceCheckUtils]: 0: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-28 08:38:09,818 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-28 08:38:09,818 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-28 08:38:09,818 INFO L290 TraceCheckUtils]: 3: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-28 08:38:09,819 INFO L290 TraceCheckUtils]: 4: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-28 08:38:09,819 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-28 08:38:09,820 INFO L290 TraceCheckUtils]: 6: Hoare triple {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} is VALID [2022-04-28 08:38:09,820 INFO L290 TraceCheckUtils]: 7: Hoare triple {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-28 08:38:09,820 INFO L272 TraceCheckUtils]: 8: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:38:09,820 INFO L290 TraceCheckUtils]: 9: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-28 08:38:09,821 INFO L272 TraceCheckUtils]: 10: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:38:09,821 INFO L290 TraceCheckUtils]: 11: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,821 INFO L272 TraceCheckUtils]: 12: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:38:09,821 INFO L290 TraceCheckUtils]: 13: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,821 INFO L290 TraceCheckUtils]: 14: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-28 08:38:09,821 INFO L290 TraceCheckUtils]: 15: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,822 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-28 08:38:09,822 INFO L290 TraceCheckUtils]: 17: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,822 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-28 08:38:09,822 INFO L290 TraceCheckUtils]: 19: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-28 08:38:09,822 INFO L290 TraceCheckUtils]: 20: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,822 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-28 08:38:09,822 INFO L290 TraceCheckUtils]: 22: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-28 08:38:09,822 INFO L290 TraceCheckUtils]: 23: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-28 08:38:09,822 INFO L290 TraceCheckUtils]: 24: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-28 08:38:09,822 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {222897#false} {222897#false} #5943#return; {222897#false} is VALID [2022-04-28 08:38:09,825 INFO L272 TraceCheckUtils]: 0: Hoare triple {222896#true} call ULTIMATE.init(); {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:38:09,825 INFO L290 TraceCheckUtils]: 1: Hoare triple {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-28 08:38:09,825 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,825 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-28 08:38:09,825 INFO L272 TraceCheckUtils]: 4: Hoare triple {222896#true} call #t~ret1155 := main(); {222896#true} is VALID [2022-04-28 08:38:09,825 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {222901#(= main_~i~24 0)} is VALID [2022-04-28 08:38:09,825 INFO L290 TraceCheckUtils]: 6: Hoare triple {222901#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {222901#(= main_~i~24 0)} is VALID [2022-04-28 08:38:09,826 INFO L290 TraceCheckUtils]: 7: Hoare triple {222901#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {222902#(<= main_~i~24 1)} is VALID [2022-04-28 08:38:09,826 INFO L290 TraceCheckUtils]: 8: Hoare triple {222902#(<= main_~i~24 1)} assume !(~i~24 < 4); {222897#false} is VALID [2022-04-28 08:38:09,826 INFO L290 TraceCheckUtils]: 9: Hoare triple {222897#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {222897#false} is VALID [2022-04-28 08:38:09,826 INFO L272 TraceCheckUtils]: 10: Hoare triple {222897#false} call _BLAST_init(); {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:38:09,826 INFO L290 TraceCheckUtils]: 11: Hoare triple {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-28 08:38:09,826 INFO L290 TraceCheckUtils]: 12: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,826 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {222896#true} {222897#false} #6457#return; {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 14: Hoare triple {222897#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 15: Hoare triple {222897#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L272 TraceCheckUtils]: 16: Hoare triple {222897#false} call stub_driver_init(); {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 17: Hoare triple {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 18: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,827 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {222896#true} {222897#false} #6459#return; {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 20: Hoare triple {222897#false} assume !!(~status~31 >= 0); {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 21: Hoare triple {222897#false} assume !(0 == ~__BLAST_NONDET~3); {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 22: Hoare triple {222897#false} assume !(1 == ~__BLAST_NONDET~3); {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 23: Hoare triple {222897#false} assume 3 == ~__BLAST_NONDET~3; {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 24: Hoare triple {222897#false} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L272 TraceCheckUtils]: 25: Hoare triple {222897#false} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {222897#false} is VALID [2022-04-28 08:38:09,827 INFO L290 TraceCheckUtils]: 26: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {222897#false} is VALID [2022-04-28 08:38:09,828 INFO L272 TraceCheckUtils]: 27: Hoare triple {222897#false} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-28 08:38:09,828 INFO L290 TraceCheckUtils]: 28: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-28 08:38:09,828 INFO L290 TraceCheckUtils]: 29: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-28 08:38:09,828 INFO L290 TraceCheckUtils]: 30: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,828 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {222896#true} {222897#false} #5941#return; {222897#false} is VALID [2022-04-28 08:38:09,828 INFO L272 TraceCheckUtils]: 32: Hoare triple {222897#false} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:38:09,828 INFO L290 TraceCheckUtils]: 33: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-28 08:38:09,828 INFO L272 TraceCheckUtils]: 34: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-28 08:38:09,828 INFO L290 TraceCheckUtils]: 35: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-28 08:38:09,828 INFO L290 TraceCheckUtils]: 36: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-28 08:38:09,829 INFO L290 TraceCheckUtils]: 37: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-28 08:38:09,829 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-28 08:38:09,830 INFO L290 TraceCheckUtils]: 39: Hoare triple {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} is VALID [2022-04-28 08:38:09,830 INFO L290 TraceCheckUtils]: 40: Hoare triple {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-28 08:38:09,830 INFO L272 TraceCheckUtils]: 41: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:38:09,830 INFO L290 TraceCheckUtils]: 42: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-28 08:38:09,831 INFO L272 TraceCheckUtils]: 43: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:38:09,831 INFO L290 TraceCheckUtils]: 44: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,831 INFO L272 TraceCheckUtils]: 45: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:38:09,831 INFO L290 TraceCheckUtils]: 46: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-28 08:38:09,831 INFO L290 TraceCheckUtils]: 47: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-28 08:38:09,831 INFO L290 TraceCheckUtils]: 48: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,831 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-28 08:38:09,831 INFO L290 TraceCheckUtils]: 50: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,832 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 52: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 53: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:09,832 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 55: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 56: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 57: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {222897#false} {222897#false} #5943#return; {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 59: Hoare triple {222897#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 60: Hoare triple {222897#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 61: Hoare triple {222897#false} assume ~minorFunction~0 % 256 > 24; {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L272 TraceCheckUtils]: 62: Hoare triple {222897#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-28 08:38:09,832 INFO L290 TraceCheckUtils]: 63: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {222897#false} is VALID [2022-04-28 08:38:09,833 INFO L272 TraceCheckUtils]: 64: Hoare triple {222897#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-28 08:38:09,833 INFO L290 TraceCheckUtils]: 65: Hoare triple {222897#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {222897#false} is VALID [2022-04-28 08:38:09,833 INFO L290 TraceCheckUtils]: 66: Hoare triple {222897#false} assume !(~s~0 == ~NP~0); {222897#false} is VALID [2022-04-28 08:38:09,833 INFO L272 TraceCheckUtils]: 67: Hoare triple {222897#false} call errorFn(); {222897#false} is VALID [2022-04-28 08:38:09,833 INFO L290 TraceCheckUtils]: 68: Hoare triple {222897#false} assume !false; {222897#false} is VALID [2022-04-28 08:38:09,833 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:38:09,833 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:38:09,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224910424] [2022-04-28 08:38:09,833 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1224910424] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:38:09,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [577962802] [2022-04-28 08:38:09,833 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:38:09,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:38:09,834 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:38:09,834 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:38:09,836 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-28 08:38:10,666 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:38:10,666 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:38:10,672 INFO L263 TraceCheckSpWp]: Trace formula consists of 1862 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-28 08:38:10,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:38:10,714 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:38:10,894 INFO L272 TraceCheckUtils]: 0: Hoare triple {222896#true} call ULTIMATE.init(); {222896#true} is VALID [2022-04-28 08:38:10,894 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-28 08:38:10,894 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L272 TraceCheckUtils]: 4: Hoare triple {222896#true} call #t~ret1155 := main(); {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L290 TraceCheckUtils]: 7: Hoare triple {222896#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L290 TraceCheckUtils]: 8: Hoare triple {222896#true} assume !(~i~24 < 4); {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L290 TraceCheckUtils]: 9: Hoare triple {222896#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L272 TraceCheckUtils]: 10: Hoare triple {222896#true} call _BLAST_init(); {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L290 TraceCheckUtils]: 11: Hoare triple {222896#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L290 TraceCheckUtils]: 12: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:10,895 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {222896#true} {222896#true} #6457#return; {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 14: Hoare triple {222896#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 15: Hoare triple {222896#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L272 TraceCheckUtils]: 16: Hoare triple {222896#true} call stub_driver_init(); {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 17: Hoare triple {222896#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 18: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {222896#true} {222896#true} #6459#return; {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 20: Hoare triple {222896#true} assume !!(~status~31 >= 0); {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 21: Hoare triple {222896#true} assume !(0 == ~__BLAST_NONDET~3); {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 22: Hoare triple {222896#true} assume !(1 == ~__BLAST_NONDET~3); {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 23: Hoare triple {222896#true} assume 3 == ~__BLAST_NONDET~3; {222896#true} is VALID [2022-04-28 08:38:10,896 INFO L290 TraceCheckUtils]: 24: Hoare triple {222896#true} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L272 TraceCheckUtils]: 25: Hoare triple {222896#true} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L290 TraceCheckUtils]: 26: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L272 TraceCheckUtils]: 27: Hoare triple {222896#true} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L290 TraceCheckUtils]: 28: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L290 TraceCheckUtils]: 29: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L290 TraceCheckUtils]: 30: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {222896#true} {222896#true} #5941#return; {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L272 TraceCheckUtils]: 32: Hoare triple {222896#true} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L290 TraceCheckUtils]: 33: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L272 TraceCheckUtils]: 34: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-28 08:38:10,897 INFO L290 TraceCheckUtils]: 35: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-28 08:38:10,898 INFO L290 TraceCheckUtils]: 36: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} is VALID [2022-04-28 08:38:10,899 INFO L290 TraceCheckUtils]: 37: Hoare triple {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} assume true; {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} is VALID [2022-04-28 08:38:10,900 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} {222896#true} #6705#return; {223094#(<= 0 |PptAcquireRemoveLockOrFailIrp_#t~ret905|)} is VALID [2022-04-28 08:38:10,900 INFO L290 TraceCheckUtils]: 39: Hoare triple {223094#(<= 0 |PptAcquireRemoveLockOrFailIrp_#t~ret905|)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {223098#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} is VALID [2022-04-28 08:38:10,901 INFO L290 TraceCheckUtils]: 40: Hoare triple {223098#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-28 08:38:10,901 INFO L272 TraceCheckUtils]: 41: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222897#false} is VALID [2022-04-28 08:38:10,901 INFO L290 TraceCheckUtils]: 42: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222897#false} is VALID [2022-04-28 08:38:10,901 INFO L272 TraceCheckUtils]: 43: Hoare triple {222897#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222897#false} is VALID [2022-04-28 08:38:10,901 INFO L290 TraceCheckUtils]: 44: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222897#false} is VALID [2022-04-28 08:38:10,901 INFO L272 TraceCheckUtils]: 45: Hoare triple {222897#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222897#false} is VALID [2022-04-28 08:38:10,901 INFO L290 TraceCheckUtils]: 46: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222897#false} is VALID [2022-04-28 08:38:10,901 INFO L290 TraceCheckUtils]: 47: Hoare triple {222897#false} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222897#false} is VALID [2022-04-28 08:38:10,901 INFO L290 TraceCheckUtils]: 48: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {222897#false} {222897#false} #6659#return; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 50: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {222897#false} {222897#false} #6455#return; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 52: Hoare triple {222897#false} #res := ~Status; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 53: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {222897#false} {222897#false} #6707#return; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 55: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 56: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 57: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {222897#false} {222896#true} #5943#return; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 59: Hoare triple {222897#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 60: Hoare triple {222897#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {222897#false} is VALID [2022-04-28 08:38:10,902 INFO L290 TraceCheckUtils]: 61: Hoare triple {222897#false} assume ~minorFunction~0 % 256 > 24; {222897#false} is VALID [2022-04-28 08:38:10,903 INFO L272 TraceCheckUtils]: 62: Hoare triple {222897#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-28 08:38:10,903 INFO L290 TraceCheckUtils]: 63: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {222897#false} is VALID [2022-04-28 08:38:10,903 INFO L272 TraceCheckUtils]: 64: Hoare triple {222897#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-28 08:38:10,903 INFO L290 TraceCheckUtils]: 65: Hoare triple {222897#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {222897#false} is VALID [2022-04-28 08:38:10,903 INFO L290 TraceCheckUtils]: 66: Hoare triple {222897#false} assume !(~s~0 == ~NP~0); {222897#false} is VALID [2022-04-28 08:38:10,903 INFO L272 TraceCheckUtils]: 67: Hoare triple {222897#false} call errorFn(); {222897#false} is VALID [2022-04-28 08:38:10,903 INFO L290 TraceCheckUtils]: 68: Hoare triple {222897#false} assume !false; {222897#false} is VALID [2022-04-28 08:38:10,903 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:38:10,903 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:38:10,903 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [577962802] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:38:10,903 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:38:10,904 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [12] total 15 [2022-04-28 08:38:10,904 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:38:10,904 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [885753114] [2022-04-28 08:38:10,904 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [885753114] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:38:10,904 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:38:10,904 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-28 08:38:10,904 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [155531029] [2022-04-28 08:38:10,904 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:38:10,904 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-28 08:38:10,905 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:38:10,905 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:38:10,981 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:38:10,981 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-28 08:38:10,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:38:10,982 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-28 08:38:10,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-28 08:38:10,982 INFO L87 Difference]: Start difference. First operand 4527 states and 6539 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:38:51,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:38:51,892 INFO L93 Difference]: Finished difference Result 8396 states and 12123 transitions. [2022-04-28 08:38:51,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-28 08:38:51,892 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-28 08:38:51,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:38:51,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:38:52,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5306 transitions. [2022-04-28 08:38:52,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:38:52,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5306 transitions. [2022-04-28 08:38:52,279 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 5306 transitions. [2022-04-28 08:38:56,928 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5306 edges. 5306 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:38:57,878 INFO L225 Difference]: With dead ends: 8396 [2022-04-28 08:38:57,878 INFO L226 Difference]: Without dead ends: 4531 [2022-04-28 08:38:57,885 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-28 08:38:57,886 INFO L413 NwaCegarLoop]: 2793 mSDtfsCounter, 3 mSDsluCounter, 8372 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 11165 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 08:38:57,886 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 11165 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 08:38:57,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4531 states. [2022-04-28 08:38:58,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4531 to 4531. [2022-04-28 08:38:58,662 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:38:58,667 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-28 08:38:58,671 INFO L74 IsIncluded]: Start isIncluded. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-28 08:38:58,674 INFO L87 Difference]: Start difference. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-28 08:38:59,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:38:59,252 INFO L93 Difference]: Finished difference Result 4531 states and 6544 transitions. [2022-04-28 08:38:59,252 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-28 08:38:59,258 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:38:59,258 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:38:59,264 INFO L74 IsIncluded]: Start isIncluded. First operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) Second operand 4531 states. [2022-04-28 08:38:59,267 INFO L87 Difference]: Start difference. First operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) Second operand 4531 states. [2022-04-28 08:38:59,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:38:59,849 INFO L93 Difference]: Finished difference Result 4531 states and 6544 transitions. [2022-04-28 08:38:59,849 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-28 08:38:59,855 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:38:59,855 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:38:59,855 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:38:59,855 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:38:59,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-28 08:39:00,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4531 states to 4531 states and 6544 transitions. [2022-04-28 08:39:00,888 INFO L78 Accepts]: Start accepts. Automaton has 4531 states and 6544 transitions. Word has length 69 [2022-04-28 08:39:00,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:39:00,889 INFO L495 AbstractCegarLoop]: Abstraction has 4531 states and 6544 transitions. [2022-04-28 08:39:00,889 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:39:00,889 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4531 states and 6544 transitions. [2022-04-28 08:39:20,644 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6544 edges. 6544 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:39:20,645 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-28 08:39:20,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-28 08:39:20,646 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:39:20,646 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:39:20,667 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-28 08:39:20,846 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-28 08:39:20,846 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:39:20,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:39:20,847 INFO L85 PathProgramCache]: Analyzing trace with hash 454819355, now seen corresponding path program 1 times [2022-04-28 08:39:20,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:39:20,847 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [601515416] [2022-04-28 08:39:20,856 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:39:20,856 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:39:20,856 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:39:20,856 INFO L85 PathProgramCache]: Analyzing trace with hash 454819355, now seen corresponding path program 2 times [2022-04-28 08:39:20,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:39:20,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561356531] [2022-04-28 08:39:20,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:39:20,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:39:20,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,071 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:39:21,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,088 INFO L290 TraceCheckUtils]: 0: Hoare triple {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-28 08:39:21,089 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,089 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-28 08:39:21,117 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:39:21,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,125 INFO L290 TraceCheckUtils]: 0: Hoare triple {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-28 08:39:21,125 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,125 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258102#false} #6457#return; {258102#false} is VALID [2022-04-28 08:39:21,142 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:39:21,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,150 INFO L290 TraceCheckUtils]: 0: Hoare triple {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-28 08:39:21,150 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,150 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258102#false} #6459#return; {258102#false} is VALID [2022-04-28 08:39:21,150 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-28 08:39:21,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,159 INFO L290 TraceCheckUtils]: 0: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-28 08:39:21,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-28 08:39:21,159 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,159 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258102#false} #5941#return; {258102#false} is VALID [2022-04-28 08:39:21,170 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-28 08:39:21,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,190 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:39:21,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,197 INFO L290 TraceCheckUtils]: 0: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-28 08:39:21,197 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-28 08:39:21,197 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,198 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-28 08:39:21,198 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-28 08:39:21,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,213 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:39:21,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,219 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:39:21,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:21,226 INFO L290 TraceCheckUtils]: 0: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,226 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-28 08:39:21,226 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,226 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-28 08:39:21,226 INFO L290 TraceCheckUtils]: 0: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,227 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:39:21,227 INFO L290 TraceCheckUtils]: 2: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,227 INFO L290 TraceCheckUtils]: 3: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-28 08:39:21,227 INFO L290 TraceCheckUtils]: 4: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,227 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-28 08:39:21,228 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,228 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-28 08:39:21,228 INFO L290 TraceCheckUtils]: 0: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-28 08:39:21,228 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:39:21,228 INFO L290 TraceCheckUtils]: 2: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,229 INFO L272 TraceCheckUtils]: 3: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:39:21,229 INFO L290 TraceCheckUtils]: 4: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,229 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-28 08:39:21,229 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,229 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-28 08:39:21,229 INFO L290 TraceCheckUtils]: 8: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,229 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-28 08:39:21,229 INFO L290 TraceCheckUtils]: 10: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L290 TraceCheckUtils]: 11: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L290 TraceCheckUtils]: 3: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L290 TraceCheckUtils]: 4: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258101#true} is VALID [2022-04-28 08:39:21,230 INFO L290 TraceCheckUtils]: 7: Hoare triple {258101#true} assume !(~status~23 >= 0); {258101#true} is VALID [2022-04-28 08:39:21,231 INFO L272 TraceCheckUtils]: 8: Hoare triple {258101#true} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:39:21,231 INFO L290 TraceCheckUtils]: 9: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-28 08:39:21,232 INFO L272 TraceCheckUtils]: 10: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:39:21,232 INFO L290 TraceCheckUtils]: 11: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,232 INFO L272 TraceCheckUtils]: 12: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:39:21,232 INFO L290 TraceCheckUtils]: 13: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,232 INFO L290 TraceCheckUtils]: 14: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-28 08:39:21,232 INFO L290 TraceCheckUtils]: 15: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L290 TraceCheckUtils]: 17: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L290 TraceCheckUtils]: 19: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L290 TraceCheckUtils]: 20: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L290 TraceCheckUtils]: 22: Hoare triple {258101#true} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L290 TraceCheckUtils]: 23: Hoare triple {258101#true} #res := ~status~23; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L290 TraceCheckUtils]: 24: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,233 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {258101#true} {258102#false} #5943#return; {258102#false} is VALID [2022-04-28 08:39:21,236 INFO L272 TraceCheckUtils]: 0: Hoare triple {258101#true} call ULTIMATE.init(); {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:39:21,236 INFO L290 TraceCheckUtils]: 1: Hoare triple {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-28 08:39:21,236 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,236 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-28 08:39:21,236 INFO L272 TraceCheckUtils]: 4: Hoare triple {258101#true} call #t~ret1155 := main(); {258101#true} is VALID [2022-04-28 08:39:21,237 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {258106#(= main_~i~24 0)} is VALID [2022-04-28 08:39:21,237 INFO L290 TraceCheckUtils]: 6: Hoare triple {258106#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {258106#(= main_~i~24 0)} is VALID [2022-04-28 08:39:21,237 INFO L290 TraceCheckUtils]: 7: Hoare triple {258106#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {258107#(<= main_~i~24 1)} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 8: Hoare triple {258107#(<= main_~i~24 1)} assume !(~i~24 < 4); {258102#false} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 9: Hoare triple {258102#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {258102#false} is VALID [2022-04-28 08:39:21,238 INFO L272 TraceCheckUtils]: 10: Hoare triple {258102#false} call _BLAST_init(); {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 11: Hoare triple {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 12: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,238 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {258101#true} {258102#false} #6457#return; {258102#false} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 14: Hoare triple {258102#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {258102#false} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 15: Hoare triple {258102#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {258102#false} is VALID [2022-04-28 08:39:21,238 INFO L272 TraceCheckUtils]: 16: Hoare triple {258102#false} call stub_driver_init(); {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 17: Hoare triple {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 18: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,238 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {258101#true} {258102#false} #6459#return; {258102#false} is VALID [2022-04-28 08:39:21,238 INFO L290 TraceCheckUtils]: 20: Hoare triple {258102#false} assume !!(~status~31 >= 0); {258102#false} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 21: Hoare triple {258102#false} assume !(0 == ~__BLAST_NONDET~3); {258102#false} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 22: Hoare triple {258102#false} assume !(1 == ~__BLAST_NONDET~3); {258102#false} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 23: Hoare triple {258102#false} assume 3 == ~__BLAST_NONDET~3; {258102#false} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 24: Hoare triple {258102#false} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {258102#false} is VALID [2022-04-28 08:39:21,239 INFO L272 TraceCheckUtils]: 25: Hoare triple {258102#false} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {258102#false} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 26: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {258102#false} is VALID [2022-04-28 08:39:21,239 INFO L272 TraceCheckUtils]: 27: Hoare triple {258102#false} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 28: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 29: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 30: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,239 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {258101#true} {258102#false} #5941#return; {258102#false} is VALID [2022-04-28 08:39:21,239 INFO L272 TraceCheckUtils]: 32: Hoare triple {258102#false} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:39:21,239 INFO L290 TraceCheckUtils]: 33: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-28 08:39:21,239 INFO L272 TraceCheckUtils]: 34: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-28 08:39:21,240 INFO L290 TraceCheckUtils]: 35: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-28 08:39:21,240 INFO L290 TraceCheckUtils]: 36: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-28 08:39:21,240 INFO L290 TraceCheckUtils]: 37: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,240 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-28 08:39:21,240 INFO L290 TraceCheckUtils]: 39: Hoare triple {258101#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258101#true} is VALID [2022-04-28 08:39:21,240 INFO L290 TraceCheckUtils]: 40: Hoare triple {258101#true} assume !(~status~23 >= 0); {258101#true} is VALID [2022-04-28 08:39:21,241 INFO L272 TraceCheckUtils]: 41: Hoare triple {258101#true} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:39:21,241 INFO L290 TraceCheckUtils]: 42: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-28 08:39:21,241 INFO L272 TraceCheckUtils]: 43: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:39:21,242 INFO L290 TraceCheckUtils]: 44: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,242 INFO L272 TraceCheckUtils]: 45: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:39:21,242 INFO L290 TraceCheckUtils]: 46: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:21,242 INFO L290 TraceCheckUtils]: 47: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-28 08:39:21,242 INFO L290 TraceCheckUtils]: 48: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 50: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 52: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 53: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 55: Hoare triple {258101#true} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 56: Hoare triple {258101#true} #res := ~status~23; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 57: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:21,243 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {258101#true} {258102#false} #5943#return; {258102#false} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 59: Hoare triple {258102#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {258102#false} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 60: Hoare triple {258102#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {258102#false} is VALID [2022-04-28 08:39:21,243 INFO L290 TraceCheckUtils]: 61: Hoare triple {258102#false} assume ~minorFunction~0 % 256 > 24; {258102#false} is VALID [2022-04-28 08:39:21,244 INFO L272 TraceCheckUtils]: 62: Hoare triple {258102#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-28 08:39:21,244 INFO L290 TraceCheckUtils]: 63: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {258102#false} is VALID [2022-04-28 08:39:21,244 INFO L272 TraceCheckUtils]: 64: Hoare triple {258102#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-28 08:39:21,244 INFO L290 TraceCheckUtils]: 65: Hoare triple {258102#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {258102#false} is VALID [2022-04-28 08:39:21,244 INFO L290 TraceCheckUtils]: 66: Hoare triple {258102#false} assume !(~s~0 == ~NP~0); {258102#false} is VALID [2022-04-28 08:39:21,244 INFO L272 TraceCheckUtils]: 67: Hoare triple {258102#false} call errorFn(); {258102#false} is VALID [2022-04-28 08:39:21,244 INFO L290 TraceCheckUtils]: 68: Hoare triple {258102#false} assume !false; {258102#false} is VALID [2022-04-28 08:39:21,244 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:39:21,244 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:39:21,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561356531] [2022-04-28 08:39:21,245 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1561356531] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:39:21,245 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1160940183] [2022-04-28 08:39:21,245 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:39:21,245 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:39:21,245 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:39:21,246 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:39:21,273 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-28 08:39:22,002 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:39:22,002 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:39:22,008 INFO L263 TraceCheckSpWp]: Trace formula consists of 1863 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-28 08:39:22,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:39:22,052 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:39:22,300 INFO L272 TraceCheckUtils]: 0: Hoare triple {258101#true} call ULTIMATE.init(); {258101#true} is VALID [2022-04-28 08:39:22,300 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-28 08:39:22,300 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:22,300 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-28 08:39:22,300 INFO L272 TraceCheckUtils]: 4: Hoare triple {258101#true} call #t~ret1155 := main(); {258101#true} is VALID [2022-04-28 08:39:22,300 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {258101#true} is VALID [2022-04-28 08:39:22,300 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {258101#true} is VALID [2022-04-28 08:39:22,300 INFO L290 TraceCheckUtils]: 7: Hoare triple {258101#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 8: Hoare triple {258101#true} assume !(~i~24 < 4); {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 9: Hoare triple {258101#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L272 TraceCheckUtils]: 10: Hoare triple {258101#true} call _BLAST_init(); {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 11: Hoare triple {258101#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 12: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {258101#true} {258101#true} #6457#return; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 14: Hoare triple {258101#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 15: Hoare triple {258101#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L272 TraceCheckUtils]: 16: Hoare triple {258101#true} call stub_driver_init(); {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 17: Hoare triple {258101#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 18: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {258101#true} {258101#true} #6459#return; {258101#true} is VALID [2022-04-28 08:39:22,301 INFO L290 TraceCheckUtils]: 20: Hoare triple {258101#true} assume !!(~status~31 >= 0); {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 21: Hoare triple {258101#true} assume !(0 == ~__BLAST_NONDET~3); {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 22: Hoare triple {258101#true} assume !(1 == ~__BLAST_NONDET~3); {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 23: Hoare triple {258101#true} assume 3 == ~__BLAST_NONDET~3; {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 24: Hoare triple {258101#true} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L272 TraceCheckUtils]: 25: Hoare triple {258101#true} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 26: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L272 TraceCheckUtils]: 27: Hoare triple {258101#true} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 28: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 29: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 30: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {258101#true} {258101#true} #5941#return; {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L272 TraceCheckUtils]: 32: Hoare triple {258101#true} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L290 TraceCheckUtils]: 33: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-28 08:39:22,302 INFO L272 TraceCheckUtils]: 34: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-28 08:39:22,303 INFO L290 TraceCheckUtils]: 35: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-28 08:39:22,303 INFO L290 TraceCheckUtils]: 36: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} is VALID [2022-04-28 08:39:22,303 INFO L290 TraceCheckUtils]: 37: Hoare triple {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} assume true; {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} is VALID [2022-04-28 08:39:22,304 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} {258101#true} #6705#return; {258296#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#t~ret905|) 0)} is VALID [2022-04-28 08:39:22,305 INFO L290 TraceCheckUtils]: 39: Hoare triple {258296#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#t~ret905|) 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-28 08:39:22,305 INFO L290 TraceCheckUtils]: 40: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} assume !(~status~23 >= 0); {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-28 08:39:22,305 INFO L272 TraceCheckUtils]: 41: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258101#true} is VALID [2022-04-28 08:39:22,305 INFO L290 TraceCheckUtils]: 42: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-28 08:39:22,305 INFO L272 TraceCheckUtils]: 43: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L290 TraceCheckUtils]: 44: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L272 TraceCheckUtils]: 45: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L290 TraceCheckUtils]: 46: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L290 TraceCheckUtils]: 47: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L290 TraceCheckUtils]: 48: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L290 TraceCheckUtils]: 50: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L290 TraceCheckUtils]: 52: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-28 08:39:22,306 INFO L290 TraceCheckUtils]: 53: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-28 08:39:22,307 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {258101#true} {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} #6707#return; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-28 08:39:22,307 INFO L290 TraceCheckUtils]: 55: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-28 08:39:22,307 INFO L290 TraceCheckUtils]: 56: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} #res := ~status~23; {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} is VALID [2022-04-28 08:39:22,308 INFO L290 TraceCheckUtils]: 57: Hoare triple {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} assume true; {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} is VALID [2022-04-28 08:39:22,309 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} {258101#true} #5943#return; {258359#(<= (+ 1073741738 |PptDispatchPnp_#t~ret599|) 0)} is VALID [2022-04-28 08:39:22,309 INFO L290 TraceCheckUtils]: 59: Hoare triple {258359#(<= (+ 1073741738 |PptDispatchPnp_#t~ret599|) 0)} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {258363#(<= (+ 1073741738 PptDispatchPnp_~status~11) 0)} is VALID [2022-04-28 08:39:22,310 INFO L290 TraceCheckUtils]: 60: Hoare triple {258363#(<= (+ 1073741738 PptDispatchPnp_~status~11) 0)} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L290 TraceCheckUtils]: 61: Hoare triple {258102#false} assume ~minorFunction~0 % 256 > 24; {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L272 TraceCheckUtils]: 62: Hoare triple {258102#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L290 TraceCheckUtils]: 63: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L272 TraceCheckUtils]: 64: Hoare triple {258102#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L290 TraceCheckUtils]: 65: Hoare triple {258102#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L290 TraceCheckUtils]: 66: Hoare triple {258102#false} assume !(~s~0 == ~NP~0); {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L272 TraceCheckUtils]: 67: Hoare triple {258102#false} call errorFn(); {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L290 TraceCheckUtils]: 68: Hoare triple {258102#false} assume !false; {258102#false} is VALID [2022-04-28 08:39:22,310 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:39:22,311 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:39:22,311 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1160940183] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:39:22,311 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:39:22,311 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-28 08:39:22,311 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:39:22,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [601515416] [2022-04-28 08:39:22,311 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [601515416] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:39:22,311 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:39:22,311 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-28 08:39:22,311 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1514480944] [2022-04-28 08:39:22,311 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:39:22,312 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-28 08:39:22,312 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:39:22,312 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:39:22,381 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:39:22,381 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-28 08:39:22,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:39:22,381 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-28 08:39:22,381 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2022-04-28 08:39:22,382 INFO L87 Difference]: Start difference. First operand 4531 states and 6544 transitions. Second operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:40:27,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:40:27,531 INFO L93 Difference]: Finished difference Result 7739 states and 11131 transitions. [2022-04-28 08:40:27,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-28 08:40:27,531 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-28 08:40:27,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:40:27,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:40:27,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 5302 transitions. [2022-04-28 08:40:27,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:40:27,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 5302 transitions. [2022-04-28 08:40:27,921 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 5302 transitions. [2022-04-28 08:40:32,871 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5302 edges. 5302 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:40:33,786 INFO L225 Difference]: With dead ends: 7739 [2022-04-28 08:40:33,787 INFO L226 Difference]: Without dead ends: 4406 [2022-04-28 08:40:33,794 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2022-04-28 08:40:33,794 INFO L413 NwaCegarLoop]: 2789 mSDtfsCounter, 5 mSDsluCounter, 16695 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 19484 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 08:40:33,794 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 19484 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 08:40:33,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4406 states. [2022-04-28 08:40:34,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4406 to 4403. [2022-04-28 08:40:34,535 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:40:34,540 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-28 08:40:34,544 INFO L74 IsIncluded]: Start isIncluded. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-28 08:40:34,547 INFO L87 Difference]: Start difference. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-28 08:40:35,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:40:35,125 INFO L93 Difference]: Finished difference Result 4406 states and 6325 transitions. [2022-04-28 08:40:35,125 INFO L276 IsEmpty]: Start isEmpty. Operand 4406 states and 6325 transitions. [2022-04-28 08:40:35,131 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:40:35,131 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:40:35,137 INFO L74 IsIncluded]: Start isIncluded. First operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) Second operand 4406 states. [2022-04-28 08:40:35,140 INFO L87 Difference]: Start difference. First operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) Second operand 4406 states. [2022-04-28 08:40:35,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:40:35,707 INFO L93 Difference]: Finished difference Result 4406 states and 6325 transitions. [2022-04-28 08:40:35,707 INFO L276 IsEmpty]: Start isEmpty. Operand 4406 states and 6325 transitions. [2022-04-28 08:40:35,712 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:40:35,713 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:40:35,713 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:40:35,713 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:40:35,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-28 08:40:36,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4403 states to 4403 states and 6322 transitions. [2022-04-28 08:40:36,681 INFO L78 Accepts]: Start accepts. Automaton has 4403 states and 6322 transitions. Word has length 69 [2022-04-28 08:40:36,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:40:36,681 INFO L495 AbstractCegarLoop]: Abstraction has 4403 states and 6322 transitions. [2022-04-28 08:40:36,682 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-28 08:40:36,682 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4403 states and 6322 transitions. [2022-04-28 08:40:56,539 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6322 edges. 6322 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:40:56,539 INFO L276 IsEmpty]: Start isEmpty. Operand 4403 states and 6322 transitions. [2022-04-28 08:40:56,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-04-28 08:40:56,540 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:40:56,540 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:40:56,561 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-28 08:40:56,740 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-28 08:40:56,741 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:40:56,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:40:56,741 INFO L85 PathProgramCache]: Analyzing trace with hash 1515186020, now seen corresponding path program 1 times [2022-04-28 08:40:56,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:40:56,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1129314005] [2022-04-28 08:40:56,748 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:40:56,748 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:40:56,748 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:40:56,748 INFO L85 PathProgramCache]: Analyzing trace with hash 1515186020, now seen corresponding path program 2 times [2022-04-28 08:40:56,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:40:56,748 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142347004] [2022-04-28 08:40:56,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:40:56,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:40:56,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:40:56,966 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:40:56,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:40:57,000 INFO L290 TraceCheckUtils]: 0: Hoare triple {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-28 08:40:57,000 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,000 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-28 08:40:57,031 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:40:57,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:40:57,046 INFO L290 TraceCheckUtils]: 0: Hoare triple {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-28 08:40:57,046 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,046 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291489#false} #6457#return; {291489#false} is VALID [2022-04-28 08:40:57,059 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:40:57,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:40:57,069 INFO L290 TraceCheckUtils]: 0: Hoare triple {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-28 08:40:57,069 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,069 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291489#false} #6459#return; {291489#false} is VALID [2022-04-28 08:40:57,079 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-28 08:40:57,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:40:57,094 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-28 08:40:57,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:40:57,103 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:40:57,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:40:57,110 INFO L290 TraceCheckUtils]: 0: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L290 TraceCheckUtils]: 0: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L272 TraceCheckUtils]: 1: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L290 TraceCheckUtils]: 3: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L290 TraceCheckUtils]: 4: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-28 08:40:57,111 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-28 08:40:57,112 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-28 08:40:57,112 INFO L290 TraceCheckUtils]: 8: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-28 08:40:57,112 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,112 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-28 08:40:57,112 INFO L290 TraceCheckUtils]: 0: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-28 08:40:57,112 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-28 08:40:57,113 INFO L272 TraceCheckUtils]: 2: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:40:57,113 INFO L290 TraceCheckUtils]: 3: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-28 08:40:57,113 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-28 08:40:57,113 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-28 08:40:57,113 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-28 08:40:57,113 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,113 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-28 08:40:57,113 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-28 08:40:57,114 INFO L290 TraceCheckUtils]: 10: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-28 08:40:57,114 INFO L290 TraceCheckUtils]: 11: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-28 08:40:57,114 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,114 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-28 08:40:57,114 INFO L290 TraceCheckUtils]: 14: Hoare triple {291488#true} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291488#true} is VALID [2022-04-28 08:40:57,114 INFO L290 TraceCheckUtils]: 15: Hoare triple {291488#true} assume !(~status~1 >= 0);#res := ~status~1; {291488#true} is VALID [2022-04-28 08:40:57,114 INFO L290 TraceCheckUtils]: 16: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,114 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {291488#true} {291489#false} #6461#return; {291489#false} is VALID [2022-04-28 08:40:57,117 INFO L272 TraceCheckUtils]: 0: Hoare triple {291488#true} call ULTIMATE.init(); {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:40:57,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-28 08:40:57,117 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,117 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-28 08:40:57,117 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret1155 := main(); {291488#true} is VALID [2022-04-28 08:40:57,117 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {291493#(= main_~i~24 0)} is VALID [2022-04-28 08:40:57,118 INFO L290 TraceCheckUtils]: 6: Hoare triple {291493#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {291493#(= main_~i~24 0)} is VALID [2022-04-28 08:40:57,118 INFO L290 TraceCheckUtils]: 7: Hoare triple {291493#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {291494#(<= main_~i~24 1)} is VALID [2022-04-28 08:40:57,118 INFO L290 TraceCheckUtils]: 8: Hoare triple {291494#(<= main_~i~24 1)} assume !(~i~24 < 4); {291489#false} is VALID [2022-04-28 08:40:57,118 INFO L290 TraceCheckUtils]: 9: Hoare triple {291489#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {291489#false} is VALID [2022-04-28 08:40:57,119 INFO L272 TraceCheckUtils]: 10: Hoare triple {291489#false} call _BLAST_init(); {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:40:57,119 INFO L290 TraceCheckUtils]: 11: Hoare triple {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-28 08:40:57,119 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,119 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291489#false} #6457#return; {291489#false} is VALID [2022-04-28 08:40:57,119 INFO L290 TraceCheckUtils]: 14: Hoare triple {291489#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {291489#false} is VALID [2022-04-28 08:40:57,119 INFO L290 TraceCheckUtils]: 15: Hoare triple {291489#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {291489#false} is VALID [2022-04-28 08:40:57,119 INFO L272 TraceCheckUtils]: 16: Hoare triple {291489#false} call stub_driver_init(); {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:40:57,119 INFO L290 TraceCheckUtils]: 17: Hoare triple {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-28 08:40:57,119 INFO L290 TraceCheckUtils]: 18: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,119 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {291488#true} {291489#false} #6459#return; {291489#false} is VALID [2022-04-28 08:40:57,119 INFO L290 TraceCheckUtils]: 20: Hoare triple {291489#false} assume !!(~status~31 >= 0); {291489#false} is VALID [2022-04-28 08:40:57,119 INFO L290 TraceCheckUtils]: 21: Hoare triple {291489#false} assume 0 == ~__BLAST_NONDET~3; {291489#false} is VALID [2022-04-28 08:40:57,119 INFO L272 TraceCheckUtils]: 22: Hoare triple {291489#false} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:40:57,120 INFO L290 TraceCheckUtils]: 23: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-28 08:40:57,120 INFO L290 TraceCheckUtils]: 24: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-28 08:40:57,120 INFO L272 TraceCheckUtils]: 25: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:40:57,120 INFO L290 TraceCheckUtils]: 26: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L272 TraceCheckUtils]: 27: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 28: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 29: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 30: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 32: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 33: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 34: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 35: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 37: Hoare triple {291488#true} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 38: Hoare triple {291488#true} assume !(~status~1 >= 0);#res := ~status~1; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L290 TraceCheckUtils]: 39: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:57,121 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {291488#true} {291489#false} #6461#return; {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 41: Hoare triple {291489#false} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 42: Hoare triple {291489#false} assume !(0 != ~we_should_unload~0); {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 43: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 44: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 45: Hoare triple {291489#false} assume !(~s~0 == ~UNLOADED~0); {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 46: Hoare triple {291489#false} assume !(-1 == ~status~31); {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 47: Hoare triple {291489#false} assume ~s~0 != ~SKIP2~0; {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 48: Hoare triple {291489#false} assume ~s~0 != ~IPC~0; {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 49: Hoare triple {291489#false} assume ~s~0 != ~DC~0; {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L272 TraceCheckUtils]: 50: Hoare triple {291489#false} call errorFn(); {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L290 TraceCheckUtils]: 51: Hoare triple {291489#false} assume !false; {291489#false} is VALID [2022-04-28 08:40:57,122 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:40:57,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:40:57,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [142347004] [2022-04-28 08:40:57,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [142347004] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:40:57,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1976638496] [2022-04-28 08:40:57,123 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:40:57,123 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:40:57,123 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:40:57,124 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:40:57,125 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-28 08:40:57,818 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:40:57,818 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:40:57,822 INFO L263 TraceCheckSpWp]: Trace formula consists of 1514 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-28 08:40:57,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:40:57,856 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:40:58,053 INFO L272 TraceCheckUtils]: 0: Hoare triple {291488#true} call ULTIMATE.init(); {291488#true} is VALID [2022-04-28 08:40:58,053 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret1155 := main(); {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L290 TraceCheckUtils]: 8: Hoare triple {291488#true} assume !(~i~24 < 4); {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L272 TraceCheckUtils]: 10: Hoare triple {291488#true} call _BLAST_init(); {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L290 TraceCheckUtils]: 11: Hoare triple {291488#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:58,054 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291488#true} #6457#return; {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 14: Hoare triple {291488#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 15: Hoare triple {291488#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L272 TraceCheckUtils]: 16: Hoare triple {291488#true} call stub_driver_init(); {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 17: Hoare triple {291488#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 18: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {291488#true} {291488#true} #6459#return; {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 20: Hoare triple {291488#true} assume !!(~status~31 >= 0); {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 21: Hoare triple {291488#true} assume 0 == ~__BLAST_NONDET~3; {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L272 TraceCheckUtils]: 22: Hoare triple {291488#true} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 23: Hoare triple {291488#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 24: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L272 TraceCheckUtils]: 25: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291488#true} is VALID [2022-04-28 08:40:58,055 INFO L290 TraceCheckUtils]: 26: Hoare triple {291488#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-28 08:40:58,056 INFO L272 TraceCheckUtils]: 27: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-28 08:40:58,056 INFO L290 TraceCheckUtils]: 28: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-28 08:40:58,056 INFO L290 TraceCheckUtils]: 29: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-28 08:40:58,056 INFO L290 TraceCheckUtils]: 30: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-28 08:40:58,056 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-28 08:40:58,056 INFO L290 TraceCheckUtils]: 32: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-28 08:40:58,056 INFO L290 TraceCheckUtils]: 33: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291640#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} is VALID [2022-04-28 08:40:58,057 INFO L290 TraceCheckUtils]: 34: Hoare triple {291640#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} #res := ~status~23; {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} is VALID [2022-04-28 08:40:58,057 INFO L290 TraceCheckUtils]: 35: Hoare triple {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} assume true; {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} is VALID [2022-04-28 08:40:58,058 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} {291488#true} #5993#return; {291651#(<= 0 |PptDispatchCreate_#t~ret289|)} is VALID [2022-04-28 08:40:58,058 INFO L290 TraceCheckUtils]: 37: Hoare triple {291651#(<= 0 |PptDispatchCreate_#t~ret289|)} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291655#(<= 0 PptDispatchCreate_~status~1)} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 38: Hoare triple {291655#(<= 0 PptDispatchCreate_~status~1)} assume !(~status~1 >= 0);#res := ~status~1; {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 39: Hoare triple {291489#false} assume true; {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {291489#false} {291488#true} #6461#return; {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 41: Hoare triple {291489#false} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 42: Hoare triple {291489#false} assume !(0 != ~we_should_unload~0); {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 43: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 44: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 45: Hoare triple {291489#false} assume !(~s~0 == ~UNLOADED~0); {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 46: Hoare triple {291489#false} assume !(-1 == ~status~31); {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 47: Hoare triple {291489#false} assume ~s~0 != ~SKIP2~0; {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 48: Hoare triple {291489#false} assume ~s~0 != ~IPC~0; {291489#false} is VALID [2022-04-28 08:40:58,059 INFO L290 TraceCheckUtils]: 49: Hoare triple {291489#false} assume ~s~0 != ~DC~0; {291489#false} is VALID [2022-04-28 08:40:58,060 INFO L272 TraceCheckUtils]: 50: Hoare triple {291489#false} call errorFn(); {291489#false} is VALID [2022-04-28 08:40:58,060 INFO L290 TraceCheckUtils]: 51: Hoare triple {291489#false} assume !false; {291489#false} is VALID [2022-04-28 08:40:58,060 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:40:58,060 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:40:58,060 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1976638496] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:40:58,060 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:40:58,060 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-04-28 08:40:58,060 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:40:58,060 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1129314005] [2022-04-28 08:40:58,060 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1129314005] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:40:58,060 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:40:58,061 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-28 08:40:58,061 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186670537] [2022-04-28 08:40:58,061 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:40:58,061 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-04-28 08:40:58,061 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:40:58,061 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:40:58,118 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:40:58,119 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-28 08:40:58,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:40:58,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-28 08:40:58,119 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2022-04-28 08:40:58,119 INFO L87 Difference]: Start difference. First operand 4403 states and 6322 transitions. Second operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:41:47,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:41:47,256 INFO L93 Difference]: Finished difference Result 4446 states and 6373 transitions. [2022-04-28 08:41:47,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-28 08:41:47,256 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-04-28 08:41:47,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:41:47,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:41:47,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 2848 transitions. [2022-04-28 08:41:47,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:41:47,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 2848 transitions. [2022-04-28 08:41:47,471 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 2848 transitions. [2022-04-28 08:41:50,249 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2848 edges. 2848 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:41:51,117 INFO L225 Difference]: With dead ends: 4446 [2022-04-28 08:41:51,117 INFO L226 Difference]: Without dead ends: 4402 [2022-04-28 08:41:51,119 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2022-04-28 08:41:51,119 INFO L413 NwaCegarLoop]: 2785 mSDtfsCounter, 10 mSDsluCounter, 11121 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 13906 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 08:41:51,119 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 13906 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 08:41:51,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4402 states. [2022-04-28 08:41:51,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4402 to 4400. [2022-04-28 08:41:51,948 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 08:41:51,953 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-28 08:41:51,956 INFO L74 IsIncluded]: Start isIncluded. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-28 08:41:51,959 INFO L87 Difference]: Start difference. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-28 08:41:52,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:41:52,512 INFO L93 Difference]: Finished difference Result 4402 states and 6320 transitions. [2022-04-28 08:41:52,512 INFO L276 IsEmpty]: Start isEmpty. Operand 4402 states and 6320 transitions. [2022-04-28 08:41:52,518 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:41:52,518 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:41:52,524 INFO L74 IsIncluded]: Start isIncluded. First operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) Second operand 4402 states. [2022-04-28 08:41:52,528 INFO L87 Difference]: Start difference. First operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) Second operand 4402 states. [2022-04-28 08:41:53,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:41:53,078 INFO L93 Difference]: Finished difference Result 4402 states and 6320 transitions. [2022-04-28 08:41:53,078 INFO L276 IsEmpty]: Start isEmpty. Operand 4402 states and 6320 transitions. [2022-04-28 08:41:53,084 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 08:41:53,084 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 08:41:53,084 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 08:41:53,084 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 08:41:53,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-28 08:41:54,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4400 states to 4400 states and 6318 transitions. [2022-04-28 08:41:54,041 INFO L78 Accepts]: Start accepts. Automaton has 4400 states and 6318 transitions. Word has length 52 [2022-04-28 08:41:54,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 08:41:54,042 INFO L495 AbstractCegarLoop]: Abstraction has 4400 states and 6318 transitions. [2022-04-28 08:41:54,042 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-28 08:41:54,042 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4400 states and 6318 transitions. [2022-04-28 08:42:14,102 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6318 edges. 6318 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:42:14,103 INFO L276 IsEmpty]: Start isEmpty. Operand 4400 states and 6318 transitions. [2022-04-28 08:42:14,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-28 08:42:14,104 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 08:42:14,104 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 08:42:14,124 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-04-28 08:42:14,319 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-28 08:42:14,319 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 08:42:14,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 08:42:14,320 INFO L85 PathProgramCache]: Analyzing trace with hash 851781494, now seen corresponding path program 1 times [2022-04-28 08:42:14,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-28 08:42:14,320 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1730851653] [2022-04-28 08:42:14,325 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-28 08:42:14,325 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-28 08:42:14,325 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-28 08:42:14,325 INFO L85 PathProgramCache]: Analyzing trace with hash 851781494, now seen corresponding path program 2 times [2022-04-28 08:42:14,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 08:42:14,325 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1051605834] [2022-04-28 08:42:14,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 08:42:14,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 08:42:14,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:14,536 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 08:42:14,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:14,556 INFO L290 TraceCheckUtils]: 0: Hoare triple {318229#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318197#true} is VALID [2022-04-28 08:42:14,557 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,557 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318197#true} {318197#true} #6857#return; {318197#true} is VALID [2022-04-28 08:42:14,581 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-28 08:42:14,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:14,589 INFO L290 TraceCheckUtils]: 0: Hoare triple {318230#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318197#true} is VALID [2022-04-28 08:42:14,589 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,589 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318197#true} {318198#false} #6457#return; {318198#false} is VALID [2022-04-28 08:42:14,603 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-28 08:42:14,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:14,610 INFO L290 TraceCheckUtils]: 0: Hoare triple {318231#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {318197#true} is VALID [2022-04-28 08:42:14,610 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,610 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318197#true} {318198#false} #6459#return; {318198#false} is VALID [2022-04-28 08:42:14,622 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-28 08:42:14,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:14,634 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-28 08:42:14,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:14,649 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:42:14,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:14,656 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-28 08:42:14,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:14,661 INFO L290 TraceCheckUtils]: 0: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,662 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-28 08:42:14,662 INFO L290 TraceCheckUtils]: 2: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,662 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-28 08:42:14,662 INFO L290 TraceCheckUtils]: 0: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,662 INFO L272 TraceCheckUtils]: 1: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:42:14,662 INFO L290 TraceCheckUtils]: 2: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,663 INFO L290 TraceCheckUtils]: 3: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-28 08:42:14,663 INFO L290 TraceCheckUtils]: 4: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,663 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-28 08:42:14,663 INFO L290 TraceCheckUtils]: 6: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,663 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {318197#true} {318197#true} #6455#return; {318197#true} is VALID [2022-04-28 08:42:14,663 INFO L290 TraceCheckUtils]: 0: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {318197#true} is VALID [2022-04-28 08:42:14,664 INFO L272 TraceCheckUtils]: 1: Hoare triple {318197#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:42:14,664 INFO L290 TraceCheckUtils]: 2: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,664 INFO L272 TraceCheckUtils]: 3: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:42:14,664 INFO L290 TraceCheckUtils]: 4: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,664 INFO L290 TraceCheckUtils]: 5: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-28 08:42:14,664 INFO L290 TraceCheckUtils]: 6: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,664 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-28 08:42:14,665 INFO L290 TraceCheckUtils]: 8: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,665 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {318197#true} {318197#true} #6455#return; {318197#true} is VALID [2022-04-28 08:42:14,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {318197#true} #res := ~Status; {318197#true} is VALID [2022-04-28 08:42:14,665 INFO L290 TraceCheckUtils]: 11: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,665 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {318197#true} {318197#true} #5991#return; {318197#true} is VALID [2022-04-28 08:42:14,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {318197#true} is VALID [2022-04-28 08:42:14,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} assume 0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296;havoc #t~mem287; {318197#true} is VALID [2022-04-28 08:42:14,666 INFO L272 TraceCheckUtils]: 2: Hoare triple {318197#true} call #t~ret288 := PptFailRequest(~Irp.base, ~Irp.offset, -1073741738); {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:42:14,666 INFO L290 TraceCheckUtils]: 3: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {318197#true} is VALID [2022-04-28 08:42:14,666 INFO L272 TraceCheckUtils]: 4: Hoare triple {318197#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:42:14,666 INFO L290 TraceCheckUtils]: 5: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,667 INFO L272 TraceCheckUtils]: 6: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:42:14,667 INFO L290 TraceCheckUtils]: 7: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,667 INFO L290 TraceCheckUtils]: 8: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-28 08:42:14,667 INFO L290 TraceCheckUtils]: 9: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,667 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-28 08:42:14,667 INFO L290 TraceCheckUtils]: 11: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,667 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {318197#true} {318197#true} #6455#return; {318197#true} is VALID [2022-04-28 08:42:14,667 INFO L290 TraceCheckUtils]: 13: Hoare triple {318197#true} #res := ~Status; {318197#true} is VALID [2022-04-28 08:42:14,668 INFO L290 TraceCheckUtils]: 14: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,668 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {318197#true} {318197#true} #5991#return; {318197#true} is VALID [2022-04-28 08:42:14,668 INFO L290 TraceCheckUtils]: 16: Hoare triple {318197#true} assume -2147483648 <= #t~ret288 && #t~ret288 <= 2147483647;~tmp~5 := #t~ret288;havoc #t~ret288;#res := ~tmp~5; {318197#true} is VALID [2022-04-28 08:42:14,668 INFO L290 TraceCheckUtils]: 17: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,668 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {318197#true} {318198#false} #6461#return; {318198#false} is VALID [2022-04-28 08:42:14,670 INFO L272 TraceCheckUtils]: 0: Hoare triple {318197#true} call ULTIMATE.init(); {318229#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 08:42:14,670 INFO L290 TraceCheckUtils]: 1: Hoare triple {318229#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318197#true} is VALID [2022-04-28 08:42:14,671 INFO L290 TraceCheckUtils]: 2: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,671 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318197#true} {318197#true} #6857#return; {318197#true} is VALID [2022-04-28 08:42:14,671 INFO L272 TraceCheckUtils]: 4: Hoare triple {318197#true} call #t~ret1155 := main(); {318197#true} is VALID [2022-04-28 08:42:14,671 INFO L290 TraceCheckUtils]: 5: Hoare triple {318197#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {318202#(= main_~i~24 0)} is VALID [2022-04-28 08:42:14,671 INFO L290 TraceCheckUtils]: 6: Hoare triple {318202#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {318202#(= main_~i~24 0)} is VALID [2022-04-28 08:42:14,672 INFO L290 TraceCheckUtils]: 7: Hoare triple {318202#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {318203#(<= main_~i~24 1)} is VALID [2022-04-28 08:42:14,672 INFO L290 TraceCheckUtils]: 8: Hoare triple {318203#(<= main_~i~24 1)} assume !(~i~24 < 4); {318198#false} is VALID [2022-04-28 08:42:14,672 INFO L290 TraceCheckUtils]: 9: Hoare triple {318198#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {318198#false} is VALID [2022-04-28 08:42:14,672 INFO L272 TraceCheckUtils]: 10: Hoare triple {318198#false} call _BLAST_init(); {318230#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:42:14,672 INFO L290 TraceCheckUtils]: 11: Hoare triple {318230#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318197#true} is VALID [2022-04-28 08:42:14,672 INFO L290 TraceCheckUtils]: 12: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,672 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {318197#true} {318198#false} #6457#return; {318198#false} is VALID [2022-04-28 08:42:14,672 INFO L290 TraceCheckUtils]: 14: Hoare triple {318198#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {318198#false} is VALID [2022-04-28 08:42:14,672 INFO L290 TraceCheckUtils]: 15: Hoare triple {318198#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {318198#false} is VALID [2022-04-28 08:42:14,673 INFO L272 TraceCheckUtils]: 16: Hoare triple {318198#false} call stub_driver_init(); {318231#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:42:14,673 INFO L290 TraceCheckUtils]: 17: Hoare triple {318231#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {318197#true} is VALID [2022-04-28 08:42:14,673 INFO L290 TraceCheckUtils]: 18: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,673 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {318197#true} {318198#false} #6459#return; {318198#false} is VALID [2022-04-28 08:42:14,673 INFO L290 TraceCheckUtils]: 20: Hoare triple {318198#false} assume !!(~status~31 >= 0); {318198#false} is VALID [2022-04-28 08:42:14,673 INFO L290 TraceCheckUtils]: 21: Hoare triple {318198#false} assume 0 == ~__BLAST_NONDET~3; {318198#false} is VALID [2022-04-28 08:42:14,673 INFO L272 TraceCheckUtils]: 22: Hoare triple {318198#false} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:42:14,673 INFO L290 TraceCheckUtils]: 23: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {318197#true} is VALID [2022-04-28 08:42:14,673 INFO L290 TraceCheckUtils]: 24: Hoare triple {318197#true} assume 0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296;havoc #t~mem287; {318197#true} is VALID [2022-04-28 08:42:14,674 INFO L272 TraceCheckUtils]: 25: Hoare triple {318197#true} call #t~ret288 := PptFailRequest(~Irp.base, ~Irp.offset, -1073741738); {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-28 08:42:14,674 INFO L290 TraceCheckUtils]: 26: Hoare triple {318232#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {318197#true} is VALID [2022-04-28 08:42:14,674 INFO L272 TraceCheckUtils]: 27: Hoare triple {318197#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:42:14,674 INFO L290 TraceCheckUtils]: 28: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,675 INFO L272 TraceCheckUtils]: 29: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318254#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-28 08:42:14,675 INFO L290 TraceCheckUtils]: 30: Hoare triple {318254#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:14,675 INFO L290 TraceCheckUtils]: 31: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-28 08:42:14,675 INFO L290 TraceCheckUtils]: 32: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,675 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-28 08:42:14,675 INFO L290 TraceCheckUtils]: 34: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,675 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {318197#true} {318197#true} #6455#return; {318197#true} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 36: Hoare triple {318197#true} #res := ~Status; {318197#true} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 37: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,676 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {318197#true} {318197#true} #5991#return; {318197#true} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 39: Hoare triple {318197#true} assume -2147483648 <= #t~ret288 && #t~ret288 <= 2147483647;~tmp~5 := #t~ret288;havoc #t~ret288;#res := ~tmp~5; {318197#true} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 40: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:14,676 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {318197#true} {318198#false} #6461#return; {318198#false} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 42: Hoare triple {318198#false} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {318198#false} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 43: Hoare triple {318198#false} assume !(0 != ~we_should_unload~0); {318198#false} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 44: Hoare triple {318198#false} assume !(1 == ~pended~0); {318198#false} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 45: Hoare triple {318198#false} assume !(1 == ~pended~0); {318198#false} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 46: Hoare triple {318198#false} assume !(~s~0 == ~UNLOADED~0); {318198#false} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 47: Hoare triple {318198#false} assume !(-1 == ~status~31); {318198#false} is VALID [2022-04-28 08:42:14,676 INFO L290 TraceCheckUtils]: 48: Hoare triple {318198#false} assume !(~s~0 != ~SKIP2~0); {318198#false} is VALID [2022-04-28 08:42:14,677 INFO L290 TraceCheckUtils]: 49: Hoare triple {318198#false} assume !(1 == ~pended~0); {318198#false} is VALID [2022-04-28 08:42:14,677 INFO L290 TraceCheckUtils]: 50: Hoare triple {318198#false} assume ~s~0 == ~DC~0; {318198#false} is VALID [2022-04-28 08:42:14,677 INFO L290 TraceCheckUtils]: 51: Hoare triple {318198#false} assume 259 == ~status~31; {318198#false} is VALID [2022-04-28 08:42:14,677 INFO L272 TraceCheckUtils]: 52: Hoare triple {318198#false} call errorFn(); {318198#false} is VALID [2022-04-28 08:42:14,677 INFO L290 TraceCheckUtils]: 53: Hoare triple {318198#false} assume !false; {318198#false} is VALID [2022-04-28 08:42:14,677 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 08:42:14,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 08:42:14,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1051605834] [2022-04-28 08:42:14,677 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1051605834] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-28 08:42:14,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1704797012] [2022-04-28 08:42:14,678 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-28 08:42:14,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-28 08:42:14,678 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 08:42:14,679 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-28 08:42:14,715 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-28 08:42:15,460 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-28 08:42:15,460 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-28 08:42:15,464 INFO L263 TraceCheckSpWp]: Trace formula consists of 1517 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-28 08:42:15,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 08:42:15,499 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-28 08:42:15,764 INFO L272 TraceCheckUtils]: 0: Hoare triple {318197#true} call ULTIMATE.init(); {318197#true} is VALID [2022-04-28 08:42:15,764 INFO L290 TraceCheckUtils]: 1: Hoare triple {318197#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318197#true} is VALID [2022-04-28 08:42:15,764 INFO L290 TraceCheckUtils]: 2: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:15,764 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318197#true} {318197#true} #6857#return; {318197#true} is VALID [2022-04-28 08:42:15,764 INFO L272 TraceCheckUtils]: 4: Hoare triple {318197#true} call #t~ret1155 := main(); {318197#true} is VALID [2022-04-28 08:42:15,764 INFO L290 TraceCheckUtils]: 5: Hoare triple {318197#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 6: Hoare triple {318197#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 7: Hoare triple {318197#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 8: Hoare triple {318197#true} assume !(~i~24 < 4); {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 9: Hoare triple {318197#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L272 TraceCheckUtils]: 10: Hoare triple {318197#true} call _BLAST_init(); {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 11: Hoare triple {318197#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 12: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {318197#true} {318197#true} #6457#return; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 14: Hoare triple {318197#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 15: Hoare triple {318197#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L272 TraceCheckUtils]: 16: Hoare triple {318197#true} call stub_driver_init(); {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 17: Hoare triple {318197#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {318197#true} is VALID [2022-04-28 08:42:15,765 INFO L290 TraceCheckUtils]: 18: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:15,766 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {318197#true} {318197#true} #6459#return; {318197#true} is VALID [2022-04-28 08:42:15,766 INFO L290 TraceCheckUtils]: 20: Hoare triple {318197#true} assume !!(~status~31 >= 0); {318197#true} is VALID [2022-04-28 08:42:15,766 INFO L290 TraceCheckUtils]: 21: Hoare triple {318197#true} assume 0 == ~__BLAST_NONDET~3; {318197#true} is VALID [2022-04-28 08:42:15,766 INFO L272 TraceCheckUtils]: 22: Hoare triple {318197#true} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {318197#true} is VALID [2022-04-28 08:42:15,766 INFO L290 TraceCheckUtils]: 23: Hoare triple {318197#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {318197#true} is VALID [2022-04-28 08:42:15,766 INFO L290 TraceCheckUtils]: 24: Hoare triple {318197#true} assume 0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296;havoc #t~mem287; {318197#true} is VALID [2022-04-28 08:42:15,766 INFO L272 TraceCheckUtils]: 25: Hoare triple {318197#true} call #t~ret288 := PptFailRequest(~Irp.base, ~Irp.offset, -1073741738); {318197#true} is VALID [2022-04-28 08:42:15,767 INFO L290 TraceCheckUtils]: 26: Hoare triple {318197#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} is VALID [2022-04-28 08:42:15,767 INFO L272 TraceCheckUtils]: 27: Hoare triple {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {318197#true} is VALID [2022-04-28 08:42:15,767 INFO L290 TraceCheckUtils]: 28: Hoare triple {318197#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:15,767 INFO L272 TraceCheckUtils]: 29: Hoare triple {318197#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {318197#true} is VALID [2022-04-28 08:42:15,767 INFO L290 TraceCheckUtils]: 30: Hoare triple {318197#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {318197#true} is VALID [2022-04-28 08:42:15,767 INFO L290 TraceCheckUtils]: 31: Hoare triple {318197#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {318197#true} is VALID [2022-04-28 08:42:15,767 INFO L290 TraceCheckUtils]: 32: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:15,767 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {318197#true} {318197#true} #6659#return; {318197#true} is VALID [2022-04-28 08:42:15,767 INFO L290 TraceCheckUtils]: 34: Hoare triple {318197#true} assume true; {318197#true} is VALID [2022-04-28 08:42:15,768 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {318197#true} {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} #6455#return; {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} is VALID [2022-04-28 08:42:15,768 INFO L290 TraceCheckUtils]: 36: Hoare triple {318340#(<= PptFailRequest_~Status |PptFailRequest_#in~Status|)} #res := ~Status; {318371#(<= |PptFailRequest_#res| |PptFailRequest_#in~Status|)} is VALID [2022-04-28 08:42:15,769 INFO L290 TraceCheckUtils]: 37: Hoare triple {318371#(<= |PptFailRequest_#res| |PptFailRequest_#in~Status|)} assume true; {318371#(<= |PptFailRequest_#res| |PptFailRequest_#in~Status|)} is VALID [2022-04-28 08:42:15,769 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {318371#(<= |PptFailRequest_#res| |PptFailRequest_#in~Status|)} {318197#true} #5991#return; {318378#(<= (+ 1073741738 |PptDispatchCreate_#t~ret288|) 0)} is VALID [2022-04-28 08:42:15,770 INFO L290 TraceCheckUtils]: 39: Hoare triple {318378#(<= (+ 1073741738 |PptDispatchCreate_#t~ret288|) 0)} assume -2147483648 <= #t~ret288 && #t~ret288 <= 2147483647;~tmp~5 := #t~ret288;havoc #t~ret288;#res := ~tmp~5; {318382#(<= (+ |PptDispatchCreate_#res| 1073741738) 0)} is VALID [2022-04-28 08:42:15,770 INFO L290 TraceCheckUtils]: 40: Hoare triple {318382#(<= (+ |PptDispatchCreate_#res| 1073741738) 0)} assume true; {318382#(<= (+ |PptDispatchCreate_#res| 1073741738) 0)} is VALID [2022-04-28 08:42:15,771 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {318382#(<= (+ |PptDispatchCreate_#res| 1073741738) 0)} {318197#true} #6461#return; {318389#(<= (+ 1073741738 |main_#t~ret1109|) 0)} is VALID [2022-04-28 08:42:15,771 INFO L290 TraceCheckUtils]: 42: Hoare triple {318389#(<= (+ 1073741738 |main_#t~ret1109|) 0)} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,771 INFO L290 TraceCheckUtils]: 43: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(0 != ~we_should_unload~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,772 INFO L290 TraceCheckUtils]: 44: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(1 == ~pended~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,772 INFO L290 TraceCheckUtils]: 45: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(1 == ~pended~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,772 INFO L290 TraceCheckUtils]: 46: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(~s~0 == ~UNLOADED~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,773 INFO L290 TraceCheckUtils]: 47: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(-1 == ~status~31); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,773 INFO L290 TraceCheckUtils]: 48: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(~s~0 != ~SKIP2~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,773 INFO L290 TraceCheckUtils]: 49: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume !(1 == ~pended~0); {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,773 INFO L290 TraceCheckUtils]: 50: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume ~s~0 == ~DC~0; {318393#(<= (+ 1073741738 main_~status~31) 0)} is VALID [2022-04-28 08:42:15,774 INFO L290 TraceCheckUtils]: 51: Hoare triple {318393#(<= (+ 1073741738 main_~status~31) 0)} assume 259 == ~status~31; {318198#false} is VALID [2022-04-28 08:42:15,774 INFO L272 TraceCheckUtils]: 52: Hoare triple {318198#false} call errorFn(); {318198#false} is VALID [2022-04-28 08:42:15,774 INFO L290 TraceCheckUtils]: 53: Hoare triple {318198#false} assume !false; {318198#false} is VALID [2022-04-28 08:42:15,774 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-28 08:42:15,774 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-28 08:42:15,774 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1704797012] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:42:15,774 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-28 08:42:15,774 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-28 08:42:15,774 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-28 08:42:15,774 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1730851653] [2022-04-28 08:42:15,775 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1730851653] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 08:42:15,775 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 08:42:15,775 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-28 08:42:15,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1927526267] [2022-04-28 08:42:15,775 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 08:42:15,775 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7) Word has length 54 [2022-04-28 08:42:15,775 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 08:42:15,775 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7) [2022-04-28 08:42:15,833 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:42:15,833 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-28 08:42:15,833 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-28 08:42:15,833 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-28 08:42:15,833 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2022-04-28 08:42:15,834 INFO L87 Difference]: Start difference. First operand 4400 states and 6318 transitions. Second operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7) [2022-04-28 08:43:30,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 08:43:30,380 INFO L93 Difference]: Finished difference Result 4418 states and 6339 transitions. [2022-04-28 08:43:30,380 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-28 08:43:30,380 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7) Word has length 54 [2022-04-28 08:43:30,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 08:43:30,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7) [2022-04-28 08:43:30,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 2809 transitions. [2022-04-28 08:43:30,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.75) internal successors, (38), 6 states have internal predecessors, (38), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (7), 4 states have call predecessors, (7), 2 states have call successors, (7) [2022-04-28 08:43:30,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 2809 transitions. [2022-04-28 08:43:30,593 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 2809 transitions. [2022-04-28 08:43:33,713 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2809 edges. 2809 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 08:43:34,591 INFO L225 Difference]: With dead ends: 4418 [2022-04-28 08:43:34,591 INFO L226 Difference]: Without dead ends: 4398 [2022-04-28 08:43:34,592 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2022-04-28 08:43:34,593 INFO L413 NwaCegarLoop]: 2795 mSDtfsCounter, 7 mSDsluCounter, 16728 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 19523 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-28 08:43:34,593 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 19523 Invalid, 76 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-28 08:43:34,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4398 states.